CN116302732A

CN116302732A - Multiprocessor performance index acquisition method and device, electronic equipment and vehicle

Info

Publication number: CN116302732A
Application number: CN202211733202.8A
Authority: CN
Inventors: 杨伟; 黄自江; 谢宝友
Original assignee: Guoke Chushi Chongqing Software Co ltd
Current assignee: Guoke Chushi Chongqing Software Co ltd
Priority date: 2022-12-30
Filing date: 2022-12-30
Publication date: 2023-06-23

Abstract

The disclosure relates to a multiprocessor performance index acquisition method, a multiprocessor performance index acquisition device, electronic equipment and a vehicle, wherein the method comprises the following steps: the method comprises the steps of obtaining target information from a plurality of container records, wherein each container record corresponds to one container, each container record is a data structure for recording container information, each container record comprises a plurality of record information, the record information corresponds to a plurality of processors one by one, each record information is used for recording performance indexes of the corresponding processor, and the target information comprises at least one record information. Through the steps, the user mode can acquire the record information from the container record, so that the CPU micro-architecture data of the container is obtained, a scheduling basis is provided for the arrangement of the upper container, different containers are dynamically scheduled to a proper CPU, and interference among the containers is avoided.

Description

Multiprocessor performance index acquisition method and device, electronic equipment and vehicle

Technical Field

The disclosure relates to the field of computer technology, and in particular, to a method and a device for acquiring performance indexes of multiple processors, electronic equipment and a vehicle.

Background

In the related art, in order to fully utilize hardware resources, multiple applications are deployed in a mixed manner on one device, so that the hardware performance is utilized to the maximum to save the cost. Typically, a Linux operating system is installed on a machine and multiple containers are created, with different applications running on different containers. Since these containers are running on the same Linux kernel at the bottom, they may interfere with each other. Based on the method, the central processing unit (Central Processing Unit Processor, CPU) micro-architecture data of each container can be dynamically obtained in a kernel mode, a scheduling basis is provided for upper-layer container arrangement, different containers are dynamically scheduled to a proper CPU, and therefore interference among the containers is avoided, wherein the CPU micro-architecture data can be characterized by using performance indexes of the processor.

There is a need for a method of obtaining CPU microarchitectural data of a container.

Disclosure of Invention

In order to overcome the problems in the related art, the present disclosure provides a method, an apparatus, an electronic device, and a vehicle for acquiring a multiprocessor performance index.

According to a first aspect of an embodiment of the present disclosure, there is provided a multiprocessor performance index obtaining method, including obtaining target information from a plurality of container records, where each container record corresponds to one container, the container records are data structures for recording container information, each container record includes a plurality of record information, the plurality of record information corresponds to the plurality of processors one by one, each record information is used for recording performance indexes of the corresponding processor, and the target information includes at least one record information.

According to a second aspect of the embodiments of the present disclosure, there is provided a multiprocessor performance index obtaining apparatus, including a first obtaining module, configured to obtain target information from a plurality of container records, where each container record corresponds to one container, the container records are data structures for recording container information, each container record includes a plurality of record information, the plurality of record information corresponds to the plurality of processors one by one, each record information is used for recording performance indexes of the corresponding processor, and the target information includes at least one record information.

According to a third aspect of embodiments of the present disclosure, there is provided a vehicle storing a set of instruction sets that are executed by the vehicle to implement the multiprocessor performance index acquisition method provided by the first aspect of the present disclosure.

According to a fourth aspect of embodiments of the present disclosure, there is provided an electronic device, comprising: a processor; a memory for storing the processor-executable instructions; the processor is configured to read the executable instruction from the memory and execute the instruction to implement the multiprocessor performance index acquisition method provided in the first aspect of the present disclosure.

According to a fifth aspect of embodiments of the present disclosure, there is provided a computer-readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the steps of the multiprocessor performance index acquisition method provided by the first aspect of the present disclosure.

The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects: the user mode can acquire the record information from the container record, so as to acquire the CPU micro-architecture data of the container, provide a scheduling basis for the arrangement of the upper container, dynamically schedule different containers to the proper CPU, and avoid the interference among the containers.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.

FIG. 1 is a flowchart illustrating a method for multiprocessor performance index acquisition, according to an example embodiment;

FIG. 2 is a schematic diagram illustrating the structure of a container record, according to an exemplary embodiment;

FIG. 3 is a class diagram of a container record, according to an example embodiment;

FIG. 4 is a block diagram illustrating a multiprocessor performance index acquisition device, according to an example embodiment;

FIG. 5 is a block diagram of a vehicle, according to an exemplary embodiment;

fig. 6 is a block diagram of an electronic device, according to an example embodiment.

Detailed Description

Exemplary embodiments will be described in detail below with reference to the accompanying drawings.

It should be noted that the related embodiments and the drawings are only for the purpose of describing exemplary embodiments provided by the present disclosure, and not all embodiments of the present disclosure, nor should the present disclosure be construed to be limited by the related exemplary embodiments.

It should be noted that the terms "first," "second," and the like, as used in this disclosure, are used merely to distinguish between different steps, devices, or modules, and the like. Relational terms are used not to indicate any particular technical meaning nor sequence or interdependence between them.

It should be noted that the modifications of the terms "one", "a plurality", "at least one" as used in this disclosure are intended to be illustrative rather than limiting. Unless the context clearly indicates otherwise, it should be understood as "one or more".

It should be noted that the term "and/or" is used in this disclosure to describe an association between associated objects, and generally indicates that there are at least three associations. For example, a and/or B may at least represent: a exists independently, A and B exist simultaneously, and B exists independently.

It should be noted that the various steps recited in the method embodiments of the present disclosure may be performed in a different order and/or performed in parallel. The scope of the present disclosure is not limited by the order of description of the steps in the related embodiments unless specifically stated.

It should be noted that, all actions for acquiring signals, information or data in the present disclosure are performed under the condition of conforming to the corresponding data protection rule policy of the country of the location and obtaining the authorization given by the owner of the corresponding device.

Description of technical terms

CPU micro-architecture: i.e., microArchitecture, numerous extremely complex circuits including cache management, cache design, out-of-order execution, superscalar, superpipeline, memory control, branch prediction, etc., the efficiency of these architecture circuits directly determines CPU performance.

A performance monitor unit (Performance Monitoring Unit, PMU) for counting certain hardware events occurring in the system, such as Cache misses (Cache Miss) or branch prediction errors (Branch Misprediction), etc. Also, multiple events may be combined to calculate some high-level metrics, such as Cycles Per Instruction (CPI), cache hit rate, etc. One particular microarchitecture may provide hundreds of events through a PMU. The data of the CPU micro-architecture can be presented through PMU data, and one specific micro-architecture can provide hundreds of events through PMU, and the present disclosure mainly obtains common PMU data, including running instruction count, cycle count, branch prediction failure frequency, cache miss frequency and the like. The bottom layer of a container of the Linux system is realized through a container (Cgroup) and a Namespace, the CPU micro-architecture data is counted by taking the Cgroup as a unit in a kernel mode, and the upper layer can be related with the container through the Cgroup.

A container: the method is a lightweight virtualization method, and can simultaneously run a plurality of virtual environments on a single host. Isolation and limitation of resources are achieved through Namespace, cgroup characteristics of Linux.

Control Groups (Cgroups) are mechanisms provided by the Linux kernel to limit, record, isolate the physical resources (e.g., CPU, memory, disk IO, etc.) used by the process group.

Exemplary method

FIG. 1 is a flow chart of a method for multiprocessor performance index acquisition, as shown in FIG. 1, that may be used in a system including multiple processors, according to an exemplary embodiment, comprising the steps of:

step S110, obtaining target information from a plurality of container records, where each container record corresponds to a container, where each container record is a data structure for recording container information, each container record includes a plurality of record information, the plurality of record information corresponds to the plurality of processors one by one, each record information is used to record performance indexes of the corresponding processor, and the target information includes at least one record information. The target information may include part of the record information of the container record, or may include all record information in all container records, which is not limited herein.

Specifically, each time a container is created, a container record is created correspondingly, the container and the container record have a one-to-one correspondence, the container record is a data structure for recording container information, as shown in fig. 2, the container record is a container record, the container record includes a plurality of record information, each record information is used for recording a performance index of a processor, and different record information records performance indexes of different processors. As shown in fig. 2, the system includes N processors, where the chushi_group_record includes N record information, and each record information is used to record a performance index of one processor, where the performance index may be CPU micro-architecture data, specifically, PMU data values, and in this disclosure, the PMU data values may also be referred to as PMU data.

The container records are stored in a kernel mode, and the user mode needs to acquire the container records so as to know CPU micro-architecture data of each container, provide a scheduling basis for arranging containers on an upper layer, dynamically schedule different containers to a proper CPU, and further avoid interference among the containers. Step S110 may trigger execution based on the acquisition request sent by the container arrangement module in the user state, for example, the user state acquires the target information from the kernel state through the ioctl function call.

For example, a container (i.e., cgroup) in the kernel corresponds to a container record, and as shown in fig. 2, a container record is a chushi_cgroup_record structure, which contains PMU data parts, and the chushi_cgroup_record structure is an array corresponding to PMU data of the cgroup on each CPU. When the kernel performs the cgroup creation, a chushi_cgroup_record is newly created, and when the kernel performs the cgroup destruction, the corresponding chushi_cgroup_record is deleted. The chushi_cgroup_record is updated when the kernel switches processes.

When the user-state container arrangement module needs to acquire the CPU micro-architecture data of each container. Through the ioctl call to the kernel, a work queue processing function running on each CPU is scheduled in the kernel. All chushi_cgroup_record structures in the system are traversed in the workqueue processing function, the PMU data corresponding to the current CPU (namely the CPU corresponding to the workqueue processing function) are processed, and the data are copied to a user mode after being formatted. With parallel programming techniques, no locking is required during the process of updating chushi_group_record and obtaining PMU data from chushi_group_record. The system overhead of the whole scheme is extremely low (accounting for 0.1 percent of a single core), and the system can be normally operated in the system.

The container orchestration module in user mode periodically, e.g., every few seconds, calls to kernel mode to obtain PMU data in the system. And triggering the corresponding work queues on each CPU to dispatch and run in the kernel, and executing corresponding processing functions. All chushi_cgroup_record in the system is traversed in the work queue corresponding to the work queue processing function, the PMU data corresponding to the processor running in the work queue is processed, the data is formatted and copied to a buffer zone, the buffer zone is used for transferring the data between the kernel mode and the user mode, and then the sum value is cleared.

The formatted data obtained by the user mode comprises a container name, a CPU number and PMU data. And after the data are aggregated and analyzed according to the container names corresponding to different application containers in the user mode, each container is dispatched to a proper CPU, so that the interference among the containers is avoided.

In some embodiments of the present disclosure, step S110 may specifically include step S1101: traversing each container record through each processor, and acquiring record information corresponding to the processor from each container record;

specifically, each container record is traversed through a work queue running on each processor, and record information corresponding to the processor is obtained from each container record.

Step S1102: and determining the target information according to a plurality of recorded information.

Specifically, the record information is formatted to obtain formatted information, wherein the formatted information comprises an identifier of a container record to which the record information belongs, an identifier of a processor corresponding to the record information, and a performance index recorded in the record information.

Further, after step S110, the method further includes:

and step S111, grouping the target information according to the identification of the container record to obtain at least one group, wherein each group corresponds to one container. That is, the record information corresponding to the same container is in one packet.

Step S112, determining a processor for scheduling the container according to the sum of the performance indexes in the same packet. For each packet, the sum of performance indexes recorded by the record information in the packet is counted, and a processor for scheduling the container is determined according to the sum of the performance indexes.

In some embodiments of the present disclosure, prior to the step of obtaining the target information from the plurality of container records, the method further comprises:

and initializing a memory pool and a tree structure in a kernel, wherein the memory pool is used for distributing memory required by the container record, the tree structure is used for storing the container record, and a key of the tree structure is a pointer pointing to the container.

Specifically, the tree structure may be specifically referred to as a radix tree, and the memory pool is used to allocate the memory required by chushi_cgroup_record. The key (key) of the radix tree used to store the chushi_group_record is a pointer to the container in the kernel.

Further, after building the tree structure, all existing containers are traversed, the container record is created for each container, and the container record is added to the tree structure.

a work queue is created on each of the processors, the work queue being used to export PMU data stored on the processor from the core for each container record.

Specifically, a work queue is created on each processor that can traverse all container records in the kernel and obtain PMU data on the processor where the work queue resides from each container record. For example, if work queue 1 is created on processor 1 and work queue 2 is created on processor 2, the kernel includes container record 1 and container record 2, work queue 1 traverses container record 1 and container record 2, work queue 1 obtains PMU data for processor 1 from container record 1 and container record 2, work queue 2 traverses container record 1 and container record 2, and work queue 2 obtains PMU data for processor 2 from container record 1 and container record 2. The partial implementation code is as follows:

PMU events are created on each of the processors, the PMU events being used to generate PMU data. Specifically, the bottom layer is to use a Linux kernel-ready perf_event mechanism to call perf_event_create_kernel_counter () to register a hardware perf event. The partial implementation code is as follows:

traversing all existing containers in the current system, creating a container record for each container, and adding the container record to the radix tree, so that the containers in the current system are managed.

in the case of creating a container, a corresponding container record is created for the container.

Specifically, each time a container is created, a container record is created for that container. And adding a first hook function in a creation function for creating the container, wherein the first hook function is used for creating a container record corresponding to the container, and adding the container record into the tree structure.

For different kernel versions, it may be possible to hook on the creation function that creates the container in the manner of tracepoint or kprobe. In the corresponding hook function, the chushi_cgroup_record shown in fig. 2 is newly created when the container is created, and added to the radix tree.

In some embodiments of the present disclosure, after the step of creating a corresponding container record for the container in the case of creating a container, the method further comprises:

when a process is cut in, acquiring a current first performance index of a processor cut in by the process;

when the process is cut out, acquiring a current second performance index of the processor;

and storing the difference value of the first performance index and the second performance index into a container record corresponding to the process.

For example, when the process 1 runs on the processor 1, the process 1 acquires the current first performance index of the processor 1 when cutting into the processor 1, and acquires the current second performance index of the processor 1 when cutting out the running of the process 1 is completed, wherein the difference value between the first performance index and the second performance index is the performance index of the processor 1 during the running of the process 1 on the processor 1, the difference value is stored in a container record corresponding to the process 1, for example, the container record 1 corresponding to the process 1, and the difference value is stored in record information corresponding to the processor 1 in the container record 1.

It should be noted that, a process cut-in may be understood as a process that will start running on a processor, and a process cut-out may be understood as a process that will end running on a processor.

In the foregoing, the performance index may be PMU data, and the obtaining the current first performance index of the processor cut by the process specifically includes the following steps:

acquiring a current first PMU data value of a first processor;

determining a container where a process running on the first processor is located, and acquiring a first container record of the container;

and storing the first PMU data value into a first field of a data structure corresponding to the first processor in the first container record.

In the foregoing, the first processor is a processor cut by a process, the container record of the container corresponding to the process is a first container record, the first processor in the first easy record corresponds to a data structure, the data structure includes a first field, and the first PMU data value is stored in the first field.

Specifically, as shown in fig. 3, the data structure of the container record chushi_cgroup_record includes a plurality of record information chushi_cgroup_stat_percpu, each chushi_cgroup_stat_per_cpu includes three fields, last, sum, flags, respectively. The specific data structure settings of the container record and the record information can be adjusted according to practical situations, and are only examples and are not limited herein.

PMU data for the first processor is obtained, for example, by reading the count field of each perf_event. And finding a container where the corresponding process is located, further finding a container record corresponding to the container, and finding the corresponding container record from the radix tree. And saving the current PMU data value to the last of the chushi_cgroup_stat_percpu corresponding to the current CPU.

When the process is cut out, the current second performance index of the processor is obtained, and the method specifically comprises the following steps:

acquiring a current second PMU data value of the first processor;

subtracting the value in the first field of the data structure corresponding to the first processor in the first container record from the second PMU data value to obtain a difference value;

the difference is added to the value of the second field of the data structure.

In the foregoing, the first processor is a process-out processor, the container record of the container corresponding to the process is a first container record, the first processor in the first easy record corresponds to a data structure, the data structure includes a second field, and the difference value is stored in the second field.

The PMU data of the first processor is obtained, for example, by reading the count field of each perf _ event. And (3) finding a container where the process is located, and further finding a chushi_cgroup_record corresponding to the container. The last saved value of the current first container record chushi_cgroup_stat_percpu is subtracted from the current PMU data value and the difference is added to the sum of the first container record. This sum represents the accumulated PMU data value of the process during its operation on the first processor.

under the condition of destroying the container, exporting all record information in the container record corresponding to the container, and releasing the memory occupied by the container record.

Specifically, when destroying a container, the container records corresponding to the container are also destroyed together, and specifically, a second hook function may be added in the destroying function for destroying the container, where the second hook function is used to forcedly export all PMU data in the container records corresponding to the container, and remove the container records from the tree structure and release the memory of the container records.

For different kernel versions, hooks may be made on the container destruction function in the manner of tracepoint or kprobe. In the corresponding hook function, when a container is destroyed, all PMU data in the corresponding chushi_cgroup_record of the container is forcedly exported, for example, put into a corresponding buffer zone, and then the corresponding chushi_cgroup_record is removed from the radix tree and the corresponding memory is released.

The multiprocessor performance index in the embodiment of the disclosure can be normalized and run in the system with low cost, and can not interfere and shake the existing service in the system. By creating multiple containers on the host of the Linux operating system, multiple applications are deployed in a hybrid manner to maximize the utilization of hardware performance to save costs. Different applications run in different containers and it is desirable to avoid interference between the containers. The CPU micro-architecture data of each container can be dynamically obtained, a scheduling basis is provided for the arrangement of the containers on the upper layer, and different containers are dynamically scheduled to different CPUs, so that the interference among the containers is avoided.

Exemplary apparatus

FIG. 4 is a block diagram illustrating a multiprocessor performance index acquisition device, according to an example embodiment. Referring to fig. 4, the apparatus 400 includes:

a first obtaining module 401, configured to obtain target information from a plurality of container records, where each container record corresponds to a container, and the container records are data structures for recording container information, each container record includes a plurality of record information, a plurality of record information corresponds to a plurality of processors one by one, each record information is used for recording performance indexes of a corresponding processor, and the target information includes at least one record information.

Optionally, the first obtaining module 401 includes:

the first obtaining submodule is used for traversing each container record through each processor and obtaining record information corresponding to the processor from each container record;

and the determining submodule is used for determining the target information according to a plurality of recorded information.

Optionally, the first obtaining sub-module is specifically configured to:

traversing each container record through a work queue running on each processor, and acquiring record information corresponding to the processor from each container record.

Optionally, the determining submodule is specifically configured to:

and formatting the recorded information to obtain formatted information, wherein the formatted information comprises an identifier of a container record to which the recorded information belongs, an identifier of a processor corresponding to the recorded information and a performance index recorded in the recorded information.

Optionally, the apparatus further comprises:

the second acquisition module is used for grouping the target information according to the identification recorded by the container to obtain at least one group, and each group corresponds to one container;

and the first determining module is used for determining a processor for scheduling the container according to the sum of the performance indexes in the same packet.

Optionally, the apparatus further comprises:

and the first creation module is used for creating a corresponding container record for the container under the condition of creating the container.

Optionally, the apparatus further comprises:

the third acquisition module is used for acquiring the current first performance index of the processor cut in by the process when the process is cut in;

a fourth obtaining module, configured to obtain a current second performance index of the processor when the process is cut out;

and the first storage module is used for storing the difference value of the first performance index and the second performance index into the container record corresponding to the process.

Optionally, the apparatus further comprises:

the destroying module is used for exporting each record information in the container record corresponding to the container under the condition of destroying the container, and releasing the memory occupied by the container record.

Optionally, the apparatus further comprises:

the initialization module is used for initializing a memory pool and a tree structure in the kernel, wherein the memory pool is used for distributing memory required by the container records, the tree structure is used for storing the container records, and keys of the tree structure are pointers pointing to the containers.

Optionally, the apparatus further comprises:

and the second creation module is used for creating a work queue on each processor, and the work queue is used for exporting PMU data of the performance monitor unit stored on the processor in each container record from the kernel.

Optionally, the apparatus further comprises:

and a third creation module for creating PMU events on each of the processors, the PMU events being used to generate PMU data.

Optionally, the apparatus further comprises:

a fourth creation module for traversing all existing containers, creating the container record for each container;

and the first adding module is used for adding the container record into the tree structure.

Optionally, the apparatus further comprises:

and the second adding module is used for adding a first hook function in the creating function for creating the container, wherein the first hook function is used for creating a container record corresponding to the container, and adding the container record into the tree structure.

Optionally, the apparatus further comprises:

and the third adding module is used for adding a second hook function into the destroying function for destroying the container, wherein the second hook function is used for forcedly exporting all PMU data in the container record corresponding to the container, removing the container record from the tree structure and releasing the memory of the container record.

Optionally, the apparatus further comprises:

a fifth obtaining module, configured to obtain a current first PMU data value of the first processor;

the second determining module is used for determining a container where a process running on the first processor is located and acquiring a first container record of the container;

and the second storage module is used for storing the first PMU data value into a first field of a data structure corresponding to the first processor in the first container record.

Optionally, the apparatus further comprises:

a sixth obtaining module, configured to obtain a current second PMU data value of the first processor;

a seventh obtaining module, configured to subtract a value in a first field of a data structure corresponding to the first processor in the first container record from the second PMU data value to obtain a difference value;

and a third storage module for accumulating the difference value into a value of a second field of the data structure.

Exemplary vehicle

Fig. 5 is a block diagram of a vehicle 800, according to an exemplary embodiment. The vehicle 800 may be a fuel-powered vehicle, a hybrid vehicle, an electric vehicle, a fuel cell vehicle, or other type of vehicle.

Referring to fig. 5, a vehicle 800 may include a plurality of subsystems, such as a drive system 810, a control system 820, a perception system 830, a communication system 840, an information display system 850, and a computing processing system 860. Vehicle 800 may also include more or fewer subsystems, and each subsystem may also include multiple components, which are not described in detail herein.

The drive system 810 includes components that provide powered movement of the vehicle 800. Such as an engine, energy source, transmission, etc.

The control system 820 includes components that provide control for the vehicle 800. Such as vehicle control, cabin equipment control, driving assistance control, etc.

The perception system 830 includes components that provide a perception of the surrounding environment for the vehicle 800. For example, a vehicle positioning system, a laser sensor, a voice sensor, an ultrasonic sensor, an image pickup apparatus, and the like.

The communication system 840 includes components that provide communication connections for the vehicle 800. For example, mobile communication networks (e.g., 3G, 4G, 5G networks, etc.), wiFi, bluetooth, internet of vehicles, etc.

The information display system 850 includes components that provide various information displays for the vehicle 800. For example, vehicle information display, navigation information display, entertainment information display, and the like.

The computing processing system 860 includes components that provide data computing and processing capabilities for the vehicle 800. The computing processing system 860 may include at least one processor 861 and a memory 862. The processor 861 may execute instructions stored in the memory 862.

The processor 861 may be any conventional processor, such as a commercially available CPU. The processor may also include, for example, an image processor (Graphic Process Unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), a System On Chip (SOC), an application specific integrated Chip (Application Specific Integrated Circuit, ASIC), or a combination thereof.

The memory 862 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

In the disclosed embodiment, the memory 862 has stored therein a set of instructions that the processor 861 can execute to implement all or part of the steps of the multiprocessor performance index acquisition method described in any of the above-described exemplary embodiments.

Exemplary electronic device

Fig. 6 is a block diagram of an electronic device 900, according to an example embodiment. The electronic device 900 may be a vehicle controller, an in-vehicle terminal, an in-vehicle computer, or other type of electronic device.

Referring to fig. 6, an electronic device 900 may include at least one processor 910 and memory 920. Processor 910 may execute instructions stored in memory 920. The processor 910 is communicatively coupled to the memory 920 via a data bus. In addition to memory 920, processor 910 may also be communicatively coupled to input devices 930, output devices 940, and communication devices 950 via a data bus.

The processor 910 may be any conventional processor, such as a commercially available CPU. The processor may also include, for example, an image processor (Graphic Process Unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), a System On Chip (SOC), an application specific integrated Chip (Application Specific Integrated Circuit, ASIC), or a combination thereof.

The memory 920 may be implemented by any type of volatile or nonvolatile memory device or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

In the embodiment of the present disclosure, the memory 920 stores executable instructions, and the processor 910 may read the executable instructions from the memory 920 and execute the instructions to implement all or part of the steps of the multiprocessor performance index acquisition method according to any one of the above-described exemplary embodiments.

Exemplary computer-readable storage Medium

In addition to the methods and apparatus described above, exemplary embodiments of the present disclosure may also be a computer program product or a computer readable storage medium storing the computer program product. The computer program product comprises computer program instructions executable by a processor to perform all or part of the steps described in any of the methods of the exemplary embodiments described above.

The computer program product may write program code for performing the operations of embodiments of the present disclosure in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" language or similar programming languages, as well as scripting languages (e.g., python). The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server.

The computer readable storage medium may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may include, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the readable storage medium include: a Static Random Access Memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic or optical disk, or any suitable combination of the foregoing having one or more electrical conductors.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A method for obtaining a performance index of a multiprocessor, comprising:

the method comprises the steps of obtaining target information from a plurality of container records, wherein each container record corresponds to one container, each container record is a data structure for recording container information, each container record comprises a plurality of record information, the record information corresponds to a plurality of processors one by one, each record information is used for recording performance indexes of the corresponding processor, and the target information comprises at least one record information.

2. The method of claim 1, wherein the step of obtaining the target information from the plurality of container records comprises:

traversing each container record through each processor, and acquiring record information corresponding to the processor from each container record;

and determining the target information according to a plurality of recorded information.

3. The method of claim 2, wherein the step of traversing each of the container records by each of the processors and obtaining record information corresponding to the processors from each of the container records comprises:

4. The method of claim 2, wherein the step of determining the target information from a plurality of the recorded information comprises:

5. The method of claim 1, wherein after the step of obtaining the target information from the plurality of container records, the method further comprises:

grouping the target information according to the identification recorded by the container to obtain at least one group, wherein each group corresponds to one container;

a processor that schedules the container is determined based on a sum of performance metrics in the same packet.

6. The method of claim 1, wherein prior to the step of obtaining the target information from the plurality of container records, the method further comprises:

7. A multiprocessor performance index acquisition apparatus, comprising:

the first acquisition module is used for acquiring target information from a plurality of container records, wherein each container record corresponds to one container, the container records are data structures for recording container information, each container record comprises a plurality of record information, the record information corresponds to the processors one by one, each record information is used for recording performance indexes of the corresponding processor, and the target information comprises at least one record information.

8. An electronic device, comprising:

a processor;

a memory for storing the processor-executable instructions;

the processor is configured to read the executable instructions from the memory and execute the instructions to implement the multiprocessor performance index acquisition method of any one of claims 1 to 6.

9. A computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, perform the steps of the multiprocessor performance index acquisition method of any of claims 1-6.

10. A vehicle, characterized in that a set of instructions is stored, which is executed by the vehicle to implement the multiprocessor performance index acquisition method of any one of claims 1 to 6.