CN1162876A - Circuit arrangement for transmission of binary data by means of differential signals - Google Patents

Abstract

While data are conveyed on two conductors by using differential signals, the two conductors are coupled on two different voltages representing the value of the binary system of the data through a resistance. In order to convey another value on the known circuit configuration, the two conductors are connected on the opposite voltages through respective switches. Due to the difficulty in strictly turning on or off each switch simultaneously, the edges of the two conductors move mutually in time domain, so that electromagnetic wave signals are produced. In order to avoid such interference signals, according to the invention, the two conductors are connected with each other through the switching transistor between the two conductors. As a result, the signal edges of the two conductors are forced to appear simultaneously, so the effect of the electromagnetic interference is virtually compensated.

Description

Use differential signal to transmit the circuit arrangement of binary data

The invention relates to and on the bus that comprises two conductors, use differential signal to transmit binary data.

As everyone knows, if only when the difference between the voltage on two conductors in receiver during by evaluation, it is very reliable using differential signal to transmit data, interference signal changes voltage with same induction on two conductors on two conductors because be coupled to, like this, difference keeps constant in fact, also just is subjected on two conductors voltage difference in the limited skew of the reference voltage between the transmitter and receiver and divides evaluation to be compensated.

There is such fact in the further advantage of using differential attachment to transmit data, can avoid electromagnetic interference in fact, because the signal edge of one of two conductors is subjected to the compensation of another conductor opposite phase signal edge in fact.Yet only when two edges strictly took place simultaneously, this just took place.

For using differential signal to transmit data, set up various standards, the ISO 11519-2 of the high utmost point has defined the signal voltage on two conductors when transmitting two values of binary data in fact.Fig. 1 shows the basic circuit configuration of two conductors 10 on the bus and 20.Conductor 10 is coupled to the voltage 14 that is lower than operating voltage slightly by resistance 12.By resistance 22, conductor 20 is coupled to and is slightly higher than second voltage 24 that reference voltage but is lower than voltage 14 in fact.A large amount of bus users is connected on the bus that comprises conductor 10 and 20, and said at least certain customers comprise transmitter and receiver; The transmitter and the receiver of label 30 expressions one bus user of Fig. 1, receiver comprises the voltage difference between two conductors 10 and 20 is carried out evaluation and this voltage difference offered the amplifier 8 of processing unit (not shown), transmitter comprises the switching device with two transistors 1 and 2, when these two transistors are driven, transistor 1 coupling conductors 10 is to reference voltage 3, and transistor 2 coupling conductors 20 are to operating voltage 4.

Fig. 2 shows the variation of voltage on the conductor 10 and conductor 20 when transmitting data, prior to moment t1, two transistors 1 and 2 end, and conductor 10 is delivering higher voltage 14 and conductor 20 is delivering lower voltage 24, at moment t1 two transistor 1 and 2 conductings in fact simultaneously.True, the realization of two transistor conducting simultaneously is very difficult, and the on-delay of two transistor is often slightly different.Therefore, the voltage of conductor 10 begins step-down at moment t1, and the voltage of conductor 20 begins to uprise after given short delay.Similarly, begin to uprise once more at the voltage of moment t2 conductor 10, the voltage of conductor 20 begins step-down once more after of short duration delay.Delay between two edges is difficult to avoid in practice.Strictly do not compensated with respect to the bus electromagnetic radiation two edges that comprise two conductors 10 and 20, so interference signal is launched at each edge of two conductors 10 and 20.

Target of the present invention provides the switching device of transmitter, thereby the electromagnetic radiation that comprises the bus of two conductors significantly is reduced.

So finish according to this target of the present invention, switching device directly is connected between two conductors, make the edge of two conductors be forced to strictly respond.If the switching device that connects between two conductors is opened a way, promptly there is not conducting, two conductors are delivering the voltage that they were coupled in fact.If the switching device closure is promptly arrived conducting state by switch, two conductors suppose that this voltage is in the median that is approximately between voltage 14 and 24, is forced in other words simultaneously.The electromagnetic radiation that two lines constitute bus has been reduced on significance degree.

What note is that when being used according to circuit arrangement of the present invention, the signal of two conductors is no longer followed ISO 11519-2 standard on the bus.

In inventive embodiment, switching device only comprises a transistor that is connected between two conductors.Best, this transistor is the reinforcing MOS transistor that one of is connected in two conductors by resistance by its grid.Under situation about realizing with nmos pass transistor, resistance is linked the conductor of delivery low-voltage when transistor ends and is being used under the transistorized situation of PMOS, and resistance is connected to fortune and cuts high-tension conductor.In order to drive this transistor better, use oxide-semiconductor control transistors, this oxide-semiconductor control transistors is coupled this transistorized gate electrode to the voltage that exceeds the voltage range that two voltages that two conductors are coupled force significantly, guarantees this transistorized reliable conducting like this.If big skew takes place in the reference voltage in the receiver of a bus user and just at the receiver of another bus user, for example a switching device can not be opened transistor reliably, in this case, preferably use two reinforcing MOS transistors that are connected two different conduction-types between the conductor abreast.In these two transistors each and the same being connected of single transistor of previous described corresponding conduction type, promptly, grid is connected in two conductors, pass through resistance, with by oxide-semiconductor control transistors to further voltage, two transistorized oxide-semiconductor control transistors are driven with opposite phase, in this case, relatively another transistorized transistorized conducting time-delay is the same with the time difference of two conductor signal edges will become not obvious; The transistor separately in conducting evening will not influence the edge of conductor in fact.When two transistors are in parallel by this way when using, then, also can be processed with respect to the bigger skew of essence of the transmitter reference voltage of two conductor voltages.

The present invention also relates to integrated circuit and comprise transmitter at least according to circuit arrangement of the present invention.

Embodiments of the invention are at length described afterwards with reference to accompanying drawing.

Fig. 3 shows the basic structure according to switching device of the present invention;

Fig. 4 is two conductor voltage time figure;

Fig. 5 illustrates the driving switch that constitutes by nmos pass transistor;

Fig. 6 illustrates the driving switch that is made of MOS transistor;

Fig. 7 shows the transistor of two different conduction-types of use and their driving.

Fig. 3 shows the transmitter of bus user 30 and the primary element of receiver.Transmitter comprises MOS transistor 32, and its main electrode is connected to two conductors 10 and 20 on the bus.Grid 33 these transistors by it can be switched on or end.Amplifier 31 as receiver, can carry out evaluation once more to the voltage difference between conductor 10 and 20.

Fig. 4 shows the variation of these voltages during sending data, as long as transistor 32 remain offs, the voltage of conductor 10 is essentially voltage 14 and 24 respectively in other words for the voltage of high value and conductor 20 is low value.Transistor 32 is switched on when by suitable driving grid 33, conductor 10 and 20 voltage are assumed to be half of voltage 14 and 24, because resistance 12 has identical value in fact with 22, the edge of two voltage signals is forced to strictly take place simultaneously, so only there is the minority electromagnetic radiation to take place.

It is the configurations that are made of the enhancement mode nmos pass transistor that Fig. 5 shows transistor 32, and the main electrode of transistor 32 is connected to lead 10 and 20.Grid 33 is connected to conductor 20 and links voltage 36 by oxide-semiconductor control transistors 35 by resistance 34.Oxide-semiconductor control transistors 35 is to be made of the enhancement mode PMOS transistor with grid 37 in this enforcement.When high voltage, the control voltage that is equivalent to operating voltage 36 is added to grid 37, and oxide-semiconductor control transistors 35 is ended the current potential that delivers conductor 20 with the grid 33 of transistor 32 then, makes it also end.If when low-voltage is applied to the grid 37 of oxide-semiconductor control transistors 35, the grid of transistor 32 33 receives voltages 36 and this transistor turns thus.If the skew between the datum mark of the datum mark of voltage 14 and 24 and voltage 36 has taken place, to keep and be lower than the threshold voltage 36 that this amount equals transistor 32 as long as the so little intermediate value that makes the voltage on conductor 10 and 20 is kept in this skew, this conducting is just being kept.

Fig. 6 shows corresponding circuit, and the transistor 42 that wherein is connected between conductor 10 and 20 is enhancement mode PMOS crystal 4s 2, and its grid 43 is connected to conductor 10 by resistance 44 now, links the reference potential 46 of bus user 30 by oxide-semiconductor control transistors 45.In an embodiment of the present invention, this oxide-semiconductor control transistors 45 is made of the enhancement mode nmos pass transistor.When its grid 47 received low-voltage, oxide-semiconductor control transistors 45 was by also ending with same transistor 42.Be added to the high voltage conducting oxide-semiconductor control transistors 45 of grid 47, make also conducting of transistor 42.As long as level 14 and 24 datum mark and the skew between the reference voltage 46 do not become so big, make the intermediate value of voltage of conductor 10 and 20 be lower than reference voltage that its amount equals transistor 42 threshold values below 46, this conducting is just being kept.

In Fig. 7, two transistors 52 and their main electrode of 62 usefulness are connected between conductor 10 and 20 in parallel.Transistor 52 is enhancement mode PMOS transistors, and its grid 53 connects with the same manner shown in Figure 6.Transistor 62 is nmos pass transistors, and its grid 63 connects with the same manner shown in Figure 5.Oxide- semiconductor control transistors 55 and 65 grid 57 and 67 are driven with the phase place opposite way, by amplifier 60, coupled gates 53 and be clipped to reference voltage 56 and operating voltage 66 in 63 minutes, in this circuit is arranged, even in the almost high arbitrarily skew between the reference voltage of voltage 14 and 24 and operating voltage 56, two transistors 52 or one of 62 conductings reliably.For example, if reference voltage 56 reference voltage with respect to voltage 14 and 24 in forward is read is offset, for example make the voltage of conductor 20 more be defeated by the reference voltage of conductor 56, transistor 62 can under any circumstance be switched on.

With this on the contrary under the situation that reference voltage oppositely moves, transistor 52 conducting reliably.Under situation about lacking by the big electric current on the reference conductor or such skew that may cause by interference signal, crystal 52 and 62 both can be switched on.In this case, do not influence the symmetry of signal edge on conductor 10 and 20 in the conducting between two transistors time-delay because conducting after transistor moment that will only be connected conducting by the be coupled conductor 10 and 20 of same voltage of the crystal of conducting.

Claims (6)

1. transmit the circuit arrangement of binary data to receiver from transmitter by the differential signal of use on first conductor and second conductor, first conductor, second voltage that first voltage and second conductor are coupled to derives thus that is coupled, value with the indication binary data, two conductors are connected to switching device in transmitter, connect with control by switching device, two conductors is characterized in that to the different voltages of another value of indication binary data:

When driving, switching device between two conductors (10,20) (32,42,52,62) is configuration so, and two conductors (10,20) arrive the voltage that essence equates to be coupled.

2. the circuit arrangement of claim 1, it is characterized in that: wherein switching device comprises the transistor (32,42) with two main electrodes and grid (33,43), each main electrode is connected to separately one of conductor (10,20).

3. the circuit arrangement of claim 2, it is characterized in that: transistor (32,42) be a kind of reinforcing MOS transistor of conduction type, and the grid (33 of transistor (32,42), 43) by resistance (34,44) be connected in the conductor (20,10) one and be connected to by oxide-semiconductor control transistors (35,45) and exceed first and second voltages (14,24) provide the tertiary voltage (36,46) of scope.

4. the circuit arrangement of claim 1, it is characterized in that: switching device comprises two reinforcing MOS transistors (52 of different conduction-types, 62), each transistor comprises two main electrodes and grid (53,63), two MOS transistor (52,62) main electrode is linked two conductors (10 respectively, 20) one, the grid (53) of one MOS transistor (52) is connected to tertiary voltage (56) by first oxide-semiconductor control transistors (55), and the grid of another MOS transistor (62) is connected to the 4th voltage (66) by second oxide-semiconductor control transistors (65), said third and fourth voltage (56,66) is suitable for being provided by first and second voltages (14,24) both sides of the outside of scope, oxide-semiconductor control transistors (55,56) is that two films of opposite conductivity can be driven with the phase place opposite way.

5. integrated circuit comprises one of them desired circuit arrangement of claim 1 to 4 at least.

6. for transmitting two line bus transmitters of differential signal, comprise any one desired circuit arrangement of claim 1 to 4 at least.

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