CN116264132A - Capacitor and preparation method thereof - Google Patents

Capacitor and preparation method thereof Download PDF

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Publication number
CN116264132A
CN116264132A CN202111527654.6A CN202111527654A CN116264132A CN 116264132 A CN116264132 A CN 116264132A CN 202111527654 A CN202111527654 A CN 202111527654A CN 116264132 A CN116264132 A CN 116264132A
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electrode layer
capacitor
bottom electrode
dielectric layer
metal oxide
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李其然
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Shenzhen Institute of Advanced Technology of CAS
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Shenzhen Institute of Advanced Technology of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • H01G4/008Selection of materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/10Metal-oxide dielectrics
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13Energy storage using capacitors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

The invention discloses a capacitor and a preparation method thereof, and relates to the field of industrial electronic components. The capacitor comprises an electrode layer and a dielectric layer, wherein the electrode layer comprises a bottom electrode layer and a top electrode layer, and the bottom electrode layer is positioned at the bottom and is composed of a metal oxide film with good conductivity and strong correlation system characteristics; a dielectric layer on the bottom electrode layer, and composed of a metal oxide film having a high dielectric constant and good insulation; and a top electrode layer on the dielectric layer and made of a metal having strong conductivity and high stability. Aiming at the defects existing in the prior art, the invention realizes the capacitor with the thickness of submicron order, the capacitance value of the capacitor can be multiple times of the geometric capacitance value, and the miniaturization and the high capacitance value are realized.

Description

Capacitor and preparation method thereof
Technical Field
The invention relates to the field of industrial electronic devices, in particular to a submicron capacitor and a preparation method thereof.
Background
Capacitors are an important passive device and a common electronic device, and have very wide application in the fields of consumer electronics, industrial electronics and the like. The international semiconductor technology roadmap (ITRS) defines two of the most important challenges of the 2025 semiconductor industry, including: (1) the use of new materials; (2) smaller geometry.
Currently, widely used silicon-based materials, such as silicon dioxide, have good insulation property, but have relatively small dielectric constants, and capacitors with high capacitance values are designed by increasing the equivalent area of the capacitor, specifically, by forming a hole-like structure by practical deep etching on a substrate, and indirectly increasing the density of the surface capacitance value, thereby achieving the purpose of increasing the equivalent dielectric constant. However, the special structure of such three-dimensional substrate requires special thin film growth equipment such as atomic layer deposition (Atomic layer deposition, ALD) and the like, which has the disadvantages of complex process and difficult realization.
It is important to find a capacitor with submicron scale, high capacitance and easy to realize manufacturing process and a manufacturing method thereof.
Disclosure of Invention
The invention mainly aims to provide a submicron capacitor and a preparation method thereof, which can solve the problem of complex manufacturing process for manufacturing a submicron capacitor with high capacitance value in the related technology.
In order to achieve the above object, the present invention provides a capacitor including an electrode layer and a dielectric layer, the electrode layer including a bottom electrode layer and a top electrode layer; the bottom electrode layer is positioned at the bottom and is composed of a metal oxide film material with good conductivity and strong correlation system characteristics; the dielectric layer is positioned on the bottom electrode layer and is composed of a metal oxide film material with high dielectric constant and good insulativity; the top electrode layer is positioned on the dielectric layer and is made of a metal material with strong conductivity and high stability.
In an exemplary embodiment, the metal oxide thin film material having good conductivity and strongly correlated system characteristics includes: lanthanum nickel trioxide (LaNiO) 3 ) Strontium ruthenium trioxide (SrRuO) 3 ) Niobium (Nb) -doped strontium titanium trioxide (SrTiO) 3 )。
In an exemplary embodiment, the metal oxide thin film material having a high dielectric constant and good insulation includes: lanthanum aluminum oxide (LaAlO) 3 ) Zirconium dioxide (ZrO) 2 ) Hafnium oxide (HfO) 2 ) Lanthanum oxide (La) 2 O 3 ) Barium monoxide (BaO), titanium dioxide (TiO) 2 ) Tantalum pentoxide (Ta) 2 O 5 )。
In an exemplary embodiment, the metal material having strong conductivity and high stability includes: platinum (Pt), gold (Au), silver (Ag).
In an exemplary embodiment, the bottom electrode layer has a thickness in a range of not less than 60 nanometers.
In an exemplary embodiment, the dielectric layer has a thickness in a range of not less than 20 nanometers.
The invention also provides a preparation method of the capacitor, the capacitor comprises an electrode layer and a dielectric layer, the electrode layer comprises a bottom electrode layer and a top electrode layer, and the preparation method of the capacitor is characterized by comprising the following steps: preparing the bottom electrode layer of a metal oxide thin film material with good conductivity and strongly correlated system characteristics by pulsed laser deposition (Pulsed Laser Deposition, PLD); preparing the dielectric layer composed of a metal oxide thin film material with high dielectric constant and good insulation property on the surface of the bottom electrode layer by PLD; forming a square electrode pattern on the surface of the dielectric layer through a photoetching technology and an etching technology; the top electrode layer is formed by plating a metal material having strong conductivity and high stability on the formed square electrode pattern by an Electron beam deposition technique (Electron beam-induced deposition, EBID).
In an exemplary embodiment, the bottom electrode layer preparation process includes: an oxygen gas pressure value of 0.2mbar was chosen to obtain a stable synthesized metal oxide thin film material with good conductivity and strongly correlated system characteristics for the bottom electrode layer.
In an exemplary embodiment, the dielectric layer preparation process includes: determining that the surface roughness of the bottom electrode layer is not more than 5%; the dielectric layer composed of a metal oxide thin film material having a high dielectric constant and good insulation is prepared on the surface of the bottom electrode layer having a roughness of not more than 5%.
In an exemplary embodiment, the dielectric layer preparation process includes: determining that the lattice mismatch of the bottom electrode layer material and the dielectric layer material is no more than 0.8%; on the surface of the bottom electrode layer, the dielectric layer composed of a metal oxide thin film material having a high dielectric constant and good insulation is prepared.
The beneficial effects that this application provided technical scheme brought are:
in the technical scheme, the bottom electrode layer is made of metal oxide with good conductivity and strong correlation system characteristics, the dielectric layer is made of metal oxide with high dielectric constant and good insulativity, the top electrode layer is made of metal with strong conductivity and high stability, the problems that the process is complex and difficult to realize in the preparation of the submicron capacitor in the prior art are solved, and the requirements of miniaturization and high capacitance of the capacitor are met.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are required to be used in the description of the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic structural diagram of a capacitor according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for manufacturing a capacitor according to an embodiment of the present invention;
fig. 3 is a frequency characteristic diagram of a capacitor according to an embodiment of the present invention.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of illustrating the present application and are not to be construed as limiting the present application.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein includes all or any element and all combination of one or more of the associated listed items.
The following is an introduction and explanation of several terms involved in this application:
conductivity refers to the ability of an object to conduct electrical current. The material has good conductivity or strong conductivity, meaning that the material has good or strong ability to conduct current. The characteristic of a strong association system means that electrons of a material have a strong association effect with electrons.
High dielectric constant means that the dielectric constant of the material ranges from 20 to 30.
Insulation, which is the opposite concept to conductivity, refers to the ability of an object to bind an electric current. The material has good insulativity, namely, the material has large forbidden bandwidth and strong electron binding capacity.
High stability means that the chemical property of the material is stable and is not easy to oxidize at normal temperature.
Pulsed laser deposition (Pulsed Laser Deposition, PLD), also known as pulsed laser ablation (pulsed laser ablation, PLA), is a vacuum coating technique. During the deposition process, a certain gas with a certain pressure is usually filled in the vacuum cavity, for example, oxygen is often filled when oxide is deposited, so as to improve the performance of the film.
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
As shown in fig. 1, a block diagram of a capacitor according to one embodiment is shown.
A capacitor in this embodiment includes an electrode layer and a dielectric layer, wherein the electrode layer further includes a bottom electrode layer and a top electrode layer.
Specifically, the bottom electrode layer is positioned at the bottom and is made of a metal oxide film material with good conductivity and strong correlation system characteristics. In one embodiment, metal oxide thin film materials with good conductivity and strongly correlated system characteristics include, but are not limited to: lanthanum nickel trioxide (LaNiO) 3 LNO for short), strontium ruthenium trioxide (SrRuO 3 ) Niobium (Nb) -doped strontium titanium trioxide (SrTiO) 3 ). In one embodiment, the thickness of the bottom electrode layer LNO ranges from not less than 60 nanometers.
The dielectric layer is positioned on the low electrode layer and is made of a metal oxide film material with high dielectric constant and good insulation property. In one embodiment, metal oxide thin film materials with high dielectric constant and good insulation include, but are not limited to: lanthanum aluminum oxide (LaAlO) 3 LAO for short), zirconium dioxide (ZrO 2 ) Hafnium oxide (HfO) 2 ) Lanthanum oxide (La) 2 O 3 ) Barium monoxide (BaO), titanium dioxide (TiO) 2 ) Tantalum pentoxide (Ta) 2 O 5 ). In one embodiment, the dielectric layer LAO has a thickness in the range of not less than 20 nanometers.
The top electrode layer is positioned on the dielectric layer and is made of a metal material with strong conductivity and high stability. In one embodiment, metallic materials with strong conductivity and high stability include, but are not limited to: platinum (Pt), gold (Au), silver (Ag).
As shown in fig. 2, a flow chart of a method for manufacturing a capacitor according to an embodiment is shown.
A flowchart of a method of manufacturing a capacitor is provided in this embodiment. The capacitor includes an electrode layer including a bottom electrode layer and a top electrode layer, and a dielectric layer.
The preparation method of the capacitor can comprise the following steps:
step 110, preparing the bottom electrode layer composed of the metal oxide film with good conductivity and strong correlation system characteristics.
Specifically, a bottom electrode layer with the thickness of 70 nanometers is prepared by a pulse laser deposition system (PLD), and the material of the bottom electrode layer is nickel lanthanum trioxide (LaNiO) 3 Abbreviated as LNO).
In the process of preparing the bottom electrode layer LNO, an oxygen gas pressure value of 0.2mBar was selected in order to obtain a stable metal oxide LNO film. In PLD, different gases are required to be introduced when preparing the film, in this embodiment, oxygen is required to be introduced, oxygen pressure in a vacuum cavity is required to be applied when oxygen is introduced into a quasi-vacuum system, and the oxygen pressure value can be obtained by monitoring the air inflow and the pressure.
And 130, preparing the dielectric layer formed by the metal oxide film with high dielectric constant and good insulativity on the surface of the bottom electrode layer.
Specifically, a dielectric layer with a thickness of 20 nm is prepared on the bottom electrode layer by PLD, and the material of the dielectric layer is lanthanum aluminum oxide (LaAlO 3 Abbreviated as LAO).
In the process of preparing the dielectric layer LAO, since the dielectric layer is directly grown on the bottom electrode layer, structural compatibility, lattice matching and interface roughness between the two materials may affect the performance of the capacitor device. The stable LAO dielectric layer material with the thickness of 20 nanometers can be grown on the LNO electrode layer with the thickness of 70 nanometers by the X-ray reflection method (XRR) intensity, film thickness measurement and atomic force microscope characterization when the surface roughness of the LNO electrode layer is not more than 5 percent and the lattice mismatch between the LNO and the LAO is not more than 0.8 percent. Under the condition, the leakage current density obtained by applying 1V voltage to the LAO material is not more than 40 mu A/cm 2 While the leakage current density of the LAO dielectric layer grown on the silicon substrate under the same condition is 50 mu A/cm 2 It is demonstrated that the LAO dielectric layer prepared under the scheme of the present application has good insulation properties.
And step 150, forming square electrode patterns on the surface of the dielectric layer through a photoetching technology and an etching technology.
Specifically, the prepared double-layer structure consisting of the bottom electrode layer LNO and the dielectric layer LAO is taken out from PLD, enters an ultra clean room, a part of the LAO layer on the surface is removed through a photoetching technology and an etching technology, and an etching process is strictly monitored through a Secondary Ion Mass Spectrometry (SIMS) technology, so that a part of the bottom electrode is exposed to facilitate subsequent measurement. Subsequently, a square electrode pattern is formed on the LAO surface, a square electrode pattern is formed,
and step 170, plating a metal with strong conductivity and high stability on the surface of the dielectric layer by an electron beam deposition mode to form the top electrode layer.
Specifically, platinum (Pt) is plated on the square electrode pattern of the dielectric layer in an electron beam deposition mode, and then the rest part containing photoresist on the surface of the dielectric layer is removed by a chemical solution, so that a stable top electrode layer on the dielectric layer is obtained.
Taking the capacitor and the preparation method thereof in the above embodiment as an example, the basis and principle of the material selection of the capacitor are described in detail below with reference to fig. 2:
the design process of the capacitor refers to the quantum-corrected plate capacitance formula as follows:
1/C total =1/C geom +1/C kin +1/C x +1/C c
in the above, C total For the total capacitance value, C geom For geometric capacitance, C kin Represents the quantity of the quantum correction value related to the kinetic energy of electrons (positive), C x Is the amount associated with the exchange energy, C c Is a quantity related to a strong association between electrons. C, according to simulation in a two-dimensional electron gas or a strong correlation system or a system with two-dimensional electrons and the strong correlation system x And C c The two quantities can be negative or large, which is the theoretical basis for theoretically considering that the capacitance value of the quantum correction can exceed the geometric capacitance value.
The bottom electrode material discussed herein, on the order of tens of nanometers, may also be considered a three-dimensional electrode, where electrons have three degrees of freedom in the direction of motion. Then according to the above formula C kin In the case of high electron mobility, i.e. strong conductivity, the values can be larger, which leads to a larger total capacitance value, then firstlyThe material we choose needs to be a good conductor (i.e. strong conductivity) and secondly, C kin In proportion to effective mass (m), we need to select materials with relatively large effective mass, such as LaNiO 3 、SrRuO 3 And Nb doped SrTiO 3 Secondly, C is not needed to be considered in a three-dimensional strong correlation system x ,C c Dominant and negative, then the value to the right of the total capacitance equation will be smaller, i.e. 1/C total Smaller, i.e. C total Larger. In summary, in the selection of three-dimensional electrode materials, in theory, we prefer electrode materials with good conductivity, large effective mass, and significantly strong correlation properties.
In addition, the inventors have realized that a silicon-based material in the prior art, such as silicon dioxide, has a dielectric constant of 8, is relatively small, and increases the area of a planar capacitor to increase the capacitance of the capacitor, while the increase in area is limited by the size of the capacitor, so that the material selected in the present application is a metal oxide material having a high dielectric constant (in the range of 20 to 30) in terms of the choice of the dielectric layer material, and has not only a high dielectric constant but also good insulation.
Finally, in selecting the top electrode layer, the material selected in the application is a metal with strong conductivity and high stability, and the metal material must also have strong adhesion with the material of the dielectric layer, that is, the metal electrode is not easy to fall off from the dielectric layer.
In the prior art, under the condition that the transverse area of the submicron capacitor cannot be further reduced, the longitudinal space is fully utilized, namely, the surface capacitance value density is indirectly increased through deep etching on the substrate, so that the purpose of increasing the equivalent dielectric constant is achieved. The special structure of such three-dimensional substrates requires special thin film growth equipment such as atomic layer deposition (Atomic layer deposition, ALD) and the like, however, the preparation of high quality thin films is limited to a small portion of materials, and the possibility of wide application is temporarily lacking.
In summary, from the perspective of the manufacturing process of the capacitor, the pulse laser deposition technique, the photolithography technique, the etching technique and the electron beam deposition technique used in the manufacturing process of the capacitor of the present application are relatively easy to implement.
As shown in fig. 3, a frequency characteristic diagram of a capacitor according to an embodiment is shown.
The frequency characteristic of a capacitor in this embodiment IS essentially an impedance spectrum (Impedance Spectroscopy, IS) that characterizes the capacitance characteristic of the capacitor.
Specifically, as shown in fig. 3, the capacitance value of the capacitor of this embodiment exceeds the geometric value in the frequency range of 100Hz to 1 MHz. The almost linear decrease in capacitance before the cutoff frequency of 1MHz allows the observation of a value as a function of frequency; this is because the response time of the electric charge decreases with an increase in frequency of the ac circuit, and the electric charge that can move in the ac electric field decreases, so that the resistance characteristic is more remarkable than the capacitance. When we apply bias voltages of 0.2V and 1V to the capacitor, the capacitor does not change significantly and the capacitance charge is shown to be reversible, possessing the functional characteristics of the capacitor.
Therefore, the capacitor has good capacitance characteristics, the capacitance value of the capacitor is several times of the common geometric capacitance value, and miniaturization and high capacitance value are realized.
The foregoing is only a partial embodiment of the present application, and it should be noted that, for a person skilled in the art, several improvements and modifications can be made without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims (10)

1. A capacitor comprising an electrode layer and a dielectric layer, the electrode layer comprising a bottom electrode layer and a top electrode layer, wherein,
the bottom electrode layer is positioned at the bottom and is composed of a metal oxide film material with good conductivity and strong correlation system characteristics;
the dielectric layer is positioned on the bottom electrode layer and is composed of a metal oxide film material with high dielectric constant and good insulativity;
the top electrode layer is positioned on the dielectric layer and is made of a metal material with strong conductivity and high stability.
2. The capacitor of claim 1 wherein the metal oxide thin film material having good conductivity and strongly correlated system characteristics comprises: lanthanum nickel trioxide (LaNiO) 3 ) Strontium ruthenium trioxide (SrRuO) 3 ) Niobium (Nb) -doped strontium titanium trioxide (SrTiO) 3 )。
3. The capacitor of claim 1, wherein the metal oxide thin film material having a high dielectric constant and good insulation comprises: lanthanum aluminum oxide (LaAlO) 3 ) Zirconium dioxide (ZrO) 2 ) Hafnium oxide (HfO) 2 ) Lanthanum oxide (La) 2 O 3 ) Barium monoxide (BaO), titanium dioxide (TiO) 2 ) Tantalum pentoxide (Ta) 2 O 5 )。
4. The capacitor of claim 1, wherein the metal material having strong conductivity and high stability comprises: platinum (Pt), gold (Au), silver (Ag).
5. The capacitor of claim 1, wherein the bottom electrode layer has a thickness in the range of not less than 60 nanometers.
6. The capacitor of claim 1, wherein the dielectric layer has a thickness in the range of not less than 20 nanometers.
7. A method of manufacturing a capacitor comprising an electrode layer and a dielectric layer, the electrode layer comprising a bottom electrode layer and a top electrode layer, the method comprising:
preparing the bottom electrode layer of a metal oxide thin film material with good conductivity and strongly correlated system characteristics by pulsed laser deposition (Pulsed Laser Deposition, PLD);
preparing the dielectric layer composed of a metal oxide thin film material with high dielectric constant and good insulation property on the surface of the bottom electrode layer by PLD;
forming a square electrode pattern on the surface of the dielectric layer through a photoetching technology and an etching technology;
the top electrode layer is formed by plating a metal material having strong conductivity and high stability on the formed square electrode pattern by an Electron beam deposition technique (Electron beam-induced deposition, EBID).
8. The method of manufacturing a capacitor of claim 7, wherein the bottom electrode layer manufacturing process comprises:
an oxygen gas pressure value of 0.2mbar was chosen to obtain a stable synthesized metal oxide thin film material with good conductivity and strongly correlated system characteristics for the bottom electrode layer.
9. The method of manufacturing a capacitor of claim 7, wherein the dielectric layer manufacturing process comprises:
determining that the surface roughness of the bottom electrode layer is not more than 5%;
the dielectric layer composed of a metal oxide thin film material having a high dielectric constant and good insulation is prepared on the surface of the bottom electrode layer having a roughness of not more than 5%.
10. The method of manufacturing a capacitor of claim 7, wherein the dielectric layer manufacturing process comprises:
determining that the lattice mismatch of the bottom electrode layer material and the dielectric layer material is no more than 0.8%;
on the surface of the bottom electrode layer, the dielectric layer composed of a metal oxide thin film material having a high dielectric constant and good insulation is prepared.
CN202111527654.6A 2021-12-14 2021-12-14 Capacitor and preparation method thereof Pending CN116264132A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117049597A (en) * 2023-10-11 2023-11-14 北京航空航天大学宁波创新研究院 Preparation method of high-energy-ratio dielectric capacitor and dielectric capacitor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117049597A (en) * 2023-10-11 2023-11-14 北京航空航天大学宁波创新研究院 Preparation method of high-energy-ratio dielectric capacitor and dielectric capacitor
CN117049597B (en) * 2023-10-11 2024-01-09 北京航空航天大学宁波创新研究院 Preparation method of high-energy-ratio dielectric capacitor and dielectric capacitor

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