CN116260431A - Schmitt trigger - Google Patents
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- CN116260431A CN116260431A CN202111508179.8A CN202111508179A CN116260431A CN 116260431 A CN116260431 A CN 116260431A CN 202111508179 A CN202111508179 A CN 202111508179A CN 116260431 A CN116260431 A CN 116260431A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
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Abstract
The invention provides a schmitt trigger, comprising: an input circuit configured to generate a conversion potential from an input voltage and to supply the conversion potential to the conversion circuit; a conversion circuit configured to generate an output voltage for an output circuit from a conversion potential, the conversion circuit comprising: a first switching transistor and a second switching transistor configured to supply an output voltage to the output circuit according to a switching potential; a first latch-up prevention transistor connected between the first conversion transistor and ground; and a second latch-up prevention transistor connected between the second switching transistor and the power supply voltage; and an output circuit configured to output a final output potential value according to the output voltage.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a Schmitt trigger.
Background
In electronics, a Schmitt trigger (english: schmitt trigger) is a comparator circuit that contains positive feedback. The schmitt trigger has two stable states, and is different from a common trigger in that the schmitt trigger adopts a potential triggering mode, and the state of the schmitt trigger is maintained by the potential of an input signal; the schmitt trigger has different threshold voltages for input signals in two different changing directions, namely negative decreasing and positive increasing.
For a standard schmitt trigger, as shown in fig. 1, when the input voltage is higher than the forward threshold voltage, the output is high; when the input voltage is lower than the negative threshold voltage, the output is low; when the input is between the positive and negative threshold voltages, the output is unchanged, that is, the output is turned from the high level to the low level, or the threshold voltages corresponding to the turning from the low level to the high level are different. Only when there is a sufficient change in the input voltage will the output change, so this element is named a flip-flop. This dual threshold action is known as hysteresis, indicating that the schmitt trigger is memory. Essentially, the schmitt trigger is a flip-flop. However, the schmitt trigger has latch-up (latch-up), wherein latch-up refers to a low-impedance path generated between the power supply VDD and the ground GND (VSS) due to the parasitic PNP and NPN bipolar BJTs interacting with each other, and the existence of the low-impedance path generates a large current between VDD and GND, which greatly affects the reliability of the schmitt trigger.
Disclosure of Invention
The invention aims to provide a Schmitt trigger to solve the problem that latch-up seriously affects the reliability of the Schmitt trigger.
In order to solve the above technical problems, the present invention provides a schmitt trigger, including:
an input circuit configured to generate a conversion potential from an input voltage and to supply the conversion potential to the conversion circuit;
a conversion circuit configured to generate an output voltage for an output circuit from a conversion potential, the conversion circuit comprising:
a first switching transistor and a second switching transistor configured to supply an output voltage to the output circuit according to a switching potential;
a first latch-up prevention transistor connected between the first conversion transistor and ground; and
a second latch-up prevention transistor connected between the second switching transistor and the power supply voltage; and
and an output circuit configured to output a final output potential value according to the output voltage.
Optionally, in the schmitt trigger, the input circuit includes:
a first transistor configured to have a gate connected to an input voltage, a source connected to a power supply voltage, and a drain connected to a first conversion potential;
a second transistor configured to have a gate connected to the input voltage, a source connected to the first conversion potential, and a drain connected to the output circuit;
a third transistor configured to have a gate connected to the input voltage, a source connected to the second switching potential, and a drain connected to the output circuit; and
and the fourth transistor is configured that the grid electrode is connected with the input voltage, the source electrode is grounded, and the drain electrode is connected with the second conversion potential.
Optionally, in the schmitt trigger, the conversion circuit includes:
the first conversion transistor is further configured that the grid electrode is connected with the output circuit, the source electrode is connected with the first conversion potential, and the drain electrode is connected with the source electrode of the first latch-up prevention transistor;
the first latch-up prevention transistor is further configured that a grid electrode is connected with a first control end, and a drain electrode is grounded;
the second conversion transistor is further configured that the grid electrode is connected with the output circuit, the source electrode is connected with the second conversion potential, and the drain electrode is connected with the source electrode of the second latch-up prevention transistor;
the second latch-up prevention transistor is further configured that the grid electrode is connected with the second control end, and the drain electrode is connected with the power supply voltage;
when the input voltage is higher than the forward threshold voltage, the output voltage provided by the first conversion transistor and the second conversion transistor to the output circuit is high level;
when the input voltage is higher than the negative threshold voltage, the output voltage provided by the first conversion transistor and the second conversion transistor to the output circuit is low level.
Optionally, in the schmitt trigger, the output circuit includes:
a seventh transistor configured such that gates are connected to drains of the second transistor and the third transistor, and gates of the first conversion transistor and the second conversion transistor, sources are connected to a power supply voltage, and drains are connected to a final output potential value;
and an eighth transistor configured such that gates are connected to drains of the second transistor and the third transistor, and gates of the first conversion transistor and the second conversion transistor, sources are grounded, and drains are connected to a final output potential value.
Optionally, in the schmitt trigger,
the first transistor, the second transistor, the first conversion transistor, the second latch-up prevention transistor and the seventh transistor are PMOS;
the third transistor, the fourth transistor, the second conversion transistor, the first latch-up prevention transistor, and the eighth transistor are NMOS.
Optionally, in the schmitt trigger,
a first conversion transistor, a first latch-up prevention transistor, a second conversion transistor and a second latch-up prevention transistor form a group of trimming circuits;
the number of the first conversion transistor, the first latch-up prevention transistor, the second conversion transistor and the second latch-up prevention transistor is multiple and equal, so that the conversion circuit comprises multiple groups of trimming circuits;
each group of trimming circuits is connected with a first control end and a second control end, and a first control signal and a second control signal are respectively provided for the first control end and the second control end, so that each group of trimming circuits is turned on or turned off.
Optionally, in the schmitt trigger, when the group of trimming circuits is turned off, the value of the positive threshold voltage is a first threshold value, and the value of the negative threshold voltage is a second threshold value;
when the group of trimming circuits is started, the value of the positive threshold voltage is equal to the sum of the first threshold value and the trimming value of the group of trimming circuits, and the value of the negative threshold voltage is equal to the difference between the second threshold value and the trimming value of the group of trimming circuits;
optionally, in the schmitt trigger, the W value of the first switching transistor and the W value of the second switching transistor in each group of trimming circuits are adjusted to adjust the trimming values of the group of trimming circuits corresponding to the first switching transistor and the second switching transistor.
Optionally, in the schmitt trigger, a high level signal and a low level signal are directly provided to the first control terminal and one of the second control terminals, so that at least one group of trimming circuits is kept on.
Optionally, in the schmitt trigger, the first switching transistor and the second switching transistor serve as a switching MOS: vgs-Vth >0, vds < < Vgs-Vth;
the first anti-latch-up transistor and the second anti-latch-up transistor operate in a linear region to replace the resistor.
In a schmitt trigger circuit, latch-up is easily generated if the NMOS is directly connected to the power supply or the PMOS is directly connected to the ground. In order to solve the latch-up problem, a current limiting resistor is generally added on the ground power supply, or the area is increased to break the latch-up structure when the layout is realized. The latch-up prevention scheme commonly used in the prior art adopts a resistor protection scheme as shown in fig. 2, wherein a first resistor R1 is connected between a first switching transistor M5 and ground, and a second resistor R2 is connected between a second switching transistor M6 and a power supply voltage, so as to prevent latch-up. However, the inventors of the present invention found that the manner of increasing the resistance brings about the following disadvantages: the MOS tube and the resistor have different properties, different processes have different size requirements, and other modules are directly spliced and also need size redundancy, but the structure is broken by using the guiding breaking structure, so that the defect of large occupied area is caused, and if the buried layer structure is not arranged, the direct distance between two NMOS (N-channel metal oxide semiconductor) is required to be set larger, so that the defect is larger by adopting the method.
Based on the above insight, the present invention provides a schmitt trigger, which is connected between a first conversion transistor and the ground through a first latch-up preventing transistor, so that the linear region resistance characteristic of the first latch-up preventing transistor is used as a latch-up preventing means of the first conversion transistor, the second latch-up preventing transistor is connected between the second conversion transistor and the power supply voltage, and the linear region resistance characteristic of the second latch-up preventing transistor is used as a latch-up preventing means of the second conversion transistor.
Drawings
FIG. 1 is a schematic diagram of a prior art Schmitt trigger;
FIG. 2 is a schematic diagram of a prior art Schmitt trigger;
FIG. 3 is a schematic diagram of a Schmitt trigger in accordance with one embodiment of the present invention;
FIG. 4 is a circuit layout comparison diagram of a Schmitt trigger according to an embodiment of the present invention and a prior art Schmitt trigger;
fig. 5 is a schematic diagram of a schmitt trigger in another embodiment of the present invention.
Detailed Description
The invention is further elucidated below in connection with the embodiments with reference to the drawings.
It should be noted that the components in the figures may be shown exaggerated for illustrative purposes and are not necessarily to scale. In the drawings, identical or functionally identical components are provided with the same reference numerals.
In the present invention, unless specifically indicated otherwise, "disposed on …", "disposed over …" and "disposed over …" do not preclude the presence of an intermediate therebetween. Furthermore, "disposed on or above" … merely indicates the relative positional relationship between the two components, but may also be converted to "disposed under or below" …, and vice versa, under certain circumstances, such as after reversing the product direction.
In the present invention, the embodiments are merely intended to illustrate the scheme of the present invention, and should not be construed as limiting.
In the present invention, the adjectives "a" and "an" do not exclude a scenario of a plurality of elements, unless specifically indicated.
It should also be noted herein that in embodiments of the present invention, only a portion of the components or assemblies may be shown for clarity and simplicity, but those of ordinary skill in the art will appreciate that the components or assemblies may be added as needed for a particular scenario under the teachings of the present invention. In addition, features of different embodiments of the invention may be combined with each other, unless otherwise specified. For example, a feature of the second embodiment may be substituted for a corresponding feature of the first embodiment, or may have the same or similar function, and the resulting embodiment would fall within the disclosure or scope of the disclosure.
It should also be noted herein that, within the scope of the present invention, the terms "identical", "equal" and the like do not mean that the two values are absolutely equal, but rather allow for some reasonable error, that is, the terms also encompass "substantially identical", "substantially equal". By analogy, in the present invention, the term "perpendicular", "parallel" and the like in the table direction also covers the meaning of "substantially perpendicular", "substantially parallel".
The numbers of the steps of the respective methods of the present invention are not limited to the order of execution of the steps of the methods. The method steps may be performed in a different order unless otherwise indicated.
The schmitt trigger proposed by the present invention is further described in detail below with reference to the accompanying drawings and specific examples. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
The invention aims to provide a Schmitt trigger to solve the problem that latch-up seriously affects the reliability of the Schmitt trigger.
To achieve the above object, the present invention provides a schmitt trigger comprising: an input circuit configured to generate a conversion potential from an input voltage and to supply the conversion potential to the conversion circuit; a conversion circuit comprising a first conversion transistor, a second conversion transistor, a first anti-latch-up transistor, and a second anti-latch-up transistor, wherein: the first switching transistor and the second switching transistor are configured to supply an output voltage to the output circuit according to the switching potential; the first latch-up prevention transistor is connected between the first conversion transistor and the ground, and the second latch-up prevention transistor is connected between the second conversion transistor and the power supply voltage; and an output circuit configured to output a final output potential value according to the output voltage.
An embodiment of the present invention provides a schmitt trigger, as shown in fig. 3 and 5, including: an input circuit 10 configured to generate a conversion potential from the input voltage Vi and to supply the conversion potential to the conversion circuit 20; a conversion circuit 20 including a first conversion transistor M5/M11, a second conversion transistor M6/M12, a first latch-up prevention transistor M9/M13, and a second latch-up prevention transistor M10/M14, wherein: the first switching transistor M5/M11 and the second switching transistor M6/M12 are configured to supply an output voltage to the output circuit 30 according to a switching potential; the first latch-up preventing transistor M9/M13 is connected between the first switching transistor M5/M11 and the ground, and the second latch-up preventing transistor M10/M14 is connected between the second switching transistor M6/M12 and the power supply voltage VDD; and an output circuit 30 configured to output a final output potential value Vo according to the output voltage.
In one embodiment of the present invention, in the schmitt trigger, the input circuit 10 includes: a first transistor M1 configured to have a gate connected to the input voltage Vi, a source connected to the power supply voltage VDD, and a drain connected to the first conversion potential V1; a second transistor M2 configured to have a gate connected to the input voltage, a source connected to the first conversion potential V1, and a drain connected to the output circuit 30; a third transistor M3 configured to have a gate connected to the input voltage Vi, a source connected to the second switching potential V2, and a drain connected to the output circuit 30; and a fourth transistor M4 configured to have a gate connected to the input voltage Vi, a source grounded, and a drain connected to the second switching potential V2.
In one embodiment of the present invention, in the schmitt trigger, the conversion circuit 20 includes: the first switching transistor M5/M11 is further configured to have a gate connected to the output circuit 30, a source connected to the first switching potential V1, and a drain connected to the source of the first latch-up preventing transistor M9/M13; the first latch-up prevention transistor M9/M13 is further configured that a gate is connected to the first control terminal EN, and a drain is grounded; the second switching transistor M6/M12 is further configured such that the gate is connected to the output circuit 30, the source is connected to the second switching potential V2, and the drain is connected to the source of the second latch-up preventing transistor M10/M14; the second latch-up prevention transistor M10/M14 is further configured that a gate is connected to the second control terminal ENB and a drain is connected to the power supply voltage VDD; when the input voltage Vi is higher than the forward threshold voltage, the output voltages supplied to the output circuit 30 by the first and second switching transistors M5/M11 and M6/M12 are high; when the input voltage is higher than the negative-going threshold voltage, the output voltages supplied to the output circuit 30 by the first and second switching transistors M5/M11 and M6/M12 are low.
In one embodiment of the present invention, in the schmitt trigger, the output circuit 30 includes: a seventh transistor M7 configured to have gates connected to the drains of the second transistor M2 and the third transistor M3, and gates of the first conversion transistor M5/M11 and the second conversion transistor M6/M12, a source connected to the power supply voltage VDD, and a drain connected to the final output potential value Vo; the eighth transistor M8 is configured to have gates connected to the drains of the second transistor M2 and the third transistor M3, and gates of the first switching transistor M5/M11 and the second switching transistor M6/M12, sources grounded, and drains connected to the final output potential value Vo.
In one embodiment of the present invention, in the schmitt trigger, the first transistor M1, the second transistor M2, the first conversion transistor M5/M11, the second latch-up prevention transistor, and the seventh transistor M7 are PMOS; the third transistor M3, the fourth transistor M4, the second switching transistor M6/M12, the first latch-up preventing transistor and the eighth transistor M8 are NMOS.
In one embodiment of the present invention, in the schmitt trigger, a first conversion transistor, a first latch-up preventing transistor, a second conversion transistor, and a second latch-up preventing transistor form a group of trimming circuits; the number of the first conversion transistors M5/M11, the first latch-up preventing transistors M9/M13, the second conversion transistors M6/M12 and the second latch-up preventing transistors M10/M14 is plural and equal, so that the conversion circuit 20 comprises a plurality of groups of trimming circuits; each group of trimming circuits is connected with a first control end and a second control end, and a first control signal and a second control signal are respectively provided for the first control end and the second control end, so that each group of trimming circuits is turned on or turned off. For example: the first conversion transistor M5, the first latch-up prevention transistor M9, the second conversion transistor M6 and the second latch-up prevention transistor M10 form a first group of trimming circuits; the first conversion transistor M11, the first latch-up prevention transistor M13, the second conversion transistor M12 and the second latch-up prevention transistor M14 form a second group of trimming circuits; the first group of trimming circuits is connected with the first control end EN1 and the second control end ENB1, and the second group of trimming circuits is connected with the first control end EN2 and the second control end ENB2.
In one embodiment of the present invention, in the schmitt trigger, when the group of trimming circuits is turned off, the positive threshold voltage has a first threshold value, and the negative threshold voltage has a second threshold value; when the group of trimming circuits is started, the value of the positive threshold voltage is equal to the sum of the first threshold value and the trimming value of the group of trimming circuits, and the value of the negative threshold voltage is equal to the difference between the second threshold value and the trimming value of the group of trimming circuits;
in one embodiment of the present invention, in the schmitt trigger, the W value of the first switching transistor M5/M11 and the W value of the second switching transistor M6/M12 in each set of trimming circuits are adjusted to adjust the trimming values of the corresponding set of trimming circuits.
In one embodiment of the present invention, in the schmitt trigger, a high level signal and a low level signal are directly provided to the first control terminal and one of the second control terminals, so that at least one group of trimming circuits is kept on.
In one embodiment of the present invention, in the schmitt trigger, the first switching transistor M5/M11 and the second switching transistor M6/M12 function as switching MOS: vgs-Vth >0, vds < < Vgs-Vth; the first anti-latch-up transistor M9/M13 and the second anti-latch-up transistor M10/M14 operate in the linear region instead of the resistor.
As shown in fig. 4, at the far right end of fig. 4, the manner of increasing the resistance brings about the following disadvantages: the MOS tube and the resistor have different properties, different processes have different size requirements, and other modules are directly spliced to also need size redundancy, so that the defect of large occupied area can be caused by interrupting the structure with the guiding, if no buried layer structure exists, the direct distance between two NMOS (N-channel metal oxide semiconductor) is required to be set larger, and the defect is larger by adopting the method. As can be seen in the middle part of fig. 4, the schmitt trigger provided by the invention is a transistor, has the same attribute and the same size requirement, can be uniformly manufactured and completed in the same process steps, has the same splicing size, does not occupy additional area, is flexible to splice, does not have parasitic risks of NMOS power supply and PMOS grounding, and combines a plurality of technical effects to realize unexpected technical advantages. MOS transistors operating in the linear region can replace resistors with the benefit of interrupting latch parasitics. The reliability design is also increased, and the layout of the resistor is not flexible to realize the MOS tube.
The second advantage of the invention is that the triggering of the schmitt circuit can be switched on and off more flexibly; for example: the first control end EN and the second control end ENB are connected in two ways, wherein the first control end EN and the second control end ENB can enable MOS to work in a linear region by using a continuous high-level signal tieH and a continuous low-level signal tieL when the first control end EN and the second control end ENB are normally open when the first control end EN and the second control end ENB are used in SMIT; the second is that logic control can be added to decide whether to use SMIT trigger, and en=1 and enb=0 are set when not using SMIT trigger; when the SMIT trigger is used, EN=0 and ENB=1 are set, the SMIT trigger can reduce the noise of the circuit, and the SMIT non-trigger can reduce the power consumption of the circuit, so that the trigger of the Schmitt circuit can be flexibly started and closed according to the use requirement of the circuit, so that the circuit is suitable for different application occasions or flexible allocation of the circuit. Logic control and SMIT selection are added.
A third advantage of the present invention is that the selection of SMIT thresholds may also be increased. Taking a 5V supply voltage as an example, when SMIT is not turned on, the rising and falling threshold voltages (the values of the positive and negative threshold voltages) of the output voltage are both 2.4V. In the case of a resistive schmitt trigger as shown in fig. 2, this state cannot be used, and the resistive type must be triggered by SMIT by default. The advantage of not turning on SMIT is low power consumption (assuming 20uA at this time), and the advantage of turning on SMIT is noise immunity. The first group of trimming circuits (SMIT) shown in fig. 3 changes the on threshold (the value of the forward threshold voltage) of the rising edge to 3V (the on threshold of the rising edge), which can prevent the voltage noise around the central value from being turned on by mistake during the rising edge, but the power consumption increases (becomes 30 uA) due to turning on one-way function.
As shown in fig. 5, if the value of the forward threshold voltage is increased by the rising trim value (i.e., the trim value of the second set of trim circuits) by the set of trim circuits of fig. 5 based on fig. 3. For example, the trimming value of the second group of trimming circuits is 0.5V, and the simulation results in that the rising threshold continues to increase to 3.5V, and the power consumption also continues to increase a little (to 50 uA). The negative threshold voltage value of fig. 5 continues to increase by a falling trim value (i.e., the trim value of the second set of trim circuits) based on the first set of trim circuits of fig. 3. The simulation shows that the drop threshold continues to drop to 1.4V and the power consumption also continues to increase a bit (to 60 uA). The above data are used for example for single simulation data. May vary from application scenario to application scenario (e.g., different supply voltages), including variations in both threshold voltage and power consumption. The trim values in this embodiment are only added by a group, and may be further refined according to the requirement, such as trim1, trim2, etc. the increase of trim can be applied to more noisy environments to balance power consumption and performance.
For example, as shown in fig. 5, when en1=1, enb=0, en2=1, and enb2=0, neither the first group of trimming circuits nor the second group of trimming circuits turn on the SMIT function, the positive and negative threshold voltages have values of 2.5V, en1=0, enb 1=1, en2=1, and enb2=0, the forward threshold voltages (the first group of trimming circuits where M5 to M10 are located turn on the SMIT function) have values of 3V, en1=0, enb1=1, en2=0, and enb2=1 (the first group of trimming circuits where M5 to M10 are located and the second group of trimming circuits where M11 to M14 are located turn on the SMIT function), and the forward threshold voltages have values of 3.5V, and the first group of trimming circuits and the second group of trimming circuits are both stepped by 0.5V. The amplitude of the steps of both the first set of trimming circuits and the second set of trimming circuits can be achieved by adjusting the W values of M5/M6, and M11/M12. Or the first group of trimming circuits can be directly stepped to 3.3V, and then in order to achieve 3.5V, the W value of the second group of trimming circuits can be adjusted when the second group of trimming circuits are started, so that the stepping value of the second group of trimming circuits is 0.2V.
In summary, the foregoing embodiments describe different configurations of the schmitt trigger in detail, and of course, the present invention includes, but is not limited to, the configurations listed in the foregoing embodiments, and any configuration that is changed based on the configurations provided in the foregoing embodiments falls within the scope of protection of the present invention. One skilled in the art can recognize that the above embodiments are illustrative.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the system disclosed in the embodiment, the description is relatively simple because of corresponding to the method disclosed in the embodiment, and the relevant points refer to the description of the method section.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (10)
1. A schmitt trigger, comprising:
an input circuit configured to generate a conversion potential from an input voltage and to supply the conversion potential to the conversion circuit;
a conversion circuit configured to generate an output voltage for an output circuit from a conversion potential, the conversion circuit comprising:
a first switching transistor and a second switching transistor configured to supply an output voltage to the output circuit according to a switching potential;
a first latch-up prevention transistor connected between the first conversion transistor and ground; and
a second latch-up prevention transistor connected between the second switching transistor and the power supply voltage; and an output circuit configured to output a final output potential value according to the output voltage.
2. The schmitt trigger of claim 1, wherein the input circuit comprises:
a first transistor configured to have a gate connected to an input voltage, a source connected to a power supply voltage, and a drain connected to a first conversion potential;
a second transistor configured to have a gate connected to the input voltage, a source connected to the first conversion potential, and a drain connected to the output circuit;
a third transistor configured to have a gate connected to the input voltage, a source connected to the second switching potential, and a drain connected to the output circuit; and
and the fourth transistor is configured that the grid electrode is connected with the input voltage, the source electrode is grounded, and the drain electrode is connected with the second conversion potential.
3. The schmitt trigger of claim 2, wherein the conversion circuit comprises:
the first conversion transistor is further configured that the grid electrode is connected with the output circuit, the source electrode is connected with the first conversion potential, and the drain electrode is connected with the source electrode of the first latch-up prevention transistor;
the first latch-up prevention transistor is further configured that a grid electrode is connected with a first control end, and a drain electrode is grounded;
the second conversion transistor is further configured that the grid electrode is connected with the output circuit, the source electrode is connected with the second conversion potential, and the drain electrode is connected with the source electrode of the second latch-up prevention transistor;
the second latch-up prevention transistor is further configured that the grid electrode is connected with the second control end, and the drain electrode is connected with the power supply voltage;
when the input voltage is higher than the forward threshold voltage, the output voltage provided by the first conversion transistor and the second conversion transistor to the output circuit is high level;
when the input voltage is higher than the negative threshold voltage, the output voltage provided by the first conversion transistor and the second conversion transistor to the output circuit is low level.
4. The schmitt trigger of claim 3, wherein the output circuit comprises:
a seventh transistor configured such that gates are connected to drains of the second transistor and the third transistor, and gates of the first conversion transistor and the second conversion transistor, sources are connected to a power supply voltage, and drains are connected to a final output potential value;
and an eighth transistor configured such that gates are connected to drains of the second transistor and the third transistor, and gates of the first conversion transistor and the second conversion transistor, sources are grounded, and drains are connected to a final output potential value.
5. The schmitt trigger of claim 4, wherein,
the first transistor, the second transistor, the first conversion transistor, the second latch-up prevention transistor and the seventh transistor are PMOS;
the third transistor, the fourth transistor, the second conversion transistor, the first latch-up prevention transistor, and the eighth transistor are NMOS.
6. The schmitt trigger of claim 4, wherein,
a first conversion transistor, a first latch-up prevention transistor, a second conversion transistor and a second latch-up prevention transistor form a group of trimming circuits;
the number of the first conversion transistor, the first latch-up prevention transistor, the second conversion transistor and the second latch-up prevention transistor is multiple and equal, so that the conversion circuit comprises multiple groups of trimming circuits;
each group of trimming circuits is connected with a first control end and a second control end, and a first control signal and a second control signal are respectively provided for the first control end and the second control end, so that each group of trimming circuits is turned on or turned off.
7. The schmitt trigger of claim 6, wherein when the set of trimming circuits is turned off, the positive threshold voltage has a first threshold value and the negative threshold voltage has a second threshold value;
so that when the set of trimming circuits is turned on, the value of the positive threshold voltage is equal to the sum of the first threshold and the trimming value of the set of trimming circuits, and the value of the negative threshold voltage is equal to the difference between the second threshold and the trimming value of the set of trimming circuits.
8. The schmitt trigger of claim 7, wherein the W value of the first switching transistor and the W value of the second switching transistor in each set of trimming circuits are adjusted to adjust the trimming values of the corresponding set of trimming circuits.
9. The schmitt trigger of claim 6, wherein the high and low signals are provided directly to the first and second control terminals such that at least one set of trimming circuits remains on.
10. The schmitt trigger of claim 6, wherein the first and second switching transistors function as switching MOS: vgs-Vth >0, vds < < Vgs-Vth;
the first anti-latch-up transistor and the second anti-latch-up transistor operate in a linear region to replace the resistor.
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| CN202111508179.8A CN116260431A (en) | 2021-12-10 | 2021-12-10 | Schmitt trigger |
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| CN202111508179.8A CN116260431A (en) | 2021-12-10 | 2021-12-10 | Schmitt trigger |
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| CN (1) | CN116260431A (en) |
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2021
- 2021-12-10 CN CN202111508179.8A patent/CN116260431A/en active Pending
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