CN116247935A - Multimode buck converter, conversion method and conversion module thereof - Google Patents
Multimode buck converter, conversion method and conversion module thereof Download PDFInfo
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- CN116247935A CN116247935A CN202310124529.3A CN202310124529A CN116247935A CN 116247935 A CN116247935 A CN 116247935A CN 202310124529 A CN202310124529 A CN 202310124529A CN 116247935 A CN116247935 A CN 116247935A
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- 239000003990 capacitor Substances 0.000 claims abstract description 56
- 230000010354 integration Effects 0.000 abstract description 2
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- 238000004806 packaging method and process Methods 0.000 description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present invention relates to the field of voltage converters, and more particularly, to a multimode buck converter, a method for converting voltage by using the multimode buck converter, and a conversion module designed based on the multimode buck converter. The invention provides a multi-mode buck converter, which only integrates 9 switches and 3 capacitors, and keeps the high integration level of the system. The multi-mode buck converter combines the conversion method, so that the multi-mode buck converter realizes high-efficiency voltage conversion of three modes of 3:1 multiplying power, 2:1 multiplying power and 3:2 multiplying power under the condition of not changing an input/output port, and meets the voltage conversion ratio requirements of an AIOT chip in different modes.
Description
Technical Field
The present invention relates to the field of voltage converters, and more particularly, to a multimode buck converter, a method for converting voltage by using the multimode buck converter, and a conversion module designed based on the multimode buck converter.
Background
The multimode buck converter is a DC-DC voltage converter that uses pumping capacitance to store energy. They can either step up or step down the input voltage, and can also be used to generate negative voltages. The FET switch array within it controls the charge and discharge of the flying capacitor in a manner that causes the input voltage to drop by a factor that results in the desired output voltage. With the advent of the worldwide interconnection age, the demands for low power consumption and low heat generation of various electric appliances and small wearable devices have come with the power supply demands applied to various chips with different power consumption.
The multi-mode buck converter is widely used in the AIOT field because of high efficiency, but once the conventional multi-mode buck converter determines the structure, the voltage conversion ratio that can be realized is fixed, and the voltage conversion ratio of the input and the output cannot be changed. Under the existing AIOT chip circuit scenario, high-efficiency voltage conversion (i.e., 3:1, 2:1 and 3:2 voltage multiplying power conversion) from 1.8V input voltage to 1.2V, 0.9V and 0.6V is required to be realized under the condition that the input/output port is not changed, but the traditional buck converter cannot be realized.
Disclosure of Invention
Based on this, it is necessary to provide a multi-mode buck converter, a conversion method and a conversion module thereof, aiming at the problem that the conventional multi-mode buck converter cannot be compatible with three voltage multiplying power conversions of 3:1, 2:1 and 3:2 without changing the input/output port.
The invention is realized by adopting the following technical scheme:
in a first aspect, the present invention provides a multi-mode buck converter, including a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, a sixth switch S6, a seventh switch S7, an eighth switch S8, a ninth switch S9, a first capacitor C1, a second capacitor C2, and an output capacitor Co.
The first connection terminal of the first switch S1 is connected to the input positive terminal of the multi-mode buck converter. The first connecting end of the second switch S2 is connected with the second connecting end of the first switch S1, and the second connecting end is connected with the output positive end of the multi-mode buck converter. The second connection terminal of the third switch S3 is connected to the output positive terminal of the multi-mode buck converter. The first connection terminal of the fourth switch S4 is connected to the ground GND, and the second connection terminal is connected to the first connection terminal of the third switch S3. The first connection terminal of the fifth switch S5 is connected to the input positive terminal of the multi-mode buck converter. The first connection end of the sixth switch S6 is connected to the second connection end of the fifth switch S5, and the second connection end is connected to the output positive end of the multi-mode buck converter. The second connection terminal of the seventh switch S7 is connected to the output positive terminal of the multi-mode buck converter. The first connection terminal of the eighth switch S8 is connected to the ground GND, and the second connection terminal is connected to the first connection terminal of the seventh switch S7. The first connection end of the ninth switch S9 is connected to the second connection end of the fourth switch S4, and the second connection end is connected to the second connection end of the fifth switch S5. The first connecting end of the first capacitor C1 is connected with the second connecting end of the first switch S1, and the second connecting end of the first capacitor C1 is connected with the second connecting end of the fourth switch S4. The first connection end of the second capacitor C2 is connected to the second connection end of the fifth switch S5, and the second connection end is connected to the second connection end of the eighth switch S8. The first connection end of the output capacitor Co is connected with the output positive end of the multi-mode buck converter, and the second connection end of the output capacitor Co is connected with the ground GND.
An input power source VIN is connected between the input positive terminal of the multi-mode buck converter and the ground GND, and an output voltage VOUT is connected between the output positive terminal and the ground GND. The multi-mode buck converter performs multi-mode buck conversion by turning on or off 9 switches.
Implementation of such a multi-mode buck converter is in accordance with methods or processes of embodiments of the present disclosure.
In a second aspect, the present invention discloses a method for converting a voltage to reduce the voltage, which is used for realizing 3:1, 2:1, 3:2 multiplying power conversion from an input voltage to an output voltage, and is applied to the multimode buck converter as in the first aspect.
Implementation of such a method of converting a voltage down is in accordance with methods or processes of embodiments of the present disclosure.
In a third aspect, the present invention discloses a conversion module, which is formed by encapsulating a circuit of a multi-mode buck converter as disclosed in the first aspect.
Implementation of the conversion module is in accordance with the methods or processes of embodiments of the present disclosure.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a multi-mode buck converter, which only integrates 9 switches and 3 capacitors, and keeps the high integration level of the system. The multi-mode buck converter combines the conversion method, so that the multi-mode buck converter realizes high-efficiency voltage conversion of three modes of 3:1 multiplying power, 2:1 multiplying power and 3:2 multiplying power under the condition of not changing an input/output port, and meets the voltage conversion ratio requirements of an AIOT chip in different modes.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from these drawings without inventive faculty for a person skilled in the art.
Fig. 1 is a schematic diagram of a multi-mode buck converter according to an embodiment of the present invention;
FIG. 2 is a state switching diagram of the multi-mode buck converter of FIG. 1 when performing a 3:1 rate conversion;
FIG. 3 is a state switching diagram of the multi-mode buck converter of FIG. 1 when performing 2:1 rate conversion;
fig. 4 is a state switching diagram of the multi-mode buck converter of fig. 1 when performing 3:2 rate conversion.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It is noted that when an element is referred to as being "mounted to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "secured to" another element, it can be directly secured to the other element or intervening elements may also be present.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "or/and" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, a block diagram of a multi-mode buck converter according to the present disclosure is shown. As shown in fig. 1, a multi-mode buck converter includes 9 switches (S1-S9), 2 configuration capacitors (C1-C2), and 1 output capacitor Co.
The first connection terminal of the first switch S1 is connected to the input positive terminal of the multi-mode buck converter. The first connecting end of the second switch S2 is connected with the second connecting end of the first switch S1, and the second connecting end is connected with the output positive end of the multi-mode buck converter. The second connection terminal of the third switch S3 is connected to the output positive terminal of the multi-mode buck converter. The first connection terminal of the fourth switch S4 is connected to the ground GND, and the second connection terminal is connected to the first connection terminal of the third switch S3. The first connection terminal of the fifth switch S5 is connected to the input positive terminal of the multi-mode buck converter. The first connection end of the sixth switch S6 is connected to the second connection end of the fifth switch S5, and the second connection end is connected to the output positive end of the multi-mode buck converter. The second connection terminal of the seventh switch S7 is connected to the output positive terminal of the multi-mode buck converter. The first connection terminal of the eighth switch S8 is connected to the ground GND, and the second connection terminal is connected to the first connection terminal of the seventh switch S7. The first connection end of the ninth switch S9 is connected to the second connection end of the fourth switch S4, and the second connection end is connected to the second connection end of the fifth switch S5. The first connecting end of the first capacitor C1 is connected with the second connecting end of the first switch S1, and the second connecting end of the first capacitor C1 is connected with the second connecting end of the fourth switch S4. The first connection end of the second capacitor C2 is connected to the second connection end of the fifth switch S5, and the second connection end is connected to the second connection end of the eighth switch S8. The first connection end of the output capacitor Co is connected with the output positive end of the multi-mode buck converter, and the second connection end of the output capacitor Co is connected with the ground GND.
For easy understanding, the above connection relationship adopts another description mode:
the input positive terminal of the multi-mode buck converter is connected to the first connection of the first switch S1 and the first connection of the fifth switch S5. The input and output negative terminals of the multi-mode buck converter, as well as the first connection of the fourth switch S4 and the first connection of the eighth switch S8, are grounded, i.e. the input and output negative terminals are in fact ground GND. The first connection end of the first capacitor C1 is connected to the second connection end of the first switch S1 and the first connection end of the second switch S2, and the second connection end of the first capacitor C is connected to the first connection end of the ninth switch S9, the second connection end of the fourth switch S4 and the first connection end of the third switch S3. The first connection end of the second capacitor C2 is connected to the second connection end of the fifth switch S5, the first connection end of the sixth switch capacitor S6, and the second connection end of the ninth switch S9, and the second connection end of the second capacitor C2 is connected to the second connection end of the eighth switch S8 and the first connection end of the seventh switch S7. The first connection end of the third switch S3 is connected to the first capacitor C1, the second connection end of the fourth switch S4, and the first connection end of the ninth switch S9, and the second connection end of the third switch S3 is connected to the second connection end of the second switch S2, the second connection end of the sixth switch S6, the second connection end of the seventh switch S7, and the output positive end of the multi-mode buck converter. The second connection terminal of the second switch S2, the second connection terminal of the sixth switch S6 and the second connection terminal of the seventh switch S7 are connected to the output positive terminal of the multi-mode buck converter. In addition, for the power supply circuit, an output capacitor is generally connected in parallel with an output port of the default circuit for filtering and energy storage, so that the output voltage waveform is smoother. In this circuit, an output capacitor Co is also connected in parallel to the output positive terminal and ground GND.
An input power source VIN is connected between an input positive terminal of the multi-mode buck converter and the ground GND, and an output voltage VOUT is connected between an output positive terminal of the multi-mode buck converter and the ground GND; the multi-mode buck converter performs multi-mode buck conversion by turning on or off 9 switches.
The first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, the seventh switch S7, the eighth switch S8 and the ninth switch S9 are all connected with enable signals for controlling the switch to be turned on or turned off. Referring to the subsequent switching mode, it is recommended to use 9 independent enable signals to control the 9 switches respectively. The enable signal may be a clock square wave signal with a duty cycle of 50% provided by an external clock circuit.
In this embodiment 1, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all MOSFET transistors (i.e., MOS transistors). The first connecting end is a source electrode of the MOS tube, and the second connecting end is a drain electrode of the MOS tube. The grid electrode of the MOS tube is used as the input end of the enabling signal.
The multi-mode buck converter of this embodiment 1 is capable of achieving high efficiency voltage conversion in three modes of 3:1 multiplying power, 2:1 multiplying power and 3:2 multiplying power.
Fig. 2 shows an equivalent circuit diagram of the multi-mode buck converter in the 3:1 rate conversion mode. This mode includes two phases:
in the Phase1, the first switch S1, the seventh switch S7, and the ninth switch S9 are turned on, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the eighth switch S8 are turned off, and the first capacitor C1 and the second capacitor C2 are connected in series with the output capacitor Co, and are charged by VIN.
In the Phase2 stage, the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on, the first switch S1, the third switch S3, the fifth switch S5, the seventh switch S7 and the ninth switch S9 are turned off, the first capacitor C1 and the second capacitor C2 are connected in parallel, and the output capacitor Co is discharged.
In both phases of this mode, the off and on times are 50% for the switch whose state is changed. At steady state, 3:1 multiplying power conversion from input power supply to output voltage is realized.
And (II) as shown in FIG. 3, an equivalent circuit diagram of the multi-mode buck converter in the 2:1 multiplying power conversion mode is shown. In the 2:1 conversion mode, the capacitor and switch always operate in parallel, which reduces the resistance of the circuit compared to other modes. This mode includes two phases:
in the Phase1 stage, the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are turned on, the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8 and the ninth switch S9 are turned off, the first capacitor C1 and the second capacitor C2 are serially connected with the output capacitor Co and charged by VIN, wherein the first capacitor C1 and the second capacitor C2 are connected in parallel and serially charged with the output capacitor Co.
In the Phase2 stage, the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on, the first switch S1, the third switch S3, the fifth switch S5, the seventh switch S7 and the ninth switch S9 are turned off, the first capacitor C1 and the second capacitor C2 are connected in parallel with the output capacitor Co, and the first capacitor C1 and the second capacitor C2 discharge the output capacitor Co.
In both phases of this mode, the off and on times are 50% for the switch whose state is changed. Vout=vin/2 in steady state, achieving a 2:1 ratio conversion of input power VIN to output voltage VOUT.
And (III) as shown in FIG. 4, the equivalent circuit diagram of the multi-mode buck converter operating in the 3:2 multiplying power conversion mode. This mode includes two phases:
in the Phase1 stage, the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are turned on, the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8 and the ninth switch S9 are turned off, and the first capacitor C1 and the second capacitor C2 are connected in parallel and are charged in series with the output capacitor Co by the input power VIN.
In the Phase2, the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8, and the ninth switch S9 are turned on, the first switch S1, the third switch S3, the fifth switch S5, and the seventh switch S7 are turned off, the first capacitor C1 and the second capacitor C2 are connected in series, and the output capacitor Co is discharged.
In both phases of this mode, the off and on times are 50% for the switch whose state is changed. Vout=2/3 VIN in steady state, enabling a 3:2 ratio conversion of input power VIN to output voltage VOUT.
If the input power vin=1.8v, the above mode can be used to convert the input/output port to the output voltage VOUT of 1.2V, 0.9V, or 0.6V without switching the input/output port.
It is noted that in the present invention, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. For example, the first connection and the second connection of the capacitor and the switch are merely representative of two connections of the capacitor and the switch, and the first connection and the second connection may be interchanged.
Embodiment 1 also discloses a method for converting voltage in a step-down manner, which is used for realizing 3:1, 2:1 and 3:2 multiplying power conversion from input voltage to output voltage. The conversion method is used for the multimode buck converter, and specifically comprises the following steps:
when the 3:1 multiplying power conversion is carried out, only the first switch S1, the seventh switch S7 and the ninth switch S9 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 3:1 multiplying power conversion from input power supply to output voltage is realized.
When 2:1 multiplying power conversion is carried out, only the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 2:1 multiplying power conversion from input power supply to output voltage is realized.
When the 3:2 multiplying power conversion is carried out, only the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8 and the ninth switch S9 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 3:2 rate conversion from input power to output voltage is achieved.
Example 2
The embodiment 2 discloses an operation chip based on a multi-mode buck converter, which is formed by packaging the operation circuit based on the multi-mode buck converter. The packaging is in a chip mode, so that the popularization and the application of the operation circuit are easier.
The operation chip is provided with eleven pins, and particularly, a pin number one is connected with a first switch S1. The second pin is connected with a second switch S2. And the third pin is connected with a third switch S3. And the fourth pin is connected with a fourth switch S4. The fifth pin is connected with a fifth switch S5. The sixth pin is connected with a sixth switch S6. The seventh pin is connected with a seventh switch S7. The eighth pin is connected with an eighth switch S8. The ninth pin is connected to a ninth switch S9. The tenth pin is used for connecting the input positive terminal. The eleven pin is used for connecting with the output positive terminal. The twelve pins are used for connecting to ground GND.
If the switch is a MOS transistor as described in embodiment 1, pins one to nine are correspondingly connected to the gate of the MOS transistor.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. A multi-mode buck converter, comprising:
a first switch S1, a first connection end of which is connected to an input positive end of the multi-mode buck converter;
the first connecting end of the second switch S2 is connected with the second connecting end of the first switch S1, and the second connecting end of the second switch S2 is connected with the positive output end of the multi-mode buck converter;
the second connecting end of the third switch S3 is connected with the positive output end of the multi-mode buck converter;
the first connecting end of the fourth switch S4 is connected with the ground GND, and the second connecting end of the fourth switch S4 is connected with the first connecting end of the third switch S3;
a fifth switch S5, a first connection terminal of which is connected to an input positive terminal of the multi-mode buck converter;
a first connecting end of the sixth switch S6 is connected with a second connecting end of the fifth switch S5, and the second connecting end of the sixth switch S6 is connected with an output positive end of the multi-mode buck converter;
a second connection end of the seventh switch S7 is connected with an output positive end of the multimode buck converter;
an eighth switch S8, a first connection end of which is connected to the ground GND, and a second connection end of which is connected to the first connection end of the seventh switch S7;
a first connecting end of the ninth switch S9 is connected to a second connecting end of the fourth switch S4, and a second connecting end of the ninth switch S5 is connected to a second connecting end of the fifth switch S5;
the first connecting end of the first capacitor C1 is connected with the second connecting end of the first switch S1, and the second connecting end of the first capacitor C1 is connected with the second connecting end of the fourth switch S4;
the first connecting end of the second capacitor C2 is connected with the second connecting end of the fifth switch S5, and the second connecting end of the second capacitor C2 is connected with the second connecting end of the eighth switch S8; and
the first connecting end of the output capacitor Co is connected with the output positive end of the multi-mode buck converter, and the second connecting end of the output capacitor Co is connected with the ground GND;
an input power source VIN is connected between an input positive electrode terminal of the multi-mode buck converter and the ground GND, and an output voltage VOUT is connected between an output positive electrode terminal and the ground GND; the multi-mode buck converter performs multi-mode buck conversion by turning on or off 9 switches.
2. The multi-mode buck converter according to claim 1, wherein the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are each connected with an enable signal for controlling the switch to be turned on or off.
3. The multi-mode buck converter according to claim 2, wherein the enable signal is a clock square wave signal having a duty cycle of 50% provided by an external clock circuit.
4. The multi-mode buck converter according to claim 1, wherein the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are MOSFET transistors.
5. The multi-mode buck converter according to claim 1, wherein only the first switch S1, the seventh switch S7, and the ninth switch S9 are on during the 3:1 rate conversion; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 3:1 multiplying power conversion from input power supply to output voltage is realized.
6. The multi-mode buck converter according to claim 1, wherein only the first switch S1, the third switch S3, the fifth switch S5, and the seventh switch S7 are turned on during the 2:1 rate conversion; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 2:1 multiplying power conversion from input power supply to output voltage is realized.
7. The multi-mode buck converter according to claim 1, wherein only the first switch S1, the third switch S3, the fifth switch S5, and the seventh switch S7 are turned on during the 3:2 rate conversion; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8 and the ninth switch S9 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 3:2 rate conversion from input power to output voltage is achieved.
8. A method of step-down conversion of a voltage for achieving a 3:1, 2:1, 3:2 rate conversion of an input voltage to an output voltage, characterized in that it is applied in a multi-mode step-down converter according to any of claims 1-7;
when the 3:1 multiplying power conversion is carried out, only the first switch S1, the seventh switch S7 and the ninth switch S9 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; 3:1 multiplying power conversion from an input power supply to an output voltage is realized in a steady state;
when 2:1 multiplying power conversion is carried out, only the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6 and the eighth switch S8 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; 2:1 multiplying power conversion from an input power supply to an output voltage is realized in a steady state;
when the 3:2 voltage multiplying power conversion is carried out, only the first switch S1, the third switch S3, the fifth switch S5 and the seventh switch S7 are conducted in the first stage; in the second stage, only the second switch S2, the fourth switch S4, the sixth switch S6, the eighth switch S8 and the ninth switch S9 are turned on; in the two stages, for the switch with changed state, the off and on time is 50% respectively; at steady state, 3:2 rate conversion from input power to output voltage is achieved.
9. A conversion module, characterized in that it is packaged with a circuit of a multi-mode buck converter according to any of claims 1-8.
10. The conversion module of claim 9, wherein the pins of the conversion module comprise:
a pin number I connected with the first switch S1;
the second pin is connected with a second switch S2;
the third pin is connected with a third switch S3;
a fourth pin connected with the fourth switch S4;
a fifth pin connected with the fifth switch S5;
a sixth pin connected with a sixth switch S6;
a seventh pin connected with a seventh switch S7;
the eighth pin is connected with an eighth switch S8;
a pin nine, which is connected to the ninth switch S9;
a tenth pin for connecting the input positive terminal;
an eleventh pin for connecting the output positive terminal; and
twelve pins for connection to ground GND.
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CN202310124529.3A CN116247935A (en) | 2023-02-16 | 2023-02-16 | Multimode buck converter, conversion method and conversion module thereof |
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CN202310124529.3A CN116247935A (en) | 2023-02-16 | 2023-02-16 | Multimode buck converter, conversion method and conversion module thereof |
Publications (1)
Publication Number | Publication Date |
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CN116247935A true CN116247935A (en) | 2023-06-09 |
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CN202310124529.3A Pending CN116247935A (en) | 2023-02-16 | 2023-02-16 | Multimode buck converter, conversion method and conversion module thereof |
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