CN116243954A - Firmware upgrading method, device, chip, storage medium and wireless earphone - Google Patents

Firmware upgrading method, device, chip, storage medium and wireless earphone Download PDF

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Publication number
CN116243954A
CN116243954A CN202310021891.8A CN202310021891A CN116243954A CN 116243954 A CN116243954 A CN 116243954A CN 202310021891 A CN202310021891 A CN 202310021891A CN 116243954 A CN116243954 A CN 116243954A
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processor
firmware
random access
upgrade
access memory
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李远江
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Zeku Technology Shanghai Corp Ltd
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Zeku Technology Shanghai Corp Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • G06F8/654Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

The embodiment of the invention discloses a firmware upgrading method, a device, a chip, a storage medium and a wireless earphone. The firmware upgrade method is applied to a wireless earphone comprising a first processor and a second processor, and comprises the following steps: receiving a new firmware code and writing the new firmware code into a second random access memory corresponding to the second processor; and under the condition that the working state of the wireless earphone meets the firmware upgrading condition, writing the new firmware code stored in the second random access memory into an upgrading target area to upgrade the firmware. The scheme of the disclosure fully utilizes the available storage space of the random access memory corresponding to the second processor, and realizes reliable upgrading of the firmware under the condition that the standby storage space of the non-easy memory for storing the firmware by the processor is not expanded.

Description

Firmware upgrading method, device, chip, storage medium and wireless earphone
Technical Field
The present disclosure relates to, but is not limited to, the field of intelligent electronic devices, and in particular, to a firmware upgrade method, apparatus, chip, storage medium, and wireless headset.
Background
The wireless earphone becomes the best gear of various voice devices by virtue of excellent use experience, pursues better functional experience, and has scientific and proper volume, shape and weight, and is a technical direction continuously explored in the field of wireless earphones.
From the optimal use experience consideration, the wireless earphone has more severe requirements on volume, shape and weight, and further has more severe requirements on hardware volume and hardware configuration. Meanwhile, along with the improvement of the functional complexity of the earphone, the performance of the processor is required to be higher and higher, and the wireless earphone with the multiprocessor becomes a mainstream hardware scheme. How to balance the contradiction between the hardware configuration and the processing performance of the wireless earphone becomes a factor to be considered in the realization of each service function of the wireless earphone.
Similar to other various hardware devices, the wireless earphone needs to have OTA (Over The Air) upgrading capability, and how to reliably implement firmware upgrading under the condition of limited hardware configuration is a direction of exploring improvement in the field.
Disclosure of Invention
The embodiment of the disclosure provides a firmware upgrading method, a device, a chip, a storage medium and a wireless earphone, which are applied to a wireless earphone comprising a first processor and a second processor, and the method, the device, the chip, the storage medium and the wireless earphone make full use of the available storage space of a random access memory corresponding to the second processor, and realize reliable firmware upgrading under the condition that the standby storage space of a non-volatile memory of the firmware stored by the processor is not expanded.
The embodiment of the disclosure provides a firmware upgrading method applied to a wireless earphone comprising a first processor and a second processor, comprising the following steps:
receiving a new firmware code and writing the new firmware code into a second random access memory corresponding to the second processor;
writing the new firmware code stored in the second random access memory into an upgrading target area for firmware upgrading under the condition that the working state of the wireless earphone meets the firmware upgrading condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
The embodiment of the disclosure also provides a wireless earphone, which comprises:
the system comprises a first processor, a second processor, a main control unit, a first nonvolatile memory corresponding to the first processor and a second random access memory corresponding to the second processor;
the main control unit is configured to receive a new firmware code and write the new firmware code into the second random access memory;
the main control unit is further configured to write the new firmware code stored in the second random access memory into an upgrade target area for firmware upgrade when the working state of the wireless headset meets a firmware upgrade condition;
the upgrade target area includes: the first nonvolatile memory;
the idle duration of the second processor is longer than the idle duration of the first processor.
The embodiment of the disclosure also provides a firmware upgrading device applied to a wireless earphone comprising a first processor and a second processor, comprising:
the receiving module is used for receiving the new firmware codes and writing the new firmware codes into a second random access memory corresponding to the second processor;
the upgrading module is used for writing the new firmware code stored in the second random access memory into an upgrading target area to upgrade the firmware under the condition that the working state of the wireless earphone meets the firmware upgrading condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
The disclosed embodiments also provide a chip comprising a processor configured to:
a firmware upgrade method as described in any of the embodiments of the present disclosure is performed.
The embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a firmware upgrade method according to any of the embodiments of the present disclosure.
According to the firmware upgrading scheme for the wireless earphone, the storage space of the nonvolatile memory does not need to be expanded for the new firmware codes, the dual-backup upgrading scheme is realized by utilizing the random access memory corresponding to the temporarily-idle second processor, and the new firmware codes can be automatically downloaded and cached and the target firmware can be upgraded by selecting proper time under the condition that the basic function of the first processor on the wireless earphone is not influenced, so that the firmware upgrading scheme with minimized influence on the use of a user is realized, and the reliability and the user experience of the firmware upgrading of the wireless earphone are improved.
Other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart of a firmware upgrade method according to an embodiment of the present invention;
FIG. 2 is a flowchart of another firmware upgrade method according to an embodiment of the present invention;
FIG. 3 is a flowchart of another firmware upgrade method according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a TWS earphone structure according to an embodiment of the present invention;
FIG. 5 is a flowchart of another firmware upgrade method according to an embodiment of the present invention;
fig. 6 is a frame diagram of a wireless earphone structure according to an embodiment of the present invention;
fig. 7 is a block diagram of a firmware upgrading apparatus according to an embodiment of the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that the description as it relates to "first", "second", etc. in the present invention is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implying an indication of the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In addition, the technical solutions of the embodiments of the present invention may be combined with each other, but it is necessary to be based on the fact that those skilled in the art can implement the technical solutions, and when the technical solutions are contradictory or cannot be implemented, the combination of the technical solutions should be considered as not existing, and not falling within the scope of protection claimed by the present invention.
Before the embodiments are described in detail, abbreviations for the relevant terms referred to in this disclosure are as follows:
abbreviations (abbreviations) Chinese interpretation English interpretation
OTA Over-the-air technology Over The Air
DRAM Dynamic random access memory Dynamic Random Access Memory
SRAM Static random access memory Static Random Access Memory
NPU Neural network processor Neural Network Processing Unit
DSP Digital signal processor Digital Signal Processor
TWS True radio stereophonic sound True Wireless Stereo
MCU Micro control unit Microcontroller Unit
DRV Data retention voltage Data Retention Voltage
AP Application processor Application Processor
According to the use requirement of the wireless earphone, the wireless earphone is required to have OTA firmware upgrading capability, in some realizable schemes, double backup upgrading is adopted, files to be upgraded are reserved in a storage area to form two partitions, one partition is used as a working area, the other partition is used as an upgrading area, new firmware is stored in the upgrading area when the OTA is upgraded, and when the system is restarted and the upgrading is detected, the new firmware in the upgrading area is exchanged into the working area, so that OTA user perception time is reduced, and OTA functions and user experience are balanced.
In some implementations, differential upgrade is adopted, that is, the earphone side uses firmware to compare with new firmware to generate differential packets, and then the differential packets are sent to the earphone side, and the earphone side uses a differential algorithm to generate new firmware. The size of the OTA transmission content can be reduced and the time for the user to perceive the OTA is reduced.
In some implementations, a direct upgrade method is adopted, that is, a double backup is not adopted, a specific upgrade program is adopted for upgrade, when OTA is needed, the earphone interrupts all services to enter an OTA mode, the upgrade program directly writes firmware into a working area, and if the upgrade process fails, the OTA mode is continued until the upgrade is successful.
It can be seen that the upgrading of the dual backup scheme requires larger capacity of the FLASH storage area, and has larger influence on the volume, weight and cost of the wireless earphone; the differential upgrading algorithm is complex, the operand is obviously increased, but the transmission time is only reduced, and bricks are easy to change if power failure occurs in the differential recovery process, namely the upgrading failure causes incapability of use; the direct upgrade method has to interrupt the service and has a long service interruption time, which is not friendly to the user's use experience.
Research shows that with the improvement of the functions of the wireless earphone, in order to meet the operation performance requirement of more complex function algorithms, more and more wireless earphone is provided with a plurality of processors, random access memories and FLASH matched with the processors, and different service functions are respectively realized according to the characteristics of different processors. For example, a wireless headset includes two processors: the DSP is matched with the DSP SRAM and the DSP FLASH, the DSP controls the basic service functions, such as basic radio and sound playing, and the NPU is matched with the NPU SRAM and the NPU FLASH, and the NPU controls the NPU to realize the service enhancement functions, such as space audio, gold listening feeling, voiceprint recognition, intelligent noise reduction, and the like.
Analysis shows that because the complexity of the algorithms for enhancing the service functions realized by the NPU control is high, in order to meet the operation requirement of the algorithms, NPU SRAM with larger storage space is generally configured, and the service has lower use frequency compared with the basic service. Therefore, when it does not run the relevant functions, the memory space of its SRAM can be used to cache new firmware code without expanding more FLASH space for the memory space required to upgrade the new firmware for this portion.
An embodiment of the present disclosure provides a firmware upgrade method applied to a wireless headset including a first processor and a second processor, as shown in fig. 1, including:
step 110, receiving a new firmware code and writing the new firmware code into a second random access memory corresponding to the second processor;
step 130, writing the new firmware code stored in the second random access memory into an upgrade target area for firmware upgrade when the working state of the wireless earphone meets the firmware upgrade condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
In some exemplary embodiments, the first processor is a processor in the wireless headset that performs functions in a first set of functions;
the second processor is a processor in the wireless headset that performs functions in a second set of functions.
In some exemplary embodiments, the second set of functions includes a different function than the first set of functions.
In some exemplary embodiments, the first set of functions includes at least one of the following functions: playback and reception. Playback and radio are basic functions of the earphone, and therefore, the first function set is also called a basic function set.
In some exemplary embodiments, the second set of functions includes at least one of the following functions: spatial audio, golden auditory sensation, voiceprint recognition and intelligent noise reduction; these functions belong to an enhanced functionality beyond the basic functions of the headset, and therefore the second set of functions is also referred to as an enhanced set of functions.
In some exemplary embodiments, the first processor is a DSP and the second processor is an NPU. It can be seen that the enhanced functionality set includes many functions related to artificial intelligence algorithms, machine learning, or neural networks, etc.; therefore, the NPU is adopted as a second processor on the hardware configuration of the wireless earphone, and the DSP provides the basic earphone function and the more cool intelligent enhancement function for the user.
It can be understood that the idle time of the second processor is longer than that of the first processor, and the second random access memory corresponding to the second processor is selected to download and cache the new firmware code, so that the influence on the normal operation of the first processor with busy operation can be avoided. Meanwhile, as the idle time of the second processor is longer, the possibility that the new firmware code cached in the corresponding second random access memory is covered is smaller before the upgrading of the upgrading target area is completed, the repeated downloading times can be effectively reduced, and the efficiency and timeliness of the firmware upgrading scheme are integrally improved.
In some exemplary embodiments, the new firmware code is received wirelessly in step 110. Optionally, the new firmware code is received by connecting an external device in a wired manner.
In some exemplary embodiments, as shown in fig. 2, further comprising:
step 100, judging whether the working state of the second processor meets the condition of writing new firmware codes, if yes, executing step 110, and if not, exiting.
In some exemplary embodiments, the operating state of the second processor includes: idle and non-idle. When any function in the second function set is executing, the working state of the second processor is non-idle; when no function is executing or the second processor is not started to run, the working state of the second processor is idle.
In some exemplary embodiments, determining that a condition for writing new firmware code is satisfied when an operating state of the second processor is an idle state; and when the working state of the second processor is a non-idle state, determining that the condition of writing the new firmware code is not met. It will be appreciated that since the second processor is in a non-idle state, at least one function in the second set of functions is being executed, and the corresponding ram is used accordingly, and at this time, if it is determined that the condition for writing the new firmware code is not satisfied, step 110 is not executed, and the ram corresponding to the second processor is not utilized as the new firmware cache in the OTA firmware upgrade scheme, so as to avoid affecting the function being executed on the second processor.
In some exemplary embodiments, as shown in fig. 3, the method further comprises:
step 120, after the new firmware code is written into the second random access memory, the second random access memory enters a low power consumption data holding state.
It can be understood that the second random access memory enters the low power consumption data holding state, and can hold the written data in the low power consumption mode, and when the firmware upgrading condition is met, the written data is rewritten in the upgrading target area. In some exemplary embodiments, the low power consumption data retention state is achieved by reducing the operating voltage, also referred to as a low voltage data retention state.
In some exemplary embodiments, the second random access memory is an SRAM, and entering a low voltage state to hold written data is the SRAM entering a refresh mode. This mode enables the memory cell to hold data at the SRAM supply voltage by lowering the voltage, referred to as the data retention voltage (Data Retention Voltage, DRV).
In some exemplary embodiments, the method further comprises:
and in the process of receiving the new firmware code, stopping receiving the new firmware code when the working state of the second processor is converted into the condition of not meeting the condition of writing the new firmware code.
In some exemplary embodiments, the method further comprises: and stopping receiving the new firmware code when the working state of the second processor is converted into the condition that the writing of the new firmware code is not met in the process of receiving the new firmware code, and loading the original firmware code in the second nonvolatile memory into the second random access memory.
In some exemplary embodiments, the method further comprises:
and after stopping receiving the new firmware code, loading the original firmware code from the second nonvolatile memory into the second random access memory.
It will be appreciated that in some exemplary embodiments, during receipt of the new firmware code, if the second processor is started up or any of the second set of functions is started up, the operating state of the second processor is transitioned to a non-idle state, and the condition for writing the new firmware code is not satisfied, at which point receipt of the new firmware code is stopped. It can be seen that in this case, the reception of the new firmware code will be stopped, the normal operation of the second processor is resumed, and the normal use of the second processor by the subsequent reception and upgrading of the new firmware is avoided.
In some exemplary embodiments, the operating state of the wireless headset includes one or more of the following sub-states:
the business function runs sub-states and electric quantity.
Wherein, the business function operation sub-state includes: stop running and running. When any service function included in the wireless earphone is running, the running sub-state of the service function is running.
The charge indicates a current charge percentage.
In some exemplary embodiments, the wireless earphone is a TWS earphone, and in the case that the TWS earphone is in a box, the service function is ended or suspended, and at this time, the service function operation sub-state is stop operation. Therefore, whether the service operation sub-state is the stop operation can be judged according to the in-box state of the TWS earphone.
Optionally, the service running sub-state of the wireless earphone can be determined according to other schemes. For example, the judgment is not limited to a specific method, and is determined based on the state of the service function control switch.
In some exemplary embodiments, the firmware upgrade condition is determined to be satisfied when the business function operation sub-state is a stop operation state and the power is greater than a set power proportion threshold.
For example, if the set power ratio threshold is 80%, after the TWS earphone is put into the box, the current power is greater than 80%, or when the power reaches more than 80% after charging, the firmware upgrade condition is satisfied, and then step 130 is executed to write the new firmware code stored in the second random access memory into the upgrade target area, so as to upgrade the firmware.
Optionally, the working state of the wireless earphone may further include other sub-states, which are determined correspondingly according to the functional features of various wireless earphone and the selected relevant constraint that can be updated with firmware, and are not limited in aspects of examples of the disclosure; and correspondingly determining that the condition for firmware upgrade is met. For example, the present time and/or the present motion state may be included, and firmware upgrades may be allowed during the night, in a stationary state, and with sufficient power.
In some exemplary embodiments, in the case where the operating state does not satisfy the firmware upgrade condition, the firmware upgrade is not performed. And after the firmware upgrading conditions are met, upgrading is carried out. Therefore, the upgrading process can be ensured to be carried out when the wireless earphone state is stable, so that the upgrading success rate is improved.
In some exemplary embodiments, the method further comprises:
and setting the second processor to a forbidden state in the process of writing the new firmware code stored in the second random access memory into an upgrading target area to upgrade the firmware until the firmware is upgraded.
It will be appreciated that each function in the second set of functions will not be able to initiate execution when the second processor is set to the disabled state.
In some exemplary embodiments, the method further comprises:
and after the new firmware code is written into the upgrading target area to complete firmware upgrading, the second processor is restored to be in a usable state.
After the second processor is restored to the available state, the second processor can normally start or execute any one of the second set of functions. It can be appreciated that, because the second random access memory has completed receiving the new firmware code and has started to upgrade the firmware in the upgrade target area, considering that the second function set executed by the second processor is an enhanced function and is not a basic function of the earphone, in view of comprehensive performance, some embodiments may preferably ensure that after the firmware upgrade is completed, the second processor is permitted to resume normal operation.
In some exemplary embodiments, the method further comprises:
and when the new firmware code stored in the second random access memory is not written into an upgrade target area, starting the second processor or executing any one of the second function set, loading the firmware code required by operation into the second random access memory.
It can be seen that the new firmware code that has been downloaded into the second random access memory cannot be written into the upgrade target area when the firmware upgrade condition is not satisfied, and at this time, if the second processor is started or starts executing any one of the second set of functions, the second processor loads the firmware code corresponding to it in the second nonvolatile memory into the second random access memory to execute according to the operation requirement. At this time, the new firmware code downloaded in the second random access memory will be covered, and after waiting for the next re-download, the firmware upgrade is performed.
In some exemplary embodiments, writing the new firmware code into the upgrade target area for firmware upgrade includes:
writing new firmware code into the upgrade target area and restarting the wireless headset.
It can be seen that after the firmware upgrade is completed, the firmware in the first nonvolatile memory or the second nonvolatile memory is updated to be a new firmware code, and accordingly, when the first processor or the second processor executes the corresponding function, the new firmware code is loaded to run.
In some exemplary embodiments, the writing into the second random access memory corresponding to the second processor includes:
writing into the second random access memory in the order of writing addresses from low to high.
In some exemplary embodiments, the writing into the second random access memory corresponding to the second processor includes:
writing into the second random access memory in the order of the writing addresses from high to low.
In some exemplary embodiments, the method further comprises:
recording the address of the new firmware code which is finally written into the second random access memory.
In some exemplary embodiments, the method further comprises:
and acquiring the downloaded data information of the new firmware code.
In some exemplary embodiments, the receiving the new firmware code and writing the new firmware code into the second random access memory corresponding to the second processor includes:
continuing to receive the residual data of the new firmware code according to the downloaded data information;
and continuing to write the residual data according to the address of the second random access memory which is finally written into by the new firmware code.
Thereby enabling breakpoint resume of new firmware code.
In some exemplary embodiments, when the second processor is started to execute the function in the second function set, loading firmware code corresponding to the function into the second random access memory, including:
and loading the firmware codes corresponding to the functions into the second random access memory according to the order of addresses from low to high.
The embodiment of the disclosure also provides a firmware upgrading method, wherein the set electric quantity proportion threshold value is 30%, and the wireless earphone is a TWS earphone, as shown in fig. 4, and comprises a first processor DSP, a first nonvolatile memory FLASH, a first random access memory SRAM, a second processor FLASH, a first random access memory SRAM and a second processor FLASH; the second processor NPU, the second nonvolatile memory FLASH, the second random access memory SRAM, the second nonvolatile memory FLASH and the second random access memory SRAM are respectively referred to as NPU SRAM; further comprises: the main control unit MCU upgrades the target area into the DSP FLASH; the firmware upgrade method, as shown in fig. 5, includes:
step 510, receiving an OTA firmware upgrade request of an external device;
step 520, judging whether the NPU meets the condition of writing in the new firmware code, if yes, executing step 530, if not, exiting, and waiting for the next OTA firmware upgrade request;
step 530, receiving a new firmware code from the external device, writing into the NPU SRAM;
step 540, judging whether the NPU operation is started, if not, executing step 550, otherwise, executing step 5200;
step 550, writing new firmware code into the NPU SRAM;
step 560, NPU SRAM enters the redundancy mode;
step 570, judging whether the earphone is in the box, if so, executing step 580, otherwise, executing 5300;
step 580, judging whether the current electric quantity is larger than 30%, if so, executing step 590, otherwise, executing step 5400;
step 590, starting to write the new firmware code in the NPU SRAM into the DSP FLASH;
step 5100, the npu is set to disabled;
step 5110, after writing into the DSP FLASH, the NPU is restored to be available;
step 5200, NPU starts running to load firmware from NPU FLASH to cover NPU SRAM;
step 5210, waiting for next OTA firmware upgrade request;
step 5300, judging whether to start the NPU operation, if not, executing step 5210, otherwise, executing step 5200;
step 5400, charging until the electric quantity is more than 30%.
In step 520, when the NPU has started running in the non-idle state, it is determined that the condition for writing the new firmware code is not satisfied, and if the NPU has not started running, the condition for writing the new firmware code is satisfied.
Wherein, TWS earphone still includes: the main control unit is configured to execute the steps 510-5400.
In some exemplary embodiments, the master control unit is an MCU.
In some exemplary embodiments, the master unit is the DSP.
It can be understood that in the embodiment of the present disclosure, the service function operation sub-state is determined according to whether the TWS is in the box, and if the TWS is in the box, the sub-state is in the stop operation state, and if the TWS is not in the box, the TWS is in the running state. And under the condition that the service function operation sub-state is a stop operation state and the electric quantity is larger than a set electric quantity proportion threshold value, determining that the firmware upgrading condition is met, and executing a step 590 to upgrade the firmware on the DSP.
In some exemplary embodiments, the external device is a remote server, a smart terminal, a personal computer, or the like, and is not limited in particular aspects.
In some exemplary embodiments, if the upgrade target area is NPU FLASH, the DSP FLASH in the steps 590 and 5110 may be replaced by NPU FLASH, so that firmware upgrade of each function in the second function set executed by the NPU may be implemented.
The embodiment of the present disclosure further provides a wireless earphone, as shown in fig. 6, including:
a first processor 6100, a second processor 6200, a main control unit 6300, and a first nonvolatile memory 6110 corresponding to the first processor, a second random access memory 6220 corresponding to the second processor;
wherein the master control unit 6300 is configured to receive a new firmware code and write it into the second random access memory 6220;
the main control unit 6300 is further configured to write the new firmware code stored in the second random access memory 6220 into an upgrade target area to perform firmware upgrade when the working state of the wireless headset meets a firmware upgrade condition;
wherein the upgrade target area includes: the first nonvolatile memory 6110;
the idle duration of the second processor is longer than the idle duration of the first processor.
In some example embodiments, the wireless headset further comprises: a second non-volatile memory 6210 corresponding to the second processor.
In some example embodiments, the wireless headset further comprises: a first random access memory 6120 corresponding to the first processor.
In some exemplary embodiments, the upgrade target area includes: the second non-volatile memory 6210.
In some exemplary embodiments, the upgrade target area includes: the first nonvolatile memory 6110 or the second nonvolatile memory 6210.
It can be appreciated that the wireless earphone can utilize the second random access memory as a receiving buffer of the new firmware code, so as to upgrade the firmware code in the first nonvolatile memory or the second nonvolatile memory.
In some exemplary embodiments, the first processor is a processor in the wireless headset that performs functions in a first set of functions;
the second processor is a processor in the wireless earphone which executes each function in a second function set;
wherein the first set of functions includes at least one of the following functions: playback and radio reception;
the second set of functions includes at least one of the following functions: spatial audio, golden auditory sensation, voiceprint recognition and intelligent noise reduction.
In some exemplary embodiments, the main control unit includes: the micro control unit MCU or the application processor AP or DSP.
In some example embodiments, the first processor includes: the micro control unit MCU or the signal digital processor DSP.
In some exemplary embodiments, the master control unit is integrated with the first processor.
In some example embodiments, the second processor includes: the neural network processor NPU.
In some example embodiments, the first nonvolatile memory includes: FLASH memory FLASH.
In some example embodiments, the second nonvolatile memory includes: FLASH memory FLASH.
In some exemplary embodiments, the first random access memory includes: static random access memory SRAM or dynamic random access memory DRAM.
In some exemplary embodiments, the second random access memory includes: static random access memory SRAM or dynamic random access memory DRAM.
In some exemplary embodiments, the memory space of the second random access memory is greater than a set memory space threshold. The storage space threshold is the maximum occupied storage space of a new firmware code corresponding to the firmware code stored in the first nonvolatile memory; or the storage space threshold is the maximum occupied storage space of the new firmware code corresponding to the firmware code stored in the second nonvolatile memory.
In some exemplary embodiments, the memory space threshold is Max (the occupied memory space of the new firmware code corresponding to the firmware code stored in the first nonvolatile memory, and the occupied memory space of the new firmware code corresponding to the firmware code stored in the second nonvolatile memory). That is, the set memory space threshold is the maximum value in the maximum occupied memory space of the new firmware code corresponding to the firmware code stored in the first and second nonvolatile memories.
It will be appreciated that the second random access memory corresponding to the second processor has a memory space required to meet the memory space requirements for downloading the new firmware code. For example, the second processor is an NPU, the functions in the second functional set are enhancement functions, and because of the higher algorithm complexity of the enhancement functions, in order to smoothly load the related algorithm of the enhancement functions and ensure the algorithm execution efficiency, the NPU needs to correspondingly configure a second random access memory with a larger storage space. This NPU and configured random access memory that meets the new firmware code download space requirements are identified as the second processor and second random access memory.
It should be noted that the second processor is not limited to the NPU, but may be another processor. And the processors which are responsible for executing the non-basic functions and have more idle time and the storage space of the random access memory correspondingly configured meets the storage space requirement of the new firmware codes can be selected as the second processor. It can be understood that, because the second processor is responsible for executing the enhanced function, also called a non-basic function, and is not the basic service function of the wireless earphone, the second random access memory is utilized to buffer the new firmware codes, which will not adversely affect the normal operation of the basic service function of the wireless earphone, so that the user can automatically download and upgrade the firmware without sense of feel, and the user experience of the firmware upgrade of the wireless earphone is further improved.
In some example embodiments, the wireless headset includes: a truly wireless stereo TWS headset.
Alternatively, the main control unit may also use other types of processors, and is not limited in particular aspects. Other types of special purpose processors may also be used for the first processor, and are not limited in this respect. The second processor may also be selected from other types of special purpose processors, and is not limited in particular aspects.
It can be seen that, according to the wireless earphone firmware upgrading scheme provided by the embodiment of the present disclosure, for a target firmware to be upgraded, a FLASH space is not required to be extended for caching new firmware codes, a temporary unused random access memory in a multiprocessor system is fully utilized to cache the new firmware codes, and then a proper time is selected to complete the upgrade of the original firmware codes in an upgrade target area; the use of basic functions in the first function set of the wireless earphone is not required to be actively interrupted, the proper time is automatically selected to finish the firmware upgrading, and the user experience of the firmware upgrading is obviously improved.
The embodiment of the disclosure also provides a firmware upgrade apparatus applied to a wireless earphone including a first processor and a second processor, as shown in fig. 7, including:
a receiving module 710 configured to receive a new firmware code and write the new firmware code into a second random access memory corresponding to the second processor;
an upgrade module 720, configured to write the new firmware code stored in the second random access memory into an upgrade target area to perform firmware upgrade if the working state of the wireless headset is determined to meet a firmware upgrade condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
The disclosed embodiments also provide a chip comprising a processor configured to:
a firmware upgrade method as described in any of the embodiments of the present disclosure is performed.
In some example embodiments, the processor performing the firmware upgrade method is a third processor that is different from the first processor and also different from the second processor.
In some exemplary embodiments, the third processor is an application processor AP or MCU.
In some example embodiments, the processor performing the firmware upgrade method is a first processor.
In some exemplary embodiments, the first processor comprises an MCU or DSP.
The embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a firmware upgrade method according to any of the embodiments of the present disclosure.
According to the firmware upgrading scheme for the wireless earphone, which is provided by the embodiment of the disclosure, the random access memory corresponding to the temporarily-idle second processor is utilized, the storage space of the nonvolatile memory is not required to be expanded, the dual-backup upgrading scheme is realized, and the reliability of firmware upgrading is ensured. The method and the device can automatically download the new firmware codes and select proper time to finish the upgrading of the target firmware under the condition that the basic function of the first processor on the wireless earphone is not influenced, realize a firmware upgrading scheme with minimized influence on the use of the user, and improve the reliability and the user experience of the firmware upgrading of the wireless earphone.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structural changes made by the specification and drawings of the present invention or direct/indirect application in other related technical fields are included in the scope of the present invention.

Claims (11)

1. A firmware upgrade method applied to a wireless headset comprising a first processor and a second processor, comprising:
receiving a new firmware code and writing the new firmware code into a second random access memory corresponding to the second processor;
writing the new firmware code stored in the second random access memory into an upgrading target area for firmware upgrading under the condition that the working state of the wireless earphone meets the firmware upgrading condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
2. The firmware upgrade method of claim 1, wherein,
the first processor is a processor in the wireless earphone which executes each function in a first function set;
the second processor is a processor in the wireless earphone for executing functions in a second function set, wherein the second function set comprises functions different from the functions of the first function set;
wherein the first set of functions includes at least one of the following functions: talking and audio playing;
the second set of functions includes at least one of the following functions: spatial audio, golden auditory sensation, voiceprint recognition and intelligent noise reduction.
3. A firmware upgrade method as defined in claim 1 or 2, wherein,
the method further comprises the steps of:
judging whether the working state of the second processor meets the condition of writing a new firmware code, and receiving the new firmware code under the condition of meeting the condition;
or alternatively, the process may be performed,
in the process of receiving the new firmware code, stopping receiving the new firmware code when the working state of the second processor is converted to a condition that the writing of the new firmware code is not met, and loading the original firmware code in the second nonvolatile memory into the second random access memory;
or alternatively, the process may be performed,
after the new firmware code is written into the second random access memory, the second random access memory enters a low-power-consumption data holding state;
or alternatively, the process may be performed,
and setting the second processor to a forbidden state in the process of writing the new firmware code stored in the second random access memory into an upgrading target area to upgrade the firmware until the firmware is upgraded.
4. A firmware upgrade method as defined in claim 1 or 2, wherein,
the working state of the wireless earphone comprises one or more of the following sub-states:
the business function runs sub-states and electric quantity.
5. The firmware upgrade method of claim 4, wherein,
and determining that the firmware upgrading condition is met under the condition that the service function operation sub-state is a stop operation state and the electric quantity is larger than a set electric quantity proportion threshold value.
6. A wireless headset, comprising:
the system comprises a first processor, a second processor, a main control unit, a first nonvolatile memory corresponding to the first processor and a second random access memory corresponding to the second processor;
the main control unit is configured to receive a new firmware code and write the new firmware code into the second random access memory;
the main control unit is further configured to write the new firmware code stored in the second random access memory into an upgrade target area for firmware upgrade when the working state of the wireless headset meets a firmware upgrade condition;
the upgrade target area includes: the first nonvolatile memory;
the idle duration of the second processor is longer than the idle duration of the first processor.
7. The wireless headset of claim 6,
further comprises: a second non-volatile memory corresponding to the second processor;
the upgrade target area includes: the second non-volatile memory.
8. The wireless headset of claim 6,
the first processor includes: the micro control unit MCU or the signal digital processor DSP;
the second processor includes: the neural network processor NPU.
9. A firmware upgrade apparatus for a wireless headset comprising a first processor and a second processor, comprising:
the receiving module is used for receiving the new firmware codes and writing the new firmware codes into a second random access memory corresponding to the second processor;
the upgrading module is used for writing the new firmware code stored in the second random access memory into an upgrading target area to upgrade the firmware under the condition that the working state of the wireless earphone meets the firmware upgrading condition;
wherein the upgrade target area includes: a first nonvolatile memory corresponding to the first processor or a second nonvolatile memory corresponding to the second processor;
the idle duration of the second processor is longer than the idle duration of the first processor.
10. A chip comprising a processor configured to:
a firmware upgrade method as claimed in any one of claims 1 to 5.
11. A computer readable storage medium having stored thereon a computer program, which when executed by a processor implements a firmware upgrade method as claimed in any one of claims 1-5.
CN202310021891.8A 2023-01-06 2023-01-06 Firmware upgrading method, device, chip, storage medium and wireless earphone Pending CN116243954A (en)

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