CN116233653A - Method for searching and counting GPON GEM frame - Google Patents

Abstract

A search method is suitable for Gigabit Passive Optical Network (GPON). The searching method comprises the following steps: disassembling a GPON encapsulation mode Port identifier (GEM Port ID) of a GEM frame into a first part GEM Port ID and a second part GEM Port ID; performing row searching in a first memory array by using the first part GEM Port ID, and performing column searching in the first memory array by using the second part GEM Port ID; and judging a specific bit position of the first memory array according to the results of the row searching and the column searching in the first memory array, wherein the specific bit position represents a specific GPON encapsulation mode Port (GEM Port) used by the GEM frame.

Description

Method for searching and counting GPON GEM frame

Technical Field

The present invention relates to the technical field of passive optical networks, and more particularly, to a method for searching and counting GEM frames (GPON Encapsulation Mode Frame) in a gigabit passive optical network architecture.

Background

Passive optical networks PON (Passive Optical Network, PON), also known as passive optical networks, are a pure medium network technology that consumes no power. The technology can avoid electromagnetic interference and lightning influence of external equipment, reduce the failure rate of the circuit and the external equipment, and improve the reliability of the system. The architecture of the passive optical network implements a point-to-multipoint topology, where a single optical fiber distributes optical energy to multiple optical fibers by using a passive optical splitter, or synthesizes optical energy transmitted by multiple optical fibers into one optical fiber, thereby providing service for multiple end points.

Gigabit passive optical networks (Gigabit Passive Optical Network, GPON) are an emerging standard for providing users with higher-speed data services, typically including internet, telephone, or television broadcasting.

Fig. 1 is a system architecture diagram of GPON.

Fig. 2 is a schematic diagram of a downlink packet frame structure.

The GPON network uses optical fibers to connect an optical cable terminal device (Optical Line Terminal, OLT), an optical splitter and an optical network unit (Optical Network Unit, ONU) together, and uplink and downlink data transmission is performed by using different wavelengths. The uplink uses 1310nm wavelength, and the downlink uses 1490nm wavelength. The GPON system adopts the principle of wavelength division multiplexing to carry out data transmission on the same optical distribution network through different uplink and downlink wavelengths. In addition, the data is transmitted by broadcasting in the downlink, and the data is uploaded by multiplexing (Time Division Multiple Access, TDMA) in the uplink.

Each GPON encapsulation mode Port (GPON Encapsulation Mode Port, GEM Port) is identified by a unique GPON encapsulation mode Port identification (GEM Port ID) and globally assigned by the OLT. Each ONU needs to find its own GEM frame according to the GEM Port ID, and discard it if it is not. Furthermore, the standard g.988 promulgated by the international telecommunications union (international telecommunication union, ITU) also specifies that counting is required on a GEM frame (GEM frame) basis. The counted attributes include the number of transmissions of GEM frames, the number of receptions of GEM frames, the number of bytes of the Payload transmitted, and the number of bytes (bytes) of the Payload received (Payload).

The GEM frame header includes 12 bits (bit) for payload length indication (Payload Length Indicator, PLI), 12 bits for Port identification (Port ID), 3 bits for payload type indication (Payload Type Indicator, PTI) and 13 bits for frame header error control (Header Error Control, HEC), four parts.

Considering the situation of multi-ONU and multi-Port multiplexing in the PON network, a GEM Port ID is introduced. Therefore, GEM Port ID is particularly important to the present invention because ONUs are identified based on GEM Port ID.

With the development of the GPON technology, the existing GEM frame searching and counting method occupies a relatively large chip area.

Therefore, a new method for quickly searching and counting GPON GEM frames is needed to eliminate or alleviate the above-mentioned problems.

Disclosure of Invention

The invention aims to provide an innovative method for searching and counting GPON GEM frames, wherein SRAM is realized by two memory arrays, and the method can find the corresponding count set with a relatively smaller SRAM area.

According to the present invention, an innovative method of looking up GPON GEM frames is provided, and thus an innovative method of counting GPON GEM frames is provided.

Specifically, according to an aspect of the present invention, a search method is provided, which is suitable for a gigabit passive optical network. The searching method comprises the following steps:

disassembling the GEM Port ID of the GEM frame into a first part GEM Port ID and a second part GEM Port ID;

performing a row lookup (row look-up) in a first memory array using the first partial GEM Port ID and a column lookup (column look-up) in the first memory array using the second partial GEM Port ID; a kind of electronic device with high-pressure air-conditioning system

And judging a specific bit position of the first memory array according to the results of the row searching and the column searching in the first memory array, wherein the specific bit position represents a specific GEM Port used by the GEM frame.

Optionally, or preferably, the method further comprises: and judging whether the GEM frame belongs to the ONU or not by using the value of the specific bit position by the ONU.

Optionally, or preferably, the method further comprises: and searching the first memory array by utilizing the first part GEM Port ID to acquire a specific GPON packaging mode Port.

Optionally, or preferably, the first memory array has a plurality of memory rows each having a respective row address, and the data stored by the plurality of memory rows comprises a plurality of bits, each bit representing a GEM Port.

Optionally, or preferably, the firstThe two memory arrays are configured such that the data of the M-th memory row is in addition to the data of the 0-th memory row

Wherein M is 0 to 255, Q _N For the number of valid bits in the nth memory row of the first memory array, Σ is a summation operator, N is a summation index, and wherein the second memory array is configured to define a value in the 0 th memory row as 0.

According to another aspect of the present invention, a GPON ONU integrated circuit is provided, wherein the GPON ONU integrated circuit comprises a first memory array and a second memory array. The first memory array is formed by a first memory row and includes a plurality of memory cells (memory cells), each memory cell representing a GEM Port, the first data stored by each memory cell indicating the validity of the associated GEM Port. The second memory array is formed by a second memory row, wherein the arrangement order of the second memory row in the second memory array is the same as the arrangement order of the first memory row in the first memory array, wherein the second data stored by the second memory row is the effective GEM Port total of all memory rows arranged before the first memory row, and wherein the second data is related to a counter pointer (counter index).

Optionally, or preferably, the first memory row and the second memory row have the same row address.

Optionally, or preferably, the number of bits of the second memory line needs to be greater than or equal to the maximum number of GEM ports supported by the GPON ONU integrated circuits.

According to a further aspect of the present invention, a method for searching for a GPON ONU integrated circuit applied to the above another aspect is provided. The searching method comprises the following steps:

searching the first memory array through the GEM Port ID to be detected, and judging whether the first memory unit is effective or not;

responding to the event that the first storage unit is effective, and searching the second memory array based on the GEM Port ID to be detected so as to acquire the second data; and

the counter pointer is determined based on the second data.

Optionally, or preferably, the determining the counter pointer based on the second data includes: and judging the counter pointer based on the GEM Port ID to be detected and the second data.

Optionally, or preferably, the search method further comprises:

disassembling the GEM Port ID to be tested into a first part GEM Port ID and a second part GEM Port ID, wherein the determining the first storage unit by searching the first memory array with the GEM Port ID to be tested includes:

performing row searching in the first memory array by using the first partial GEM Port ID; and

and performing column searching in the first memory array by using the second part GEM Port ID.

Optionally, or preferably, the responding to the event that the first storage unit is valid, searching the second memory array based on the GEM Port ID to be tested to obtain the second data includes:

performing row searching in the second memory array through the first part GEM Port ID, and judging the second memory row from the second memory array; and

the second data is provided by the second memory line.

Optionally, or preferably, the determining the counter pointer based on the GEM Port ID to be measured and the second data further includes:

obtaining a summation result by summing the second partial GEM Port ID and the second data; and

and taking the sum result as the counter pointer.

Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.

Drawings

Fig. 1 is a system architecture diagram of GPON.

Fig. 2 is a schematic diagram of a downlink packet frame structure.

Fig. 3 is a schematic diagram of a configuration of a sram array according to one reference example.

FIG. 4 is a schematic diagram of data stored in the SRAM array of FIG. 3.

FIG. 5 is a schematic diagram showing a configuration of a memory array of a first memory array and a second memory array in an SRAM according to an embodiment of the present invention.

Fig. 6 is a table comparing reference examples and embodiments.

Detailed Description

Different embodiments of the present invention are provided below. These examples are given to illustrate the technical content of the present invention, and are not intended to limit the scope of the claims of the present invention. A feature of one embodiment may be applied to other embodiments by suitable modifications, substitutions, combinations, and separations.

It should be noted that in this context, having "a" component is not limited to having a single said component, but may have one or more of said components, unless specifically indicated otherwise.

In addition, unless specifically indicated otherwise, the ordinal numbers "first," "second," etc., are used herein to distinguish between components that have the same name, and do not indicate a level, hierarchy, order of execution, or order of processing between them. A "first" component and a "second" component may occur together in the same component or in different components. The presence of a component with a larger ordinal number does not necessarily indicate the presence of another component with a smaller ordinal number.

The terms "comprising," "including," "having," "containing," and "containing" are intended to be inclusive and not limited to.

In addition, as used herein, the terms "system," "apparatus," "device," "module," or "unit" refer to an electronic component or a digital circuit, an analog circuit, or other broader circuit that is composed of a plurality of electronic components, and are not necessarily level or hierarchical, unless otherwise indicated.

In addition, either the terminal or the server may include the above components or be implemented in the manner described above.

(reference example)

Fig. 3 is a schematic diagram of an array configuration of a static random access memory (Static Random Access Memory, SRAM) according to a reference example, and fig. 4 is a schematic diagram of data stored in the SRAM array of fig. 3. A method of referring to an example ONU lookup (GEM) frame will be described below based on fig. 3 and 4.

According to the international telecommunications union (International Telecommunication Union, ITU) standard, GEM frames received for GEM ports of a particular ONU need to be counted. For this purpose, a counter group corresponding to the GEM Port needs to be found, and the counter group is used for counting, wherein the counter group comprises at least one counter.

Generally, one OLT supports 4096 GEM ports. Whereas, as previously described, "GEM Port ID" is used to identify GEM Port, 4096 GEM Port IDs are required. The row address (row address) of SRAM is one possible implementation of GEM Port ID. For this purpose, the ONU provides 4096 SRAM row addresses, corresponding to 4096 GEM ports, respectively. Decimal 4096, when converted to binary, needs to be represented by 12 bits, and the most significant bit (Most Significant Bit, MSB) among the 12 bits is gpid [11], the least significant bit (Least Significant Bit, LSB) is gpid [0], and the whole is represented by gpid [11:0 ]. In this context gpid is the four letters "G", "P", "I" and "D" taken from "GEM Port ID".

Referring to fig. 3, in the reference example, the SRAM of the ONU includes 4096 SRAM rows. Row address of row 0 SRAM row 0000-0000-0000, row address of row 1 SRAM row 0000-0000-0001, and so on, until row address of row 4095 SRAM row 1111-1111-1111, where the symbol "to" is merely to promote readability, the row address may not include the symbol.

In operation, if the GEM Port ID included in the GEM frame provided by the OLT is 0000-0000-0000, the ONU can identify that it corresponds to the 0 th row SRAM row; similarly, if the GEM frame provided by the OLT includes a GEM Port ID of 0000-0000-0001, the ONU can identify that it corresponds to row 1 SRAM row, and so on.

After identifying the corresponding SRAM row based on the GEM Port ID included in the GEM frame, the ONU can output the data (data) stored in the corresponding SRAM row from the SRAM.

Referring to FIG. 4, the SRAM row stores 9 bits of data, where MSB among the 9 bits is bit [8], LSB is bit [0], and the whole is represented by bit [8:0 ]. For example, row 0 SRAM row stores 0-XXXXXX-XXXX, row 1 SRAM row stores 0-0000-0001, and FIG. 4 is that the data stored in the SRAM row is merely exemplary.

In the comparative example, bit [8] as the MSB is used to indicate whether or not a specific GEM frame belongs to a specific ONU. When msb=1, it indicates that the specific GEM Port ID belongs to the specific ONU, that is, the specific GEM frame belongs to the specific ONU. When msb=0, it indicates that the specific GEM Port ID does not belong to the specific ONU, that is, the specific GEM frame does not belong to the specific ONU.

The remaining 8 bits, bit [7:0], are the specific count set used to indicate the particular GEM frame to use, in other words, bit [7:0] is used as a counter pointer. Since ONUs support a maximum of 256 GEM ports, and the power of 2 to 8 is 256, the counter pointer bit [7:0] has a total of 8 bits.

To more specifically illustrate the method of referring to the example ONU lookup (GEM) frame, assuming that in one particular case a particular ONU supports only 1 GEM Port, then of 4096 SRAM rows, only the msb=1 of the data stored by 1 SRAM row will appear, in the reference example, the 31 st SRAM row, but is merely exemplary, and in other examples, other rows are possible.

In operation, if the GEM frame provided by the OLT includes a GEM Port ID of 0, i.e., gpid [11:0]＝0000-0000-0000 ₂ ＝0 ₁₀ The ONU may identify that it corresponds to the 0 th row SRAM row and then may output the data "0-XXXX" stored in the 0 th row SRAM row. In this data, msb=0, so it can be determined that the GEM frame does not belong to the ONU, and thus it is not necessary to further determine which count set the GEM frame uses.Here, it should be noted that such as "0000-0000-0000 ₂ The subscript "2" of "such a code indicates that the code is represented in 2 scale, such as" 0 ₁₀ The subscript "10" of "such a code" indicates that the code is in 10 scale, as is the case below.

In operation, if the GEM frame provided by the OLT includes a GEM Port ID of 31, i.e., gpid [11:0]＝0000-0001-1111 ₂ ＝31 ₁₀ The ONU can recognize that it corresponds to the 31 st row of SRAM, and then can output the data "1-0000-0010" stored in the 31 st row of SRAM. In this data, msb=1, so it can be determined that the GEM frame belongs to the ONU. Thus, it is necessary to further determine which of the count sets is used for this GEM frame based on the counter pointer bit [7:0]0000-0010, for example, may be used to represent the SRAM row address of another memory space (not shown) of the SRAM to find the count set used by the GEM frame.

In the specific case of the above assumption, the ONU supports 1 GEM Port. However, in any case, the ONU supports at most 256 GEM ports, that is, at most 256 SRAM rows have MSBs of 1 among 4096 SRAM rows. In other words, the MSBs of the remaining 3840 SRAM rows (because 4096-256=3840) are all 0. The present invention recognizes that once msb=0, the remaining 8 bits are useless, in other words, at least 3840×8=30720 memory space is wasted, and the utilization efficiency is low in terms of the area cost of the SRAM.

Therefore, a new method for searching for GPON GEM frames and a new method for counting GPON GEM frames are needed.

(method of finding GPON GEM frame of the invention)

The method for searching the GPON GEM frame is suitable for a GPON system, and the GPON system comprises: OLT, optical splitter, ONU, and multiple clients. The ONU includes an integrated circuit including an SRAM, but is not limited thereto, other memories are also possible. In the present invention, a first memory array and a second memory array are arranged in an SRAM.

FIG. 5 is a schematic diagram showing a configuration of a memory array of a first memory array and a second memory array in an SRAM according to an embodiment of the present invention. A method of searching for GPON GEM frames according to an embodiment of the present invention will be described below based on fig. 5.

First, the arrangement and use of the first and second memory arrays of the present invention are described below. It should be understood that, in order to solve the problem of low area utilization of the SRAM and to match the condition that one OLT supports 4096 GEM ports, the following configuration is formed.

(configuration of first memory array)

In a broad embodiment, the first memory array has a plurality of first memory rows (row), in the present invention SRAM rows, which respectively have corresponding row addresses (row addresses). In a particular embodiment, the first memory array is configured with 256 SRAM rows.

The decimal 256 needs to be represented by 8 bits when converted to binary, and thus the row address of the first memory array is 8 bits. For example, as shown in FIG. 5, the row address of the SRAM row of row 0 is 0000-0000, the row address of the SRAM row of row 1 is 0000-0001, and so on, until the row address of the SRAM row of row 255 is 1111-1111.

The SRAM row of the first memory array includes 16 memory cells and stores 16 bits of data, where the 16 bits are Bit 0, bit 1, bit 2, bit 3, bit 4, bit 5, bit 6, bit 7, bit 8, bit 9, bit 10, bit 11, bit 12, bit 13, bit 14, and Bit 15 from LSB to MSB, respectively. Each Bit position represents a GEM Port, e.g., bit 0 of the 0 th row SRAM row represents the 1 st GEM Port of the 0 th row SRAM row, bit 15 of the 0 th row SRAM row represents the 16 th GEM Port of the 0 th row, and so on.

Thus, each row of SRAM rows may be used to represent 16 GEM ports, with a total of 256 rows of SRAM rows for the first memory array, so the first memory array may be used to represent 4096 GEM ports (because 256×16=4096).

(configuration of the second memory array)

Before describing the arrangement of the second memory array in detail, it is specifically described that the second memory array is provided in order to sequentially sum up the number of valid bits (SRAM rows) of the first memory array to obtain a "storage sum", and store the storage sum in the second memory array.

In a broad embodiment, the second memory array has a plurality of second memory rows, in the present invention SRAM rows, each having a corresponding row address. In a particular embodiment, the second memory array is configured with 256 rows of SRAM. Similarly, 256 decimal values need to be represented by 8 bits when converted to binary values, and thus the row address of the second memory array is 8 bits. For example, as shown in FIG. 5, the row address of the SRAM row of row 0 is 0000-0000, the row address of the SRAM row of row 1 is 0000-0001, and so on, until the row address of the SRAM row of row 255 is 1111-1111. It follows that the order of arrangement of the second memory rows in the second memory array may be the same as the order of arrangement of the first memory rows in the first memory array. Furthermore, the first memory row and the second memory row may have the same row address.

The SRAM row of the second memory array includes 8 memory cells while 8 bits of data are stored. The 8 bits set is to take into account that an ONU supports a maximum of 256 GEM ports, so that the first memory array has only 256 valid bits at most. Broadly speaking, the number of bits of the second memory row needs to be greater than or equal to the maximum number of GEM ports that the integrated circuit can support.

In one embodiment, the second memory array is configured to define row 0 of the SRAM rows to store data (value) of 0, and the other SRAM rows store "storage sums". The stored sum is calculated as follows: the data (value) stored in the M th SRAM row of the second memory array is

Wherein M is 0 to 255, Q _N For the number of valid bits in the N-th row of SRAM of the first memory array, Σ is the summation operator and N is the summation index.

In the example of FIG. 5, Q ₀ The 0 th row SRAM row is the effective bit number in the 0 th row SRAM row of the first memory arrayThe data stored is 0001000010000000, there are 2 1's, so Q ₀ =2; similarly, Q ₁ For the number of valid bits in the 1 st SRAM row of the first memory array, the 1 st SRAM row stores 1000000000000010 data, thus Q ₁ ＝2。

Then, a stored sum of the SRAM rows of the second memory array is calculated. First, by definition, the 0 th row SRAM row of the second memory array stores data (value) of 0 ₁₀ Binary representation of 00000000 ₂ 。

The data stored in the 1 st SRAM row of the second memory array is based on

To calculate and obtain Q ₀ I.e. 2 ₁₀ Binary representation of 00000010 ₂ . The data stored in the 2 nd SRAM row of the second memory array is also based on

To calculate and obtain Q ₀ Q and Q ₁ Sum of (4) ₁₀ Its binary representation is 00000100 ₂ 。

Thus, the first memory array and the second memory array in the SRAM are constructed. It should be noted that the data stored for each SRAM row of the first memory array and the second memory array of fig. 5 is merely exemplary. The specific steps of the method for searching for GPON GEM frames of the present invention will be described below.

(specific description of method for searching for GPON GEM frame)

Hereinafter, as a non-limiting example, the ONU will search for GEM frames with GEM Port id=0 and GEM frames with GEM Port id=32, respectively.

The first example is GEM Port id=0, namely gpid [11:0]]＝0 ₁₀ ＝000000000000 ₂ . According to the principles of the present invention gpid [11:0] may be used]＝000000000000 ₂ Disassembling into gpid [11:4 ]]＝00000000 ₂ Gpid [3:0]]＝0000 ₂ . It should be appreciated that gpid [11:0]There are 12 bits gpid[11:4]Representing the first 8 of these 12 bits, gpid [3:0]]Representing the last 4 of the 12 bits.

Firstly, ONU has to perform row search, because gpid [11:4]＝00000000 ₂ In the sense that the row address of the first memory array, which translates to a decimal of 0 ₁₀ So the ONU recognizes that it corresponds to row 0 SRAM row.

After identifying its correspondence to row 0 SRAM row, ONU needs to perform column lookup according to gpid [3:0]]＝0000 ₂ The converted decimal value is 0 ₁₀ The ONU recognizes the position of Bit 0, i.e., the 1 st Bit (least significant Bit) of the 16 bits stored in the SRAM row of the first memory array. For the meaning of Bit 0, … and Bit 15, please refer to the description of the section "configuration of the first memory array" and the description thereof is omitted herein.

Then, it is determined whether the GEM frame belongs to the ONU according to the bit position indicated by gpid [3:0 ]. The judgment criteria are as follows: a value of 1 for the indicated bit indicates valid and a value of 0 for the indicated bit indicates invalid. Accordingly, in this example, since the value of Bit 0 of the 0 th SRAM row is 0, it is determined that the GEM frame having GEM Port id=0 does not belong to this ONU.

In this example, since it has been determined that the GEM frame with GEM Port id=0 does not belong to the ONU, it is not necessary to further determine which GEM Port the GEM frame uses.

A second example is GEM Port id=32, namely gpid [11:0]]＝32 ₁₀ ＝000000100000 ₂ . According to the principles of the present invention gpid [11:0] may be used]＝000000100000 ₂ Disassembling into gpid [11:4 ]]＝00000010 ₂ Gpid [3:0]]＝0000 ₂ 。

Firstly, ONU has to perform row search, because gpid [11:4]＝00000010 ₂ In the sense that the row address of the first memory array, which translates to a decimal of 2 ₁₀ So the ONU recognizes that it corresponds to row 2 SRAM row.

After identifying its correspondence to the 2 nd SRAM row, the ONU must perform a column lookup according to gpid [3:0]]＝0000 ₂ The converted decimal is 0, and the ONU recognizes that the ONU points to Bit0, i.e., the 1 st bit (least significant bit) position of the 16 bits stored in the SRAM row of the first memory array.

Then, it is determined whether the GEM frame belongs to the ONU according to the bit position indicated by gpid [3:0 ]. In this example, since Bit 0 of the 2 nd SRAM row has a value of 1, it is determined that the ONU has GEM Port id=32.

(specific description of method of counting GPON GEM frame)

Returning to the example of fig. 5, after determining that the GEM frame with GEM Port id=32 belongs to the ONU, the downstream of the specific GEM Port needs to be further determined. First, a first memory array is utilized to perform a lookup by gpid [11:4 ]]＝00000010 ₂ After determining that it corresponds to the 2 nd SRAM row of the first memory array, according to gpid [3:0]]0 of=00002= ₁₀ The ONU identifies the position of Bit 0, i.e., the 1 st Bit (least significant Bit) of the 16 bits stored in the SRAM row of the first memory array, and further determines that the GEM Port is the 1 st GEM Port (the GEM Port is the first memory cell) in the 2 nd SRAM row of the first memory array.

Then, a second memory array is used for searching. Due to gpid [11:4 ]]＝00000010 ₂ In the sense that the row address of the second memory array, which translates to a decimal of 2 ₁₀ It can be judged that it corresponds to the 2 nd row SRAM line, and accordingly, the data 00000100 stored in the 2 nd row SRAM line is output ₂ Converted into decimal 4 ₁₀ . This means that in the first memory array, the SRAM row that precedes the 2 nd SRAM row has a total of four valid GEM ports. Because the GEM Port with GEM Port id=32 is the 1 st GEM Port in the 2 nd SRAM row of the first memory array, the GEM Port with GEM Port id=32 is the 5 th GEM Port.

In general, the process of determining a particular GEM Port uses the results obtained by the first memory array (in this example, the guideline Bit 0 for row 2 SRAM line); and then obtaining a specific GEM Port from the GEM Port ID by using the result (second value) obtained by the second memory array.

According to the foregoing counting method, the second partial GEM Port ID and the second data are summed to obtain a summed result, and the summed result is used as the counter pointer, so that according to calculation 1+4, it can be known that the GEM frame with GEM Port id=32 belongs to the 5 th GEM Port of the ONU.

Next, in terms of the lookup array, binary 00000101 at 5 of the 5 th GEM Port ₂ For the counter pointer, a corresponding count set is found.

In the present invention, the space of the first memory array is 256×16 bits, the space of the second memory array is 256×8 bits, and the total of the two is 6144 bits, which is smaller than 4096×9=36864 bits required by the memory array in the comparative example, so that the memory space of 3840×8=30720 bits is greatly saved, and according to the ratio of 6144 to 36864, it can be known that the memory space required by the present invention is only one sixth of that of the comparative example.

(comparison of reference examples and examples)

Fig. 6 is a table comparing reference examples and embodiments.

Now, under the condition of the same execution performance (i.e. one ONU supports 256 GEM ports), it can be found by comparing the table in fig. 6 that, in the reference example (a group of memory arrays), the area requirement of the SRAM is 36864 bits; in the example presented by way of implementation (two sets of memory arrays), only one sixth of the area of the prior art SRAM is required by configuring the total area required for the first memory array and the second memory array to accommodate 6144 bits. It is apparent that the present invention has an advantage in reducing the area of the SRAM.

In general, according to the method of the present invention, during the searching process, the first memory array is used to find out which position in which row the GEM Port ID is located, the second memory array is used to find out the corresponding valid bit sum, and then the counter pointer is calculated according to the result to count.

Thus, the method provided by the invention has the advantage that the SRAM area is greatly reduced, so that the method for quickly searching and counting the GEM frames is realized.

While the invention has been described in terms of several embodiments, it will be appreciated that many other possible modifications and variations may be made without departing from the spirit of the invention and as claimed.

Claims (13)

1. A lookup method applicable to Gigabit Passive Optical Networks (GPON), the lookup method comprising:

disassembling a GPON encapsulation mode Port identifier (GEM Port ID) of a GEM frame into a first part GEM Port ID and a second part GEM Port ID;

performing row searching in a first memory array by using the first part GEM Port ID, and performing column searching in the first memory array by using the second part GEM Port ID; a kind of electronic device with high-pressure air-conditioning system

And judging a specific bit position of the first memory array according to the results of the row searching and the column searching in the first memory array, wherein the specific bit position represents a specific GPON encapsulation mode Port (GEM Port) used by the GEM frame.

2. The method of searching according to claim 1, further comprising: and judging whether the GEM frame belongs to the ONU or not by using the value of the specific bit position by the ONU.

3. The method of searching according to claim 1, further comprising: and searching the first memory array by using the first part GEM Port ID to obtain the specific GPON packaging mode Port.

4. The method of claim 1, wherein the first memory array has a plurality of memory rows each having a respective row address, and wherein the data stored by the plurality of memory rows comprises a plurality of bits each representing a GEM Port.

5. The method of claim 4, wherein the search method,wherein the second memory array is configured such that the data of the M-th memory row is in addition to the data of the 0-th memory row

Wherein M is 0 to 255, Q _N For the number of valid bits in the nth memory row of the first memory array, Σ is a summation operator, N is a summation index, and wherein the second memory array is configured to define a value in the 0 th memory row as 0.

6. A Gigabit Passive Optical Network (GPON) Optical Network Unit (ONU) integrated circuit, the GPON ONU integrated circuit comprising:

a first memory array formed of a first memory row and including a plurality of memory cells, each memory cell representing a GPON encapsulation mode Port (GEM Port), the first data stored by each memory cell indicating the validity of the associated GEM Port; and

a second memory array formed of second memory rows, wherein a setup order of the second memory rows in the second memory array is the same as a setup order of the first memory rows in the first memory array, wherein second data stored by the second memory rows is a valid GEM Port total of all memory rows set before the first memory rows, wherein the second data is related to a counter index (counter index).

7. The GPON ONU integrated circuit of claim 6, wherein the first memory row and the second memory row have the same row address.

8. The GPON ONU integrated circuit of claim 6, wherein the number of bits of said second memory row is required to represent the maximum number of GEM ports that said GPON ONU integrated circuit can support.

9. A lookup method applied to the GPON ONU integrated circuit in claim 6, said lookup method comprising:

searching the first memory array through a GPON encapsulation mode Port identifier (GEM Port ID) to be detected, and judging a first memory unit;

responding to the event that the first storage unit is effective, and searching the second memory array based on the GEM Port ID to be detected so as to acquire the second data; and

the counter pointer is determined based on the second data.

10. The lookup method as claimed in claim 9 wherein said determining the counter pointer based on the second data comprises:

and judging the counter pointer based on the GEM Port ID to be detected and the second data.

11. The lookup method as claimed in claim 10 wherein the lookup method further comprises:

disassembling the GEM Port ID to be tested into a first part GEM Port ID and a second part GEM Port ID, wherein the determining the first storage unit includes:

performing row searching in the first memory array by using the first partial GEM Port ID; and

and performing column searching in the first memory array by using the second part GEM Port ID.

12. The lookup method as claimed in claim 11 wherein said responding to an event that said first storage unit is valid to lookup said second memory array based on said GEM Port ID to be tested to retrieve said second data comprises:

performing row searching in the second memory array through the first part GEM Port ID, and judging the second memory row from the second memory array; and

the second data is provided by the second memory line.

13. The lookup method as claimed in claim 12 wherein said determining said counter pointer based on said GEM Port ID to be measured and said second data further comprises:

obtaining a summation result by summing the second partial GEM Port ID and the second data; and

and taking the sum result as the counter pointer.

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