CN116232522A - Method and system for automatically tracking and maintaining absolute time based on multiple clocks - Google Patents

Method and system for automatically tracking and maintaining absolute time based on multiple clocks Download PDF

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CN116232522A
CN116232522A CN202310498634.3A CN202310498634A CN116232522A CN 116232522 A CN116232522 A CN 116232522A CN 202310498634 A CN202310498634 A CN 202310498634A CN 116232522 A CN116232522 A CN 116232522A
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time
code
pulse
data
tracking
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邓成杰
吴航
代瑶
周雪
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Chengdu Chuanmei New Technology Co ltd
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    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network

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Abstract

The invention provides a method and a system for automatically tracking and maintaining absolute time based on multiple clocks, and relates to the technical field of information systems. The invention provides a plurality of clock signals by setting B code time system equipment, an external clock source and an internal clock source, and realizes automatic tracking and maintaining absolute time by a synchronous second pulse module, a tracking and maintaining module and a time code maintaining module; the mutual coordination realizes that various external input clocks automatically track and maintain absolute time, and the external input clock sources are backed up by combining internally generated clock sources, so that the capacity of supplementing and increasing the anti-interference is formed; in the process of continuously generating absolute time, a time code maintaining module is used for carrying out time code maintaining judgment, and when a B code time system signal is unavailable, continuous simulation tracking is carried out on invalid time data through a synchronous second pulse signal, so that the generation of absolute time is maintained; under the condition that signals are blocked or interfered, the relative accurate absolute time can be continuously output, and the stability of the system is ensured.

Description

Method and system for automatically tracking and maintaining absolute time based on multiple clocks
Technical Field
The invention relates to the technical field of information systems, in particular to a method and a system for automatically tracking and maintaining absolute time based on multiple clocks.
Background
A complex large system generally consists of a plurality of subsystems; when the subsystem performs operations such as information interaction with a large system, responding to system instructions, reporting upwards and the like, a unified time reference is generally needed, so that the time of each subsystem is kept synchronous, and the occurrence of confusion caused by mismatching of the time of the system is avoided. The GPS satellite is used as a unified clock source, so that the aim of time unification can be fulfilled.
The existing method for acquiring absolute time uses a GPS satellite signal as a clock source, and a GPS receiver provides time code data and a second pulse signal. The purpose of unifying time is achieved. However, this method is affected by the quality of the GPS signal, and if the signal is blocked or disturbed, there is a step out, resulting in an absolute time error.
Therefore, there is a need for a method and system for maintaining absolute time based on multi-clock automatic tracking.
Disclosure of Invention
In order to solve one of the above technical problems, the present invention provides a system for automatically tracking and maintaining absolute time based on multiple clocks, wherein the absolute time is described by time code data and second pulse data, comprising: the system comprises B code time system equipment, an exogenous clock source and FPGA equipment; the B code time system device and the external clock source are respectively connected with the FPGA device;
wherein, the B-code timing system device: the time code and second pulse data are provided, and corresponding B code time system signals are output; the exogenous clock source: the device is used for providing second pulse data and outputting a corresponding exogenous second pulse signal; the FPGA device: receiving and decoding the B code timing system signal and the exogenous second pulse signal, executing multi-clock automatic tracking and maintaining absolute time, and generating and outputting an absolute time signal;
the FPGA equipment is internally provided with: the system comprises an internal clock source, a synchronous second pulse module, a tracking maintenance module and a time code maintenance module; the tracking maintenance module is respectively connected with the B code time system equipment, the time code maintenance module and the synchronous second pulse module, and the external clock source and the internal clock source are respectively connected with the synchronous second pulse module; the synchronous second pulse module is connected with the tracking maintenance module;
wherein the internal clock source: the device is used for providing second pulse data and outputting a corresponding endogenous second pulse signal; the synchronous second pulse module: the device is used for receiving an exogenous pulse-per-second signal and an endogenous pulse-per-second signal, performing pulse-per-second synchronization and outputting a synchronous pulse-per-second signal; the time code maintaining module: according to the time code maintaining logic, automatically maintaining and tracking the time code data; the tracking maintenance module: the method is used for totalizing the time code data and the second pulse data and continuously outputting absolute time.
As a further solution, the B-code timing system device obtains the time code data and the second pulse data through the Beidou signal or the GPS signal, and compiles the time code data and the second pulse data through the IRIG-b_dc code or the IRIG-b_ac code to obtain the B-code timing system signal.
The method for automatically tracking and maintaining the absolute time based on the multiple clocks is applied to the system for automatically tracking and maintaining the absolute time based on the multiple clocks, which is any one of the solutions, and the FPGA device continuously generates the absolute time by the following steps:
step A1: starting equipment, and receiving and executing an absolute time generation task;
step A2: the time code maintenance module is used for carrying out time code maintenance judgment to judge whether the time code is valid or not;
step A3: the tracking maintenance module executes corresponding steps according to the time code maintenance judgment;
if the time code is judged to be valid, the time code tracking maintenance is carried out through the step A4.1;
if the time code is invalid, performing time code simulation maintenance through the step A4.2;
step a4.1: maintaining time code tracking, continuously receiving a B code time system signal of B code time system equipment, analyzing to obtain time code data and second pulse data, and maintaining generation of absolute time by tracking the time code data and the second pulse data;
step a4.2: maintaining the time code simulation, and acquiring time code data judged to be invalid by the time code to obtain invalid time data; and receiving a synchronous second pulse signal of the synchronous second pulse module, and continuously and simulatively tracking invalid time data by tracking the synchronous second pulse signal to maintain the generation of absolute time.
As a still further solution, the synchronization pulse-per-second module acquires a synchronization pulse-per-second signal by:
judging whether an exogenous pulse-per-second signal is input; if yes, synchronizing the second pulse signals, and outputting exogenous second pulse signals as synchronized second pulse signals; if not, the endogenous second pulse signal is directly output as a synchronous second pulse signal; wherein, the second pulse signal is synchronous: and correcting the endogenous second pulse signal by taking the exogenous second pulse signal as a reference signal until the endogenous second pulse signal is synchronous with the exogenous second pulse signal.
As a still further solution, the time code maintenance decision is made by the steps of:
step B1: judging whether a B code time system signal exists or not; if yes, carrying out the next step; if not, judging that the time code is invalid;
step B2: judging whether the B code time system signals are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B3: analyzing the B code time system signal of each frame, and caching the B code time system signal as detection data in a detection window; obtaining time code detection data and second pulse detection data;
step B4: judging whether the time code detection data in the detection window are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B5: judging whether each time scale data of the time code detection data in the detection window carries out correct carry according to the corresponding pulse period; if the carry is correct, judging that the time code is valid; if the error carries, judging that the time code is invalid;
step B6: steps B1 to B5 are continued until the generation of the maintenance absolute time is stopped.
As a still further solution, the time scale of the absolute time includes: year, month, day, hour, section, second and second interior; the time scale of the time code data comprises: year, month, day, hour, section and second; and the tracking maintenance module carries out tracking cache on the time code data in real time.
As a still further solution, the time code tracking maintains: continuously tracking the time code data and the second pulse data, and analyzing each time scale of the time code data to obtain a year part, a month part, a day part, a time part, a subsection and a second part of absolute time; recording the frequency of the second pulse data, and integrating the second pulse data as the second inside of absolute time; time code tracking is continued, maintaining absolute time output.
As a still further solution, the time code simulation maintains: reading time code data in a tracking cache, acquiring invalid time data judged to be invalid by the time code, and taking the invalid time data as a simulation maintenance starting point; analyzing each time scale of the simulation maintaining starting point to obtain a year part, a month part, a day part, a time part, a subsection and a second part of the simulation maintaining time; recording the frequency of the synchronous second pulse signal, and integrating the frequency as the second internal of the analog maintaining time; the analog maintenance is continued, and the analog maintenance time is outputted as an absolute time.
Compared with the related art, the method and the system for automatically tracking and maintaining the absolute time based on multiple clocks have the following beneficial effects:
the invention provides a plurality of clock signals by setting B code time system equipment, an external clock source and an internal clock source, and realizes automatic tracking and maintaining absolute time by a synchronous second pulse module, a tracking and maintaining module and a time code maintaining module; the mutual coordination realizes that various external input clocks automatically track and maintain absolute time, and the external input clock sources are backed up by combining internally generated clock sources, so that the capacity of supplementing and increasing the anti-interference is formed;
in the process of continuously generating absolute time, a time code maintenance module is required to carry out time code maintenance judgment so as to judge whether a B code time system signal of B code time system equipment is available or not; and the time code tracking is maintained when the B code time system signal is available, so that the utilization rate of the B code time system signal is ensured to the maximum extent, and the absolute time precision is improved; when the B code timing system signal is unavailable, continuous analog tracking is carried out on invalid time data through the synchronous second pulse signal, and the generation of absolute time is maintained, so that the relatively accurate absolute time can be continuously output under the condition that the signal is shielded or interfered, and the stability of the system is ensured.
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FIG. 1 is a schematic diagram of a system for automatically tracking and maintaining absolute time based on multiple clocks according to an embodiment of the present invention;
FIG. 2 is a flow chart of a system for maintaining absolute time based on multi-clock automatic tracking according to an embodiment of the present invention.
Detailed Description
The invention will be further described with reference to the drawings and embodiments.
As shown in fig. 1, the system for maintaining absolute time based on multi-clock automatic tracking according to the present embodiment describes absolute time by time code data and second pulse data, and includes: the system comprises B code time system equipment, an exogenous clock source and FPGA equipment; the B code time system device and the external clock source are respectively connected with the FPGA device;
wherein, the B-code timing system device: the time code and second pulse data are provided, and corresponding B code time system signals are output; the exogenous clock source: the device is used for providing second pulse data and outputting a corresponding exogenous second pulse signal; the FPGA device: receiving and decoding the B code timing system signal and the exogenous second pulse signal, executing multi-clock automatic tracking and maintaining absolute time, and generating and outputting an absolute time signal;
the FPGA equipment is internally provided with: the system comprises an internal clock source, a synchronous second pulse module, a tracking maintenance module and a time code maintenance module; the tracking maintenance module is respectively connected with the B code time system equipment, the time code maintenance module and the synchronous second pulse module, and the external clock source and the internal clock source are respectively connected with the synchronous second pulse module; the synchronous second pulse module is connected with the tracking maintenance module;
wherein the internal clock source: the device is used for providing second pulse data and outputting a corresponding endogenous second pulse signal; the synchronous second pulse module: the device is used for receiving an exogenous pulse-per-second signal and an endogenous pulse-per-second signal, performing pulse-per-second synchronization and outputting a synchronous pulse-per-second signal; the time code maintaining module: according to the time code maintaining logic, automatically maintaining and tracking the time code data; the tracking maintenance module: the method is used for totalizing the time code data and the second pulse data and continuously outputting absolute time.
It should be noted that: the conventional method for acquiring absolute time uses a GPS satellite signal as a clock source, and a GPS receiver provides time data and a second pulse signal. The method is influenced by the quality of GPS signals, and under the condition that the signals are blocked or interfered, step out exists, so that absolute time errors are caused; the invention aims to solve the problem of how to automatically track time change through software and hardware and maintain absolute time under the condition that signals are blocked or interfered.
Therefore, in the traditional scheme, the embodiment provides multiple clock signals by setting the B code timing system equipment, the external clock source and the internal clock source, and realizes automatic tracking and maintaining of absolute time by the synchronous second pulse module, the tracking and maintaining module and the time code maintaining module; the mutual coordination realizes that various external input clocks automatically track and maintain absolute time, and the external input clock sources are backed up by combining the clock sources generated internally, so that the capacity of resisting disturbance is increased.
As a further solution, the B-code timing system device obtains the time code data and the second pulse data through the Beidou signal or the GPS signal, and compiles the time code data and the second pulse data through the IRIG-b_dc code or the IRIG-b_ac code to obtain the B-code timing system signal.
It should be noted that: providing a time code and a second pulse signal by using a B code time system device; the B-code timing system device may utilize a variety of external input clock sources, such as: the Beidou signal and the GPS signal are used as clock sources to acquire time code data and second pulse data; transmitting time code data and second pulse data through IRIG-B_DC codes and IRIG-B_AC codes; the IRIG-B time code is serial time code and can use standard sine wave carrier frequency to make amplitude modulation. The frequency of the standard sine wave carrier frequency is strictly related to the symbol rate. The standard sine wave carrier frequency of the B code is 1KHz. Meanwhile, the orthogonal zero crossing point accords with the front edge of the modulated format code element, and the standard modulation ratio is 10 to 3. The modulated B code is commonly called IRIG-B_AC code, and the non-amplitude modulated B code is commonly called IRIG-B_DC code; the interface of the IRIG-B (DC) code typically employs a TTL interface and an RS422 (v.11) interface. The interface of the IRIG-B (AC) code adopts a balanced interface. The synchronous precision of IRIG-B (DC) codes can reach tens of nanoseconds, and the synchronous precision of IRIG-B (AC) codes is generally 10-20 us (microseconds); the selection can be made according to the actual situation.
As shown in fig. 2, a method for automatically tracking and maintaining absolute time based on multiple clocks is applied to a system for automatically tracking and maintaining absolute time based on multiple clocks according to any one of the above solutions, and the FPGA device continuously generates absolute time by:
step A1: starting equipment, and receiving and executing an absolute time generation task;
step A2: the time code maintenance module is used for carrying out time code maintenance judgment to judge whether the time code is valid or not;
step A3: the tracking maintenance module executes corresponding steps according to the time code maintenance judgment;
if the time code is judged to be valid, the time code tracking maintenance is carried out through the step A4.1;
if the time code is invalid, performing time code simulation maintenance through the step A4.2;
step a4.1: maintaining time code tracking, continuously receiving a B code time system signal of B code time system equipment, analyzing to obtain time code data and second pulse data, and maintaining generation of absolute time by tracking the time code data and the second pulse data;
step a4.2: maintaining the time code simulation, and acquiring time code data judged to be invalid by the time code to obtain invalid time data; and receiving a synchronous second pulse signal of the synchronous second pulse module, and continuously and simulatively tracking invalid time data by tracking the synchronous second pulse signal to maintain the generation of absolute time.
It should be noted that: in the process of continuously generating absolute time, a time code maintenance module is required to carry out time code maintenance judgment so as to judge whether a B code time system signal of B code time system equipment is available or not; and the time code tracking is maintained when the B code time system signal is available, so that the utilization rate of the B code time system signal is ensured to the maximum extent, and the absolute time precision is improved; when the B code timing system signal is unavailable, continuous analog tracking is carried out on invalid time data through the synchronous second pulse signal, and the generation of absolute time is maintained, so that the relatively accurate absolute time can be continuously output under the condition that the signal is shielded or interfered, and the stability of the system is ensured.
As a still further solution, the synchronization pulse-per-second module acquires a synchronization pulse-per-second signal by:
judging whether an exogenous pulse-per-second signal is input; if yes, synchronizing the second pulse signals, and outputting exogenous second pulse signals as synchronized second pulse signals; if not, the endogenous second pulse signal is directly output as a synchronous second pulse signal; wherein, the second pulse signal is synchronous: and correcting the endogenous second pulse signal by taking the exogenous second pulse signal as a reference signal until the endogenous second pulse signal is synchronous with the exogenous second pulse signal.
It should be noted that: when the external pulse-per-second signal is input, the synchronous pulse-per-second module calibrates the internal pulse-per-second signal and outputs the synchronous pulse-per-second signal by preferentially adopting an external input clock; thereby calibrating the absolute time accuracy and further maintaining the absolute time.
As a still further solution, the time code maintenance decision is made by the steps of:
step B1: judging whether a B code time system signal exists or not; if yes, carrying out the next step; if not, judging that the time code is invalid;
step B2: judging whether the B code time system signals are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B3: analyzing the B code time system signal of each frame, and caching the B code time system signal as detection data in a detection window; obtaining time code detection data and second pulse detection data;
step B4: judging whether the time code detection data in the detection window are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B5: judging whether each time scale data of the time code detection data in the detection window carries out correct carry according to the corresponding pulse period; if the carry is correct, judging that the time code is valid; if the error carries, judging that the time code is invalid;
step B6: steps B1 to B5 are continued until the generation of the maintenance absolute time is stopped.
It should be noted that: if the B code timing system signal does not exist or is discontinuous, the B code timing system signal cannot be output as effective absolute time, so that state interpretation is needed; if the time code detection data in the detection window is discontinuous or the time scale data of the time code detection data in the detection window is not carried out correctly according to the corresponding pulse period, the time code data or the second pulse data is in error, and the time code data or the second pulse data is not output as effective absolute time.
As a still further solution, the time scale of the absolute time includes: year, month, day, hour, section, second and second interior; the time scale of the time code data comprises: year, month, day, hour, section and second; and the tracking maintenance module carries out tracking cache on the time code data in real time.
As a still further solution, the time code tracking maintains: continuously tracking the time code data and the second pulse data, and analyzing each time scale of the time code data to obtain a year part, a month part, a day part, a time part, a subsection and a second part of absolute time; recording the frequency of the second pulse data, and integrating the second pulse data as the second inside of absolute time; time code tracking is continued, maintaining absolute time output.
It should be noted that: in the tracking maintenance module, automatic tracking and maintenance of absolute time are comprehensively considered. Under the condition that the B code time system equipment works normally, the B code time system equipment can provide time codes and second pulses. The time code maintaining module can judge absolute time and confirm the input correctness of the B code time system equipment.
As a still further solution, the time code simulation maintains: reading time code data in a tracking cache, acquiring invalid time data judged to be invalid by the time code, and taking the invalid time data as a simulation maintenance starting point; analyzing each time scale of the simulation maintaining starting point to obtain a year part, a month part, a day part, a time part, a subsection and a second part of the simulation maintaining time; recording the frequency of the synchronous second pulse signal, and integrating the frequency as the second internal of the analog maintaining time; the analog maintenance is continued, and the analog maintenance time is outputted as an absolute time.
It should be noted that: under the condition that the B code time system equipment works abnormally, the simulation maintenance starting point is combined with the synchronous second pulse signal to obtain simulation maintenance time; the analog maintenance time is used as absolute time output, so that the overall stability of the system can be ensured under the condition that signals are shielded or interfered.
The foregoing is only illustrative of the present invention and is not to be construed as limiting the scope of the invention, and all equivalent structures or equivalent flow modifications which may be made by the teachings of the present invention and the accompanying drawings or which may be directly or indirectly employed in other related art are within the scope of the invention.

Claims (8)

1. A system for maintaining absolute time based on multi-clock automatic tracking, characterized in that absolute time is described by time code data and pulse per second data, comprising: the system comprises B code time system equipment, an exogenous clock source and FPGA equipment; the B code time system device and the external clock source are respectively connected with the FPGA device;
wherein, the B-code timing system device: the time code and second pulse data are provided, and corresponding B code time system signals are output; the exogenous clock source: the device is used for providing second pulse data and outputting a corresponding exogenous second pulse signal; the FPGA device: receiving and decoding the B code timing system signal and the exogenous second pulse signal, executing multi-clock automatic tracking and maintaining absolute time, and generating and outputting an absolute time signal;
the FPGA equipment is internally provided with: the system comprises an internal clock source, a synchronous second pulse module, a tracking maintenance module and a time code maintenance module; the tracking maintenance module is respectively connected with the B code time system equipment, the time code maintenance module and the synchronous second pulse module, and the external clock source and the internal clock source are respectively connected with the synchronous second pulse module; the synchronous second pulse module is connected with the tracking maintenance module;
wherein the internal clock source: the device is used for providing second pulse data and outputting a corresponding endogenous second pulse signal; the synchronous second pulse module: the device is used for receiving an exogenous pulse-per-second signal and an endogenous pulse-per-second signal, performing pulse-per-second synchronization and outputting a synchronous pulse-per-second signal; the time code maintaining module: according to the time code maintaining logic, automatically maintaining and tracking the time code data; the tracking maintenance module: the method is used for totalizing the time code data and the second pulse data and continuously outputting absolute time.
2. The system for automatically tracking and maintaining absolute time based on multiple clocks according to claim 1, wherein the B-code timing system device obtains time code data and second pulse data through a Beidou signal or a GPS signal, and compiles the time code data and the second pulse data through an IRIG-b_dc code or an IRIG-b_ac code to obtain a B-code timing system signal.
3. A method for maintaining absolute time based on multi-clock automatic tracking, which is applied to a system based on multi-clock automatic tracking and absolute time according to any one of claims 1 to 2, wherein the FPGA device continuously generates absolute time by the following steps:
step A1: starting equipment, and receiving and executing an absolute time generation task;
step A2: the time code maintenance module is used for carrying out time code maintenance judgment to judge whether the time code is valid or not;
step A3: the tracking maintenance module executes corresponding steps according to the time code maintenance judgment;
if the time code is judged to be valid, the time code tracking maintenance is carried out through the step A4.1;
if the time code is invalid, performing time code simulation maintenance through the step A4.2;
step a4.1: maintaining time code tracking, continuously receiving a B code time system signal of B code time system equipment, analyzing to obtain time code data and second pulse data, and maintaining generation of absolute time by tracking the time code data and the second pulse data;
step a4.2: maintaining the time code simulation, and acquiring time code data judged to be invalid by the time code to obtain invalid time data; and receiving a synchronous second pulse signal of the synchronous second pulse module, and continuously and simulatively tracking invalid time data by tracking the synchronous second pulse signal to maintain the generation of absolute time.
4. A method for automatically tracking and maintaining absolute time based on multiple clocks according to claim 3 wherein said synchronized seconds pulse module obtains synchronized seconds pulse signals by:
judging whether an exogenous pulse-per-second signal is input; if yes, synchronizing the second pulse signals, and outputting exogenous second pulse signals as synchronized second pulse signals; if not, the endogenous second pulse signal is directly output as a synchronous second pulse signal; wherein, the second pulse signal is synchronous: and correcting the endogenous second pulse signal by taking the exogenous second pulse signal as a reference signal until the endogenous second pulse signal is synchronous with the exogenous second pulse signal.
5. A method for automatically tracking and maintaining absolute time based on multiple clocks according to claim 3 wherein said time code maintenance decision is made by:
step B1: judging whether a B code time system signal exists or not; if yes, carrying out the next step; if not, judging that the time code is invalid;
step B2: judging whether the B code time system signals are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B3: analyzing the B code time system signal of each frame, and caching the B code time system signal as detection data in a detection window; obtaining time code detection data and second pulse detection data;
step B4: judging whether the time code detection data in the detection window are continuous or not; if continuous, carrying out the next step; if the time code is discontinuous, judging that the time code is invalid;
step B5: judging whether each time scale data of the time code detection data in the detection window carries out correct carry according to the corresponding pulse period; if the carry is correct, judging that the time code is valid; if the error carries, judging that the time code is invalid;
step B6: steps B1 to B5 are continued until the generation of the maintenance absolute time is stopped.
6. The method for maintaining an absolute time based on multi-clock automatic tracking of claim 5, wherein the time scale of the absolute time comprises: year, month, day, hour, section, second and second interior; the time scale of the time code data comprises: year, month, day, hour, section and second; and the tracking maintenance module carries out tracking cache on the time code data in real time.
7. The method for automatically tracking and maintaining absolute time based on multiple clocks according to claim 6, wherein said time code tracking and maintaining: continuously tracking the time code data and the second pulse data, and analyzing each time scale of the time code data to obtain a year part, a month part, a day part, a time part, a subsection and a second part of absolute time; recording the frequency of the second pulse data, and integrating the second pulse data as the second inside of absolute time; time code tracking is continued, maintaining absolute time output.
8. The method of claim 6, wherein the time code simulates maintenance of: reading time code data in a tracking cache, acquiring invalid time data judged to be invalid by the time code, and taking the invalid time data as a simulation maintenance starting point; analyzing each time scale of the simulation maintaining starting point to obtain a year part, a month part, a day part, a time part, a subsection and a second part of the simulation maintaining time; recording the frequency of the synchronous second pulse signal, and integrating the frequency as the second internal of the analog maintaining time; the analog maintenance is continued, and the analog maintenance time is outputted as an absolute time.
CN202310498634.3A 2023-05-06 2023-05-06 Method and system for automatically tracking and maintaining absolute time based on multiple clocks Pending CN116232522A (en)

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