CN116232035A - Detection method, detection circuit and synchronous rectification chip - Google Patents

Detection method, detection circuit and synchronous rectification chip Download PDF

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Publication number
CN116232035A
CN116232035A CN202211699950.9A CN202211699950A CN116232035A CN 116232035 A CN116232035 A CN 116232035A CN 202211699950 A CN202211699950 A CN 202211699950A CN 116232035 A CN116232035 A CN 116232035A
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pulse signal
synchronous rectification
driving pulse
detection result
rectification chip
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姚良豪
王蒙
杨小华
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Shenzhen ICM Microelectronics Co Ltd
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Shenzhen ICM Microelectronics Co Ltd
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Priority to CN202211699950.9A priority Critical patent/CN116232035A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)

Abstract

The application discloses a detection method, a detection circuit and a synchronous rectification chip. The detection method is applied to the synchronous rectification chip. The detection method comprises the following steps: detecting whether a light load function of the synchronous rectification chip is started or not to obtain a first detection result; detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip from a first threshold value to a second threshold value meets a preset condition or not to obtain a second detection result; judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result; when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed, the switching tube controlled by the synchronous rectification chip is controlled to be closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened. According to the method and the device, after the light load function of the synchronous rectification chip is closed, whether the driving pulse signal is abnormal or not can be accurately judged, and the error opening of the switching tube controlled by the synchronous rectification chip is avoided.

Description

Detection method, detection circuit and synchronous rectification chip
Technical Field
The application relates to the technical field of synchronous rectification chips, in particular to a detection method, a detection circuit and a synchronous rectification chip.
Background
The power supply system comprises a main control chip and a synchronous rectification chip. As shown in fig. 1, a main control chip a is electrically connected with a synchronous rectification chip B, the main control chip a is used for controlling the power of a power supply system, and the synchronous rectification chip B is used for rectifying the current of the power supply system and supplying power for output.
When the synchronous rectification chip acts on the power supply system, the synchronous relation between the switching tube controlled by the synchronous rectification chip and the switching tube controlled by the main control chip is needed to be considered, namely, when the switching tube on the side of the main control chip is turned on, the switching tube on the side of the synchronous rectification chip is turned off; when the switching tube at the main control chip side is closed, the switching tube at the synchronous rectification chip side is opened. That is, when the switching tube on the side of the main control chip is turned on under normal conditions, the switching tube on the side of the synchronous rectification chip is turned off, and when the switching tube on the side of the main control chip is turned off, the switching tube on the side of the synchronous rectification chip is turned on, at this time, the synchronous rectification chip works in a normal working state, and the current flowing into the synchronous rectification switching tube is normal current.
In order to realize the synchronous relation between the switching tube controlled by the synchronous rectification chip and the switching tube controlled by the main control chip, the synchronous rectification chip needs to detect an effective normal driving pulse signal to drive the switching tube controlled by the synchronous rectification chip to be opened.
At present, when the synchronous rectification chip is in light load, after the light load function is closed, the detection of a normal driving pulse signal and an abnormal ringing signal is not accurate enough, so that the situation that a switching tube controlled by the synchronous rectification chip is opened by mistake possibly occurs, the probability that the switching tube on the main control chip side and the switching tube on the synchronous rectification chip side are opened simultaneously can be increased, the current flowing through the switching tube on the synchronous rectification chip side is increased, and the switching tube on the synchronous rectification chip side is damaged.
Disclosure of Invention
In view of this, the present invention aims to solve, at least to some extent, one of the problems in the related art. To this end, an object of the present application is to provide a detection method, a detection circuit, and a synchronous rectification chip.
The embodiment of the application provides a detection method which is applied to a synchronous rectification chip. The detection method comprises the following steps: detecting whether a light load function of the synchronous rectification chip is started or not to obtain a first detection result; detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip from a first threshold value to a second threshold value meets a preset condition or not to obtain a second detection result; judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result; when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed, the switching tube controlled by the synchronous rectification chip is controlled to be closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Therefore, after the light-load function of the synchronous rectification chip is closed, whether the driving pulse signal is abnormal or not can be accurately judged according to the first detection result and the second detection result, and the situation that a switching tube controlled by the synchronous rectification chip is opened by mistake is avoided.
In some embodiments, the determining whether the driving pulse signal is abnormal according to the first detection result and the second detection result includes: and when the first detection result is that the light load function is closed and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time after the light load function is closed, judging that the driving pulse signal is abnormal.
Therefore, the detection method can judge that the driving pulse signal is abnormal when the slope of the driving pulse signal from the first threshold value to the second threshold value meets the preset condition within the preset time after the light load function is closed, so that the switching tube controlled by the synchronous rectification chip is prevented from being opened by mistake, and the switching tube on the side of the synchronous rectification chip is prevented from being damaged.
In some embodiments, the determining whether the driving pulse signal is abnormal according to the first detection result and the second detection result includes: and in the preset time after the light load function is closed, when the driving pulse signal is judged to be abnormal, the switching tube controlled by the synchronous rectification chip is controlled to be closed, and the duration of closing the switching tube controlled by the synchronous rectification chip is a preset time.
Therefore, after the detection method judges that the driving pulse signal is an abnormal signal, the switching tube controlled by the synchronous rectification chip is controlled to be closed, the closing duration time is a preset duration time, namely, whether the driving pulse signal is effective is judged again after the preset duration time, and then the switching tube controlled by the synchronous rectification chip is started again, so that the situation that the switching tube is opened by mistake can be effectively avoided.
In some embodiments, the determining whether the driving pulse signal is abnormal according to the first detection result and the second detection result includes: and when the first detection result is that the light load function is closed and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
Therefore, the detection method can accurately detect whether the driving pulse signal is normal after the light load function of the synchronous rectification chip is closed, and particularly can judge that the driving pulse signal is normal when the slope of the driving pulse signal from the first threshold value to the second threshold value does not meet the preset condition within the preset time after the light load function is closed, so as to control the switching tube controlled by the synchronous rectification chip to be opened, and avoid the situation that the switching tube controlled by the synchronous rectification chip is opened by mistake.
In some embodiments, the determining whether the driving pulse signal is abnormal according to the first detection result and the second detection result includes: and when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal is not reduced from the first threshold value to the second threshold value within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
Therefore, in the detection method, when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal does not drop to the second threshold value from the first threshold value within the preset time after the light load function is closed, the driving pulse signal is judged to be normal, and then the switching tube controlled by the synchronous rectification chip is controlled to be opened, so that the driving pulse signal can be accurately judged to be a normal signal, and the situation that the switching tube controlled by the synchronous rectification chip is opened by mistake is avoided.
The application also provides a detection circuit which is applied to the synchronous rectification chip. The detection circuit includes: the device comprises a light load detection module, a slope detection module, a logic processing module, a circuit control module and a latch. The first input end of the logic processing module is connected with the output end of the light load detection module, and the second input end of the logic processing module is connected with the output end of the slope detection module; the first input end of the latch is connected with the output end of the logic processing module, the second input end of the latch is connected with the output end of the circuit control module, the output end of the latch is connected with a driving unit in the synchronous rectification chip, and the driving unit is connected with a switching tube controlled by the synchronous rectification chip. The light load detection module is used for detecting whether a light load function of the synchronous rectification chip is started or not and outputting a first detection result; the slope detection module is used for detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip falls from a first threshold value to a second threshold value or not meets a preset condition and outputting a second detection result; the logic processing module is used for outputting the first detection result and the second detection result; the circuit control module is used for outputting a circuit control signal; the latch is used for judging whether the driving pulse signal is abnormal according to the first detection result and the second detection result, and controlling a switching tube controlled by the synchronous rectification chip to be closed when the driving pulse signal is abnormal in a preset time after the light load function is closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Therefore, the detection circuit judges whether the driving pulse signal is abnormal or not by detecting whether the light-load function of the synchronous rectification chip is started and detecting whether the slope of the driving pulse signal sent by the power end of the synchronous rectification chip is reduced from the first threshold value to the second threshold value or not, and can accurately detect whether the driving pulse signal is abnormal or not when the light-load function of the synchronous rectification chip is started or closed, so that the switching tube controlled by the synchronous rectification chip is prevented from being started by mistake.
In some embodiments, the latch is configured to control the switching tube controlled by the synchronous rectification chip to be turned off according to the circuit control signal and the driving pulse signal when the driving pulse signal is abnormal within a preset time after the light load function is turned off according to the first detection result and the second detection result. The first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal sent by the power end of the synchronous rectification chip when the driving pulse signal is reduced from the first threshold value to the second threshold value meets the preset condition within the preset time after the light load function is closed.
Therefore, when the driving pulse signal is abnormal in the preset time after the light load function is closed, the detection circuit can control the switching tube controlled by the synchronous rectification chip to be closed according to the corresponding pulse modulation signal output by the turn-off signal of the circuit control signal, so that the switching tube controlled by the synchronous rectification chip is prevented from being opened by mistake, and the switching tube on the side of the synchronous rectification chip is prevented from being damaged.
In some embodiments, the latch is configured to determine, according to the first detection result and the second detection result, that the driving pulse signal is normal within a preset time after the light load function is turned off, and control the switching tube controlled by the synchronous rectification chip to be turned on according to the circuit control signal and the driving pulse signal output corresponding pulse modulation signals; the first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is not satisfied with a preset condition within a preset time after the light load function is closed.
Therefore, the detection circuit can judge that the driving pulse signal is normal when the slope of the driving pulse signal from the first threshold value to the second threshold value does not meet the preset condition in the preset time after the light load function is closed as the first detection result is the light load function is closed, and control the switching tube controlled by the synchronous rectification chip to be opened according to the circuit control signal and the driving pulse signal output corresponding pulse modulation signal so as to ensure the normal opening of the switching tube of the synchronous rectification chip.
The application also provides a detection device which is applied to the synchronous rectification chip. The detection device comprises a first detection module, a second detection module, a judgment module and a control module. The first detection module is used for detecting whether a light load function of the synchronous rectification chip is started or not to obtain a first detection result; the second detection module is used for detecting whether the slope of a driving pulse signal sent by the power end of the synchronous rectification chip, which is from the first threshold value to the second threshold value, meets the preset condition or not, and obtaining a second detection result; the judging module is used for judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result; the control module is used for controlling the switching tube controlled by the synchronous rectification chip to be closed when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Therefore, the detection device can accurately judge whether the driving pulse signal is abnormal according to the first detection result and the second detection result after the light-load function of the synchronous rectification chip is closed, and the situation that the switching tube controlled by the synchronous rectification chip is opened by mistake is avoided.
The application also provides a synchronous rectification chip. The synchronous rectification chip comprises the detection circuit in any one of the embodiments, and further comprises a logic control unit and a driving unit, wherein the logic control unit comprises the detection circuit, the detection circuit is connected with the driving unit, and the driving unit drives a switching tube controlled by the synchronous rectification chip to be closed and opened according to a pulse modulation signal sent by the detection circuit.
Therefore, the synchronous rectification chip of the application judges whether the driving pulse signal is abnormal or not by setting the detection circuit in the logic control unit to detect whether the light load function of the synchronous rectification chip is started and detecting whether the slope of the driving pulse signal which is sent out by the power end of the synchronous rectification chip and falls from the first threshold value to the second threshold value meets the preset condition or not, and can accurately detect whether the driving pulse signal is abnormal or not when the light load function of the synchronous rectification chip is closed, so that the situation that a switching tube controlled by the synchronous rectification chip is started by mistake is avoided.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
fig. 1 is a schematic configuration diagram of a power supply system in the related art;
FIG. 2 is a schematic diagram of the internal structure of a synchronous rectification chip in the related art;
FIG. 3 is a flow chart of a detection method in certain embodiments of the present application;
FIG. 4 is a schematic structural view of a detection device in certain embodiments of the present application;
FIG. 5 is a schematic diagram showing the relationship between VD signal and VG pin on and off in a synchronous rectification chip according to some embodiments of the present application;
FIG. 6 is a waveform schematic diagram of a synchronous rectification chip that distinguishes between an effective VD signal and a ringing signal in accordance with certain embodiments of the present application;
FIG. 7 is a schematic diagram of a detection circuit according to some embodiments of the present application;
fig. 8 is a schematic structural diagram of a synchronous rectification chip according to some embodiments of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or an implicit indication of the number of technical features being indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless specifically defined otherwise.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; may be mechanically connected, may be electrically connected, or may be in communication with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
The following disclosure provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed.
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
Referring to fig. 2, fig. 2 is a basic block diagram of a current synchronous rectification chip, which includes an over-power circuit (LDO), an under-voltage protection circuit (UVLO), a detection on-state circuit (Sense), a logic Control circuit (Control) and a driving circuit (Driver). The undervoltage protection circuit is used for detecting whether the chip power supply is at a rated value or not; the detection opening state circuit is used for detecting the opening state of the external switching tube; the logic control circuit detects the output of the on-state circuit through the under-voltage protection circuit to carry out logic processing and then controls the driving circuit; the driving circuit realizes the control of the switching state of the switching tube and the switching of the substrate, and realizes the protection function of the switching tube.
When the synchronous rectification chip is in a normal condition, the switching tube of the main control chip is turned on, the switching tube of the synchronous rectification chip is turned off, and when the switching tube of the main control chip is turned off, the switching tube of the synchronous rectification is turned on, and at the moment, the synchronous rectification chip works in a normal working state, and the current flowing into the synchronous rectification switching tube is normal current.
When the synchronous rectification chip is abnormal, namely, the ringing signal at the VD end of the synchronous rectification chip accords with the condition that the switching tube controlled by the VG pin is started, the synchronous rectification chip feeds back pulse sequence signals to the VG pin after the logic processing circuit, so that the switching tube controlled by the VG pin is periodically started, the probability that the switching tube at the side of the main control chip and the switching tube controlled by the VG pin are simultaneously started can be increased, the current flowing through the switching tube at the side of the synchronous rectification chip is increased, and the risk of damaging the switching tube at the side of the synchronous rectification chip is caused.
It can be understood that once the ringing signal at the VD end meets the condition that the switching tube controlled by the VG pin is turned on, the synchronous rectification chip will turn on the switching tube for at least a minimum on time (ton_min), and when the minimum on time is over, the switching tube is turned off, which will cause the subsequent ringing signal at the VD end to be abnormally increased. Then, after the switching tube controlled by the synchronous rectification chip passes a minimum off time (toff_min), the switching tube controlled by the synchronous rectification chip accords with the on condition again, and the switching tube controlled by the synchronous rectification chip can be abnormally opened. At this time, when the abnormal ringing signal causes abnormal opening of the switching tube controlled by the VG pin on the synchronous rectification chip side, the probability that the switching tube on the main control chip side and the switching tube controlled by the VG pin on the synchronous rectification chip side are simultaneously opened is increased, so that the current flowing through the switching tube on the synchronous rectification chip side is increased, and the switching tube on the synchronous rectification chip side is damaged.
In view of this, please refer to fig. 3, the present application provides a detection method applied to a synchronous rectification chip. The detection method comprises the following steps:
01: detecting whether a light load function of the synchronous rectification chip is started or not to obtain a first detection result;
02: detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip from a first threshold value to a second threshold value meets a preset condition or not to obtain a second detection result;
03: judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result;
04: when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed, the switching tube controlled by the synchronous rectification chip is controlled to be closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Referring to fig. 4, the present application further provides a detection device 10 applied to a synchronous rectification chip. The detection device 10 includes a first detection module 11, a second detection module 12, a judgment module 13, and a control module 14. The first detection module 11 is configured to detect whether a light load function of the synchronous rectification chip is turned on, so as to obtain a first detection result; the second detection module 12 is configured to detect whether a slope of a driving pulse signal sent by a power supply end of the synchronous rectification chip from a first threshold to a second threshold meets a preset condition, so as to obtain a second detection result; the judging module 13 is configured to judge whether the driving pulse signal is abnormal according to the first detection result and the second detection result; the control module 14 is configured to control the switching tube controlled by the synchronous rectification chip to be turned off when the driving pulse signal is abnormal in a preset time after the light load function is turned off; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Firstly, detecting whether a light load function of a synchronous rectification chip is started, specifically detecting whether the synchronous rectification chip has a light load, and when the synchronous rectification chip has the light load, starting the light load function; when the synchronous rectification chip is not provided with light load, the light load function is closed. Correspondingly, the first detection result comprises that the light load function of the synchronous rectification chip is started and the light load function of the synchronous rectification chip is closed.
And then, detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip from the first threshold value to the second threshold value meets the preset condition or not to obtain a second detection result.
As can be understood, referring to fig. 2 and 5, the power end of the synchronous rectification chip is the VD end in fig. 2, and it is detected whether the slope of the driving pulse signal from the power end of the synchronous rectification chip falling from the first threshold to the second threshold meets the preset condition, that is, whether the slope of the falling edge of the driving pulse signal from the VD end meets the preset condition.
The first threshold may be a set value V1 in fig. 5, and V1 may be 2V, for example. The second threshold may be the set value V2 in fig. 5, and V2 may be-100 mV, for example.
The preset condition may be that a slope of the driving pulse signal falling from the first threshold value to the second threshold value is smaller than a K1 value. The value of K1 may be determined by a time T1 when the driving pulse signal falls from the first threshold to the second threshold, and when T1 is smaller than the set value Tslew, the set value Tslew may be, for example, 5ms, and a slope of the driving pulse signal falling from the first threshold to the second threshold is smaller than the value of K1.
At this time, the slope of the driving pulse signal (or VD signal) sent from the power supply terminal VD of the synchronous rectification chip falling from the first threshold value to the second threshold value is detected to satisfy the preset condition, and it may be determined that the preset condition is satisfied by the following two conditions: the driving pulse signal drops from the set value V1 to the set value V2; the period T1 during which the driving pulse signal falls from the set value V1 to the set value V2 is smaller than the set value Tslew. The two conditions are the necessary conditions that the VD signal reaches VG on, and are not necessary.
That is, when the driving pulse signal falls from the set value V1 to the set value V2 and the period T1 during which the driving pulse signal falls from the set value V1 to the set value V2 is smaller than the set value Tslew, it is determined that the slope of the driving pulse signal falling from the first threshold value to the second threshold value is smaller than the K1 value, so that it is determined that the slope of the driving pulse signal falling from the first threshold value to the second threshold value, which is sent from the power supply terminal of the synchronous rectification chip, satisfies the preset condition.
And judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result, and further controlling the switching tube controlled by the synchronous rectification chip to be closed and opened according to the abnormal judgment result. That is, the present application judges whether the driving pulse signal is an effective signal or a ringing signal according to the first detection result and the second detection result, and alternately opens the VG signal of the VG pin, thereby realizing the alternate opening and closing of the switching tube of the synchronous rectification chip.
That is, when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed, the switching tube controlled by the synchronous rectification chip is controlled to be closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
The preset time may be a time T3 in fig. 6. As shown in fig. 6, in the detection method of the present application, when a falling edge of the lightload function signal lightload1 after the time T2 is detected, the timing is started, and the timing time is the preset time T3. The preset time T3 is smaller than a set value Tring, which may be 5 times the sum of the minimum on time ton_min and the minimum off time toff_min. When detecting that the VD signal reaches the VG on condition within the preset time T3, that is, determining that the signal is an abnormal ring signal, controlling to turn on the lightload function signal lightload2, and continuing for a time T4, wherein the time T4 may be 0.5 times the period of the valid VD signal. The VG pin is turned off during T4, causing the VG pin to stay low. If the VD signal does not reach the VG on condition within the time T3, the control does not turn on the lightload2 signal and the VG pin is normally turned on.
It can be understood that, in fig. 6, the lightload1 function signal is a pulse signal sent by the first detection module 11 when the light load function of the synchronous rectification chip is turned on, and the lightload2 function signal is a pulse signal sent by the first detection module 11 when the light load function of the synchronous rectification chip is turned off. In fig. 6, the duration of the light load function being turned on is T2, and after the time T2, the light load function is turned off. In a preset time T3 after the light load function is closed, whether the driving pulse signal is reduced from a first threshold value to a second threshold value or not can be detected, whether the slope of the driving pulse signal reduced from the first threshold value to the second threshold value meets a preset condition slope or not is judged whether the driving pulse signal is abnormal or not, and when the signal is judged to be an abnormal ringing signal, the first detection module 11 is controlled to send out the lightload2 function signal in FIG. 6, the time duration T4 is prolonged, the VG pin is closed in the time duration T4, and further, the error opening of a switching tube controlled by the synchronous rectification chip is avoided. If the falling edge of the driving pulse signal does not fall from the first threshold to the second threshold within the preset time T3 after the light load function is closed, or the slope of the driving pulse signal falling from the first threshold to the second threshold is not smaller than the slope K1, the signal is judged to be a normal signal, the lightload2 signal is controlled not to be started, and the VG pin is normally started.
Therefore, whether the driving pulse signal is abnormal or not is judged by detecting whether the light load function of the synchronous rectification chip is started or not and detecting whether the slope of the driving pulse signal sent by the power end of the synchronous rectification chip is reduced from the first threshold value to the second threshold value or not, and whether the driving pulse signal is abnormal or not can be accurately detected when the light load function of the synchronous rectification chip is closed, so that the situation that a switching tube controlled by the synchronous rectification chip is started by mistake is avoided.
The following describes in detail how to judge whether the driving pulse signal is abnormal according to the first detection result and the second detection result when the light load function is turned off.
When the light load function is turned off, step 03 includes: when the first detection result is that the light load function is closed, and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time after the light load function is closed, judging that the driving pulse signal is abnormal.
Referring to fig. 4, when the light load function is turned off, the determining module 13 is configured to determine whether the driving pulse signal is abnormal according to the first detection result and the second detection result, including: when the first detection result is that the light load function is closed, and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time after the light load function is closed, judging that the driving pulse signal is abnormal.
As can be appreciated, in the related art, when the light load function is turned off, detection of a normal driving pulse signal and an abnormal ringing signal is not accurate enough, and it cannot be determined whether the VD signal indicates the VG on signal or the VG off signal. When the light load function is turned off, the amplitude of the ringing signal VD is increased, and the starting condition of the VG signal is reached with a high probability, i.e. the slope of the VD signal from the first threshold to the second threshold meets the preset condition, thereby causing the VG pin to be started by mistake. The false start of the VG pin can cause the output starting voltage Vo to cause power failure and restarting, so that a switching tube controlled by the synchronous rectification chip is damaged.
Referring to fig. 6, the duration corresponding to the pulse signal when the light load function is turned on is assumed to be T2, and T2 may be 200ms, for example. The preset time after the light load function is turned off is assumed to be T3, and T3 is smaller than the set value Tring. Through practical study, the set value Tring may be, for example, 5 times the sum of ton_min value and toff_min value, for example, when ton_min is 10ms and toff_min is 12ms, tring is 110ms, and T3 is less than 110ms.
And judging that the driving pulse signal is abnormal when the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time T3 after the light load function is closed. Wherein, in the time T3, the slope of the driving pulse signal decreasing from the first threshold value to the second threshold value satisfies the preset condition means that: in the time T3, the slope of the driving pulse signal falling from the first threshold value to the second threshold value is smaller than K1.
In detail, the present application detects the falling edge of the driving pulse signal after the light load function is turned off, and starts to time, as shown in fig. 6, when it is detected that the slope of the driving pulse signal falling from the first threshold to the second threshold in the time T3 is smaller than the set value Tring meets the preset condition, it is determined that the driving pulse signal is a ringing signal, and at this time, the VG pin is not turned on.
Therefore, the detection method can judge that the driving pulse signal is abnormal when the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time after the light load function is closed, so that the switching tube controlled by the synchronous rectification chip is prevented from being opened by mistake, and the switching tube on the side of the synchronous rectification chip is prevented from being damaged.
At this time, in the detection method of the present application, when the driving pulse signal is judged to be abnormal in the preset time after the light load function is turned off, the switching tube controlled by the synchronous rectification chip is controlled to be turned off. That is, in a preset time T3 after the light load function is turned off, when the driving pulse signal is judged to be abnormal, the switching tube controlled by the synchronous rectification chip is controlled to be turned off, so that the situation that the switching tube controlled by the VG pin at the side of the synchronous rectification chip is abnormally turned on when the VD signal is a ringing signal is avoided.
Therefore, the detection method can control the switching tube controlled by the synchronous rectification chip to be closed when judging that the driving pulse signal is abnormal in the preset time after the light load function is closed, and avoid the switching tube controlled by the synchronous rectification chip to be opened by mistake, so that the switching tube on the side of the synchronous rectification chip is damaged.
Further, step 03 further includes: and in the preset time after the light load function is closed, when the driving pulse signal is judged to be abnormal, the switching tube controlled by the synchronous rectification chip is controlled to be closed, and the duration of closing the switching tube controlled by the synchronous rectification chip is a preset duration.
Referring to fig. 4, the determining module 13 is configured to control the switching tube controlled by the synchronous rectification chip to be turned off when the driving pulse signal is determined to be abnormal within a preset time after the light load function is turned off, and the duration of the switching tube controlled by the synchronous rectification chip to be turned off is a predetermined duration.
Specifically, as shown in fig. 6, after the driving pulse signal is determined to be a ringing signal, the switching tube controlled by the synchronous rectification chip is controlled to be turned off, and the duration of the VG signal being turned off may be a predetermined time period T4. That is, after the driving pulse signal is determined to be a ringing signal, at least the duration of T4 is passed to again determine whether the VD signal is valid, and then the VG pin is turned on again.
T4 may be 0.5 times the effective VD signal period T5. As shown in fig. 6, the effective VD signal period T5 is an effective duration in which the VD signal is single-duration. It can be understood that the period T4 of the effective VD signal is 0.5 times of the period T5 of the effective VD signal, so that it can be ensured that the VG pin is turned off in the period T4 after the VD signal is determined to be a ringing signal and before the effective VD signal is started, and the situation that the switching tube controlled by the VG pin on the side of the synchronous rectification chip is abnormally turned on when the VD signal is a ringing signal can be effectively avoided.
Therefore, after the detection method judges that the driving pulse signal is an abnormal signal, the switching tube controlled by the synchronous rectification chip is controlled to be closed, the closing duration time is a preset duration time, namely, whether the driving pulse signal is effective is judged again after the preset duration time, and then the switching tube controlled by the synchronous rectification chip is started again, so that the situation that the switching tube is opened by mistake can be effectively avoided.
When the light load function is turned off, step 03 includes: when the first detection result is that the light load function is closed, and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is not satisfied with the preset condition within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
Referring to fig. 4, the determining module 13 is configured to determine that the driving pulse signal is normal when the first detection result is that the light load function is turned off and the second detection result is that the slope of the driving pulse signal from the first threshold to the second threshold does not satisfy the preset condition within the preset time after the light load function is turned off.
That is, in a preset time after the light load function is turned off, if it is detected that the slope of the driving pulse signal from the first threshold to the second threshold does not meet the preset condition, that is, the slope is greater than the K1 value, it can be determined that the driving pulse signal at this time is normal, so as to control the switching tube controlled by the synchronous rectification chip to be normally turned on.
Therefore, the detection method can accurately detect whether the driving pulse signal is normal after the light load function of the synchronous rectification chip is closed, and particularly can judge that the driving pulse signal is normal when the slope of the driving pulse signal from the first threshold value to the second threshold value does not meet the preset condition within the preset time after the light load function is closed, so as to control the switching tube controlled by the synchronous rectification chip to be opened, and avoid the situation that the switching tube controlled by the synchronous rectification chip is opened by mistake.
In certain embodiments, step 03 further comprises: when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal is not reduced from the first threshold value to the second threshold value within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
Referring to fig. 4, the determining module 13 is configured to: when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal is not reduced from the first threshold value to the second threshold value within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
That is, in a preset time after the light load function is turned off, if the driving pulse signal is detected not to be reduced from the first threshold value to the second threshold value, it may also be determined that the driving pulse signal at this time is normal, so as to control the switching tube controlled by the synchronous rectification chip to be normally turned on.
Therefore, in the detection method, when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal does not drop to the second threshold value from the first threshold value within the preset time after the light load function is closed, the driving pulse signal is judged to be normal, and then the switching tube controlled by the synchronous rectification chip is controlled to be opened, so that the driving pulse signal can be accurately judged to be a normal signal, and the situation that the switching tube controlled by the synchronous rectification chip is opened by mistake is avoided.
Referring to fig. 7, the present application further provides a detection circuit 100 applied to the synchronous rectification chip. The detection circuit 100 includes a light load detection module 110, a slope detection module 120, a logic processing module 130, a circuit control module 140, and a latch 150. The first input end 131 of the logic processing module 130 is connected to the output end 111 of the light load detection module 110, and the second input end 132 of the logic processing module 130 is connected to the output end 121 of the slope detection module 120. The first input 151 of the latch 150 is connected to the output 133 of the logic processing module 130, the second input 152 of the latch 150 is connected to the output 141 of the circuit control module 140, the output 153 of the latch 150 is connected to a driving unit in the synchronous rectification chip, and the driving unit is connected to a switching tube controlled by the synchronous rectification chip. Referring to fig. 2, the driving unit in the synchronous rectification chip is the driving circuit (Driver) in fig. 2.
The light load detection module 110 is configured to detect whether a light load function of the synchronous rectification chip is turned on, and output a first detection result. Referring to fig. 2, the slope detection module 120 is configured to detect whether a slope of a driving pulse signal sent by the power source terminal VD of the synchronous rectification chip falls from a first threshold to a second threshold satisfies a preset condition, and output a second detection result. The logic processing module 130 is configured to output a first detection result and a second detection result. The circuit control module 140 is configured to output a circuit control signal. The latch 150 is configured to determine whether the driving pulse signal is abnormal according to the first detection result and the second detection result, and control the switching tube controlled by the synchronous rectification chip to be turned off when the driving pulse signal is determined to be abnormal in a preset time after the light load function is turned off; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
Specifically, the first detection result and the second detection result and how to determine whether the driving pulse signal is abnormal according to the first detection result and the second detection result are described in the foregoing, and are not described herein again.
Therefore, the detection circuit 100 of the present application determines whether the driving pulse signal is abnormal by detecting whether the light load function of the synchronous rectification chip is turned on and detecting whether the slope of the driving pulse signal from the first threshold to the second threshold is reduced to meet the preset condition, so as to accurately detect whether the driving pulse signal is abnormal when the light load function of the synchronous rectification chip is turned off, thereby avoiding the error turn-on of the switching tube controlled by the synchronous rectification chip.
In one embodiment, the latch 150 is configured to control the switching tube controlled by the synchronous rectification chip to be turned off according to the circuit control signal and the driving pulse signal output corresponding to the pulse modulation signal when the driving pulse signal is abnormal within the preset time after the light load function is turned off according to the first detection result and the second detection result. The first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal sent by the power end of the synchronous rectification chip when the driving pulse signal is reduced from the first threshold value to the second threshold value meets the preset condition within the preset time after the light load function is closed.
Specifically, the circuit control signal at this time is an off signal, and the corresponding pulse modulation signal PWM can be output according to the circuit control signal and the abnormal driving pulse signal to control the switching tube controlled by the synchronous rectification chip to be turned off.
In addition, the preset time after the light load function is turned off, the preset condition that the slope of the driving pulse signal is satisfied when the driving pulse signal is lowered from the first threshold to the second threshold, and the content of how to determine whether the driving pulse signal is abnormal are described in the foregoing, and are not repeated here.
Therefore, when the driving pulse signal is abnormal in the preset time after the light load function is closed, the detection circuit 100 can control the switching tube controlled by the synchronous rectification chip to be closed according to the corresponding pulse modulation signal output by the turn-off signal of the circuit control signal, so that the switching tube controlled by the synchronous rectification chip is prevented from being opened by mistake, and the switching tube on the side of the synchronous rectification chip is prevented from being damaged.
In another embodiment, the latch 150 is configured to determine that the driving pulse signal is normal within a preset time after the light load function is turned off according to the first detection result and the second detection result, and control the switching tube controlled by the synchronous rectification chip to be turned on according to the circuit control signal and the driving pulse signal output corresponding pulse modulation signal. The first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is not satisfied with the preset condition within the preset time after the light load function is closed.
Specifically, the circuit control signal is an on signal at this time, and the corresponding pulse modulation signal PWM can be output according to the circuit control signal and the abnormal driving pulse signal to control the switching tube controlled by the synchronous rectification chip to be normally turned on.
In addition, the preset conditions that the first threshold, the second threshold and the slope of the preset time driving pulse signal after the light load function is turned off are all as described above, and are not described herein again.
In this way, the detection circuit 100 of the present application may detect that the first detection result is that the light load function is turned off, and the second detection result is that when the slope of the driving pulse signal from the first threshold value to the second threshold value falls within the preset time after the light load function is turned off, and does not meet the preset condition, it is determined that the driving pulse signal is normal, and the switching tube controlled by the synchronous rectification chip is turned on according to the circuit control signal and the pulse modulation signal corresponding to the driving pulse signal output, so as to ensure the normal turn-on of the switching tube controlled by the synchronous rectification chip.
In addition, the latch 150 is further configured to determine that the driving pulse signal is normal within a preset time after the light load function is turned off according to the first detection result and the second detection result, and control the switching tube controlled by the synchronous rectification chip to be turned on according to the circuit control signal and the driving pulse signal output corresponding pulse modulation signal. The first detection result is that the light load function is closed; the second detection result is that the driving pulse signal does not drop from the first threshold value to the second threshold value within the preset time after the light load function is closed.
Specifically, the circuit control signal is an on signal at this time, and the corresponding pulse modulation signal PWM can be output according to the circuit control signal and the abnormal driving pulse signal to control the switching tube controlled by the synchronous rectification chip to be normally turned on.
In addition, the preset conditions that the first threshold, the second threshold and the slope of the preset time driving pulse signal after the light load function is turned off are all as described above, and are not described herein again.
In this way, the detection circuit 100 of the present application may detect that the first detection result is that the light load function is turned off, and the second detection result is that when the driving pulse signal does not drop from the first threshold to the second threshold in a preset time after the light load function is turned off, it is judged that the driving pulse signal is normal, and the switching tube controlled by the synchronous rectification chip is turned on according to the circuit control signal and the pulse modulation signal corresponding to the driving pulse signal output, so as to ensure that the switching tube of the synchronous rectification chip is normally turned on.
In addition, referring to fig. 8, the present application further provides a synchronous rectification chip 1000. The synchronous rectification chip 1000 includes the detection circuit 100 according to any one of the above embodiments. The synchronous rectification chip 1000 further comprises a logic control unit 200 and a driving unit 300, the logic control unit 200 comprises a detection circuit 100, the detection circuit 100 is connected with the driving unit 300, and the driving unit 300 drives the switching tube M1 controlled by the synchronous rectification chip to be closed and opened according to a pulse modulation signal PWM sent by the detection circuit 100.
Specifically, the structure of the detection circuit 100 is as described above, and will not be described here again.
It should be noted that, the detection circuit 100 of the present application is disposed in the logic control unit 200 to output the pulse modulation signal PWM to the driving unit 300, so as to drive the switching tube M1 controlled by the synchronous rectification chip 1000 to be turned off and on. In fig. 8, the synchronous rectification chip 1000 further includes a power supply unit 400, an under-voltage protection unit 500, and a detection on state unit 600.
The logic control unit 200 is configured to detect the output of the on state unit 600 through the under-voltage protection unit 500, perform logic processing, and then control the driving unit 300.
The driving circuit 300 is used for controlling the switching state of the switching tube M1 and switching the substrate, and protecting the switching tube M1.
The undervoltage protection unit 500 is used to detect whether the chip power supply is at a rated value.
The detection on state unit 600 is used for detecting the on state of the external switching tube.
In this way, the synchronous rectification chip 1000 of the present application detects whether the light load function of the synchronous rectification chip 1000 is turned on or not and detects the driving of the power supply terminal of the synchronous rectification chip by providing the detection circuit 1005 in the logic control unit 200
Whether the slope of the pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition or not judges whether the driving pulse signal is abnormal or not, and can accurately detect whether the driving pulse signal is abnormal or not when the light-load function of the synchronous rectification chip 1000 is closed, so that the situation that the switching tube M1 controlled by the synchronous rectification chip 1000 is opened by mistake is avoided.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application by 0. It should be noted that, for a person of ordinary skill in the art,
several variations and modifications may be made without departing from the spirit of the present application, which are all within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (10)

1. The detection method is applied to the synchronous rectification chip and is characterized by comprising the following steps of:
detecting whether a light load function of the synchronous rectification chip is started or not to obtain a first detection result;
detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip from a first threshold value to a second threshold value meets a preset condition or not to obtain a second detection result;
judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result;
when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed, the switching tube controlled by the synchronous rectification chip is controlled to be closed;
and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
2. The detection method according to claim 1, wherein the judging whether the driving pulse signal is abnormal or not based on the first detection result and the second detection result includes:
and when the first detection result is that the light load function is closed and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced to meet the preset condition within the preset time after the light load function is closed, judging that the driving pulse signal is abnormal.
3. The detection method according to claim 2, wherein the judging whether the driving pulse signal is abnormal based on the first detection result and the second detection result includes:
and in the preset time after the light load function is closed, when the driving pulse signal is judged to be abnormal, the switching tube controlled by the synchronous rectification chip is controlled to be closed, and the duration of closing the switching tube controlled by the synchronous rectification chip is a preset time.
4. The detection method according to claim 1, wherein the judging whether the driving pulse signal is abnormal or not based on the first detection result and the second detection result includes:
and when the first detection result is that the light load function is closed and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is reduced within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
5. The detection method according to claim 1, wherein the judging whether the driving pulse signal is abnormal or not based on the first detection result and the second detection result includes:
And when the first detection result is that the light load function is closed and the second detection result is that the driving pulse signal is not reduced from the first threshold value to the second threshold value within the preset time after the light load function is closed, judging that the driving pulse signal is normal.
6. A detection circuit for use with a synchronous rectification chip, the detection circuit comprising: the device comprises a light load detection module, a slope detection module, a logic processing module, a circuit control module and a latch; the first input end of the logic processing module is connected with the output end of the light load detection module, and the second input end of the logic processing module is connected with the output end of the slope detection module; the first input end of the latch is connected with the output end of the logic processing module, the second input end of the latch is connected with the output end of the circuit control module, the output end of the latch is connected with a driving unit in the synchronous rectification chip, and the driving unit is connected with a switching tube controlled by the synchronous rectification chip;
the light load detection module is used for detecting whether a light load function of the synchronous rectification chip is started or not and outputting a first detection result;
The slope detection module is used for detecting whether the slope of a driving pulse signal sent by a power end of the synchronous rectification chip falls from a first threshold value to a second threshold value or not meets a preset condition and outputting a second detection result;
the logic processing module is used for outputting the first detection result and the second detection result;
the circuit control module is used for outputting a circuit control signal;
the latch is used for judging whether the driving pulse signal is abnormal according to the first detection result and the second detection result, and controlling a switching tube controlled by the synchronous rectification chip to be closed when the driving pulse signal is abnormal in a preset time after the light load function is closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
7. The detection circuit according to claim 6, wherein the latch is configured to control the switching tube controlled by the synchronous rectification chip to be turned off according to the circuit control signal and the driving pulse signal when the driving pulse signal is abnormal within a preset time after the light load function is turned off according to the first detection result and the second detection result;
The first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal sent by the power end of the synchronous rectification chip when the driving pulse signal is reduced from the first threshold value to the second threshold value meets the preset condition within the preset time after the light load function is closed.
8. The detection circuit according to claim 6, wherein the latch is configured to determine that the driving pulse signal is normal within a preset time after the light load function is turned off according to the first detection result and the second detection result, and output a corresponding pulse modulation signal according to the circuit control signal and the driving pulse signal to control the switching tube controlled by the synchronous rectification chip to be turned on;
the first detection result is that the light load function is closed; and the second detection result is that the slope of the driving pulse signal from the first threshold value to the second threshold value is not satisfied with a preset condition within a preset time after the light load function is closed.
9. A detection device applied to a synchronous rectification chip, comprising:
the first detection module is used for detecting whether the light load function of the synchronous rectification chip is started or not to obtain a first detection result;
The second detection module is used for detecting whether the slope of a driving pulse signal sent by the power end of the synchronous rectification chip, which is from the first threshold value to the second threshold value, meets the preset condition or not, and obtaining a second detection result;
the judging module is used for judging whether the driving pulse signal is abnormal or not according to the first detection result and the second detection result;
the control module is used for controlling the switching tube controlled by the synchronous rectification chip to be closed when the driving pulse signal is judged to be abnormal in the preset time after the light load function is closed; and in the preset time after the light load function is closed, when the driving pulse signal is judged to be normal, the switching tube controlled by the synchronous rectification chip is controlled to be opened.
10. The synchronous rectification chip is characterized by comprising the detection circuit as claimed in any one of claims 6 to 8, and further comprising a logic control unit and a driving unit, wherein the logic control unit comprises the detection circuit, the detection circuit is connected with the driving unit, and the driving unit drives a switching tube controlled by the synchronous rectification chip to be turned off and turned on according to a pulse modulation signal sent by the detection circuit.
CN202211699950.9A 2022-12-28 2022-12-28 Detection method, detection circuit and synchronous rectification chip Pending CN116232035A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211699950.9A CN116232035A (en) 2022-12-28 2022-12-28 Detection method, detection circuit and synchronous rectification chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211699950.9A CN116232035A (en) 2022-12-28 2022-12-28 Detection method, detection circuit and synchronous rectification chip

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Publication Number Publication Date
CN116232035A true CN116232035A (en) 2023-06-06

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