CN116225783A - Data processing method and device and electronic equipment - Google Patents

Data processing method and device and electronic equipment Download PDF

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Publication number
CN116225783A
CN116225783A CN202310143840.2A CN202310143840A CN116225783A CN 116225783 A CN116225783 A CN 116225783A CN 202310143840 A CN202310143840 A CN 202310143840A CN 116225783 A CN116225783 A CN 116225783A
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China
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physical address
memory
error event
persistent
error source
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刘志君
金淑君
聂鑫杰
刘福周
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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Priority to CN202310143840.2A priority Critical patent/CN116225783A/en
Publication of CN116225783A publication Critical patent/CN116225783A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/327Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for interrupts
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The application provides a data processing method, which comprises the following steps: in response to detecting that a persistent error event occurs in a mirror memory in the running process of a system, acquiring a physical address corresponding to the persistent error event through an interrupt program of system firmware; storing the physical address in a hardware error source table of the system firmware; and sending an interrupt signal to the system so that the system breaks the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remaps the virtual address. Meanwhile, the application also provides a data processing device and electronic equipment.

Description

Data processing method and device and electronic equipment
Technical Field
The present disclosure relates to data processing technologies, and in particular, to a data processing method, a data processing device, and an electronic device.
Background
In the case of a persistent error event in the primary memory channel of the mirror memory, the primary memory channel of the mirror memory is typically unbindd from the secondary memory channel of the mirror memory, so that although the system will not crash when accessing the memory data, the performance of the system will be affected because of the lack of the memory mirror function.
Disclosure of Invention
In view of this, the embodiments of the present application expect to provide a data processing method, apparatus, and electronic device.
In order to achieve the above purpose, the technical scheme of the application is realized as follows:
according to an aspect of the present application, there is provided a data processing method, including:
in response to detecting that a persistent error event occurs in a mirror memory in the running process of a system, acquiring a physical address corresponding to the persistent error event through an interrupt program of system firmware;
storing the physical address in a hardware error source table of the system firmware;
and sending an interrupt signal to the system so that the system breaks the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remaps the virtual address.
In the above solution, before the responding to the detection of the persistent error event occurring in the mirror memory during the system operation, the method further includes:
creating, by the system firmware, a generic hardware error source structure in the hardware error source table prior to booting the system; the general hardware error source structure is used for storing a physical address corresponding to the persistent error event.
In the above solution, the obtaining, by the interrupt program of the system firmware, the physical address corresponding to the persistent error event includes:
and acquiring a physical address corresponding to the persistent error event from a main processor of the system through an interrupt program of system firmware.
In the above scheme, the detecting that the mirror memory has a persistent error event in the running process of the system includes:
if an error event exists in a main memory channel of the mirror memory in the running process of the system, acquiring target data corresponding to the error event from a slave memory channel of the mirror memory; the slave memory channel and the master memory channel have the same stored data;
determining the occurrence times of the error event after the target data are written into the main memory channel;
and if the occurrence times are greater than a time threshold, determining that the error event is a persistent error event.
According to another aspect of the present application, there is provided a data processing method, including:
receiving an interrupt signal sent by an interrupt program of system firmware in the running process of the system;
acquiring a physical address of a mirror image memory from a hardware error source table of the system firmware based on the interrupt signal, wherein the physical address represents a current occurrence of a persistent error event;
and disconnecting the mapping relation between the physical address and the virtual address, and remapping the virtual address.
In the above solution, the hardware error source table at least includes a general hardware error source structure, and the obtaining, based on the interrupt signal, a physical address of a mirror memory from the hardware error source table of the system firmware includes:
and acquiring the physical address of the mirror memory from the universal hardware error source structure based on the interrupt signal, wherein the universal hardware error source structure is created by the system firmware before booting the system.
According to a third aspect of the present application, there is provided an electronic device comprising:
the system firmware is used for storing a physical address corresponding to a persistent error event in a general hardware error source structure through an interrupt program of the system firmware if the persistent error event is detected to occur in a mirror memory in the running process of the system; and for sending an interrupt signal to the system through an interrupt program of the system firmware;
the system is used for receiving the interrupt signal in the running process of the system, and acquiring the physical address from the general hardware error source structure based on the interrupt signal; and the method is used for disconnecting the mapping relation between the physical address and the virtual address and remapping the virtual address.
In the above solution, the system firmware is further configured to create the generic hardware error source structure in a hardware error source table before booting the system.
According to a fourth aspect of the present application, there is provided a data processing apparatus comprising:
the creation unit is used for creating a general hardware error source structure in the hardware error source table through the system firmware before the boot system is started; the general hardware error source structure is used for storing a physical address corresponding to a persistent error event which occurs in the mirror memory currently;
the acquisition unit is used for responding to the fact that the mirror memory generates the persistent error event in the running process of the system, and acquiring a physical address corresponding to the persistent error event through an interrupt program of the system firmware;
a storage unit configured to store the physical address in a generic hardware error source structure of the system firmware;
and the sending unit is used for sending an interrupt signal to the system so that the system can disconnect the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remap the virtual address.
According to a fifth aspect of the present application, there is provided a data processing apparatus comprising:
the receiving unit is used for receiving an interrupt signal sent by an interrupt program of the system firmware in the running process of the system;
the acquisition unit is used for acquiring the physical address of the mirror image memory from a hardware error source table of the system firmware based on the interrupt signal, wherein the physical address represents the current occurrence of a persistent error event;
and the processing unit is used for disconnecting the mapping relation between the physical address and the virtual address and remapping the virtual address.
According to the data processing method, the data processing device and the electronic equipment, when a persistent error event occurs in the mirror memory, a physical address corresponding to the persistent error event is stored in a hardware error source table of the system firmware through an interrupt program of the system firmware; and sending an interrupt signal to the system so that the system breaks the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remaps the virtual address. Therefore, the system can unbind the physical address and the virtual address of the current mirror memory, which have the persistent error event, and the mirror function of the mirror memory still exists, so that the system cannot be down when accessing the mirror memory, and the performance of the system cannot be influenced.
Drawings
FIG. 1 is a schematic diagram of a flow implementation of a data processing method in the present application;
FIG. 2 is a schematic diagram II of a flow implementation of a data processing method in the present application;
FIG. 3 is a schematic diagram III of a flow implementation of a data processing method in the present application;
FIG. 4 is a schematic diagram of the structural composition of the electronic device in the present application;
FIG. 5 is a schematic diagram showing the structure of a data processing apparatus according to the present application;
FIG. 6 is a schematic diagram showing a second structural configuration of the data processing apparatus according to the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure. Embodiments and features of embodiments in this application may be combined with each other arbitrarily without conflict. The steps illustrated in the flowchart of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, while a logical order is depicted in the flowchart, in some cases, the steps depicted or described may be performed in a different order than presented herein.
The technical scheme of the application is further elaborated below with reference to the drawings in the specification and the specific embodiments.
Fig. 1 is a schematic diagram of a flow implementation of a data processing method in the present application, where the method may be applied to various electronic devices, such as a mobile phone, a computer, a watch, a television, a data processing device, a medical device, a tablet device, and so on. And is particularly applicable to system firmware of the electronic device. As shown in fig. 1, the method includes:
step 101, in response to detecting that a persistent error event occurs in a mirror memory in the running process of a system, acquiring a physical address corresponding to the persistent error event through an interrupt program of system firmware;
in the application, the electronic device can detect whether an error event exists in a main memory channel of the mirror memory in the running process of the system, and if the error event exists in the main memory channel of the mirror memory, the electronic device acquires target data corresponding to the error event from a slave memory channel of the mirror memory; the slave memory channel and the master memory channel have the same stored data; then, the occurrence times of the error event are determined after the target data are written into the main memory channel; and comparing the occurrence times with a data threshold value to obtain a comparison result. If the comparison result indicates that the occurrence times are larger than the time threshold, determining that the error event is a persistent error event, and acquiring a physical address corresponding to the persistent error event through an interrupt program of system firmware.
In one implementation, the electronic device may obtain, from a host processor of the system, a physical address corresponding to the persistent error event through an interrupt program of system firmware. The interrupt routine of the system firmware may refer to a system management interrupt (SMI, system Management Interrupt) of the unified extensible firmware interface (UEFI, unified Extensible Firmware Interface).
At this time, the system may be different according to the type of the device, such as an operating system of a computer, an operating system of a mobile phone, and the like.
Step 102, storing the physical address in a hardware error source table of the system firmware;
in this application, the electronic device may create a specific generic hardware error source structure in the hardware error source table (HEST, hardware Error Source Table) by the system firmware before booting the system; the specific general hardware error source structure is used for storing a physical address corresponding to the persistent error event. After the electronic device obtains the physical address corresponding to the persistent error event through the interrupt program of the system firmware, the physical address may be stored in the generic hardware error source structure.
Here, this particular generic hardware error source structure may be referred to as GHESS.
And step 103, sending an interrupt signal to the system so that the system can disconnect the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remap the virtual address.
Here, taking an example that the system of the electronic device may operate in an OS environment, the electronic device may send an interrupt signal to the system using a system control interrupt (SCI, system Control Interrupt) method to trigger an OS interrupt. At this time, the system may unbind the mapping relationship between the physical address and the virtual address in the hardware error source table, and remap the virtual object.
According to the data processing method, when the persistent error event exists in the mirror memory, only the physical address and the virtual object of the persistent error event are unbinding, and the mirror function of the mirror memory still works, so that the correction of other short uncorrectable errors or persistent uncorrectable errors can be facilitated, and as no operating system or application program accesses the persistent memory, the memory controller is not required to attempt to correct the persistent error, and therefore the performance of the system is not affected.
Fig. 2 is a second flow chart of a data processing method in the present application, where the method may be applied to the electronic device, and in particular, may be applied to a system in the electronic device. As shown in fig. 2, the method comprises the steps of:
step 201, receiving an interrupt signal sent by an interrupt program of system firmware in a system running process;
step 202, acquiring a physical address of a mirror image memory from a hardware error source table of the system firmware based on the interrupt signal, wherein the physical address represents a current occurrence of a persistent error event;
and 203, disconnecting the mapping relation between the physical address and the virtual address, and remapping the virtual address.
Here, the Hardware Error Source Table (HEST) includes at least a Generic Hardware Error Source Structure (GHESS), and when the electronic device obtains the physical address of the image memory from the hardware error source table of the system firmware based on the interrupt signal, the electronic device may obtain the physical address of the image memory from the generic hardware error source structure based on the interrupt signal, where the generic hardware error source structure is created by the system firmware before booting the system.
Here, the electronic device breaking the mapping relationship between the physical address and the virtual address refers to unbinding the mapping relationship between the physical address and the virtual address.
It should be noted that: the data processing method provided in the foregoing embodiment corresponds to the system side of the embodiment of the data processing method provided in fig. 1, and belongs to the same concept as the embodiment provided in fig. 1, and the specific implementation process may refer to the method embodiment of fig. 1, which is not repeated herein.
Fig. 3 is a flow chart III of a data processing method in the present application, as shown in fig. 3, the method includes:
step 301, powering up a system;
step 302, initializing an SMI module by a UEFI module;
here, some processes before the initialization of the memory by the UEFI module is completed, for example, may be further included between the step 302 and the step 301, and thus, a related description is omitted herein because these processes are conventional processes initiated by a computer.
Step 303, the uefi module initializes APCI GHESS in the list of list;
in step 304, the uefi module boots the operating system.
Here, some processes after the UEFI module successfully initializes the memory may be included between the step 304 and the step 303, and thus, a related description is omitted herein because these processes are conventional processes initiated by the computer.
Here, after the operating system is successfully booted, the method further includes:
step 305, detecting that a persistent error event occurs in the mirror memory in the running process of the system, and acquiring a physical address of the persistent error event through an SMI module;
step 306, storing, by the SMI module, the physical address of the persistent error event in a GHESS table;
step 307, triggering an operating system interrupt by the SMI module by using the SCI mode;
here, the specific SMI module sends an interrupt signal to the background interrupt program of the OS to inform the OS that there is a memory error currently. And then jumping from the OS background program to the OS foreground program.
In step 308, the operating system and the application program under the operating system disconnect the mapping relationship between the physical address and the virtual address in the GHESS table according to the interrupt signal.
After receiving the interrupt signal, the OS jumps to the OS background program from the OS foreground program, processes the interrupt signal, and jumps to the OS foreground program from the OS background program to continue running after the interrupt signal is processed.
When there is a persistent error event in the mirror memory, the operating system only disconnects the mapping relation between the physical address and the virtual address of the persistent error event, so that the image function of the mirror memory is not affected, that is, the mirror function of the mirror memory can be continuously used after the persistent error event is interrupted, and the user side only performs fault transfer on the persistent error event in the mirror memory.
The embodiment of the application also provides electronic equipment, which comprises: a processor and a memory for storing a computer program capable of running on the processor,
wherein the processor is configured to execute any of the method steps of the above-described processing method when the computer program is run.
Fig. 4 is a schematic structural diagram of an electronic device in the present application, and as shown in fig. 4, the electronic device 400 may be a mobile phone, a computer, a digital broadcasting terminal, an information transceiver, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, and the like.
The electronic device 400 includes: at least one processor 401, memory 402, at least one network interface 404, a user interface 403, and a system firmware interface 404. The various components in electronic device 400 are coupled together by bus system 405. It is understood that the bus system 405 is used to enable connected communications between these components. The bus system 405 includes a power bus, a control bus, and a status signal bus in addition to a data bus. But for clarity of illustration the various buses are labeled as bus system 405 in fig. 4.
The user interface 403 may include, among other things, a display, keyboard, mouse, trackball, click wheel, keys, buttons, touch pad, or touch screen, etc.
It is to be appreciated that memory 402 can be either volatile memory or nonvolatile memory, and can include both volatile and nonvolatile memory. Wherein the nonvolatile Memory may be Read Only Memory (ROM), programmable Read Only Memory (PROM, programmable Read-Only Memory), erasable programmable Read Only Memory (EPROM, erasable Programmable Read-Only Memory), electrically erasable programmable Read Only Memory (EEPROM, electrically Erasable Programmable Read-Only Memory), magnetic random access Memory (FRAM, ferromagnetic random access Memory), flash Memory (Flash Memory), magnetic surface Memory, optical disk, or compact disk Read Only Memory (CD-ROM, compact Disc Read-Only Memory); the magnetic surface memory may be a disk memory or a tape memory. The volatile memory may be random access memory (RAM, random Access Memory), which acts as external cache memory. By way of example, and not limitation, many forms of RAM are available, such as static random access memory (SRAM, static Random Access Memory), synchronous static random access memory (SSRAM, synchronous Static Random Access Memory), dynamic random access memory (DRAM, dynamic Random Access Memory), synchronous dynamic random access memory (SDRAM, synchronous Dynamic Random Access Memory), double data rate synchronous dynamic random access memory (ddr SDRAM, double Data Rate Synchronous Dynamic Random Access Memory), enhanced synchronous dynamic random access memory (ESDRAM, enhanced Synchronous Dynamic Random Access Memory), synchronous link dynamic random access memory (SLDRAM, syncLink Dynamic Random Access Memory), direct memory bus random access memory (DRRAM, direct Rambus Random Access Memory). The memory 402 described in embodiments of the present application is intended to comprise, without being limited to, these and any other suitable types of memory.
The memory 402 in the present embodiment is used to store various types of data to support the operation of the electronic device 400. Examples of such data include: any computer programs for operation on electronic device 400, such as operating system 4021 and application programs 4022; contact data; telephone book data; a message; a picture; audio, etc. The operating system 8021 contains various system programs, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application programs 4022 may include various application programs such as a Media Player (Media Player), a Browser (Browser), and the like for implementing various application services. A program for implementing the method of the embodiment of the present application may be included in the application program 4022.
The system firmware interface 404 is configured to store, in a general hardware error source structure, a physical address corresponding to a persistent error event by an interrupt program of the system firmware interface 404 if the persistent error event is detected to occur in the mirror memory during the running process of the operating system 4021; and an interrupt signal to the operating system 4021 through an interrupt program of the system firmware interface 404; an operating system 4021, configured to receive the interrupt signal during the operation of the operating system 4021 or the application program 4022, and acquire the physical address from the generic hardware error source structure based on the interrupt signal; and the method is used for disconnecting the mapping relation between the physical address and the virtual address and remapping the virtual address.
In a preferred embodiment, the system firmware interface 404 is further configured to create a specific generic hardware error source structure in a hardware error source table before booting the operating system 4021.
The method disclosed in the embodiments of the present application may be applied to the processor 401 or implemented by the processor 401. The processor 401 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in the processor 401 or by instructions in the form of software. The processor 401 described above may be a general purpose processor, a digital signal processor (DSP, digital Signal Processor), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. The processor 401 may implement or perform the methods, steps, and logic blocks disclosed in the embodiments of the present application. The general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in the embodiments of the present application may be directly embodied in a hardware decoding processor or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium located in the memory 402, the processor 401 reading information in the memory 402, in combination with its hardware performing the steps of the method described above.
In an exemplary embodiment, the electronic device 400 may be implemented by one or more application specific integrated circuits (ASIC, application Specific Integrated Circuit), DSPs, programmable logic devices (PLD, programmable Logic Device), complex programmable logic devices (CPLD, complex Programmable Logic Device), field-programmable gate arrays (FPGA, field-Programmable Gate Array), general purpose processors, controllers, microcontrollers (MCU, micro Controller Unit), microprocessors (Microprocessor), or other electronic components for performing the aforementioned methods.
In an exemplary embodiment, the present application also provides a computer readable storage medium, such as memory 402, comprising a computer program executable by processor 801 of electronic device 400 to perform the steps of the aforementioned methods. The computer readable storage medium may be FRAM, ROM, PROM, EPROM, EEPROM, flash Memory, magnetic surface Memory, optical disk, or CD-ROM; but may be a variety of devices including one or any combination of the above-described memories, such as a mobile phone, computer, tablet device, personal digital assistant, or the like.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs any of the method steps of the above-described processing method.
It should be noted that: the electronic device provided in the foregoing embodiment belongs to the same concept as the processing method embodiment provided in fig. 1 and fig. 2, and detailed implementation processes of the electronic device are detailed in the method embodiment, which is not repeated herein.
FIG. 5 is a schematic diagram showing the structural components of a data processing apparatus according to the present application, as shown in FIG. 5, the apparatus includes:
a creation unit 501, configured to create, by the system firmware, a generic hardware error source structure in a hardware error source table before booting the system; the general hardware error source structure is used for storing a physical address corresponding to a persistent error event which occurs in the mirror memory currently;
an obtaining unit 502, configured to obtain, by using an interrupt program of system firmware, a physical address corresponding to the persistent error event in response to detecting that the persistent error event occurs in the mirror memory during a system operation process;
a storage unit 503, configured to store the physical address in a generic hardware error source structure of the system firmware;
and a sending unit 504, configured to send an interrupt signal to the system, so that the system disconnects the mapping relationship between the physical address and the virtual address in the hardware error source table according to the interrupt signal, and remaps the virtual address.
In a preferred embodiment, the creating unit 501 is further configured to create, by the system firmware, a generic hardware error source structure in the hardware error source table before booting the system; the general hardware error source structure is used for storing a physical address corresponding to the persistent error event.
In a preferred embodiment, the obtaining unit 502 is specifically configured to obtain, from the main processor of the system, a physical address corresponding to the persistent error event through an interrupt program of the system firmware.
In a preferred embodiment, the electronic device further includes: a determination unit 505;
specifically, the obtaining unit 502 is specifically configured to obtain, in a system running process, target data corresponding to an error event from a slave memory channel of the mirror memory if the error event is detected to exist in a master memory channel of the mirror memory; the slave memory channel and the master memory channel have the same stored data;
a determining unit 505, configured to determine the occurrence number of the error event after writing the target data into the main memory channel; and determining that the error event is a persistent error event if the number of occurrences is greater than a number threshold.
It should be noted that: in the data processing apparatus provided in the above embodiment, only the division of each program module is used for illustration, and in practical application, the processing allocation may be performed by different program modules according to needs, that is, the internal structure of the apparatus is divided into different program modules, so as to complete all or part of the processing described above. In addition, the data processing apparatus provided in the foregoing embodiment belongs to the same concept as the processing method embodiment provided in fig. 1, and detailed implementation processes of the data processing apparatus are detailed in the method embodiment, which is not repeated herein.
FIG. 6 is a schematic diagram II of the structure of the data processing apparatus in the present application, as shown in FIG. 6, the apparatus includes:
a receiving unit 601, configured to receive an interrupt signal sent by an interrupt program of system firmware during a system operation process;
an obtaining unit 602, configured to obtain, based on the interrupt signal, a physical address of a mirrored memory from a hardware error source table of the system firmware, where the physical address represents a persistent error event currently occurring;
the processing unit 603 is configured to break the mapping relationship between the physical address and the virtual address, and remap the virtual address.
It should be noted that: in the data processing apparatus provided in the above embodiment, only the division of each program module is used for illustration, and in practical application, the processing allocation may be performed by different program modules according to needs, that is, the internal structure of the apparatus is divided into different program modules, so as to complete all or part of the processing described above. In addition, the data processing apparatus provided in the foregoing embodiment belongs to the same concept as the processing method embodiment provided in fig. 2, and detailed implementation processes of the data processing apparatus are detailed in the method embodiment, which is not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above described device embodiments are only illustrative, e.g. the division of the units is only one logical function division, and there may be other divisions in practice, such as: multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. In addition, the various components shown or discussed may be coupled or directly coupled or communicatively coupled to each other via some interface, whether indirectly coupled or communicatively coupled to devices or units, whether electrically, mechanically, or otherwise.
The units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units; some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The methods disclosed in the several method embodiments provided in the present application may be arbitrarily combined without collision to obtain a new method embodiment.
The features disclosed in the several product embodiments provided in the present application may be combined arbitrarily without conflict to obtain new product embodiments.
The features disclosed in the several method or apparatus embodiments provided in the present application may be arbitrarily combined without conflict to obtain new method embodiments or apparatus embodiments.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A data processing method, comprising:
in response to detecting that a persistent error event occurs in a mirror memory in the running process of a system, acquiring a physical address corresponding to the persistent error event through an interrupt program of system firmware;
storing the physical address in a hardware error source table of the system firmware;
and sending an interrupt signal to the system so that the system breaks the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remaps the virtual address.
2. The method of claim 1, wherein prior to the responding to detecting a persistent error event in mirrored memory during system operation, the method further comprises:
creating, by the system firmware, a generic hardware error source structure in the hardware error source table prior to booting the system; the general hardware error source structure is used for storing a physical address corresponding to the persistent error event.
3. The method of claim 1, wherein the obtaining, by the interrupt program of the system firmware, the physical address corresponding to the persistent error event comprises:
and acquiring a physical address corresponding to the persistent error event from a main processor of the system through an interrupt program of system firmware.
4. The method of claim 1, wherein detecting a persistent error event in the mirrored memory during system operation comprises:
if an error event exists in a main memory channel of the mirror memory in the running process of the system, acquiring target data corresponding to the error event from a slave memory channel of the mirror memory; the slave memory channel and the master memory channel have the same stored data;
determining the occurrence times of the error event after the target data are written into the main memory channel;
and if the occurrence times are greater than a time threshold, determining that the error event is a persistent error event.
5. A data processing method, comprising:
receiving an interrupt signal sent by an interrupt program of system firmware in the running process of the system;
acquiring a physical address of a mirror image memory from a hardware error source table of the system firmware based on the interrupt signal, wherein the physical address represents a current occurrence of a persistent error event;
and disconnecting the mapping relation between the physical address and the virtual address, and remapping the virtual address.
6. The method of claim 5, wherein the hardware error source table includes at least a generic hardware error source structure, and the obtaining the physical address of the mirrored memory from the hardware error source table of the system firmware based on the interrupt signal includes:
and acquiring the physical address of the mirror memory from the universal hardware error source structure based on the interrupt signal, wherein the universal hardware error source structure is created by the system firmware before booting the system.
7. An electronic device, comprising:
the system firmware is used for storing a physical address corresponding to a persistent error event in a general hardware error source structure through an interrupt program of the system firmware if the persistent error event is detected to occur in a mirror memory in the running process of the system; and for sending an interrupt signal to the system through an interrupt program of the system firmware;
the system is used for receiving the interrupt signal in the running process of the system, and acquiring the physical address from the general hardware error source structure based on the interrupt signal; and the method is used for disconnecting the mapping relation between the physical address and the virtual address and remapping the virtual address.
8. The electronic device of claim 7, wherein the system firmware is further to create the generic hardware error source structure in a hardware error source table prior to booting the system.
9. A data processing apparatus comprising:
the creation unit is used for creating a general hardware error source structure in the hardware error source table through the system firmware before the boot system is started; the general hardware error source structure is used for storing a physical address corresponding to a persistent error event which occurs in the mirror memory currently;
the acquisition unit is used for responding to the fact that the mirror memory generates the persistent error event in the running process of the system, and acquiring a physical address corresponding to the persistent error event through an interrupt program of the system firmware;
a storage unit configured to store the physical address in a generic hardware error source structure of the system firmware;
and the sending unit is used for sending an interrupt signal to the system so that the system can disconnect the mapping relation between the physical address and the virtual address in the hardware error source table according to the interrupt signal and remap the virtual address.
10. A data processing apparatus comprising:
the receiving unit is used for receiving an interrupt signal sent by an interrupt program of the system firmware in the running process of the system;
the acquisition unit is used for acquiring the physical address of the mirror image memory from a hardware error source table of the system firmware based on the interrupt signal, wherein the physical address represents the current occurrence of a persistent error event;
and the processing unit is used for disconnecting the mapping relation between the physical address and the virtual address and remapping the virtual address.
CN202310143840.2A 2023-02-17 2023-02-17 Data processing method and device and electronic equipment Pending CN116225783A (en)

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