CN116225372A - Uniformly distributed dithering pseudo-random number generation method, device and storage medium - Google Patents

Uniformly distributed dithering pseudo-random number generation method, device and storage medium Download PDF

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CN116225372A
CN116225372A CN202310180153.8A CN202310180153A CN116225372A CN 116225372 A CN116225372 A CN 116225372A CN 202310180153 A CN202310180153 A CN 202310180153A CN 116225372 A CN116225372 A CN 116225372A
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高青
唐贝贝
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Chengdu Cetc Xingtuo Technology Co ltd
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Abstract

The invention provides a uniformly distributed dithering pseudo-random number generation method, which comprises the steps of selecting N bit values from pseudo-random numbers generated by at least two PRBS structures, recombining the N bits into an N bit number, and establishing a lookup table according to the value range of the N bit number to realize the uniform distribution of the pseudo-random numbers required to be distributed; wherein, each N-bit value in the lookup table corresponds to a jitter output value. The invention utilizes a plurality of PRBS to generate pseudo random numbers, and regenerates the pseudo random numbers in a reorganization mode, thereby meeting the requirement of 0 mean value required by jitter and uniformly distributing the same positive and negative values.

Description

Uniformly distributed dithering pseudo-random number generation method, device and storage medium
Technical Field
The invention relates to the field of all-digital phase-locked loop circuits, in particular to a uniformly distributed dithering pseudo-random number generation method, equipment and a storage medium.
Background
In an all-digital phase-locked loop circuit (ADPLL), since the convergence of the TDC time and the phase conversion coefficient (KTDC value) requires calculation of the value and the phase error of the TDC output, when the ADPLL converges well, the value of the value and the phase error of the TDC output change little, providing little information, resulting in slow convergence of the value of KTDC and large value error of the convergence. After the TDC output jitter is increased by adding the jitter, the KTDC value can be converged to a more accurate value.
The traditional method for adding the jitter is to add 1 bit or 2 bits randomly, and the data is generally a pseudo random number generated by a register or a PRBS structure, but because the jitter needs to meet 0 mean value, the output same positive and negative values need to be uniformly distributed, and the like, the required pseudo random number cannot be generated by directly adopting the PRBS structure.
Disclosure of Invention
Aiming at the problems existing in the prior art, a method, equipment and a storage medium for generating uniformly distributed dithering pseudo random numbers are provided, and the uniformly distributed pseudo random numbers are realized through value combination in a plurality of PRBS structures.
The technical scheme adopted by the invention is as follows: in the pseudo random number generated by at least two PRBS structures, N bit values are selected, N bits are recombined into an N bit number, a lookup table is established according to the value range of the N bit number, and the uniform distribution of the pseudo random number required to be distributed is realized; wherein, each N-bit value in the lookup table corresponds to a jitter output value.
As a preferred option, when selecting the bit values, bit values with spaces in the PRBS structure are selected.
As a preferred embodiment, the lookup table supports seven jitter value distribution patterns of + -1, + -2, + -3, + -4, + -5, + -6, + -7.
As a preferred embodiment, the PRBS structure is selected as a PRBS23 structure and a PRBS31 structure, respectively.
As a preferred option, when selecting a bit value, two bit values are selected in the PRBS23 structure, and three bit values, 5bit values in total, are selected in the PRBS 31.
As a preferred embodiment, the PRBS23 structure is chosen from the 23 rd and 12 th bit values, namely PRBS23 (23) and PRBS23 (12).
As a preferred option, the 31 st, 12 th, 7 th bit values, i.e. PRBS31 (31), PRBS31 (12) and PRBS31 (7), are chosen from the PRBS31 structure.
As a preferable mode, the number of bits after combination is a value obtained by splicing PRBS23 (23), PRBS31 (31), PRBS23 (12), PRBS31 (12), and PRBS31 (7) in this order.
The invention also provides an electronic device which comprises a memory and a processor, wherein the memory stores a computer program which can be loaded by the processor and is used for executing the corresponding method for processing the Bubble fuzzy.
The invention also provides a computer readable storage medium, on which computer program instructions are stored, the program instructions, when executed by a processor, are used to implement the process corresponding to the above-mentioned Bubble fuzzy processing method.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows: the invention utilizes a plurality of PRBS to generate pseudo random numbers, and regenerates the pseudo random numbers in a reorganization mode, thereby meeting the requirement of 0 mean value required by jitter and uniformly distributing the same positive and negative values.
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FIG. 1 is a flowchart of a uniformly distributed dithering pseudo-random number generation method according to the present invention.
Fig. 2 is a schematic diagram of a PRBS23 used in one embodiment of the present invention.
Fig. 3 is a schematic diagram of the PRBS31 used in one embodiment of the present invention.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar modules or modules having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application. On the contrary, the embodiments of the present application include all alternatives, modifications, and equivalents as may be included within the spirit and scope of the appended claims.
Example 1
In order to accelerate the convergence speed and convergence precision of the KTDC value in the all-digital phase-locked loop circuit, the output jitter of the TDC is required to be increased by adding jitter, and the uniformly distributed pseudo-random numbers are difficult to directly generate by a conventional jitter adding mode.
As shown in fig. 1, in a uniformly distributed dithering pseudo-random number generation method, N bit values are selected from pseudo-random numbers generated by at least two PRBS structures, the N bits are recombined into an N bit number, and a lookup table is established in a value range of the N bit number, so that uniform distribution of the pseudo-random numbers to be distributed is realized; wherein, each N-bit value in the lookup table corresponds to a jitter output value.
Specifically, since the correlation between adjacent bit values in the PRBS structure is large, the randomness is affected, and thus when selecting a bit value, it is necessary to select a bit value having a certain interval in the PRBS structure, that is, a bit value far apart, to reduce the correlation.
In this embodiment, at least two types of PRBS structures mentioned may be selected from the conventional PRBS structures, and the PRBS23 structure and the PRBS31 structure are selected in this embodiment, and the specific structures may be seen in fig. 2 and 3. In practical applications, any number and type of PRBS structures may be selected as required, and the larger the number of PRBS structures is, the better the randomness is.
In this embodiment, 5bit values are selected, and the 23 rd and 12 th bit values, i.e., PRBS23 (23) and PRBS23 (12), are selected from the PRBS23 structure, and the 31 st, 12 th and 7 th bit values, i.e., PRBS31 (31), PRBS31 (12), and PRBS31 (7), are selected from the PRBS31 structure, respectively. In practical applications, the selection of the 5bit values is not limited, and other bit values may be selected as long as the low correlation is satisfied.
When 5bit values are combined, a combination mode for reducing the correlation of adjacent bits is selected, namely PRBS23 (23), PRBS31 (31), PRBS23 (12), PRBS31 (12) and PRBS31 (7) are spliced in sequence to form a value, and the expression range is 0-31. In practical application, different digits, such as 4 digits and 6 digits, can be selected, when the different digits are selected, the lookup table is reestablished according to the range value corresponding to the combination value of the different digits, so that the proportion of each output in the table is the proportion of the number in the random sequence generated finally.
Wherein the proportion of the randomly generated numbers is determined according to the proportion of the number of the counted values (namely jitter output) to the total bit number. For example, taking a 5bit table look-up as an example, and selecting mode 3, the jitter output 0 accounts for 4 numbers of 0, 1, 2 and 3 in the 5bit table, and the ratio of the jitter output 0 accounts for 4/32=12.5% of all the finally generated random numbers. For example, taking a 10-bit lookup table (the value range is 0-1024), wherein a certain jitter output accounts for 100 numbers of 0-99 in 10 bits, the output number accounts for 100/1024=9.77% in the finally generated random number, and the accuracy of the random number duty ratio can be obtained by increasing the bit number of the lookup table and replacing resources.
It should be noted that, when the lookup table is built, the duty ratio of each number is different according to different modes, but the core requirement needs to be met, that is, the output needs to realize symmetrical distribution and even distribution. The number of bits formed by PRBS is n, the PRBS outputs (2 n), 0 to (2 n) -1, here for example 5 bits, the combined PRBS outputs totally have 0 to 31 totally 32, and the distribution of each PRBS output value is 1/(2 n), here 1/32; then, any number of values can be selected, the required random values are correspondingly output through the lookup table, the values occupy a plurality of PRBS values, the distribution is 1/(2 n) multiplied by a plurality of values, the total of 0/1/2/3 is 4, the final output ratio is 4/32, and if 0/1/2/3/4/5 is 6, the final output ratio is 6/32. And according to the selected mode, completing the proportional distribution of all output values and completing the establishment of a lookup table.
In this embodiment, a lookup table supporting seven jitter value distribution modes including ±1, ±2, ±3, ±4, ±5, ±6 and±7 may be established by combining the values, and the lookup table in this embodiment is shown in table 1 below:
table 15 bit lookup table
Figure BDA0004102167450000041
The PRBS output values in the table correspond to the reorganized [ PRBS23 (23), PRBS31 (31), PRBS23 (12), PRBS31 (7) ]; the jitter distribution mode can be selected from 0-6, and corresponds to seven dither value distribution modes of +/-1, +/-2, +/-3, +/-4, +/-5, +/-6 and+/-7 respectively. It should be noted that, when the lookup table is built, the number of the digits 0-31 after the lookup table is counted up is more than thirty-two, namely, the ratio of the digits 0-31 is uniformly distributed, so that the lookup tables with different modes are designed according to the number.
Referring to table 1, it can be seen that when the jitter distribution pattern is 0 and the value distribution is ±1:
when PRBS output values are 0-15 and 16-31, jitter outputs are respectively-1 and +1.
When the jitter distribution mode is 1 and the value distribution is +/-2:
when PRBS output values are 0-7, 8-13, 14-19, 20-25, 26-31, the jitter outputs are respectively 0, -1, +1, -2, +2.
When the jitter distribution mode is 2 and the value distribution is + -3:
the PRBS output values are 0-1, +1, -2, +2, -3, +3, respectively, at 0-1, 2-6, 7-11, 12-16, 17-21, 22-26, 27-31.
When the jitter distribution mode is 3 and the value distribution is +/-4:
PRBS output values 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-29, 30-31 correspond to dither outputs 0, -1, +1, -2, +2, -3, +3, -4, +4, respectively.
When the jitter distribution mode is 4 and the value distribution is + -5:
PRBS output values of 0-1, 2-4, 5-7, 8-10, 11-13, 14-16, 17-19, 20-22, 23-25, 26-28, 29-31 correspond to dither outputs of 0, -1, +1, -2, +2, -3, +3, -4, +4, -5, +5, respectively.
When the jitter distribution mode is 5 and the value distribution is +/-6:
PRBS output values of 0-1, 2-4, 5-7, 8-10, 11-13, 14-16, 17-19, 20-21, 22-23, 24-25, 26-27, 28-29, 30-31 correspond to dither outputs of 0, -1, +1, -2, +2, -3, +3, -4, +4, -5, +5, -6, +6, respectively.
When the jitter distribution mode is 6 and the value distribution is + -7:
PRBS output values of 0-3, 4-5, 6-7, 8-9, 10-11, 12-13, 14-15, 16-17, 18-19, 20-21, 22-23, 24-25, 26-27, 28-29, 30-31 correspond to dither outputs of 0, -1, +1, -2, +2, -3, +3, -4, +4, -5, +5, -6, +6, -7, +7, respectively.
It should be noted that, when the pseudo random number generation mode provided in this embodiment is adopted, the mode selection may be selected through a register, that is, the software configuration mode may change the current mode at any time, so that flexibility is high.
In order to verify the uniformity of the pseudo-random number generation method provided by the invention, the distribution probability of 100 0000 pseudo-random numbers generated by the method is as follows:
mode 0:
Figure BDA0004102167450000051
mode 1:
Figure BDA0004102167450000061
mode 2:
Figure BDA0004102167450000062
/>
mode 3:
Figure BDA0004102167450000063
mode 4:
Figure BDA0004102167450000064
mode 5:
Figure BDA0004102167450000072
mode 6:
Figure BDA0004102167450000071
it can be seen that in the proposed 7-way value mode, the 0-mean value can be satisfied, and the same positive and negative values of the output need to be uniformly distributed.
Example 2
The invention also provides an electronic device, which comprises a memory and a processor, wherein the memory stores a computer program which can be loaded by the processor and is used for executing the corresponding method for processing the Bubble fuzzy in the embodiment 1.
Example 3
The present invention also proposes a computer-readable storage medium having stored thereon computer program instructions for implementing the procedure corresponding to the hole blurring method described in embodiment 1 when executed by a processor.
It should be noted that, in the description of the embodiments of the present invention, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; may be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in detail by those skilled in the art; the accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Although embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives, and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.

Claims (10)

1. A method for generating uniformly distributed dithering pseudo-random number is characterized in that N bit values are selected from pseudo-random numbers generated by at least two PRBS structures, N bits are recombined into an N bit number, a lookup table is built according to the value range of the N bit number, and uniform distribution of the pseudo-random number to be distributed is realized; wherein, each N-bit value in the lookup table corresponds to a jitter output value.
2. The method of generating uniformly distributed dithering pseudo-random number as recited in claim 1, wherein when selecting the bit values, selecting the bit values having intervals in the PRBS structure.
3. The method of generating uniformly distributed dithering pseudo-random number according to claim 1 or 2, wherein the lookup table supports seven uniformly distributed patterns of dithering values, i.e., + -1, + -2, + -3, + -4, + -5, + -6, + -7.
4. The uniformly distributed dithering pseudo-random number generation method according to claim 1, wherein the PRBS structures are respectively selected as a PRBS23 structure and a PRBS31 structure.
5. The method of generating uniformly distributed dithering pseudo-random number as recited in claim 4, wherein two bit values are selected in the PRBS23 structure and three bit values are selected in the PRBS31 for a total of 5bit values when selecting the bit values.
6. The uniformly distributed dithering pseudo-random number generation method according to claim 4 or 5, wherein the 23 rd and 12 th bit values, i.e., the PRBS23 (23) and the PRBS23 (12), are selected from the PRBS23 structure.
7. The method of generating uniformly distributed dithering pseudo-random number as recited in claim 6, wherein the PRBS31 structure is selected from the group consisting of 31, 12, 7 bit values, namely PRBS31 (31), PRBS31 (12), and PRBS31 (7).
8. The uniformly distributed dithering pseudo-random number generation method according to claim 7, wherein the combined bit number is a value obtained by sequentially concatenating the PRBS23 (23), the PRBS31 (31), the PRBS23 (12), the PRBS31 (12), and the PRBS31 (7).
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and that corresponds to the method of the patent blur processing according to any one of claims 1 to 8.
10. A computer-readable storage medium having stored thereon computer program instructions, which when executed by a processor are adapted to carry out the process corresponding to the method of the Bubble fuzzy processing of any one of claims 1 to 8.
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