CN116223905B - Harmonic frequency detection system, method, device and storage medium - Google Patents

Harmonic frequency detection system, method, device and storage medium Download PDF

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CN116223905B
CN116223905B CN202211604839.7A CN202211604839A CN116223905B CN 116223905 B CN116223905 B CN 116223905B CN 202211604839 A CN202211604839 A CN 202211604839A CN 116223905 B CN116223905 B CN 116223905B
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voltage
detection time
time window
sampling circuit
harmonic
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CN116223905A (en
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周兆章
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Guangzhou Junneng Technology Co ltd
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Guangzhou Junneng Technology Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

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  • General Physics & Mathematics (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

The application discloses a harmonic frequency detection system, a harmonic frequency detection method, a harmonic frequency detection device and a storage medium, and relates to the technical field of power detection. According to the application, the cooperation of the control processor is utilized to acquire the voltage maximum value of each detection time window by utilizing the cooperation of the first capacitor and the first diode in the first sampling circuit, the voltage minimum value of each detection time window by utilizing the cooperation of the second capacitor and the second diode in the second sampling circuit, and the voltage normal value by utilizing the third sampling circuit, the control processor determines the harmonic detection result based on the voltage maximum value and the voltage minimum value of each detection time window, and the harmonic detection results of a plurality of detection time windows with different lengths, which are set based on the fundamental wave period of the detected line, are utilized to realize the on-line detection of the harmonic frequency of the detected line, and the harmonic frequency detection response time is short and the cost is low.

Description

Harmonic frequency detection system, method, device and storage medium
Technical Field
The present application relates to the field of power detection technologies, and in particular, to a harmonic frequency detection system, method, apparatus, and storage medium.
Background
In an energy storage system formed by connecting a plurality of PCS (Power Conversion System) in parallel or other multi-power supply parallel systems, the problem of parallel resonance is easy to occur. Resonance on the energy storage system may cause the PCS protection to shut down or even fail.
At present, when an energy storage system is abnormal and harmonic components in a harmonic circuit need to be analyzed, special equipment such as a high-bandwidth oscilloscope and the like are adopted for waveform analysis, and the harmonic components are determined by manually analyzing the displayed waveforms.
Disclosure of Invention
The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the application provides a harmonic frequency detection system, a method, a device and a storage medium, which can reduce the harmonic frequency detection cost.
In one aspect, an embodiment of the present application provides a harmonic frequency detection system, including a first sampling circuit, a second sampling circuit, a third sampling circuit, and a control processor, where the first sampling circuit, the second sampling circuit, and the third sampling circuit are all connected to the control processor;
the first sampling circuit comprises a first switch, a first capacitor and a first diode, wherein a first end of the first capacitor is connected with a negative electrode of the first diode, a second end of the first capacitor is grounded, the first switch is connected in parallel with two ends of the first diode, an anode of the first diode is used for being connected with a tested line, and a first end of the first capacitor is connected with the control processor;
the second sampling circuit comprises a second switch, a second capacitor and a second diode, wherein the first end of the second capacitor is connected with the positive electrode of the second diode, the second end of the second capacitor is grounded, the second switch is connected in parallel with the two ends of the second diode, the negative electrode of the second diode is used for being connected into a tested line, and the first end of the second capacitor is connected into the control processor;
the third sampling circuit comprises a third capacitor, a first end of the third capacitor is grounded, a second end of the third capacitor is connected to the control processor and is used for being connected to a tested line;
the control processor is used for obtaining a voltage normal value from the first sampling circuit, controlling the first switch and the second switch to be switched off in a plurality of detection time windows in sequence to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit of each detection time window, determining a harmonic detection result of each detection time window according to the voltage normal value, the voltage maximum value and the voltage minimum value, and determining a harmonic frequency according to the harmonic detection results of the detection time windows, wherein the detection time windows are set according to a fundamental wave period of a detected line.
On the other hand, the embodiment of the application also provides a harmonic frequency detection method, which is applied to the control processor of the harmonic frequency detection system, and comprises the following steps:
acquiring a normal voltage value from a first sampling circuit;
sequentially controlling the first switch and the second switch to be disconnected in a plurality of detection time windows to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit of each detection time window;
determining a harmonic detection result of each detection time window according to the normal voltage value, the maximum voltage value and the minimum voltage value;
and determining harmonic frequencies according to harmonic detection results of a plurality of detection time windows, wherein the detection time windows are set according to fundamental wave periods of the detected line.
According to some embodiments of the application, the lengths of the detection time windows are t, t/3, t/5, t/7, t/9, t/11, t/13 in sequence, wherein t represents the fundamental period.
According to some embodiments of the application, the controlling the first switch and the second switch to be turned off sequentially in a plurality of detection time windows to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit of each detection time window includes the steps of:
controlling the first switch and the second switch to be closed in a non-detection time window so that a first voltage value from the first sampling circuit and a second voltage value from the second sampling circuit are equal to the voltage normal value;
controlling the first switch and the second switch to be switched off in a detection time window;
acquiring a plurality of first voltage values from the first sampling circuit and a plurality of second voltage values from the second sampling circuit within the detection time window;
and determining a voltage maximum value of the detection time window according to the first voltage values, and determining a voltage minimum value of the detection time window according to the second voltage values.
According to some embodiments of the application, the determining the harmonic detection result of each detection time window according to the normal voltage value, the maximum voltage value and the minimum voltage value comprises the following steps:
calculating the difference between the voltage maximum value and the voltage normal value of the detection time window to obtain a first voltage difference;
calculating the difference between the voltage minimum value and the voltage normal value of the detection time window to obtain a second voltage difference;
and when the first voltage difference is larger than a first threshold value and the second voltage difference is larger than a second threshold value, determining that the harmonic exists in the detected line in the detection time window.
According to some embodiments of the application, the determining the harmonic frequency according to the harmonic detection results of the plurality of detection time windows comprises the steps of:
judging whether each detection time window has harmonic waves or not according to the length of the detection time window from large to small;
when the current detection time window has no harmonic wave and the last detection time window has the harmonic wave, determining the harmonic frequency according to the last detection time window.
According to some embodiments of the application, the determining the harmonic frequency according to the last detection time window comprises the steps of:
calculating the reciprocal of the length of the last detection time window to determine the detection frequency;
and determining the harmonic frequency according to the detection frequency.
According to some embodiments of the application, the determining the harmonic frequency according to the last detection time window comprises the steps of:
and inquiring the frequency mapping table according to the sequence of the last detection time window, and determining the harmonic frequency.
On the other hand, the embodiment of the application also provides a harmonic frequency detection device, which comprises:
at least one processor;
at least one memory for storing at least one program;
the at least one program, when executed by the at least one processor, causes the at least one processor to implement the harmonic frequency detection method as previously described.
In another aspect, embodiments of the present application also provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform the harmonic frequency detection method as previously described.
The technical scheme of the application has at least one of the following advantages or beneficial effects: the voltage maximum value of each detection time window is acquired by utilizing the cooperation of the first capacitor and the first diode in the first sampling circuit, the voltage minimum value of each detection time window is acquired by utilizing the cooperation of the second capacitor and the second diode in the second sampling circuit, and the voltage normal value is acquired by the third sampling circuit, the control processor determines a harmonic detection result based on the voltage maximum value and the voltage minimum value of each detection time window, and the harmonic detection results of a plurality of detection time windows with different lengths, which are set based on the fundamental wave period of a detected line, are utilized to realize the on-line detection of the harmonic frequency of the detected line, and the harmonic frequency detection response time is short and the cost is low.
Drawings
FIG. 1 is a flowchart of a harmonic frequency detection method provided by an embodiment of the present application;
FIG. 2 is a schematic diagram of a harmonic frequency detection system according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a detection time window setting provided in an embodiment of the present application;
FIG. 4 is a schematic diagram of a harmonic frequency detection system according to another embodiment of the present application;
fig. 5 is a schematic diagram of a harmonic frequency detection device according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.
In the description of the present application, it should be understood that the direction or positional relationship indicated with respect to the description of the orientation, such as up, down, left, right, etc., is based on the direction or positional relationship shown in the drawings, is merely for convenience of describing the present application and simplifying the description, and does not indicate or imply that the apparatus or element to be referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the description of the present application, the description of first, second, etc. is for the purpose of distinguishing between technical features only, and should not be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiment of the application provides a harmonic frequency detection system, referring to fig. 2, the harmonic frequency detection system comprises a first sampling circuit, a second sampling circuit, a third sampling circuit and a control processor, wherein the first sampling circuit, the second sampling circuit and the third sampling circuit are all connected with the control processor.
The first sampling circuit comprises a first switch K1, a first capacitor C1 and a first diode D1, wherein the first end of the first capacitor C1 is connected with the negative electrode of the first diode D1, the second end of the first capacitor C1 is grounded, the first switch K1 is connected in parallel with the two ends of the first diode D1, the positive electrode of the first diode D1 is used for being connected into a tested line, and the negative electrode of the first diode D1 is connected into a control processor.
The second sampling circuit comprises a second switch K2, a second capacitor C2 and a second diode D2, wherein the first end of the second capacitor C2 is connected with the positive electrode of the second diode D2, the second end of the second capacitor C2 is grounded, the second switch K2 is connected to the two ends of the second diode D2, the negative electrode of the second diode D2 is used for being connected to a tested line, and the positive electrode of the second diode D2 is connected to the control processor.
The third sampling circuit comprises a third capacitor C0, a first end of the third capacitor C0 is grounded, and a second end of the third capacitor C0 is connected to the control processor and is used for being connected to a tested line.
The control processor is used for acquiring a normal voltage value from the first sampling circuit, sequentially controlling the first switch and the second switch to be switched off in a plurality of detection time windows to acquire a maximum voltage value from the first sampling circuit and a minimum voltage value from the second sampling circuit of each detection time window, determining a harmonic detection result of each detection time window according to the normal voltage value, the maximum voltage value and the minimum voltage value, and determining a harmonic frequency according to the harmonic detection results of the detection time windows, wherein the detection time windows are set according to a fundamental wave period of a detected line.
In this embodiment, the working principle for harmonic detection of the dc line is: the third capacitor C0 on the third sampling circuit adopts a large-capacity capacitor, and can filter harmonic components in the tested line, so that the control processor can collect the normal voltage value of direct current through the third sampling circuit. After the first switch K1 of the first sampling circuit is closed, the first capacitor C1 is charged, when the voltage of the first capacitor C1 reaches the same normal voltage value as that of the third sampling circuit, the first switch K1 is opened, and as the first diode D1 is arranged between the tested line and the first capacitor C1 in the forward direction, after the first switch K1 is opened, when the voltage value of the tested line is larger than the normal voltage value, the voltage value of the first capacitor C1 is also increased, and when the voltage value of the tested line is smaller than the normal voltage value, the voltage value of the first capacitor C1 is kept unchanged. After the second switch K2 of the second sampling circuit is closed, the second capacitor C2 is charged, when the voltage of the second capacitor C2 reaches the same normal voltage value as that of the third sampling circuit, the second switch K2 is opened, and as the second diode D2 is reversely arranged between the tested line and the second capacitor C2, after the second switch K2 is opened, when the voltage value of the tested line is smaller than the normal voltage value, the voltage value of the second capacitor C2 is also reduced, and when the voltage value of the tested line is larger than the normal voltage value, the voltage value of the second capacitor C2 is kept unchanged.
Based on the working principle of the sampling circuit, the switch control principle of the control processor is as follows: after the harmonic detection system is connected into a tested line, the first switch K1 and the second switch K2 are controlled to be closed in a non-detection time window, so that a first voltage value from the first sampling circuit, a second voltage value from the second sampling circuit and the like are synchronized with a normal voltage value from the third sampling circuit, and then the first switch K1 and the second switch K2 are controlled to be opened when the time sequence reaches the detection time window. After the first switch K1 and the second switch K2 are turned off, the plurality of first voltage values and the plurality of second voltage values are continuously collected in the detection time window, the voltage maximum value of the detection time window can be determined from the plurality of first voltage values, and the voltage minimum value of the detection time window can be determined from the plurality of second voltage values.
Further, in each detection time window, determining a harmonic detection result of each detection time window by judging whether the difference between the voltage maximum value and the voltage normal value of the corresponding time sequence is larger than a first threshold value and whether the difference between the voltage minimum value and the voltage normal value of the corresponding time sequence is larger than a second threshold value, wherein if the difference between the voltage maximum value and the voltage normal value is larger than the first threshold value and the difference between the voltage minimum value and the voltage normal value is larger than the second threshold value, the harmonic detection result is that a harmonic exists in the detection time window, otherwise, no harmonic exists.
When the harmonic wave occurs, the superposition of 3 times of harmonic wave, 5 times of harmonic wave, 7 times of harmonic wave and the like always exists at the same time, and the harmonic frequency also needs to be detected in the practical application process. Referring to fig. 3, taking an example of detecting an odd harmonic in a detected line, a plurality of detection time windows are set in advance based on a fundamental wave period (i.e., a frequency inverse of the fundamental wave), and the detection time windows may be a fundamental wave period (t), a 3 rd harmonic period (t/3), a 5 th harmonic period (t/5) … … th harmonic period (t/13) in sequence. The closing time of the first switch and the second switch is a non-detection time window, the closing time of the first switch and the second switch is the time when the first voltage value and the second voltage value are stabilized at the normal voltage value, the opening time of the first switch and the second switch is a detection time window, the first switch and the second switch are judged to have harmonics by judging whether the absolute value of Un-Umax and the absolute value of Un-Umin exceeds the threshold value in each detection time window in sequence, and the highest harmonic frequency is determined according to the last detection time window with the harmonics. Wherein Un is a normal voltage value, umax is a voltage maximum value, and Umin is a voltage minimum value.
Illustratively, the fundamental frequency is 50Hz, the fundamental period is 20ms (1/50), the period of 11 harmonics is 1.82ms, and the period of 13 harmonics is 1.54ms. The off-time of K1, K2 is gradually reduced from 20ms to 1.5ms, and both Un-Umax and Un-Umin exceed their thresholds simultaneously within a detection time window of 1.8ms, the highest harmonic can be determined to be 11 th order harmonic, with |un-umax| and |un-umax| not exceeding their thresholds at the same time within a detection time window of 1.5 ms.
Referring to fig. 2, the first sampling circuit further includes a first resistor R1 and a first voltage dividing unit according to some embodiments of the present application. The first end of the first resistor R1 is connected with the positive electrode of the first diode D1, and the second end of the first resistor R1 is used for being connected with a tested line. The first voltage dividing unit comprises a fourth resistor R4 and a seventh resistor R7, wherein a first end of the fourth resistor R4 is connected with the negative electrode of the first diode D1, a second end of the fourth resistor R4 is connected with the control processor, a first end of the fourth resistor R4 is connected with a second end of the fourth resistor R4, and a second end of the seventh resistor R7 is grounded.
In this embodiment, the voltage drop of the first diode D1 is small and negligible. The sum of the resistance values of the fourth resistor R4 and the seventh resistor R4 is much larger than the resistance value of the first resistor R1, so that when the first switch K1 is closed, the voltage on the first capacitor C1 is approximately equal to the voltage of the tested line, that is, the voltage at the Ub point is approximately equal to the voltage of the tested line.
Referring to fig. 2, the second sampling circuit further includes a second resistor R2 and a second voltage dividing unit according to some embodiments of the present application. The first end of the second resistor R2 is connected with the cathode of the second diode D2, and the second end of the second resistor R2 is used for being connected with a tested line. The second voltage division unit comprises a third resistor R3 and a sixth resistor R6, wherein the first end of the third resistor R3 is connected with the positive electrode of the second diode D2, the second end of the third resistor R3 is connected with the control processor, the first end of the sixth resistor R6 is connected with the second end of the third resistor R3, and the second end of the sixth resistor R6 is grounded.
In this embodiment, the voltage drop of the second diode D2 is small and negligible. The sum of the resistance values of the third resistor R3 and the sixth resistor R6 is much larger than the resistance value of the second resistor R2, so that when the second switch K2 is closed, the voltage on the second capacitor C2 is approximately equal to the voltage of the tested line, that is, the voltage at the Uc point is approximately equal to the voltage of the tested line.
According to some embodiments of the application, the third sampling circuit further includes a ninth resistor R0 and a third voltage dividing unit. The first end of the ninth resistor R0 is connected with the second end of the third capacitor C0, and the second end of the ninth resistor R0 is used for being connected with a tested line; the third voltage dividing unit comprises a fifth resistor R5 and an eighth resistor R8, wherein a first end of the fifth resistor R5 is connected with a first end of the third capacitor C0, a second end of the fifth resistor R5 is connected with the control processor, a first end of the eighth resistor R8 is connected with a second end of the fifth resistor R5, and a second end of the eighth resistor R8 is grounded.
In this embodiment, the Ua point voltage is a result of dividing the measured line voltage by the ninth resistor R0 and the eighth resistor R8, and in the case where the third capacitor C0 is large enough, harmonic components of the measured line at the Ua point are filtered, where ua=ubus×r8/(r0+r5), where Ubus is the measured line voltage.
In still other embodiments, referring to fig. 4, the harmonic frequency detection system comprises a third diode D0. The third diode D0 may be disposed between the line under test and the sampling circuit in the forward direction as shown in fig. 4, or may be disposed between the line under test and the sampling circuit in the direction. For the detection of alternating current lines, diodes can be arranged in the positive direction or the direction between the sampling circuit and the tested line so that the sampling circuit only collects the positive half-cycle voltage or the negative half-cycle voltage of the alternating current, and harmonic detection is only carried out on the positive half-cycle or the negative half-cycle of the alternating current.
In this embodiment, the voltage sampling working principle of the harmonic detection system of the alternating current is as follows: after the sine alternating current on the tested line passes through the half-wave rectifying circuit, the positive waveform of the alternating current and the negative waveform of the alternating current are obtained, and the positive waveform and the negative waveform of the alternating current are zero. The capacitance value of the third capacitor C0 on the third sampling circuit is set according to the fundamental frequency of the alternating current so as to filter harmonic components in the tested line and keep the fundamental wave of the alternating current, so that the control processor can acquire the normal value of the fundamental wave voltage in the positive half cycle waveform through the third sampling circuit. The detection time window is arranged on the positive half cycle and symmetrical about the fundamental wave peak value, and the length of the detection time window is arranged from the 3 rd harmonic cycle to the 3 rd harmonic cycle (t/3), and the 5 th harmonic cycle (t/5) … … th harmonic cycle (t/13) in sequence. In the non-detection time window, the first switch K1 of the first sampling circuit and the second switch K2 of the second sampling circuit are in a closed state, and the voltage values of the first sampling circuit and the second sampling circuit are synchronously reset with the third sampling circuit. Before entering a detection time window after the zero crossing point, a first switch of the first sampling circuit is controlled to be turned off, and as the first diode is positively arranged between the tested line and the first capacitor, in the detection time window, when the voltage value of the tested line is increased, the voltage value of the first capacitor is also increased, and when the voltage value of the tested line is decreased, the voltage value of the first capacitor is kept unchanged, so that the voltage maximum value in the detection time window can be acquired. When the voltage value of the detected line becomes larger, the voltage value of the second capacitor is kept unchanged, and therefore the voltage minimum value in the detection time window can be collected. After determining the harmonic detection result of the current detection time window by determining whether the difference between the voltage maximum value and the voltage normal value of the corresponding time sequence is greater than a first threshold value and whether the difference between the voltage minimum value and the voltage normal value of the corresponding time sequence is greater than a second threshold value, the next detection time window with smaller length is entered for harmonic detection, and then the harmonic detection result of each detection time window is synthesized to determine the harmonic frequency.
Further, referring to fig. 4, the harmonic frequency detection system further includes a synchronization circuit, the synchronization circuit includes an eleventh resistor R9 and a tenth resistor R10, a first end of the eleventh resistor R9 is connected to the first end of the half-wave rectification circuit, a second end of the eleventh resistor R9 is connected to the control processor, a first end of the tenth resistor R10 is connected to the second end of the eleventh resistor R9, and a second end of the tenth resistor R10 is grounded. The synchronous circuit is used for collecting the complete voltage of the tested line, the control processor can determine the time points of zero crossing points and peak values based on the voltage value of the synchronous circuit, and the first switch K1 and the second switch K2 are controlled based on the time points of the zero crossing points and the time points of the peak values.
The embodiment of the application also provides a harmonic frequency detection method, which is applied to the control processor of the harmonic frequency detection system as in the previous embodiment, referring to fig. 1, and includes, but is not limited to, step S110, step S120, step S130 and step S140.
Step S110, obtaining a normal voltage value from a first sampling circuit;
step S120, a first switch and the second switch are controlled to be turned off in a plurality of detection time windows in sequence to obtain a voltage maximum value from a first sampling circuit and a voltage minimum value from a second sampling circuit of each detection time window;
step S130, determining a harmonic detection result of each detection time window according to the normal voltage value, the maximum voltage value and the minimum voltage value;
and step S140, determining harmonic frequencies according to harmonic detection results of a plurality of detection time windows, wherein the detection time windows are set according to fundamental wave periods of the detected line.
According to some embodiments of the application, the length of the plurality of detection time windows is sequentially equal to or slightly greater than t, 3/t, 5/t, 7/t, 9/t, 11/t, 13/t, wherein t represents the fundamental period.
According to some embodiments of the present application, in step S120, sequentially controlling the first switch and the second switch to be turned off during a plurality of detection time windows to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit of each detection time window includes the following steps:
step S210, controlling the first switch and the second switch to be closed in a non-detection time window so that a first voltage value from the first sampling circuit and a second voltage value from the second sampling circuit are equal to a normal voltage value;
step S220, the first switch and the second switch are controlled to be switched off in a detection time window;
step S230, a plurality of first voltage values from a first sampling circuit and a plurality of second voltage values from a second sampling circuit are acquired in a detection time window;
step S240, determining a voltage maximum value of the detection time window according to the first voltage values, and determining a voltage minimum value of the detection time window according to the second voltage values.
According to some embodiments of the present application, in step S130, determining the harmonic detection result of each detection time window according to the normal voltage value, the maximum voltage value and the minimum voltage value includes the following steps:
step S310, calculating the difference between the voltage maximum value and the voltage normal value of the detection time window to obtain a first voltage difference;
step S320, calculating the difference between the voltage minimum value and the voltage normal value of the detection time window to obtain a second voltage difference;
in step S330, when the first voltage difference is greater than the first threshold and the second voltage difference is greater than the second threshold, it is determined that the harmonic exists in the detected line within the detection time window.
According to some embodiments of the present application, in step S140, determining the harmonic frequency according to the harmonic detection results of the plurality of detection time windows includes the steps of:
step S410, judging whether each detection time window has harmonic waves according to the length of the detection time window from large to small;
in step S420, when the current detection time window has no harmonic wave and the last detection time window has a harmonic wave, the harmonic frequency is determined according to the last detection time window.
Illustratively, the fundamental frequency is 50Hz, the fundamental period is 20ms (1/50), the period of 11 harmonics is 1.82ms, and the period of 13 harmonics is 1.54ms. The off-time of K1, K2 is gradually reduced from 20ms to 1.5ms, and both Un-Umax and Un-Umin exceed their thresholds simultaneously within a detection time window of 1.8ms, the highest harmonic can be determined to be 11 th order harmonic, with |un-umax| and |un-umax| not exceeding their thresholds at the same time within a detection time window of 1.5 ms.
According to some embodiments of the application, in step S140, determining the harmonic frequency according to the last detection time window comprises the steps of:
step S510, calculating the reciprocal of the length of the last detection time window to determine the detection frequency;
step S520, determining the harmonic frequency according to the detected frequency.
Illustratively, the last detection time window is 1.8ms in length, its inverse is 555Hz, and the detection frequency is 555Hz. The odd harmonic frequencies with the fundamental wave frequency of 50Hz are sequentially 50Hz, 150Hz … … Hz and 650Hz, so that the existence of the harmonic with the harmonic frequency of 550Hz in the tested line can be determined by matching the nearest odd harmonic frequencies.
According to some embodiments of the application, in step S140, determining the harmonic frequency according to the last detection time window comprises the steps of:
step S610, the frequency mapping table is queried according to the sequence of the last detection time window, and the harmonic frequency is determined.
For example, harmonic detection is performed according to the length of the detection time window being sequentially equal to or slightly greater than t, t/3, t/5, t/7, t/9, t/11, and t/13, and corresponding frequency mapping tables are established according to the sequence, wherein the frequency mapping tables are sequentially 50Hz, 150Hz, 250Hz, 350Hz, 450Hz, 550Hz, and 650Hz, and assuming that the last detection time window is the sixth detection time window, the harmonic frequency can be determined to be 550Hz by querying the sixth position of the frequency mapping table.
It can be understood that the foregoing embodiments of the harmonic frequency detection system are applicable to the embodiments of the method, and the functions specifically implemented by the embodiments of the method are the same as those of the embodiments of the harmonic frequency detection system, and the beneficial effects achieved by the embodiments of the harmonic frequency detection system are the same as those achieved by the embodiments of the harmonic frequency detection system.
Referring to fig. 5, fig. 5 is a schematic diagram of a harmonic frequency detection apparatus according to an embodiment of the present application. The harmonic frequency detection device according to the embodiment of the present application includes one or more control processors and a memory, and fig. 5 illustrates one control processor and one memory as an example.
The control processor and the memory may be connected by a bus or otherwise, for example in fig. 5.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located relative to the control processor, the remote memory being connectable to the harmonic frequency detection device through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It will be appreciated by those skilled in the art that the arrangement shown in fig. 5 is not limiting of the harmonic frequency detection arrangement and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
The non-transitory software program and instructions required to implement the harmonic frequency detection method applied to the harmonic frequency detection apparatus in the above embodiments are stored in the memory, and when executed by the control processor, the harmonic frequency detection method applied to the harmonic frequency detection apparatus in the above embodiments is performed.
Furthermore, an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions that are executed by one or more control processors to cause the one or more control processors to perform the harmonic frequency detection method in the above-described method embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
The embodiments of the present application have been described in detail with reference to the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present application.

Claims (8)

1. The harmonic frequency detection system is characterized by comprising a first sampling circuit, a second sampling circuit, a third sampling circuit and a control processor, wherein the first sampling circuit, the second sampling circuit and the third sampling circuit are all connected with the control processor;
the first sampling circuit comprises a first switch, a first capacitor and a first diode, wherein a first end of the first capacitor is connected with a negative electrode of the first diode, a second end of the first capacitor is grounded, the first switch is connected in parallel with two ends of the first diode, an anode of the first diode is used for being connected with a tested line, and a first end of the first capacitor is connected with the control processor;
the second sampling circuit comprises a second switch, a second capacitor and a second diode, wherein the first end of the second capacitor is connected with the positive electrode of the second diode, the second end of the second capacitor is grounded, the second switch is connected in parallel with the two ends of the second diode, the negative electrode of the second diode is used for being connected into a tested line, and the first end of the second capacitor is connected into the control processor;
the third sampling circuit comprises a third capacitor, a first end of the third capacitor is grounded, a second end of the third capacitor is connected to the control processor and is used for being connected to a tested line;
the control processor is used for acquiring a normal voltage value from the third sampling circuit, and sequentially controlling the first switch and the second switch to be switched off in a plurality of detection time windows so as to acquire a maximum voltage value from the first sampling circuit and a minimum voltage value from the second sampling circuit of each detection time window; calculating the difference between the voltage maximum value and the voltage normal value of the detection time window to obtain a first voltage difference; calculating the difference between the voltage minimum value and the voltage normal value of the detection time window to obtain a second voltage difference; when the first voltage difference is larger than a first threshold value and the second voltage difference is larger than a second threshold value, determining that the harmonic exists in the detected line in the detection time window; judging whether each detection time window has harmonic waves according to the length of the detection time window from large to small, wherein each detection time window is set according to the fundamental wave period of a detected line; when the current detection time window has no harmonic wave and the last detection time window has the harmonic wave, determining the harmonic frequency according to the last detection time window.
2. A harmonic frequency detection method for use in a control processor of a harmonic frequency detection system as claimed in claim 1, the harmonic frequency detection method comprising the steps of:
acquiring a normal voltage value from a third sampling circuit;
sequentially controlling the first switch and the second switch to be disconnected in a plurality of detection time windows to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit of each detection time window;
calculating the difference between the voltage maximum value and the voltage normal value of the detection time window to obtain a first voltage difference;
calculating the difference between the voltage minimum value and the voltage normal value of the detection time window to obtain a second voltage difference;
when the first voltage difference is larger than a first threshold value and the second voltage difference is larger than a second threshold value, determining that the harmonic exists in the detected line in the detection time window;
judging whether each detection time window has harmonic waves according to the length of the detection time window from large to small, wherein each detection time window is set according to the fundamental wave period of a detected line;
when the current detection time window has no harmonic wave and the last detection time window has the harmonic wave, determining the harmonic frequency according to the last detection time window.
3. The harmonic frequency detection method of claim 2, wherein the lengths of the plurality of detection time windows are t, t/3, t/5, t/7, t/9, t/11, t/13 in order, wherein t represents a fundamental wave period.
4. The harmonic frequency detection method of claim 2, wherein the sequentially controlling the first switch and the second switch to be turned off during a plurality of detection time windows to obtain a voltage maximum value from the first sampling circuit and a voltage minimum value from the second sampling circuit for each detection time window comprises the steps of:
controlling the first switch and the second switch to be closed in a non-detection time window so that a first voltage value from the first sampling circuit and a second voltage value from the second sampling circuit are equal to the normal voltage value;
controlling the first switch and the second switch to be switched off in a detection time window;
acquiring a plurality of first voltage values from the first sampling circuit and a plurality of second voltage values from the second sampling circuit within the detection time window;
and determining a voltage maximum value of the detection time window according to the first voltage values, and determining a voltage minimum value of the detection time window according to the second voltage values.
5. The harmonic frequency detection method as claimed in claim 2, wherein the determining the harmonic frequency from the last detection time window comprises the steps of:
calculating the reciprocal of the length of the last detection time window to determine the detection frequency;
and determining the harmonic frequency according to the detection frequency.
6. The harmonic frequency detection method as claimed in claim 2, wherein the determining the harmonic frequency from the last detection time window comprises the steps of:
and inquiring the frequency mapping table according to the sequence of the last detection time window, and determining the harmonic frequency.
7. A harmonic frequency detection apparatus, comprising:
at least one processor;
at least one memory for storing at least one program;
when the at least one program is executed by the at least one processor, the at least one processor is caused to implement the harmonic frequency detection method as claimed in any one of claims 2 to 6.
8. A computer-readable storage medium in which a processor-executable program is stored, characterized in that the processor-executable program is for implementing the harmonic frequency detection method according to any one of claims 2 to 6 when being executed by the processor.
CN202211604839.7A 2022-12-14 2022-12-14 Harmonic frequency detection system, method, device and storage medium Active CN116223905B (en)

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