CN116205176A - Design method of large-scale quantum chip resonant cavity and quantum processor - Google Patents
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Abstract
The invention provides a design method of a large-scale quantum chip resonant cavity and a quantum processor, wherein the design method comprises the steps of firstly obtaining a low-temperature equivalent relative dielectric constant of an experimental quantum chip substrate, then determining target frequencies corresponding to all resonant cavities to be set on a target quantum chip substrate, determining target cavity lengths of one of the resonant cavities to be set based on the low-temperature equivalent relative dielectric constant and a first preset corresponding relation, and finally determining target cavity lengths corresponding to the target frequencies of the rest resonant cavities to be set based on the target frequencies of the set resonant cavities and the corresponding target cavity lengths and a second preset corresponding relation. According to the invention, the substrate parameters of the target quantum chip are corrected, then the target parameters of one resonant cavity are simulated, and then the target parameters of other resonant cavities are calculated by being beneficial to meeting a specific relational expression by the target parameters of different resonant cavities, so that the design time is greatly shortened, the design cost is reduced, and the difference value between the actual parameters and the target parameters of the subsequently manufactured target quantum chip resonant cavities is smaller.
Description
Technical Field
The invention belongs to the technical field of quantum chip manufacturing, and particularly relates to a design method of a large-scale quantum chip resonant cavity and a quantum processor.
Background
With the popularization of quantum computing technology, quantum chips for performing quantum computing are important subjects of scientific research. Compared with the traditional integrated chip, the quantum chip has strong parallel computing capability, and the parallel computing capability is exponentially improved along with the number of bits (quantum bit number) of the quantum chip.
The quantum chip is integrated with a plurality of quantum bits and resonant cavities which are in one-to-one correspondence and are mutually coupled, and the resonant cavities and the quantum bit coupling system form a line cavity quantum electrodynamic system which can be used as a basic element of quantum computing. The resonant cavity can be used as a reading circuit of the quantum bit to reflect the state of the quantum bit, and as an important ring for designing the quantum chip, the design of the reading circuit directly influences the working performance of the whole quantum chip, for example, when the working frequency of the resonant cavity on the quantum chip deviates to cause that the working frequency interval of two or more resonant cavities is too small, the reading of the corresponding quantum bit can be interfered, the reading fidelity of the corresponding quantum bit is reduced, and the working performance of the quantum chip is influenced, so the design of the resonant cavity is particularly important.
However, in the prior art, when designing a quantum chip, it takes a long time to design, correct and simulate the parameters of each resonant cavity on the quantum chip, and the design of a large-scale quantum chip resonant cavity with a plurality of quantum bits requires a lot of time, great design cost and low design efficiency. Therefore, how to reduce the design time consumption of the large-scale quantum chip resonant cavity, improve the design efficiency and reduce the design cost is a problem to be solved.
Disclosure of Invention
The invention aims to provide a method for designing a large-scale quantum chip resonant cavity and a quantum processor, which are used for solving the defects and shortcomings in the prior art.
In order to achieve the above object, in a first aspect, the present invention provides a method for designing a resonator of a large-scale quantum chip, the resonator is composed of a coplanar waveguide transmission line, including:
obtaining the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate; the low-temperature equivalent relative dielectric constant is a fixed parameter of the experimental quantum chip substrate in a low-temperature environment, and the low-temperature environment is a working environment of the quantum chip;
determining target frequencies corresponding to all to-be-set resonant cavities on a target quantum chip substrate, and determining the target cavity length of one to-be-set resonant cavity with the target frequencies based on the low-temperature equivalent relative dielectric constant and a first preset corresponding relation; the first preset corresponding relation is a relation between the frequency of the resonant cavity, the corresponding cavity length and the dielectric constant of the quantum chip substrate;
determining the target cavity lengths corresponding to the target frequencies of the rest resonant cavities to be set one by one based on the target frequencies of the set resonant cavities and the corresponding target cavity lengths thereof and a second preset corresponding relation, wherein the second preset corresponding relation is a relation between the frequencies of two different resonant cavities and the corresponding cavity lengths thereof.
Optionally, the obtaining the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate specifically includes:
obtaining the average measurement frequency of the resonant cavity of the experimental quantum chip and the average measurement cavity length corresponding to the average measurement frequency;
and acquiring the low-temperature equivalent relative dielectric constant of the experimental quantum chip based on the average measurement frequency, the average measurement cavity length corresponding to the average measurement frequency and the first preset corresponding relation.
Optionally, the determining, one by one, the target cavity lengths corresponding to the target frequencies of the remaining to-be-set resonant cavities based on the set target frequencies of the resonant cavities, the target cavity lengths corresponding to the set target frequencies, and the second preset corresponding relation specifically includes:
determining the difference value between the target frequency of the other resonant cavities to be set and the target frequency of the set resonant cavity based on the target frequency of the set resonant cavity and the target frequency of the other resonant cavities to be set respectively;
determining the difference value between the target cavity length of the rest of the resonant cavities to be set and the target cavity length of the set resonant cavities one by one based on the difference value between the target frequency of the rest of the resonant cavities to be set and the target frequency of the set resonant cavities and a second preset corresponding relation;
and respectively determining the target cavity lengths of the rest of the resonant cavities to be set based on the target cavity lengths of the set resonant cavities and the difference value of the target cavity lengths of the rest of the resonant cavities to be set and the target cavity lengths of the set resonant cavities.
Optionally, the first preset correspondence is specifically:
wherein f is the frequency of the resonant cavity of the quantum chip, lambda is the cavity length of the resonant cavity of the quantum chip, epsilon eff The dielectric constant of the quantum chip is given, and c is a constant.
Optionally, the second preset relationship is specifically: Δf=k×Δλ, where Δf is a difference between two target frequencies, Δλ is a difference between target cavity lengths corresponding to the two target frequencies, and k is a constant.
Optionally, N qubits and resonant cavities which are in one-to-one correspondence and are mutually coupled are arranged on the target quantum chip, the target frequencies of the N resonant cavities are all unequal, and the difference value of the target frequencies of the resonant cavities which are connected by coupling any two adjacent qubits is larger than a preset threshold, wherein the preset threshold is set according to the machining precision of the resonant cavities.
Alternatively, the target frequencies of the N sequentially arranged resonant cavities are set equal and different.
Optionally, the coupling capacitance values of the adjacent coupling connection qubit and the resonant cavity are different, and the coupling capacitance values of the interval coupling connection qubit and the resonant cavity are the same, and the second preset relationship is related to the coupling capacitance of the coupling connection qubit and the resonant cavity.
In a second aspect, the present invention provides a quantum processor, the resonant cavity on the quantum processor is designed by the method for designing a large-scale quantum chip resonant cavity according to the first aspect.
Compared with the prior art, the design method of the large-scale quantum chip resonant cavity and the quantum processor provided by the invention have the following beneficial effects: when the design method is used for setting the large-scale quantum chip resonant cavities, firstly, the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate is obtained, then, the target frequencies corresponding to all the resonant cavities to be set on the target quantum chip substrate are determined, the target cavity length of one of the resonant cavities to be set with the target frequency is determined based on the low-temperature equivalent relative dielectric constant and the first preset corresponding relation, and finally, the target cavity lengths corresponding to the target frequencies of the rest resonant cavities to be set are determined one by one based on the target frequencies of the set resonant cavities, the target cavity lengths corresponding to the set resonant cavities and the second preset corresponding relation. According to the invention, the substrate parameters of the target quantum chip are corrected, then the target parameters of one resonant cavity on the target quantum chip are simulated based on the corrected substrate parameters, and then the target parameters of other resonant cavities are calculated by being beneficial to the target parameters of different resonant cavities on the same target quantum chip to meet a specific relational expression, so that the design time is greatly shortened, the design cost is reduced, and the difference value between the actual parameters and the target parameters of the subsequently manufactured resonant cavities of the target quantum chip is smaller.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a method for designing a large-scale quantum chip resonant cavity according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for obtaining a low-temperature equivalent relative dielectric constant of an experimental quantum chip substrate according to an embodiment of the present invention;
fig. 3 is a schematic flow chart of a target cavity length method for determining the target frequencies of the remaining to-be-set resonant cavities one by one based on the target frequencies of the set resonant cavities, the target cavity lengths corresponding to the set resonant cavities, and a second preset corresponding relation.
Detailed Description
The invention provides a design method of a large-scale quantum chip resonant cavity and a quantum processor, which are further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
In the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
The multi-bit expansion of the quantum chip is a great difficulty in quantum computing, and as the number of quantum bits on the quantum chip increases, as described in the background art, the design method using the conventional quantum chip parameters needs to consume a great deal of time, cost great design cost and have low design efficiency. In order to improve the design efficiency of the large-scale quantum chip parameters and reduce the design cost, a new design method is required to design the large-scale quantum chip parameters so as to reduce the design time of the quantum chip, reduce the design cost and improve the design efficiency. Therefore, the core idea of the invention is to provide a design method of a large-scale quantum chip resonant cavity and a quantum processor, wherein the design method comprises the steps of firstly correcting the base parameters of a target quantum chip, then simulating the target parameters of one resonant cavity on the target quantum chip based on the corrected base parameters, and then calculating the target parameters of other resonant cavities by being beneficial to meeting a specific relation by the target parameters of different resonant cavities on the same target quantum chip, thereby greatly shortening the design time, reducing the design cost and reducing the difference value between the actual parameters and the target parameters of the subsequently manufactured target quantum chip resonant cavity.
The embodiment provides a design method of a large-scale quantum chip resonant cavity, wherein the resonant cavity is composed of a coplanar waveguide transmission line, and referring to fig. 1, the design method comprises the following steps:
step S1, obtaining a low-temperature equivalent relative dielectric constant of an experimental quantum chip substrate; the low-temperature equivalent relative dielectric constant is a fixed parameter of the experimental quantum chip substrate in a low-temperature environment, and the low-temperature environment is a working environment of the quantum chip.
Specifically, the experimental quantum chip is based on the quantum chip manufactured by using the same set of production machine and the same set of manufacturing process with the target quantum chip manufactured by planning, so as to ensure that the low-temperature equivalent relative dielectric constant of the target quantum chip is consistent with the low-temperature equivalent relative dielectric constant of the experimental quantum chip.
In addition, it should be noted that, the physical dielectric constant of the quantum chip substrate is related to the material thereof, but in the working environment of the quantum chip, the low-temperature equivalent relative dielectric constant of the quantum chip substrate will be different from the physical dielectric constant of the quantum chip substrate, however, when the quantum chip is designed, the target parameter of the quantum chip resonant cavity is closely related to the dielectric constant of the quantum chip substrate, if the dielectric constant of the quantum chip substrate is inaccurate, the target parameter of the quantum chip resonant cavity and the actual parameter will be greatly different, so when the design of the target quantum chip resonant cavity parameter is performed, the physical dielectric constant of the quantum chip substrate needs to be corrected to be the low-temperature equivalent relative dielectric constant.
Step S2, determining target frequencies corresponding to all to-be-set resonant cavities on a target quantum chip substrate, and determining the target cavity length of one to-be-set resonant cavity with the target frequencies based on the low-temperature equivalent relative dielectric constant and a first preset corresponding relation; the first preset corresponding relation is a relation between the frequency of the resonant cavity, the corresponding cavity length and the dielectric constant of the quantum chip substrate.
In specific implementation, the low-temperature equivalent relative dielectric constant is used as a fixed value, and the target frequency is used as an independent variable and is input into a pre-trained first calculation model, so that the solving parameters of the first calculation model can be obtained. The calculation principle of the first calculation model is pre-trained based on the first preset corresponding relation, and the solving parameter of the first calculation model is the target cavity length corresponding to the input target frequency of the resonant cavity to be set.
The low-temperature equivalent relative permittivity of the target quantum chip is identical to the low-temperature equivalent relative permittivity of the experimental quantum chip.
Step S3, determining the target cavity length corresponding to the target frequencies of the rest resonant cavities to be set one by one based on the target frequencies of the set resonant cavities and the corresponding target cavity lengths and the second preset corresponding relations; the second preset corresponding relation is a relation between frequencies of two different resonant cavities and corresponding cavity lengths of the two different resonant cavities.
Specifically, a second preset relation can be obtained according to experiments and theoretical researches, and then the target cavity length corresponding to the target frequencies of the rest to-be-set resonant cavities can be directly calculated based on the target frequencies of the set resonant cavities and the target cavity lengths corresponding to the set resonant cavities, so that the traditional design method is avoided that the parameters of each resonant cavity are required to be designed, corrected and simulated one by one, the design time of the target quantum chip is greatly shortened, and the design cost is reduced.
For example, referring to fig. 2, the obtaining the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate specifically includes:
and S11, obtaining the average measurement frequency of the resonant cavity of the experimental quantum chip and the average measurement cavity length corresponding to the average measurement frequency.
Specifically, all the resonant cavities on the experimental quantum chip are measured, the measurement frequencies of all the resonant cavities and the corresponding measurement cavity lengths are respectively obtained, and then the average measurement frequency and the corresponding average measurement cavity length are obtained based on the measurement frequencies of all the resonant cavities on the quantum chip and the corresponding measurement cavity lengths.
And step S12, obtaining the low-temperature equivalent relative dielectric constant of the experimental quantum chip based on the average measurement frequency, the average measurement cavity length corresponding to the average measurement frequency and the first preset corresponding relation.
In the specific implementation, the average measurement frequency and the average measurement cavity length corresponding to the average measurement frequency are used as independent variables to be input into a pre-trained second calculation model, and then the solving parameters of the second calculation model can be obtained. The calculation principle of the second calculation model is pre-trained based on the first preset corresponding relation, and the solving parameter of the second calculation model is the low-temperature equivalent relative dielectric constant of the experimental quantum chip.
For example, referring to fig. 3, the determining, based on the target frequencies of the set resonant cavities and the target cavity lengths corresponding to the set resonant cavities and the second preset corresponding relations, the target cavity lengths corresponding to the target frequencies of the remaining resonant cavities to be set one by one specifically includes:
step S31, determining the difference value between the target frequency of the rest of the resonators to be set and the target frequency of the set resonator based on the target frequency of the set resonator and the target frequency of the rest of the resonators to be set.
Step S32, determining the difference value between the target cavity length of the rest of the resonant cavities to be set and the target cavity length of the set resonant cavities one by one based on the difference value between the target frequency of the rest of the resonant cavities to be set and the target frequency of the set resonant cavities and the second preset corresponding relation.
And step S33, determining the target cavity lengths of the rest of the resonant cavities to be set based on the target cavity lengths of the set resonant cavities and the difference value of the target cavity lengths of the rest of the resonant cavities to be set and the target cavity lengths of the set resonant cavities.
The second preset relationship is specifically: Δf=k×Δλ, where Δf is a difference between two target frequencies, Δλ is a difference between target cavity lengths corresponding to the two target frequencies, and k is a constant.
Then in step S33, for example, based on the already existingAnd determining the target cavity length of the resonant cavity to be set according to the target cavity length of the resonant cavity to be set and the difference value of the target cavity length of one resonant cavity to be set and the target cavity length of the resonant cavity to be set. The method comprises the steps of setting the target cavity length of a resonant cavity, setting the difference value between the target cavity length of one resonant cavity to be set and the target cavity length of the resonant cavity to be set, and setting the target cavity length of the resonant cavity to be set to be as follows: lambda (lambda) i ＝λ 0 +Δλ, i.e. satisfies: lambda (lambda) i ＝λ 0 +Δf/k, wherein the target cavity length of one of the to-be-set resonant cavities is the target cavity length of the set resonant cavity. And by adopting the same method, the target cavity lengths of other resonant cavities on the target quantum chip can be determined one by one.
The first preset correspondence is specifically:
wherein f is the frequency of the resonant cavity of the quantum chip, lambda is the cavity length of the resonant cavity of the quantum chip, epsilon eff The dielectric constant of the quantum chip is given, and c is a constant.
The target quantum chip is provided with N quantum bits and resonant cavities which are in one-to-one correspondence and are mutually coupled, the target frequencies of the N resonant cavities are not equal, and the difference value of the target frequencies of the resonant cavities which are connected by coupling any two adjacent quantum bits is larger than a preset threshold, wherein the preset threshold is set according to the machining precision of the resonant cavities. In this embodiment, the operating frequency range of the resonant cavity on the target quantum chip is 4-8 GHz, and the preset threshold value is 30MHz.
For example, the target frequencies of the N sequentially arranged resonant cavities are set in equal difference, for example, 24 resonant cavities are arranged on the target quantum chip, the target frequency of the resonant cavity of the target quantum chip is set with a tolerance of 30MHz, for example, the minimum target frequency of the resonant cavity on the target quantum chip is 6.6GHz, and the maximum target frequency of the resonant cavity on the target quantum chip is 7.29GHz.
The target quantum chip further includes a number of quantum bits consistent with the number of the resonant cavities, and the resonant cavities and the corresponding quantum bits are coupled through a coupling capacitor, so when quantum computation is performed on the target quantum chip, the quantum bits are set at a high level and a low level based on the coupling strength (determined by the coupling capacitance) of the resonant cavities and the corresponding quantum bits. Therefore, the coupling capacitance values of the adjacent coupling connection qubit and the resonant cavity are different, the coupling capacitance values of the interval coupling connection qubit and the resonant cavity are the same, and the second preset relation is related to the coupling capacitance of the coupling connection qubit and the resonant cavity. For example, in this embodiment, taking the coupling capacitance values of the adjacent coupling connection qubit and the resonant cavity as 6fF and 2fF as an example, when the coupling capacitance of the coupling connection qubit and the resonant cavity is 6fF, the second preset relationship is Δf=60 MHz/36um×Δλ; when the coupling capacitance of the coupling sub-bit and the resonant cavity is 2fF, the second preset relationship is Δf=60 MHz/34um×Δλ. In step S33, a corresponding second preset relationship is selected for calculation.
Based on the same inventive concept, the present embodiment also provides a quantum processor, and the resonant cavity on the quantum processor is designed by the design method of the large-scale quantum chip resonant cavity.
In summary, the design method of the large-scale quantum chip resonant cavity and the quantum processor provided by the invention have the following advantages: when the design method is used for setting the large-scale quantum chip resonant cavities, firstly, the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate is obtained, then, the target frequencies corresponding to all the resonant cavities to be set on the target quantum chip substrate are determined, the target cavity length of one resonant cavity to be set with the target frequency is determined based on the low-temperature equivalent relative dielectric constant and the first preset corresponding relation, and finally, the target cavity lengths corresponding to the target frequencies of the rest resonant cavities to be set are determined one by one based on the target frequencies of the set resonant cavities, the target cavity lengths corresponding to the set resonant cavities and the second preset corresponding relation. According to the invention, the substrate parameters of the target quantum chip are corrected, then the target parameters of one resonant cavity on the target quantum chip are simulated based on the corrected substrate parameters, and then the target parameters of other resonant cavities are calculated by being beneficial to the target parameters of different resonant cavities on the same target quantum chip to meet a specific relational expression, so that the design time is greatly shortened, the design cost is reduced, and the difference value between the actual parameters and the target parameters of the subsequently manufactured resonant cavities of the target quantum chip is smaller.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (9)
1. The design method of the large-scale quantum chip resonant cavity, wherein the resonant cavity consists of a coplanar waveguide transmission line, is characterized by comprising the following steps:
obtaining the low-temperature equivalent relative dielectric constant of the experimental quantum chip substrate; the low-temperature equivalent relative dielectric constant is a fixed parameter of the experimental quantum chip substrate in a low-temperature environment, and the low-temperature environment is a working environment of the quantum chip;
determining target frequencies corresponding to all to-be-set resonant cavities on a target quantum chip substrate, and determining the target cavity length of one to-be-set resonant cavity with the target frequencies based on the low-temperature equivalent relative dielectric constant and a first preset corresponding relation; the first preset corresponding relation is a relation between the frequency of the resonant cavity, the corresponding cavity length and the dielectric constant of the quantum chip substrate;
determining the target cavity lengths corresponding to the target frequencies of the rest resonant cavities to be set one by one based on the target frequencies of the set resonant cavities and the corresponding target cavity lengths thereof and a second preset corresponding relation, wherein the second preset corresponding relation is a relation between the frequencies of two different resonant cavities and the corresponding cavity lengths thereof.
2. The method for designing a large-scale quantum chip resonator according to claim 1, wherein the obtaining the low-temperature equivalent relative permittivity of the experimental quantum chip substrate specifically comprises:
obtaining the average measurement frequency of the resonant cavity of the experimental quantum chip and the average measurement cavity length corresponding to the average measurement frequency;
and acquiring the low-temperature equivalent relative dielectric constant of the experimental quantum chip based on the average measurement frequency, the average measurement cavity length corresponding to the average measurement frequency and the first preset corresponding relation.
3. The method for designing a large-scale quantum chip resonant cavity according to claim 1, wherein the determining the target cavity length corresponding to the target frequencies of the remaining resonant cavities to be set based on the target frequencies of the set resonant cavities and the corresponding target cavity lengths thereof and the second preset corresponding relation one by one specifically comprises:
determining the difference value between the target frequency of the other resonant cavities to be set and the target frequency of the set resonant cavity based on the target frequency of the set resonant cavity and the target frequency of the other resonant cavities to be set respectively;
determining the difference value between the target cavity length of the rest of the resonant cavities to be set and the target cavity length of the set resonant cavities one by one based on the difference value between the target frequency of the rest of the resonant cavities to be set and the target frequency of the set resonant cavities and a second preset corresponding relation;
and respectively determining the target cavity lengths of the rest of the resonant cavities to be set based on the target cavity lengths of the set resonant cavities and the difference value of the target cavity lengths of the rest of the resonant cavities to be set and the target cavity lengths of the set resonant cavities.
4. The method for designing a large-scale quantum chip resonator according to claim 1, wherein the first preset correspondence relationship specifically includes:
wherein f is the frequency of the resonant cavity of the quantum chip, lambda is the cavity length of the resonant cavity of the quantum chip, epsilon eff Dielectric as quantum chipConstant, c is a constant.
5. The method for designing a large-scale quantum chip resonator according to claim 1, wherein the second preset relationship is specifically: Δf=k×Δλ, where Δf is a difference between two target frequencies, Δλ is a difference between target cavity lengths corresponding to the two target frequencies, and k is a constant.
6. The method for designing a large-scale quantum chip resonant cavity according to claim 5, wherein N quantum bits and resonant cavities which are in one-to-one correspondence and are mutually coupled are arranged on the target quantum chip, the target frequencies of the N resonant cavities are not equal, and the difference value of the target frequencies of the resonant cavities of any two adjacent quantum bit coupling connection is larger than a preset threshold, wherein the preset threshold is set according to the machining precision of the resonant cavities.
7. The method of designing a large-scale quantum chip resonator according to claim 6, wherein the target frequencies of the N sequentially arranged resonators are set equal to each other.
8. The method of claim 5, wherein the coupling capacitances of adjacent coupling-connected qubits and the resonator are different, and the coupling capacitances of the spaced coupling-connected qubits and the resonator are the same, and the second predetermined relationship is related to the coupling capacitances of the coupling-connected qubits and the resonator.
9. A quantum processor, wherein the resonant cavity on the quantum processor is designed by the method for designing a large-scale quantum chip resonant cavity according to any one of claims 1-8.
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