CN116204360A - Backboard testing method and device, electronic equipment and storage medium - Google Patents

Backboard testing method and device, electronic equipment and storage medium Download PDF

Info

Publication number
CN116204360A
CN116204360A CN202310070770.2A CN202310070770A CN116204360A CN 116204360 A CN116204360 A CN 116204360A CN 202310070770 A CN202310070770 A CN 202310070770A CN 116204360 A CN116204360 A CN 116204360A
Authority
CN
China
Prior art keywords
test
tested
information
backboard
configuration information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310070770.2A
Other languages
Chinese (zh)
Inventor
刘宝塔
孙薇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202310070770.2A priority Critical patent/CN116204360A/en
Publication of CN116204360A publication Critical patent/CN116204360A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The invention provides a backboard testing method, a backboard testing device, electronic equipment and a storage medium, wherein the backboard testing method comprises the following steps: acquiring test task configuration information of each of the plurality of backplates to be tested; acquiring test resource information of the main board; transmitting the test resource information and the test task configuration information of each of the plurality of backplates to be tested to the motherboard; receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes test resources corresponding to each of the plurality of back boards to be tested; and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources. Because a plurality of backplates to be tested can be connected on the same motherboard through the expansion board for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupation rate of test space is reduced.

Description

Backboard testing method and device, electronic equipment and storage medium
Technical Field
The present invention relates to the field of server testing technologies, and in particular, to a method and apparatus for testing a back board, an electronic device, and a storage medium.
Background
With the continuous development of server technology, the demands of traditional information services and increasingly powerful cloud computing services for servers are increasing. A series of server tests, such as stress tests, stability tests, performance tests, etc., are required before the server leaves the factory to ensure that the functions of the server are up to standard.
The current server test is limited by the number of the motherboard interfaces, and usually adopts a mode that one motherboard is connected with one backboard for testing, but the test of one backboard cannot completely use all the resources of the motherboard, so that the problems of larger occupation of test space and low utilization rate of motherboard resources are caused.
Disclosure of Invention
In view of the above, the present invention is directed to a method, an apparatus, an electronic device, and a storage medium for testing a back board, so as to solve the problem of low utilization rate of resources of a current server testing motherboard.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the back plate testing method is applied to an expansion plate, wherein the expansion plate is connected with a main plate and is respectively connected with a plurality of back plates to be tested; the method comprises the following steps:
acquiring test task configuration information of each of the plurality of backplates to be tested, and acquiring test resource information of the motherboard;
Receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes test resources corresponding to each of the plurality of back boards to be tested;
and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources.
Further, the expansion board comprises a plurality of configuration interfaces, and the plurality of configuration interfaces are respectively connected with the plurality of back boards to be tested; the obtaining the configuration information of the test tasks of each of the plurality of backplates to be tested includes:
identifying the backboard to be tested connected with each configuration interface;
sending a command for retrieving test task configuration information to each backboard to be tested;
and receiving and analyzing the data packet sent by each backboard to be tested to obtain the test task configuration information of each backboard to be tested.
Further, the obtaining the test resource information of the motherboard includes:
sending a calling command of the test resource information to the main board;
and receiving and analyzing the data packet sent by the main board to obtain the test resource information of the main board.
Further, after receiving the resource allocation information sent by the motherboard, the method further includes: generating a cloud control panel, wherein the cloud control panel is used for creating a test environment for the plurality of back boards to be tested by utilizing the corresponding test resources of the plurality of back boards to be tested according to the respective test task configuration information of the plurality of back boards to be tested;
Controlling the plurality of backplates to be tested to use the respective corresponding test resources, and executing respective test tasks according to the respective test task configuration information, wherein the method comprises the following steps:
and controlling the plurality of back boards to be tested to execute the test tasks in the test environments.
Further, the plurality of backplates to be tested includes: a test indicator light; the controlling the plurality of backplanes to be tested to execute respective testing tasks in respective testing environments includes:
controlling the plurality of back plates to be tested to be on when executing the respective test tasks in the respective test environments, and turning off the test indicator lamps after the test is finished;
and after the test indicator lamp of the target backboard is turned off, the test resource allocation of the target backboard is released, and the test resource is recovered and returned to the main board.
Compared with the prior art, the backboard testing method provided by the invention has the following advantages:
the invention obtains the configuration information of the test tasks of each of the plurality of backplates to be tested; acquiring test resource information of the main board; transmitting the test resource information and the test task configuration information of each of the plurality of backplates to be tested to the motherboard; receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes test resources corresponding to each of the plurality of back boards to be tested; and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources. Because a plurality of backplates to be tested can be connected on the same motherboard through the expansion board for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupation rate of test space is reduced.
Another objective of the present invention is to provide a method for testing a back board, so as to solve the problem of low utilization rate of resources of a main board tested by a server at present.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the backboard testing method is applied to a main board, wherein the main board is connected with an expansion board, and the expansion board is respectively connected with a plurality of backboard to be tested; the method comprises the following steps:
responding to a calling command of the test resource information, and sending the test resource information to the expansion board;
receiving the respective test task configuration information of the plurality of backplates to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of backplates to be tested;
and sending the test resource allocation result to the expansion board.
The back panel testing method has the same advantages as the back panel testing method described above with respect to the prior art, and will not be described in detail herein.
Another objective of the present invention is to provide a method for testing a back board, so as to solve the problem of low utilization rate of resources of a main board tested by a server at present.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the back plate testing method is applied to a back plate to be tested, and a plurality of back plates to be tested are respectively connected with the expansion plate; the method comprises the following steps:
Responding to a calling command of test task configuration information, and sending a plurality of test task configuration information to the expansion board;
receiving resource allocation information sent by the expansion board;
and executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
The back panel testing method has the same advantages as the back panel testing method described above with respect to the prior art, and will not be described in detail herein.
Another objective of the present invention is to provide a device for testing a back board, so as to solve the problem of low utilization rate of resources of a main board tested by a server at present.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the backboard testing device is applied to an expansion board, wherein the expansion board is connected with a main board, and the expansion board is respectively connected with a plurality of backboard to be tested; the device comprises:
the acquisition module is used for acquiring the test task configuration information of each of the plurality of backplates to be tested and acquiring the test resource information of the mainboard;
the first sending module is used for receiving resource allocation information sent by the main board, and the resource allocation information characterizes the test resources corresponding to each of the plurality of back boards to be tested;
And the control module is used for controlling the plurality of back boards to be tested to execute respective test tasks by using the respective corresponding test resources according to the respective test task configuration information.
The back panel testing device and the back panel testing method have the same advantages as compared with the prior art, and are not described in detail herein.
Another objective of the present invention is to provide a device for testing a back board, so as to solve the problem of low utilization rate of resources of a main board tested by a server at present.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the backboard testing device is applied to a main board, wherein the main board is connected with an expansion board, and the expansion board is respectively connected with a plurality of backboard to be tested; the device comprises:
the second sending module is used for responding to the calling command of the test resource information and sending the test resource information to the expansion board;
the distribution module is used for receiving the test task configuration information of each of the plurality of back boards to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of back boards to be tested;
and the third sending module is used for sending the test resource allocation result to the expansion board.
The back panel testing device and the back panel testing method have the same advantages as compared with the prior art, and are not described in detail herein.
Another objective of the present invention is to provide a device for testing a back board, so as to solve the problem of low utilization rate of resources of a main board tested by a server at present.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
the backboard testing device is applied to a backboard to be tested, and a plurality of backboard to be tested are respectively connected with the expansion board; the device comprises:
a fourth sending module, configured to send a plurality of test task configuration information to the expansion board in response to a call command of the test task configuration information;
the second receiving module is used for receiving the resource allocation information sent by the expansion board;
and the test module is used for executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
The back panel testing device and the back panel testing method have the same advantages as compared with the prior art, and are not described in detail herein.
Another objective of the present invention is to provide an electronic device, so as to solve the problem of low utilization rate of the current server testing motherboard resources.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
an electronic device, comprising:
a processor, a memory, and a computer program stored on the memory and executable on the processor, the processor implementing the back panel testing method of any of the above when executing the program.
The electronic device and the back plate testing method have the same advantages as those of the prior art, and are not described in detail herein.
Another objective of the present invention is to provide a computer readable storage medium to solve the problem of low utilization of the resources of the current server test motherboard.
In order to achieve the above purpose, the technical scheme of the invention is realized as follows:
a computer-readable storage medium, comprising:
the instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the back panel testing method of any one of the above.
The computer readable storage medium and the back plate testing method have the same advantages as those of the prior art, and are not described herein.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention. In the drawings:
FIG. 1 is a flow chart showing the steps of a method for testing a back board according to a first embodiment of the present invention;
FIG. 2 is a flowchart showing the steps for obtaining configuration information of a testing task of a back panel testing method according to another embodiment of the present invention;
FIG. 3 is a flowchart showing the steps for obtaining test resource information of a back panel test method according to another embodiment of the present invention;
FIG. 4 is a flow chart showing the steps of a method for testing a back plate according to another embodiment of the present invention;
FIG. 5 is a flowchart showing the steps of a test indicator control of a back panel test method according to another embodiment of the present invention;
FIG. 6 is a flow chart showing steps of a method for testing a back board according to a second embodiment of the present invention;
FIG. 7 is a flow chart showing the steps of a method for testing a back board according to a third embodiment of the present invention;
FIG. 8 is a general flow chart of a back panel test method according to yet another embodiment of the present invention;
FIG. 9 is a schematic structural diagram of a back board testing device according to a fourth embodiment of the present invention;
FIG. 10 is a schematic structural diagram of a back board testing device according to a fifth embodiment of the present invention;
FIG. 11 is a schematic structural diagram of a back board testing device according to a sixth embodiment of the present invention;
FIG. 12 is a schematic diagram showing the connection of an expansion board to a motherboard and a plurality of backplanes to be tested;
FIG. 13 shows a schematic diagram of the connection of an expansion board to a backplane to be tested;
fig. 14 shows a schematic diagram of an expansion board sending a call command.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other without collision.
Example 1
Referring to fig. 1, fig. 1 shows a step flowchart of a back board testing method according to a first embodiment of the present invention, where the method is applied to an expansion board, the expansion board is connected to a motherboard, and the expansion board is respectively connected to a plurality of back boards to be tested. As shown in fig. 1, includes:
step S101: acquiring the configuration information of the test tasks of each of the plurality of backplates to be tested, and acquiring the test resource information of the motherboard.
The server refers to a computer for managing computing resources, and comprises a main board and a back board.
Servers are typically subjected to a series of server tests before shipment to test whether the operation and performance of the server meet standards. Such as system function tests, system pressure tests, interface tests, load tests, etc.
The current server test is usually tested by adopting a mode that one main board is connected with one back board to be tested due to the limitation of the number of main board interfaces, but the test of one back board to be tested cannot fully use all the resources of the main board, so that the problems of larger occupied test space and low utilization rate of the main board resources are caused.
With the continuous development of server technology, the demands of traditional informatization services and increasingly powerful cloud computing services on servers are increasing. To cope with the increasing test demands of servers, it is very important to cover the test tasks of multiple backplanes on the same motherboard.
In an embodiment of the invention, a back board testing method for testing tasks of covering a plurality of back boards on the same main board is provided.
First, an expansion board is configured, referring to fig. 12, fig. 12 shows a schematic diagram of connection of the expansion board to a motherboard and a plurality of backplanes to be tested, and as shown in fig. 12, the expansion board includes a motherboard interface, a plurality of configuration interfaces, and an expansion board processor.
In a specific implementation, the motherboard interface includes a power interface, an I2C interface, and an SAS interface; each configuration interface comprises a power interface, an I2C interface and an SAS interface; the expansion board processor may be an ann's Advanced RISC Machine (ARM) processor.
The expansion board is connected with the main board through a main board interface and is respectively connected with a plurality of back boards to be tested through a plurality of configuration interfaces.
When testing a plurality of backplates to be tested, connecting the mainboard interfaces of the expansion board with the mainboard, and respectively connecting a plurality of configuration interfaces of the expansion board with the backplates to be tested.
Illustratively, a first configuration interface of the expansion board is connected with a first backboard to be tested; connecting a second configuration interface of the expansion board with a second backboard to be tested; and connecting a third configuration interface of the expansion board with a third backboard to be tested.
The method comprises the steps that through an expansion board processor, respective test task configuration information of a plurality of backplates to be tested is called, wherein the test task configuration information can comprise resource information, such as memory resources, operation resources, bandwidth resources and the like, required by the respective test tasks of the backplates to be tested; information of functions of each back plate to be tested, such as a storage function, a data transmission function, and the like, which need to be tested can also be included.
Illustratively, first test task configuration information of a first backboard to be tested is called; calling second test task configuration information of a second backboard to be tested; and calling the third test task configuration information of a third backboard to be tested.
And then, the expansion board processor is used for retrieving the test resource information of the main board, wherein the test resource information is used for representing the resource information, such as memory resources, operation resources, bandwidth resources and the like, which can be provided for each to-be-tested back board to test.
And integrating the acquired test task configuration information of each of the plurality of backplates to be tested with the test resource information of the motherboard, and then sending the integrated test task configuration information to the motherboard.
Then step S102 is performed.
Step S102: and receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes the test resources corresponding to each of the plurality of back boards to be tested.
After the expansion board sends the integrated test task configuration information of each of the plurality of backplanes to be tested and the test resource information of the main board to the main board, the main board allocates the test resource of each of the backplanes to be tested based on the information and sends the test resource allocation information to the expansion board processor.
In one particular implementation, the allocation of test resources may include: memory resource allocation, running resource allocation, bandwidth resource allocation, etc.
For example, a first test resource is allocated to a first backplane to be tested, a second resource to be tested is allocated to a second backplane to be tested, and a third resource to be tested is allocated to a third backplane to be tested. The first resource to be tested, the second resource to be tested and the third resource to be tested may be the same or different.
The expansion board receives resource allocation information, sent by the main board, of each backboard to be tested, and sends the resource allocation information to the corresponding backboard to be tested.
Illustratively, the allocation information of the first test resource is sent to a first backboard to be tested; transmitting the allocation information of the second test resource to a second backboard to be tested; and sending the allocation information of the third test resource to a third backboard to be tested.
Then step S103 is performed.
Step S103: and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources.
After the expansion board sends the resource allocation information of each backboard to be tested to the corresponding backboard to be tested, each backboard to be tested is controlled to use the allocated test resources, respective test tasks are executed according to the respective test task configuration information, and the test results are output.
The expansion board controls the first backboard to be tested to use the first test resource, and tests corresponding functions according to the information of the functions to be tested in the first test task configuration information; controlling the second backboard to be tested to use second test resources, and testing corresponding functions according to the information of the functions to be tested in the second test task configuration information; and controlling the third backboard to be tested to use third test resources, and testing corresponding functions according to the information of the functions to be tested in the third test task configuration information.
According to the embodiment of the invention, the configuration information of the test tasks of each of the plurality of backplates to be tested is obtained; acquiring test resource information of the main board; transmitting the test resource information and the test task configuration information of each of the plurality of backplates to be tested to the motherboard; receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes test resources corresponding to each of the plurality of back boards to be tested; and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources. Because a plurality of backplates to be tested can be connected on the same motherboard through the expansion board for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupation rate of test space is reduced.
Referring to fig. 2, fig. 2 is a flowchart illustrating a step of acquiring test task configuration information of a back panel testing method according to another embodiment of the present invention, where the method includes:
step S201: and identifying the backboard to be tested, which is connected with each configuration interface.
Referring to fig. 13, fig. 13 shows a schematic diagram of connection of an expansion board to a backplane to be tested, and as shown in fig. 13, the expansion board includes a motherboard interface, a plurality of configuration interfaces, and an expansion board processor. Each configuration interface comprises a power interface, an I2C interface and an SAS interface. The plurality of configuration interfaces of the expansion board are respectively connected with the plurality of back boards to be tested.
The configuration interfaces carry corresponding numbered tag information.
For example, the first configuration interface carries tag information of number one, the second configuration interface carries tag information of number two, and the third configuration interface carries tag information of number three.
Each backplane to be tested comprises a power interface, an I2C interface and an SAS interface. The backboard to be tested is connected with the corresponding interfaces of the expansion board configuration interfaces one by one through the three interfaces, so that the connection with the expansion board configuration interfaces is realized.
When the configuration information of the test task of each back plate to be tested is obtained, the expansion board processor firstly identifies the back plate to be tested connected with each configuration interface, and then the serial number label information carried by the configuration interface is related to the back plate to be tested connected with the corresponding configuration interface.
For example, the label information of the serial number one of the first configuration interface is associated to the backboard to be tested connected with the first configuration interface, so as to obtain a first backboard to be tested; the number two label information of the second configuration interface is related to the backboard to be tested connected with the second configuration interface, and a second backboard to be tested is obtained; and associating the serial number three-tag information of the third configuration interface to the backboard to be tested connected with the third configuration interface to obtain a third backboard to be tested.
Step S202 is then performed.
Step S202: and sending a call command of the test task configuration information to each backboard to be tested.
Referring to fig. 14, fig. 14 is a schematic diagram showing that an expansion board sends a call command, and as shown in fig. 14, after an expansion board processor identifies a plurality of backplanes to be tested connected to a configuration interface, a call command for test task configuration information of each backplane to be tested is generated, and the call command is sent to each backplane to be tested through an I2C interface.
For example, the expansion board processor generates a call command for the test task configuration information of the first to-be-tested backplate, the second to-be-tested backplate, and the third to-be-tested backplate, and sends the call command to the to-be-tested backplate, the second to-be-tested backplate, and the third to-be-tested backplate simultaneously.
After each backboard to be tested receives the calling command, the configuration information of the testing task is packaged into a data packet, and the data packet is sent to the expansion board processor through the SAS interface.
In a specific implementation, the test task configuration information may include resource information required by respective test tasks of each backplane to be tested, such as a memory resource, an operation resource, a bandwidth resource, and the like; information of functions of each back plate to be tested, such as a storage function, a data transmission function, and the like, which need to be tested can also be included.
Then step S203 is performed.
Step S203: and receiving and analyzing the data packet sent by each backboard to be tested to obtain the test task configuration information of each backboard to be tested.
After receiving the data packets of the respective test task configuration information sent by each back plate to be tested through the SAS interface, the expansion plate processor analyzes the data packets to obtain the test task configuration information data of each back plate to be tested.
Illustratively, a first data packet sent by a first backboard to be tested is received and analyzed to obtain first test task configuration information; simultaneously receiving and analyzing a second data packet sent by a second backboard to be tested to obtain second test task configuration information; and simultaneously receiving and analyzing a third data packet sent by a third backboard to be tested to obtain third test task configuration information.
The embodiment of the invention identifies the backboard to be tested connected with each configuration interface; sending a calling command of the test task configuration information to each backboard to be tested; and receiving and analyzing the data packet sent by each backboard to be tested to obtain the test task configuration information of each backboard to be tested. And acquiring test task configuration information of each backboard to be tested, and providing a data base for allocation of test resources.
Referring to fig. 3, fig. 3 is a flowchart illustrating steps of obtaining test resource information of a back panel test method according to another embodiment of the present invention, as shown in fig. 3, including:
step S301: and sending a calling command of the test resource information to the main board.
The expansion board comprises a main board interface, and the main board interface comprises a power interface, an I2C interface and an SAS interface. The expansion board is connected with the main board by connecting the three interfaces of the main board interface with the interfaces corresponding to the main board one by one.
When the test resource information of the main board is called, the expansion board processor firstly identifies the connected main board and generates a calling command for the test resource information of the main board.
The call command is sent to the motherboard through the I2C interface.
After receiving the call command, the main board packages the test resource information into a data packet, and sends the data packet to the expansion board processor through the SAS interface.
Step S302 is then performed.
Step S302: and receiving and analyzing the data packet sent by the main board to obtain the test resource information of the main board.
And the expansion board processor receives and analyzes the data packet of the test resource information sent by the main board through the SAS interface to obtain the test resource information of the main board.
In a specific implementation, the test resource information is used to characterize resource information, such as memory resources, operation resources, bandwidth resources, etc., that can be provided by the motherboard to each backplane to be tested for testing.
According to the embodiment of the invention, the calling command of the test resource information is sent to the main board; and receiving and analyzing the data packet sent by the main board to obtain the test resource information of the main board. And acquiring test resource information of the main board, and providing a data basis for allocation of the test resources.
Referring to fig. 4, fig. 4 is a flowchart illustrating steps of a method for testing a back board according to another embodiment of the present invention, as shown in fig. 4, including:
step S401: a cloud control panel is generated.
And the expansion board processor generates a cloud control panel after receiving the test task configuration information of each backboard to be tested and the test resource information of the main board. The cloud control panel is used for creating a test environment for the plurality of backplates to be tested by utilizing the corresponding test resources of the plurality of backplates to be tested according to the respective test task configuration information of the plurality of backplates to be tested.
In one particular implementation, creating a test environment for a plurality of backplanes to be tested may include installing an operating system for the plurality of backplanes to be tested, the operating system for performing test tasks for the backplanes to be tested.
The cloud control panel is a virtual control panel capable of creating a test environment for a plurality of backplanes to be tested and controlling the plurality of backplanes to be tested to execute respective test tasks.
Step S402 is then performed.
Step S402: and controlling the plurality of back boards to be tested to execute the test tasks in the test environments.
After the cloud control panel is generated, the expansion board processor synchronizes the test task configuration information of each back board to be tested, the test resource information of the main board and the resource allocation information of each back board to be tested to the cloud control panel.
And after the cloud control panel receives the information, sending the resource allocation information to the corresponding backboard to be tested. And controlling the plurality of backplanes to be tested to execute respective test tasks in respective operating systems by using the respective allocated resources.
The cloud control panel controls the first backboard to be tested to execute the testing task of the first backboard to be tested in the operating system of the cloud control panel by using the first testing resource; simultaneously controlling a second backboard to be tested in an operating system of the backboard to be tested, and executing a test task of the backboard to be tested by using a second test resource; and simultaneously controlling a third backboard to be tested to execute the test task by using a third test resource in the operating system of the backboard to be tested.
According to the embodiment of the invention, the cloud control panel is generated and is used for creating a test environment for the plurality of backplates to be tested by utilizing the corresponding test resources of the plurality of backplates to be tested according to the respective test task configuration information of the plurality of backplates to be tested; and controlling the plurality of back boards to be tested to execute the respective test tasks in the respective test environments. The cloud control panel is used for realizing the test of covering a plurality of back boards to be tested on one main board simultaneously, so that the utilization rate of main board resources is greatly improved, and the occupancy rate of test space is reduced.
Referring to fig. 5, fig. 5 is a flowchart showing steps of a test indicator control of a back panel test method according to still another embodiment of the present invention, as shown in fig. 5, including:
step S501: and controlling the plurality of back plates to be tested to be on when executing the respective test tasks in the respective test environments, and turning off the test indicator lamps after the test is finished.
Each back plate to be tested is provided with a test indicator light. And when the test indicator lights are turned on, the back plate is currently executing the test task, and when the test indicator lights are turned off, the back plate is not currently executing the test task.
In one specific implementation, the test indicator light being turned off may indicate that the current testing task of the back plate has been completed, or may indicate that the current testing task of the back plate has been interrupted.
After the expansion board processor generates the cloud control panel, the cloud control panel can also control the on and off of the test indicator lamps of each backboard to be tested.
Specifically, the cloud control panel may control the test indicator lamps of each backboard to be tested to be turned on when the corresponding backboard to be tested performs the test task, and to be turned off after the corresponding backboard to be tested no longer performs the test task. The no longer executing the test task may include that the test task has been completed or may include that the test task has been interrupted.
After the test indicator light of the target backboard is turned off, step S502 is performed.
Step S502: and after the test indicator lamp of the target backboard is turned off, the test resource allocation of the target backboard is released, and the test resource is recovered and returned to the main board.
After the test indicator lamp of the target backboard is turned off, the cloud control panel judges that the target backboard does not execute the test task any more, the allocation of the test resources of the target backboard is released, and the test resources originally allocated to the target backboard are recovered and returned to the main board.
According to the embodiment of the invention, the test indicator lamps are turned on when the plurality of back plates to be tested execute respective test tasks in respective test environments, and the test indicator lamps are turned off after the test is finished; and after the test indicator lamp of the target backboard is turned off, releasing the resource allocation of the target backboard, recycling the resource and returning to the main board. The test state of the backboard to be tested is visualized by controlling the on and off of the test indicator lamp, and the corresponding test resource is recovered after the target backboard test indicator lamp is turned off through the cloud control panel, so that the utilization rate of the main board test resource is greatly improved.
Example two
Referring to fig. 6, fig. 6 is a flowchart showing steps of a method for testing a back board according to a second embodiment of the present invention, where the method is applied to a motherboard, the motherboard is connected to an expansion board, and the expansion board is connected to a plurality of back boards to be tested respectively. As shown in fig. 6, includes:
step S601: and responding to a calling command of the test resource information, and sending the test resource information to the expansion board.
The main board is connected with the expansion board, and the expansion board is respectively connected with the plurality of back boards to be tested.
When testing a plurality of backplates to be tested, firstly, the expansion board generates a calling command of testing resource information of the mainboard, and sends the calling command to the mainboard.
And the main board responds to the calling command, packages the test resource information into a data packet and sends the data packet to the expansion board.
In a specific implementation, the test resource information is used to characterize resource information, such as memory resources, operation resources, bandwidth resources, etc., that can be provided by the motherboard to each backplane to be tested for testing.
And then, the expansion board invokes the test task configuration information of each of the plurality of backplanes to be tested, packages the plurality of test task configuration information into a data packet and sends the data packet to the motherboard.
In a specific implementation, the test task configuration information may include resource information required by respective test tasks of each backplane to be tested, such as a memory resource, an operation resource, a bandwidth resource, and the like; information of functions of each back plate to be tested, such as a storage function, a data transmission function, and the like, which need to be tested can also be included.
Step S602 is then performed.
Step S602: and receiving the test task configuration information of each of the plurality of backplates to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of backplates to be tested.
The main board receives and analyzes the data packet of the test task configuration information of each of the plurality of back boards to be tested, which is sent by the expansion board, so as to obtain the test task configuration information of each of the plurality of back boards to be tested.
Based on the resource information required by the test tasks of each of the plurality of backplanes to be tested, the main board distributes the test resources of each of the backplanes to be tested.
Illustratively, a first test resource is allocated to the first backplane to be tested based on the test task configuration information of the first backplane to be tested; distributing second test resources to the second backboard to be tested based on the test task configuration information of the second backboard to be tested; and distributing third test resources to the third backboard to be tested based on the test task configuration information of the third backboard to be tested.
Then step S603 is performed.
Step S603: and sending the test resource allocation result to the expansion board.
The main board sends the test resource allocation information of each back board to be tested to the expansion board, and then sends the resource allocation information to each corresponding back board to be tested through the expansion board. So that each backboard to be tested uses the allocated test resources to execute the respective test tasks.
According to the embodiment of the invention, the test resource information is sent to the expansion board by responding to the call command of the test resource information of the main board; receiving the respective test task configuration information of the plurality of backplates to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of backplates to be tested; and sending the result of the test resource allocation to the expansion board. Because a plurality of backplates to be tested can be connected on the same motherboard through the expansion board for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupation rate of test space is reduced.
Example III
Referring to fig. 7, fig. 7 is a flowchart showing steps of a method for testing a back board according to a third embodiment of the present invention, where the method is applied to a back board to be tested, and a plurality of back boards to be tested are respectively connected to an expansion board. As shown in fig. 7, includes:
step S701: and responding to a calling command of the test task configuration information, and sending a plurality of test task configuration information to the expansion board.
The plurality of back plates to be tested are respectively connected with a plurality of configuration interfaces of the expansion board, and the expansion board is connected with the main board.
The configuration interfaces carry corresponding numbered tag information.
For example, the first configuration interface carries tag information of number one, the second configuration interface carries tag information of number two, and the third configuration interface carries tag information of number three.
When testing a plurality of backplates to be tested, firstly, the expansion board identifies the backplates to be tested connected with each configuration interface, and then the serial number label information carried by the configuration interface is related to the backplates to be tested connected with the corresponding configuration interface.
For example, the label information of the serial number one of the first configuration interface is associated to the backboard to be tested connected with the first configuration interface, so as to obtain a first backboard to be tested; the number two label information of the second configuration interface is related to the backboard to be tested connected with the second configuration interface, and a second backboard to be tested is obtained; and associating the serial number three-tag information of the third configuration interface to the backboard to be tested connected with the third configuration interface to obtain a third backboard to be tested.
Next, the expansion board generates a call command for the test task configuration information of each back board to be tested, and sends the call command to each back board to be tested.
For example, the expansion board processor generates a call command for the test task configuration information of the first to-be-tested backplate, the second to-be-tested backplate, and the third to-be-tested backplate, and sends the call command to the to-be-tested backplate, the second to-be-tested backplate, and the third to-be-tested backplate simultaneously.
And each backboard to be tested responds to the calling command, packages the configuration information of the test task into a data packet and sends the data packet to the expansion board processor.
In a specific implementation, the test task configuration information may include resource information required by respective test tasks of each backplane to be tested, such as a memory resource, an operation resource, a bandwidth resource, and the like; information of functions of each back plate to be tested, such as a storage function, a data transmission function, and the like, which need to be tested can also be included.
And then, the expansion board invokes the test resource information of the main board, integrates the test task configuration information of the plurality of back boards to be tested and the test resource information of the main board and then sends the integrated test task configuration information and the test resource information of the main board to the main board. And the main board allocates the test resources of each back board to be tested, and sends the resource allocation information to the expansion board.
In a specific implementation, the test resource information is used to characterize resource information, such as memory resources, operation resources, bandwidth resources, etc., that can be provided by the motherboard to each backplane to be tested for testing.
For example, a first test resource is allocated to a first backplane to be tested, a second resource to be tested is allocated to a second backplane to be tested, and a third resource to be tested is allocated to a third backplane to be tested. The first resource to be tested, the second resource to be tested and the third resource to be tested may be the same or different.
The expansion board receives resource allocation information, sent by the main board, of each backboard to be tested, and sends the resource allocation information to the corresponding backboard to be tested.
Illustratively, the allocation information of the first test resource is sent to a first backboard to be tested; transmitting the allocation information of the second test resource to a second backboard to be tested; and sending the allocation information of the third test resource to a third backboard to be tested.
Step S702 is then performed.
Step S702: and receiving the resource allocation information sent by the expansion board.
After each backboard to be tested receives the data packet of the resource allocation information sent by the expansion board, the data packet is analyzed to obtain the respective resource allocation information.
Step S703 is then performed.
Step S703: and executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
Each backboard to be tested uses the corresponding test resources according to the resource allocation information, executes the test tasks according to the information of the functions to be tested in the test task configuration information, tests the functions to be tested, and outputs the test results.
Illustratively, the first backplane to be tested uses the first test resource, executes the test task according to the first test task configuration information, and outputs a first test result; the second backboard to be tested uses second test resources, executes a test task according to the second test task configuration information, and outputs a second test result; and the third backboard to be tested uses third test resources, executes the test task according to the third test task configuration information, and outputs a third test result.
According to the embodiment of the invention, a plurality of test task configuration information are sent to the expansion board by responding to a calling command of the test task configuration information of each of the plurality of back boards to be tested; receiving resource allocation information sent by the expansion board; and executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information. Because a plurality of backplates to be tested can be connected on the same motherboard through the expansion board for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupation rate of test space is reduced.
The overall flow of the backboard testing method of the present invention is described in detail below with one example:
referring to fig. 8, fig. 8 is a flowchart showing a method for testing a back board according to still another embodiment of the present invention, as shown in fig. 8, including:
firstly, the expansion board generates a calling command of the configuration information of the test tasks of each of a plurality of backplanes to be tested, and sends the calling command to each of the backplanes to be tested.
And after the plurality of back boards to be tested receive the calling command, packaging the configuration information of the respective test tasks into a data packet and sending the data packet to the expansion board.
The expansion board receives and analyzes the test task configuration information data packet of each backboard to be tested to obtain the test task configuration information of each backboard to be tested.
In a specific implementation, the test task configuration information may include resource information required by respective test tasks of each backplane to be tested, such as a memory resource, an operation resource, a bandwidth resource, and the like; information of functions of each back plate to be tested, such as a storage function, a data transmission function, and the like, which need to be tested can also be included.
Next, the expansion board generates a call command for the test resource information of the motherboard and transmits the call command to the motherboard. And after receiving the calling command, the main board packages the test resource information into a data packet and sends the data packet to the expansion board.
And the expansion board receives and analyzes the data packet of the test resource information sent by the main board to obtain the test resource information of the main board.
In a specific implementation, the test resource information is used to characterize resource information, such as memory resources, operation resources, bandwidth resources, etc., that can be provided by the motherboard to each backplane to be tested for testing.
The expansion board integrates the test task configuration information of each of the plurality of backplates to be tested and the test resource information of the motherboard, sends the integrated test task configuration information to the motherboard, and distributes the test resources by the motherboard.
And the expansion board generates a cloud control panel, and the cloud control panel is used for creating a test environment for the plurality of back boards to be tested by utilizing the corresponding test resources of the plurality of back boards to be tested according to the respective test task configuration information of the plurality of back boards to be tested.
The expansion board processor synchronizes the test task configuration information of each of the plurality of backplanes to be tested and the test resource information of the main board to the cloud control panel, and the cloud control panel receives the test resource allocation information of the main board and sends the resource allocation information to the corresponding backplanes to be tested.
And the plurality of backplanes to be tested receive the resource allocation information, respectively use the allocated test resources, execute the test tasks according to the configuration information of the respective test tasks, and respectively output the test results.
Example IV
Referring to fig. 9, fig. 9 shows a schematic structural diagram of a back board testing device according to a fourth embodiment of the present invention, where the device is applied to an expansion board, the expansion board is connected to a main board, and the expansion board is respectively connected to a plurality of back boards to be tested; comprising the following steps:
the acquiring module 901 is configured to acquire respective test task configuration information of the plurality of backplates to be tested, and acquire test resource information of the motherboard;
a first sending module 902, configured to receive resource allocation information sent by the motherboard, where the resource allocation information characterizes test resources corresponding to each of the plurality of backplanes to be tested;
the control module 903 is configured to control the plurality of backplanes to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources.
In an alternative embodiment, the acquiring module 901 includes:
the identification module is used for identifying the backboard to be tested, which is connected with each configuration interface;
the first sending module is used for sending a command for retrieving the configuration information of the test task to each backboard to be tested;
the first analysis module is used for receiving and analyzing the data packets sent by the back boards to be tested to obtain the test task configuration information of the back boards to be tested.
In an alternative embodiment, the acquiring module 901 further includes:
the second sending module is used for sending a calling command of the test resource information to the main board;
and the second analysis module is used for receiving and analyzing the data packet sent by the main board to obtain the test resource information of the main board.
In an alternative embodiment, the control module 903 includes:
the generating module is used for generating a cloud control panel, and the cloud control panel is used for creating a test environment for the plurality of backplates to be tested by utilizing the corresponding test resources of the plurality of backplates to be tested according to the respective test task configuration information of the plurality of backplates to be tested;
and the first control sub-module is used for controlling the plurality of back boards to be tested to execute the respective test tasks in the respective test environments.
In an alternative embodiment, the control module 903 further includes:
the second control sub-module is used for controlling the test indicator lamps to be turned on when the plurality of back boards to be tested execute the respective test tasks in the respective test environments, and turning off the test indicator lamps after the test is finished;
and the recovery module is used for releasing the test resource allocation of the target backboard after the test indicator lamp of the target backboard is turned off, and recovering the test resource and returning the test resource to the main board.
Example five
Referring to fig. 10, fig. 10 shows a schematic structural diagram of a back board testing device according to a fifth embodiment of the present invention, where the device is applied to a main board, the main board is connected to an expansion board, and the expansion board is connected to a plurality of back boards to be tested respectively; as shown in fig. 10, includes:
a second sending module 1001, configured to send test resource information to the expansion board in response to a call command of the test resource information;
the allocation module 1002 is configured to receive the test task configuration information of each of the plurality of backplates to be tested sent by the expansion board, and allocate test resources of the plurality of backplates to be tested;
and a third sending module 1003, configured to send the test resource allocation result to the expansion board.
Example six
Referring to fig. 11, fig. 11 shows a schematic structural diagram of a back board testing device according to a sixth embodiment of the present invention, where the device is applied to a back board to be tested, and a plurality of the back boards to be tested are respectively connected to an expansion board; as shown in fig. 11, includes:
a fourth sending module 1101, configured to send a plurality of test task configuration information to the expansion board in response to a call command of the test task configuration information;
A second receiving module 1102, configured to receive resource allocation information sent by the expansion board;
and the test module 1103 is configured to execute respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
Based on the same inventive concept, an embodiment of the present invention further provides an electronic device, including:
a processor, a memory and a computer program stored on the memory and executable on the processor, the processor implementing the back panel testing method of any of the above embodiments when the program is executed.
Based on the same inventive concept, an embodiment of the present invention also provides a computer-readable storage medium including:
the instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the back panel testing method of any one of the above embodiments.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the invention.
For the purposes of simplicity of explanation, the methodologies are shown as a series of acts, but one of ordinary skill in the art will recognize that the present invention is not limited by the order of acts described, as some acts may, in accordance with the present invention, occur in other orders and concurrently. Further, those skilled in the art will recognize that the embodiments described in the specification are all of the preferred embodiments, and that the acts and components referred to are not necessarily required by the present invention.
The method, the device, the electronic equipment and the storage medium for testing the backboard provided by the invention are described in detail, and specific examples are applied to the principle and the implementation mode of the invention, and the description of the above examples is only used for helping to understand the method and the core idea of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (12)

1. The back plate testing method is characterized by being applied to an expansion plate, wherein the expansion plate is connected with a main plate and is respectively connected with a plurality of back plates to be tested; the method comprises the following steps:
Acquiring test task configuration information of each of the plurality of backplates to be tested, and acquiring test resource information of the motherboard;
transmitting the test resource information and the test task configuration information of each of the plurality of backplates to be tested to the motherboard;
receiving resource allocation information sent by the main board, wherein the resource allocation information characterizes test resources corresponding to each of the plurality of back boards to be tested;
and controlling the plurality of back boards to be tested to execute respective test tasks according to the respective test task configuration information by using the respective corresponding test resources.
2. The method of claim 1, wherein the expansion board comprises a plurality of configuration interfaces, the plurality of configuration interfaces being respectively connected with the plurality of backplanes to be tested; the obtaining the configuration information of the test tasks of each of the plurality of backplates to be tested includes:
identifying the backboard to be tested connected with each configuration interface;
sending a command for retrieving test task configuration information to each backboard to be tested;
and receiving and analyzing the data packet sent by each backboard to be tested to obtain the test task configuration information of each backboard to be tested.
3. The method of claim 1, wherein the obtaining test resource information of the motherboard comprises:
sending a calling command of the test resource information to the main board;
and receiving and analyzing the data packet sent by the main board to obtain the test resource information of the main board.
4. The method according to claim 1, further comprising, after receiving the resource allocation information sent by the motherboard: generating a cloud control panel, wherein the cloud control panel is used for creating a test environment for the plurality of back boards to be tested by utilizing the corresponding test resources of the plurality of back boards to be tested according to the respective test task configuration information of the plurality of back boards to be tested;
controlling the plurality of backplates to be tested to use the respective corresponding test resources, and executing respective test tasks according to the respective test task configuration information, wherein the method comprises the following steps:
and controlling the plurality of back boards to be tested to execute the test tasks in the test environments.
5. The method of claim 4, wherein the plurality of backplates to be tested comprises: a test indicator light; the controlling the plurality of backplanes to be tested to execute respective testing tasks in respective testing environments includes:
Controlling the plurality of back plates to be tested to be on when executing the respective test tasks in the respective test environments, and turning off the test indicator lamps after the test is finished;
and after the test indicator lamp of the target backboard is turned off, the test resource allocation of the target backboard is released, and the test resource is recovered and returned to the main board.
6. The back plate testing method is characterized by being applied to a main plate, wherein the main plate is connected with an expansion plate, and the expansion plate is respectively connected with a plurality of back plates to be tested; the method comprises the following steps:
responding to a calling command of the test resource information, and sending the test resource information to the expansion board;
receiving the respective test task configuration information of the plurality of backplates to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of backplates to be tested;
and sending the test resource allocation result to the expansion board.
7. The back plate testing method is characterized by being applied to a back plate to be tested, wherein a plurality of back plates to be tested are respectively connected with an expansion plate; the method comprises the following steps:
responding to a calling command of test task configuration information, and sending a plurality of test task configuration information to the expansion board;
Receiving resource allocation information sent by the expansion board;
and executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
8. The backboard testing device is characterized by being applied to an expansion board, wherein the expansion board is connected with a main board, and the expansion board is respectively connected with a plurality of backboard to be tested; the device comprises:
the acquisition module is used for acquiring the test task configuration information of each of the plurality of backplates to be tested and acquiring the test resource information of the mainboard;
the first sending module is used for sending the test resource information and the test task configuration information of each of the plurality of backplates to be tested to the motherboard;
the first receiving module is used for receiving resource allocation information sent by the main board, and the resource allocation information characterizes the test resources corresponding to each of the plurality of back boards to be tested;
and the control module is used for controlling the plurality of back boards to be tested to execute respective test tasks by using the respective corresponding test resources according to the respective test task configuration information.
9. The backboard testing device is characterized by being applied to a main board, wherein the main board is connected with an expansion board, and the expansion board is respectively connected with a plurality of backboard to be tested; the device comprises:
The second sending module is used for responding to the calling command of the test resource information and sending the test resource information to the expansion board;
the distribution module is used for receiving the test task configuration information of each of the plurality of back boards to be tested, which is sent by the expansion board, and distributing the test resources of the plurality of back boards to be tested;
and the third sending module is used for sending the test resource allocation result to the expansion board.
10. The backboard testing device is characterized by being applied to a backboard to be tested, and a plurality of backboard to be tested are respectively connected with the expansion board; the device comprises:
a fourth sending module, configured to send a plurality of test task configuration information to the expansion board in response to a call command of the test task configuration information;
the second receiving module is used for receiving the resource allocation information sent by the expansion board;
and the test module is used for executing respective test tasks according to the respective test task configuration information by using respective corresponding test resources according to the resource allocation information.
11. An electronic device, comprising:
a processor, a memory and a computer program stored on the memory and executable on the processor, the processor implementing the back panel testing method of any one of claims 1 to 5, or claim 6, or claim 7 when the program is executed.
12. A computer readable storage medium, wherein instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the backplane testing method of any of claims 1-5, or claim 6, or claim 7.
CN202310070770.2A 2023-01-29 2023-01-29 Backboard testing method and device, electronic equipment and storage medium Pending CN116204360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310070770.2A CN116204360A (en) 2023-01-29 2023-01-29 Backboard testing method and device, electronic equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310070770.2A CN116204360A (en) 2023-01-29 2023-01-29 Backboard testing method and device, electronic equipment and storage medium

Publications (1)

Publication Number Publication Date
CN116204360A true CN116204360A (en) 2023-06-02

Family

ID=86516694

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310070770.2A Pending CN116204360A (en) 2023-01-29 2023-01-29 Backboard testing method and device, electronic equipment and storage medium

Country Status (1)

Country Link
CN (1) CN116204360A (en)

Similar Documents

Publication Publication Date Title
CN106489251B (en) The methods, devices and systems of applied topology relationship discovery
EP3317762B1 (en) Methods and apparatus for software lifecycle management of a virtual computing environment
US9141491B2 (en) Highly available server system based on cloud computing
CN102035896B (en) TTCN-3-based distributed testing framework applicable to software system
WO2014088144A1 (en) Function test device based on unit test case reuse and function test method therefor
CN110661647A (en) Life cycle management method and device
CN110389903B (en) Test environment deployment method and device, electronic equipment and readable storage medium
CN112948063B (en) Cloud platform creation method and device, cloud platform and cloud platform implementation system
WO2012153879A1 (en) Exception handling test device and method thereof
US8099628B2 (en) Software problem identification tool
CN109117253A (en) A kind of method and apparatus of micro-kernel scheduling
KR20200048633A (en) System and method for automatically testing software
CN112596371A (en) Control card switching method and device, electronic equipment and storage medium
CN112698930A (en) Method, device, equipment and medium for obtaining server identification
CN117041111A (en) Vehicle cloud function test method and device, electronic equipment and storage medium
CN116204360A (en) Backboard testing method and device, electronic equipment and storage medium
CN116974874A (en) Database testing method and device, electronic equipment and readable storage medium
CN111949484A (en) Information processing method, information processing apparatus, electronic device, and medium
CN111221265A (en) Bus information extraction device of rudder system in loop and semi-physical simulation method
US20240103824A1 (en) Server management apparatus and server management method
CN115827517A (en) Control method and device and computing device
CN115665231A (en) Service creation method, device and computer-readable storage medium
CN114201413A (en) Automatic testing method and system and electronic equipment
CN113031969A (en) Equipment deployment inspection method and device, computer equipment and storage medium
US20240202064A1 (en) Network management for automatic recovery in the event of a failure

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination