CN116185912A

CN116185912A - Industrial bus load balancing method, device, equipment and medium of ECAT coupler

Info

Publication number: CN116185912A
Application number: CN202310441589.8A
Authority: CN
Inventors: 赵家茂; 程超
Original assignee: Shenzhen Shunchang Automation Control Technology Co ltd
Current assignee: Shenzhen Shunchang Automation Control Technology Co ltd
Priority date: 2023-04-23
Filing date: 2023-04-23
Publication date: 2023-05-30
Anticipated expiration: 2043-04-23
Also published as: CN116185912B

Abstract

The application discloses an industrial bus load balancing method, device and equipment of an ECAT coupler and a storage medium, wherein the industrial bus load balancing method of the ECAT coupler comprises the following steps: when the power-on of the equipment is detected, acquiring interface data of a current interface, and detecting whether the current interface is abnormal or not according to the interface data; if the current interface is not abnormal, determining interface transmission parameters of the current interface according to the interface data; if the interface transmission parameter representation needs to carry out load balancing operation, switching the data transmission mode of the current interface into a preset data transmission mode to obtain the data transmission parameter of the current interface in the preset data transmission mode; wherein the preset data transmission modes comprise at least two data transmission modes; and carrying out load balancing operation based on the data transmission parameters. Through the technical scheme provided by the application, the accuracy of load balancing can be provided.

Description

Industrial bus load balancing method, device, equipment and medium of ECAT coupler

Technical Field

The present invention relates to the field of load balancing technologies, and in particular, to a method, an apparatus, a device, and a medium for industrial bus load balancing of an ECAT coupler.

Background

ECAT couplers are used for distributing as much workload to all servers, and because the carrying capacities of multiple servers are different, the ECAT couplers may be represented by differences of hardware configuration, network bandwidth and the like, and because a certain server has multiple functions, load balancing processing is needed for the servers, so that all servers are not overloaded and can function to the greatest extent. However, the existing load balancing process for ECAT couplers has low accuracy.

Disclosure of Invention

The invention aims to provide an industrial bus load balancing method, device, equipment and medium of an ECAT coupler, and aims to solve the technical problem of low accuracy of existing load balancing.

Other features and advantages of the present application will be apparent from the following detailed description, or may be learned in part by the practice of the application.

According to an aspect of the embodiments of the present application, there is provided an industrial bus load balancing method of an ECAT coupler, applied to the ECAT coupler, including:

when the power-on of the equipment is detected, acquiring interface data of a current interface, and detecting whether the current interface is abnormal or not according to the interface data;

If the current interface is not abnormal, determining interface transmission parameters of the current interface according to the interface data;

if the interface transmission parameter representation needs to carry out load balancing operation, switching the data transmission mode of the current interface into a preset data transmission mode to obtain the data transmission parameter of the current interface in the preset data transmission mode; wherein the preset data transmission modes comprise at least two data transmission modes;

and carrying out load balancing operation based on the data transmission parameters.

Further, the current interface comprises an HDMI interface, and the interface data comprises TMDS data 2+ line frequency, TMDS data 0 shielding line frequency and TMDS clock signal frequency in the HDMI interface; the detecting whether the current interface has an abnormality according to the interface data comprises the following steps:

detecting whether the TMDS data 2+ line is abnormal according to the TMDS data 2+ line frequency, and obtaining a first detection result; and

detecting whether the TMDS data 0 shielding wire is abnormal according to the TMDS data 0 shielding wire frequency, and obtaining a second detection result; and

detecting whether the TMDS clock signal is abnormal according to the frequency of the TMDS clock signal, and obtaining a third detection result;

And determining whether the HDMI has an abnormality according to the first detection result, the second detection result and the third detection result.

Further, the current interface comprises a VGA interface, and the interface data comprises a line synchronous signal parameter, a field synchronous signal parameter and a driving clock signal parameter in the VGA interface; the detecting whether the current interface has an abnormality according to the interface data comprises the following steps:

detecting whether the line synchronization signal is abnormal according to the line synchronization signal parameter to obtain a fourth detection result; and

detecting whether the field synchronous signal is abnormal according to the field synchronous signal parameter to obtain a fifth detection result; and

detecting whether the driving clock signal is abnormal according to the driving clock signal parameters to obtain a sixth detection result;

and determining whether the VGA interface is abnormal according to the fourth detection result, the fifth detection result and the sixth detection result.

Further, the current interface includes an HDMI interface, and the switching the data transmission mode of the current interface to a preset data transmission mode to obtain a data transmission parameter of the current interface in the preset data transmission mode includes:

Switching the data transmission mode of the HDMI into a preset data transmission mode, and acquiring TMDS data 2+ line frequency of a first preset time range, TMDS data 0 shielding line frequency of a second preset time range and TMDS clock signal frequency of a third preset time range, and TMDS data 2+ line frequency, TMDS data 0 shielding line frequency and TMDS clock signal frequency of the current moment of the HDMI in the preset data transmission mode;

obtaining a first parameter based on the relation between TMDS data 2+ line frequency of a first preset time range and TMDS data 2+ line frequency of the current moment;

obtaining a second parameter based on the relation between the TMDS data 0 shielding line frequency of the second preset time range and the TMDS data 0 shielding line frequency of the current moment;

obtaining a third parameter based on the relation between the TMDS clock signal frequency of a third preset time range and the TMDS clock signal frequency of the current moment;

and taking the first parameter, the second parameter and the third parameter as data transmission parameters of the HDMI in a preset data transmission mode.

Further, the current interface comprises a VGA interface; the switching the data transmission mode of the current interface to a preset data transmission mode to obtain the data transmission parameters of the current interface in the preset data transmission mode includes:

Switching the data transmission mode of the VGA interface into a preset data transmission mode, acquiring the current line synchronization signal frequency, field synchronization signal frequency and driving clock signal frequency of the VGA interface in the preset data transmission mode, and acquiring the line synchronization signal frequency, the field synchronization signal frequency and the driving clock signal frequency of the VGA interface in a normal state;

obtaining a fourth parameter based on the relation between the current line synchronization signal frequency and the line synchronization signal frequency in a normal state;

obtaining a fifth parameter based on the relation between the current field synchronizing signal frequency and the field synchronizing signal frequency in a normal state;

obtaining a sixth parameter based on the relation between the current driving clock signal frequency and the driving clock signal frequency in a normal state;

and taking the fourth parameter, the fifth parameter and the sixth parameter as data transmission parameters of the VGA interface in a preset data transmission mode.

Further, the preset data transmission mode comprises a synchronous transmission mode and an asynchronous transmission mode, the data transmission parameters comprise a first data transmission parameter of the current interface in the synchronous transmission mode and a second data transmission parameter of the current interface in the asynchronous transmission mode, and the load balancing operation is performed based on the data transmission parameters, and the load balancing operation comprises the following steps:

Determining a target data transmission mode based on the first data transmission parameter and the second data transmission parameter;

and carrying out load balancing operation through the target data transmission mode.

Further, the load balancing operation performed by the target data transmission mode includes:

acquiring the parameter weight of the data transmission parameter corresponding to the target data transmission mode;

and if the parameter weight is greater than the parameter weight threshold, switching the current interface into other interfaces, taking the other interfaces as the current interface, executing the steps of acquiring the interface data of the current interface, and detecting whether the current interface has abnormality according to the interface data.

According to one aspect of the embodiments of the present application, there is provided an industrial bus load balancing apparatus of an ECAT coupler, including:

the device comprises an acquisition module, a control module and a control module, wherein the acquisition module is configured to acquire interface data of a current interface after detecting that the device is electrified, and detect whether the current interface is abnormal according to the interface data;

the determining module is configured to determine interface transmission parameters of the current interface according to the interface data if the current interface is not abnormal;

the switching module is configured to switch the data transmission mode of the current interface to a preset data transmission mode if the interface transmission parameter represents that load balancing operation is required, so as to obtain the data transmission parameter of the current interface in the preset data transmission mode; wherein the preset data transmission modes comprise at least two data transmission modes;

And the load balancing module is configured to perform load balancing operation based on the data transmission parameters.

According to an aspect of an embodiment of the present application, there is provided an electronic device including: one or more processors; and a storage device for storing one or more programs that, when executed by the one or more processors, cause the electronic device to implement the industrial bus load balancing method of the ECAT coupler as described above.

According to one aspect of embodiments of the present application, there is provided a computer readable storage medium having stored thereon computer readable instructions which, when executed by a processor of a computer, cause the computer to perform an industrial bus load balancing method of an ECAT coupler as described above.

According to an aspect of embodiments of the present application, there is provided a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium and executes the computer instructions to cause the computer device to perform the industrial bus load balancing method of the ECAT coupler provided in the various alternative embodiments described above.

In the technical scheme provided by the embodiment of the application, after the power-on of the equipment is detected, whether the current interface is abnormal or not is detected based on the interface data, when no abnormality exists, the interface transmission parameters of the current interface are determined, whether load balancing operation is needed or not can be represented by the interface transmission parameters, when the load balancing operation is needed, the data transmission mode of the current interface is switched to a preset data transmission mode, the preset data transmission mode comprises a plurality of data transmission modes, the data transmission parameters of the current interface in each preset data transmission mode are obtained, the load balancing operation is carried out according to the data transmission parameters of each preset data transmission mode, the load balancing operation is carried out based on the corresponding data transmission parameters by respectively switching the current interface to different preset data transmission modes, and the accuracy of the load balancing operation is improved to a certain extent.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art. In the drawings:

FIG. 1 is a block diagram of a load general and system according to the present application;

FIG. 2 is a flow chart of an industrial bus load balancing method of an ECAT coupler according to the present application;

FIG. 3 is a flow chart of step S210 in one embodiment contemplated by the present application;

FIG. 4 is a flow chart of step S210 in one embodiment contemplated by the present application;

FIG. 5 is a flow chart of step S230 in one embodiment contemplated by the present application;

FIG. 6 is a flow chart of step S230 in one embodiment contemplated by the present application;

FIG. 7 is a flow chart of step S240 in one embodiment contemplated by the present application;

FIG. 8 is a flow chart of step S720 in one embodiment contemplated by the present application;

FIG. 9 is a block diagram of an industrial bus load balancing apparatus of an ECAT coupler according to the present application;

fig. 10 shows a schematic diagram of a computer system suitable for use in implementing the electronic device of the embodiments of the present application.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.

The block diagrams depicted in the figures are merely functional entities and do not necessarily correspond to physically separate entities. That is, the functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.

The flow diagrams depicted in the figures are exemplary only, and do not necessarily include all of the elements and operations/steps, nor must they be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.

Also to be described is: reference to "a plurality" in this application means two or more than two. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., a and/or B may represent: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

Referring to fig. 1, the present invention provides an industrial bus load balancing system of ECAT coupler, the system comprising: the HDMI interface detection module 110, VGA interface detection module 120, data transmission mode module 130, load balancing module 140, and effect display module 150 are described below:

after the device is normally powered on, when the HDMI is used as a current interface, the HDMI detection module 110 is started, interface data of the HDMI are obtained to detect whether the HDMI is abnormal, and when the HDMI is not abnormal, interface transmission parameters of the HDMI are determined according to the interface data.

When the VGA interface is used as a current interface, the VGA interface detection module 120 is started, the interface data of the VGA interface is acquired to detect whether the VGA interface is abnormal, and when the VGA interface is not abnormal, the interface transmission parameters of the VGA interface are determined according to the interface data.

The data transmission mode module 130 is configured to execute a preset data transmission mode when the current interface is switched to the preset data transmission mode, and call the HDMI interface detection module 110 or the VGA interface detection module 120 to obtain corresponding data transmission parameters.

The load balancing module 140 performs load balancing operation according to the data transmission parameters in each preset data transmission mode.

After the load balancing is successful, the effect display module 150 uploads the balanced time and related data to the cloud, and the load balancing system displays the data to the console and displays the balanced time again.

Fig. 2 is a flow chart illustrating an industrial bus load balancing method of an ECAT coupler, according to an example embodiment. The method can be applied to the system shown in fig. 1 and is specifically executed by the load balancing system shown in fig. 1.

As shown in fig. 2, in an exemplary embodiment, the industrial bus load balancing method of the ECAT coupler may include steps S210 to S240, which are described in detail as follows:

step S210, after the device is detected to be powered on, acquiring interface data of a current interface, and detecting whether the current interface is abnormal or not according to the interface data.

In the embodiment of the application, the industrial bus load balancing method of the ECAT coupler is applied to the ECAT coupler, the industrial bus is a set of public signal lines for transmitting information and communicating with each other between modules or between devices, and the industrial bus is a signal carrier or a public channel for accurately transmitting information sent by a sending device to a certain receiving device by a system under the control of a main control device. And after the device is detected to be electrified, acquiring interface data of a current interface, wherein the current interface is an interface for transmitting data at the current moment. And detecting whether the current interface is abnormal or not according to the acquired interface data.

Step S220, if the current interface has no abnormality, determining an interface transmission parameter of the current interface according to the interface data.

In the embodiment of the application, if the current interface is not abnormal, the interface transmission data of the current interface is determined according to the interface data, and whether load balancing operation is needed or not can be represented by the interface transmission data.

Step S230, if the interface transmission parameter represents that load balancing operation is required, switching the data transmission mode of the current interface to a preset data transmission mode to obtain the data transmission parameter of the current interface in the preset data transmission mode; the preset data transmission modes comprise at least two data transmission modes.

In this embodiment, when the interface data parameter represents that load balancing operation is required, the data transmission mode of the current interface is switched to a preset data transmission mode, where the preset data transmission mode includes at least two data transmission modes, each preset data transmission mode is switched to, and each time the data transmission mode is switched to a preset data transmission mode, the data transmission parameter in the preset data transmission mode can be obtained.

And step S240, carrying out load balancing operation based on the data transmission parameters.

In the embodiment of the application, the load balancing operation is performed based on all the data transmission parameters in the preset data transmission mode.

In an exemplary embodiment of the present application, the current interface includes an HDMI interface, and the interface data includes TMDS data 2+ line frequency, TMDS data 0 mask line frequency, and TMDS clock signal frequency in the HDMI interface; referring to fig. 3, in step S210, the detecting whether the current interface has an abnormality according to the interface data includes steps S310 to S340, which are described in detail as follows:

step S310, detecting whether the TMDS data 2+ line is abnormal according to the TMDS data 2+ line frequency, and obtaining a first detection result.

In this embodiment of the present application, the current interface is an HDMI interface, where the HDMI interface includes a TMDS data 2+ pin, a TMDS data 0 shielding line pin, and a TMDS clock signal pin, and the interface data includes frequencies corresponding to these three pins. Detecting whether the TMDS data 2+ line is abnormal according to the TMDS data 2+ line frequency, and obtaining a first detection result.

Specifically, the TMDS data 2+ line frequency includes a first TMDS data 2+ line frequency within 60 seconds and a second TMDS data 2+ line frequency at the current time when the TMDS data 2+ line is in a normal state, and a node 1 second of the second TMDS data 2+ line frequency is captured 60 times to obtain a third TMDS data 2+ line frequency.

Matching the first TMDS data 2+ line frequency with the third TMDS data 2+ line frequency, determining that the first HDMI state is the first HDMI state if the value of the third TMDS data 2+ line frequency is smaller than 90% of the value of the first TMDS data 2+ line frequency, correspondingly setting a first HDMI weight, wherein the first HDMI weight can be set to be 1; if the value of the third TMDS data 2+ line frequency is greater than or equal to 90% of the value of the first TMDS data 2+ line frequency and less than 160% of the value of the first TMDS data 2+ line frequency, determining that the third TMDS data 2+ line frequency is in the second HDMI state, correspondingly setting a second HDMI weight, wherein the second HDMI weight can be set to 2; if the value of the third TMDS data 2+ line frequency is greater than or equal to 160% of the value of the first TMDS data 2+ line frequency and less than 400% of the value of the first TMDS data 2+ line frequency, determining that the third TMDS data 2+ line frequency is in a third HDMI state, correspondingly setting a third HDMI weight, wherein the third HDMI weight can be set to 3; if the value of the third TMDS data 2+ line frequency is greater than or equal to 400% of the value of the first TMDS data 2+ line frequency, determining that the TMDS data 2+ line is abnormal. After determining that the TMDS data 2+ line is abnormal, disconnecting input and output of the HDMI interface, uploading error information to a cloud end for storing a log, and returning the error information to a control console for screen display, wherein the error information comprises the request of timely detecting the HDMI interface when the TMDS data 2+ line of the HDMI interface is abnormal. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after the intervals are 100 ms.

Step S320, detecting whether the TMDS data 0 shielding wire is abnormal according to the TMDS data 0 shielding wire frequency, and obtaining a second detection result.

In the embodiment of the present application, whether the TMDS data 0 shielded wire is abnormal is detected according to the TMDS data 0 shielded wire frequency, so as to obtain a second detection result.

Specifically, the TMDS data 0 shielded line frequency includes a TMDS data 0 shielded line frequency within 45 seconds of the TMDS data 0 shielded line in a normal state and a second TMDS data 0 shielded line frequency at the current time, and the node 1 second of the second TMDS data 0 shielded line frequency is captured 45 times to obtain a third TMDS data 0 shielded line frequency.

Matching the first TMDS data 0 shielding line frequency with the third TMDS data 0 shielding line frequency, determining a fourth HDMI state if the value of the third TMDS data 0 shielding line frequency is smaller than 90% of the value of the first TMDS data 0 shielding line frequency, correspondingly setting a fourth HDMI weight, wherein the fourth HDMI weight can be set to be 1; if the value of the third TMDS data 0 shielded wire frequency is greater than or equal to 90% of the value of the first TMDS data 0 shielded wire frequency and less than 160% of the value of the first TMDS data 0 shielded wire frequency, determining that the third TMDS data 0 shielded wire frequency is in a fifth HDMI state, correspondingly setting a fifth HDMI weight, wherein the fifth HDMI weight can be set to 2; if the value of the third TMDS data 0 shielded wire frequency is greater than or equal to 160% of the value of the first TMDS data 0 shielded wire frequency and less than 390% of the value of the first TMDS data 0 shielded wire frequency, determining that the third TMDS data 0 shielded wire frequency is in a sixth HDMI state, correspondingly setting a sixth HDMI weight, wherein the sixth HDMI weight can be set to 3; if the value of the third TMDS data 0 shielding line frequency is greater than or equal to 390% of the value of the first TMDS data 0 shielding line frequency, determining that the TMDS data 0 shielding line is abnormal. After determining that the TMDS data 0 shielding line is abnormal, disconnecting input and output of the HDMI interface, uploading error information to a cloud end for storing a log, and returning the error information to a control console for screen display, wherein the error information comprises the request of timely detecting the HDMI interface when the TMDS data 0 shielding line of the HDMI interface is abnormal. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after the intervals are 100 ms.

Step S330, detecting whether the TMDS clock signal is abnormal according to the TMDS clock signal frequency, and obtaining a third detection result.

In the embodiment of the present application, whether the TMDS clock signal is abnormal is detected according to the TMDS clock signal frequency, so as to obtain a third detection result.

Specifically, the TMDS clock signal frequencies include a first TMDS clock signal frequency within 30 seconds of the TMDS clock signal in a normal state and a second TMDS clock signal frequency at the current time, and capturing a 1 second node of the second TMDS clock signal frequency 30 times to obtain a third TMDS clock signal frequency.

Matching the first TMDS clock signal frequency with the third TMDS clock signal frequency, determining a seventh HDMI state if the value of the third TMDS clock signal frequency is smaller than 90% of the value of the first TMDS clock signal frequency, correspondingly setting a seventh HDMI weight, wherein the seventh HDMI weight can be set to be 1; if the value of the frequency of the third TMDS clock signal is greater than or equal to 90% of the value of the frequency of the first TMDS clock signal and less than 160% of the value of the frequency of the first TMDS clock signal, determining that the third TMDS clock signal is in an eighth HDMI state, correspondingly setting an eighth HDMI weight, wherein the eighth HDMI weight can be set to 2; if the value of the frequency of the third TMDS clock signal is greater than or equal to 160% of the value of the frequency of the first TMDS clock signal and is smaller than 360% of the value of the frequency of the first TMDS clock signal, determining that the third TMDS clock signal is in a ninth HDMI state, correspondingly setting a ninth HDMI weight, wherein the ninth HDMI weight can be set to 3; if the value of the frequency of the third TMDS clock signal is greater than or equal to 360% of the value of the frequency of the first TMDS clock signal, determining that the TMDS clock signal is abnormal. After determining that the TMDS clock signal is abnormal, disconnecting input and output of the HDMI, uploading error information to a cloud end for storing a log, and returning the error information to a control console for screen display, wherein the error information comprises the HDMI and the TMDS clock signal is abnormal and timely detects the HDMI. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after the intervals are 100 ms.

Step S340, determining whether the HDMI interface is abnormal according to the first detection result, the second detection result, and the third detection result.

In the embodiment of the present application, if any one of the first detection result, the second detection result, and the third detection result characterizes that the corresponding line is abnormal, it may be determined that the HDMI interface is abnormal.

In another embodiment of the present application, when an abnormality occurs in a line corresponding to the characterization of any one of the above detection results, it may be determined that the HDMI interface is abnormal, and other detection results do not need to be calculated.

In an exemplary embodiment of the present application, the current interface includes a VGA interface, and the interface data includes a line synchronization signal parameter, a field synchronization signal parameter, and a driving clock signal parameter in the VGA interface; referring to fig. 4, in step S210, the detecting whether the current interface has an abnormality according to the interface data includes steps S410 to S440, which are described in detail as follows:

step S410, detecting whether the line synchronization signal is abnormal according to the line synchronization signal parameter, to obtain a fourth detection result.

In this embodiment of the present application, the current interface includes a VGA interface, and whether the line synchronization signal is abnormal is detected according to the line synchronization signal parameter, so as to obtain a fourth detection result.

Specifically, the line synchronization signal parameters include a first line synchronization signal parameter composed of a line synchronization period, a line trailing edge period, a line left frame period, a line effective image period number, a line right frame, and a line leading edge at the current time, and a second line synchronization signal parameter composed of a line synchronization period, a line trailing edge period, a line left frame period, a line effective image period number, a line right frame, and a line leading edge in a normal state.

Matching the second line synchronization signal parameter with the first line synchronization signal parameter, if the value of the first line synchronization signal parameter is less than 50% of the value of the second line synchronization signal parameter, acquiring the current first line total scanning period of the VGA interface, and acquiring the second line total scanning period of the VGA interface in a normal state, matching the first line total scanning period with the second line total scanning period, and if the value of the first line total scanning period is less than 26% of the value of the second line total scanning period, determining that the line synchronization signal is not abnormal; if the value of the first line total scanning period is more than or equal to 26% of the value of the second line total scanning period, determining that the line synchronization signal is abnormal. After the travel synchronous signal is determined to be abnormal, disconnecting the input and output of the VGA interface, uploading an error message to a cloud end for storing a log, and returning the error message to a control console for screen display, wherein the error message comprises the request of detecting the VGA interface in time when the VGA interface is abnormal in the row synchronous signal of the VGA interface. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after 200ms intervals.

Step S420, detecting whether the field synchronization signal is abnormal according to the field synchronization signal parameter, to obtain a fifth detection result.

In this embodiment of the present application, whether the field synchronization signal is abnormal is detected according to the field synchronization signal parameter, so as to obtain a fifth detection result.

Specifically, the field synchronizing signal parameters include a first field synchronizing signal parameter composed of a field synchronizing period, a field trailing edge period, a field left frame period, a field effective image period number, a field right frame, and a field leading edge at the current moment, and a second field synchronizing signal parameter composed of a field synchronizing period, a field trailing edge period, a field left frame period, a field effective image period number, a field right frame, and a field leading edge in a normal state.

Matching the second field synchronous signal parameter with the first field synchronous signal parameter, if the value of the first field synchronous signal parameter is less than 45% of the value of the second field synchronous signal parameter, acquiring a first field total scanning period of the current VGA interface, acquiring a second field total scanning period of the VGA interface in a normal state, matching the first field total scanning period with the second field total scanning period, and if the value of the first field total scanning period is less than 29% of the value of the second field total scanning period, determining that the field synchronous signal is not abnormal; if the value of the first field total scanning period is greater than or equal to 29% of the value of the second field total scanning period, determining that the field synchronous signal is abnormal. After the abnormal state of the field synchronizing signal is determined, the input and output of the VGA interface are disconnected, the error message is uploaded to a cloud end for storing a log, the cloud end returns the error message to a control console for screen display, and the error message comprises the VGA interface field synchronizing signal abnormality request and the VGA interface is detected in time. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after 200ms intervals.

Step S430, detecting whether the driving clock signal is abnormal according to the driving clock signal parameter, and obtaining a sixth detection result.

In the embodiment of the present application, whether the driving clock signal is abnormal is detected according to the driving clock signal parameter, so as to obtain a sixth detection result.

Specifically, the driving clock signal parameter includes a first driving clock period at the current time and a second driving clock period in a normal state.

Matching the second driving clock period with the first field driving clock period, and if the value of the first driving clock period is less than 23% of the value of the second driving clock period, determining that the driving clock signal is not abnormal; if the value of the first driving clock period is greater than or equal to 23% of the value of the second driving clock period, determining that the driving clock signal is abnormal. After the driving clock signal is determined to be abnormal, disconnecting the input and output of the VGA interface, uploading an error message to a cloud end for storing a log, and returning the error message to a console for screen display, wherein the error message comprises the request of the VGA interface for detecting the abnormality of the driving clock signal of the VGA interface in time. After the workers adjust or replace the interfaces, the ECAT coupler is started again to execute the industrial bus load balancing method of the ECAT coupler after 200ms intervals.

Step S440, determining whether the VGA interface is abnormal according to the fourth detection result, the fifth detection result and the sixth detection result.

In the embodiment of the present application, if any one of the fourth detection result, the fifth detection result, and the sixth detection result characterizes that the corresponding signal is abnormal, it may be determined that the VGA interface is abnormal.

In another embodiment of the present application, when the signal corresponding to the characterization of any detection result is abnormal, it may be determined that the VGA interface is abnormal, and other detection results do not need to be calculated, and the calculation order of the detection results may be set arbitrarily based on the needs, which is not limited in the present application.

In an exemplary embodiment of the present application, the current interface includes an HDMI interface, referring to fig. 5, in step S230, the switching of the data transmission mode of the current interface to the preset data transmission mode is performed to obtain the data transmission parameters of the current interface in the preset data transmission mode, including steps S510 to S550, which are described in detail below:

step S510, switching the data transmission mode of the HDMI interface to a preset data transmission mode, and obtaining the TMDS data 2+ line frequency of the HDMI interface in the preset data transmission mode, the TMDS data 0 shielded line frequency of the first preset time range, the TMDS clock signal frequency of the second preset time range, and the TMDS data 2+ line frequency, the TMDS data 0 shielded line frequency, and the TMDS clock signal frequency of the current time.

In this embodiment, as described above, after the data transmission mode of the HDMI interface is switched to the preset data transmission mode, the TMDS data 2+ line frequency in the first preset time range, the TMDS data 0 shielding line frequency in the second preset time range, and the TMDS clock signal frequency in the third preset time range, and the TMDS data 2+ line frequency, the TMDS data 0 shielding line frequency, and the TMDS clock signal frequency at the current time may be obtained. The first preset time range, the second preset time range and the third preset time range may be set to the same value or may be set to different values.

Step S520, obtaining a first parameter based on a relationship between the TMDS data 2+ line frequency of the first preset time range and the TMDS data 2+ line frequency of the current time.

In the embodiment of the present application, the first parameter is obtained based on a relationship between the TMDS data 2+ line frequency of the first preset time range and the TMDS data 2+ line frequency of the current time. The detailed step of obtaining the first parameter may refer to the description of step S310, where the first preset time range is set to 60 seconds, and after the processing consistent with the description of step S310, the first HDMI state and the first HDMI weight, or the second HDMI state and the second HDMI weight, or the third HDMI state and the third HDMI weight corresponding to the HDMI interface in the preset data transmission mode are obtained. And taking the obtained first HDMI weight, the second HDMI weight or the third HDMI weight as a first parameter.

In step S530, a second parameter is obtained based on the relationship between the TMDS data 0 shielded wire frequency and the TMDS data 0 shielded wire frequency at the current time in the second preset time range.

In this embodiment of the present application, the second parameter is obtained based on a relationship between the TMDS data 0 shielded wire frequency of the second preset time range and the TMDS data 0 shielded wire frequency of the current time. The detailed step of obtaining the second parameter may refer to the description of step S320, where the first preset time range is set to 45 seconds, and after the processing consistent with the description of step S320, the fourth HDMI state and the fourth HDMI weight, or the fifth HDMI state and the fifth HDMI weight, or the sixth HDMI state and the sixth HDMI weight corresponding to the HDMI interface in the preset data transmission mode are obtained. And taking the obtained fourth HDMI weight, the fifth HDMI weight or the sixth HDMI weight as a second parameter.

Step S540, obtaining a third parameter based on the relationship between the TMDS clock signal frequency of the third preset time range and the TMDS clock signal frequency of the current time.

In this embodiment of the present application, the third parameter is obtained based on a relationship between the TMDS clock signal frequency of the third preset time range and the TMDS clock signal frequency of the current time. The detailed step of obtaining the third parameter may refer to the description of step S330, where the first preset time range is set to 30 seconds, and after the processing consistent with the description of step S330, the seventh HDMI state and the seventh HDMI weight, or the eighth HDMI state and the eighth HDMI weight, or the ninth HDMI state and the ninth HDMI weight corresponding to the HDMI interface in the preset data transmission mode are obtained. And taking the obtained seventh HDMI weight, the eighth HDMI weight or the ninth HDMI weight as a third parameter.

Step S550, taking the first parameter, the second parameter and the third parameter as data transmission parameters of the HDMI interface in a preset data transmission mode, and taking the data transmission parameters as HDMI interface weights.

In this embodiment of the present application, the obtained first parameter, second parameter, and third parameter are used as data transmission parameters of the HDMI interface in a preset data transmission mode.

In an exemplary embodiment of the present application, the current interface includes a VGA interface; referring to fig. 6, in step S230, the switching of the data transmission mode of the current interface to the preset data transmission mode to obtain the data transmission parameters of the current interface in the preset data transmission mode includes steps S610 to S650, which are described in detail as follows:

step S610, switching the data transmission mode of the VGA interface to a preset data transmission mode, obtaining the current line synchronization signal frequency, field synchronization signal frequency and driving clock signal frequency of the VGA interface in the preset data transmission mode, and obtaining the line synchronization signal frequency, the field synchronization signal frequency and the driving clock signal frequency of the VGA interface in a normal state.

In this embodiment, as described above, after the data transmission mode of the VGA interface is switched to the preset data transmission mode, the current line synchronization signal frequency, the field synchronization signal frequency, and the driving clock signal frequency are obtained, and the line synchronization signal frequency, the field synchronization signal frequency, and the driving clock signal frequency in the normal state of the VGA interface are obtained.

Step S620, obtaining the fourth parameter based on the relationship between the current line synchronization signal frequency and the line synchronization signal frequency in the normal state.

In the embodiment of the present application, the fourth parameter is obtained based on a relationship between the current line synchronization signal frequency and the line synchronization signal frequency in the normal state.

Specifically, the current line synchronization signal frequency includes a first line synchronization signal frequency 43 seconds away from the current time, the line synchronization signal frequency in the normal state includes a second line synchronization signal frequency 43 seconds in the normal state, the second line synchronization signal frequency is matched with the first line synchronization signal frequency, if the value of the first line synchronization signal frequency is smaller than 90% of the value of the second line synchronization signal frequency, the first line synchronization signal frequency is determined to be in a first VGA state, a first VGA weight is correspondingly set, and the first VGA weight can be set to be 1; if the value of the first line synchronizing signal frequency is greater than or equal to 90% of the value of the second line synchronizing signal frequency and less than 160% of the value of the second line synchronizing signal frequency, determining that the first line synchronizing signal frequency is in the second VGA state, correspondingly setting a second VGA weight, wherein the second VGA weight can be set to be 2; if the value of the first line synchronization signal frequency is greater than or equal to 160% of the value of the second line synchronization signal frequency, the third VGA state is determined, and a third VGA weight is correspondingly set, and the third VGA weight can be set to 3. And taking the obtained first VGA state weight, the second VGA state weight or the third VGA state weight as a fourth parameter.

In step S630, a fifth parameter is obtained based on the relationship between the current field sync signal frequency and the field sync signal frequency in the normal state.

In the embodiment of the present application, the fifth parameter is obtained based on a relationship between the current field synchronization signal frequency and the field synchronization signal frequency in the normal state.

Specifically, the current field synchronizing signal frequency includes a first field synchronizing signal frequency 43 seconds away from the current moment, the field synchronizing signal frequency in the normal state includes a second field synchronizing signal frequency 43 seconds in the normal state, the second field synchronizing signal frequency is in field matching with the first field synchronizing signal frequency, if the value of the first field synchronizing signal frequency is smaller than 90% of the value of the second field synchronizing signal frequency, a fourth VGA state is determined, a fourth VGA weight is correspondingly set, and the fourth VGA weight can be set to 1; if the value of the first field synchronizing signal frequency is greater than or equal to 90% of the value of the second field synchronizing signal frequency and less than 160% of the value of the second field synchronizing signal frequency, determining a fifth VGA state, correspondingly setting a fifth VGA weight, wherein the fifth VGA weight can be set to be 2; if the value of the first field synchronizing signal frequency is greater than or equal to 160% of the value of the second field synchronizing signal frequency, the sixth VGA state is determined, and a sixth VGA weight is correspondingly set, and the sixth VGA weight can be set to 3. And taking the obtained fourth VGA state weight, the fifth VGA state weight or the sixth VGA state weight as a fifth parameter.

Step S640, obtaining a sixth parameter based on the relationship between the current driving clock signal frequency and the driving clock signal frequency in the normal state.

In the embodiment of the present application, the sixth parameter is obtained based on a relationship between the current driving clock signal frequency and the driving clock signal frequency in the normal state.

Specifically, the current driving clock signal frequency includes a first driving clock signal frequency 43 seconds away from the current time, the driving clock signal frequency in the normal state includes a second driving clock signal frequency 43 seconds in the normal state, the second driving clock signal frequency is matched with the first driving clock signal frequency, if the value of the first driving clock signal frequency is smaller than 90% of the value of the second driving clock signal frequency, a seventh VGA state is determined, a seventh VGA weight is correspondingly set, and the seventh VGA weight can be set to 1; if the value of the frequency of the first driving clock signal is greater than or equal to 90% of the value of the frequency of the second driving clock signal and less than 160% of the value of the frequency of the second driving clock signal, determining an eighth VGA state, correspondingly setting an eighth VGA weight, wherein the eighth VGA weight can be set to be 2; if the value of the frequency of the first driving clock signal is greater than or equal to 160% of the value of the frequency of the second driving clock signal, the ninth VGA state is determined, and the ninth VGA weight is correspondingly set, and the ninth VGA weight can be set to 3. And taking the obtained seventh VGA state weight, or eighth VGA state weight, or ninth VGA state weight as a sixth parameter.

Step S650, taking the fourth parameter, the fifth parameter and the sixth parameter as data transmission parameters of the VGA interface in a preset data transmission mode.

In this embodiment of the present application, the fourth parameter, the fifth parameter, and the sixth parameter are obtained as data transmission parameters of the VGA interface in a preset data transmission mode, and the data transmission parameters are used as VGA interface weights.

In an exemplary embodiment of the present application, the preset data transmission modes include a synchronous transmission mode and an asynchronous transmission mode, the data transmission parameters include a first data transmission parameter of the current interface in the synchronous transmission mode and a second data transmission parameter of the current interface in the asynchronous transmission mode, referring to fig. 7, in step S240, the load balancing operation based on the data transmission parameters includes step S710 and step S720, which are described in detail below:

step S710, determining a target data transmission mode based on the first data transmission parameter and the second data transmission parameter.

In the embodiment of the present application, the synchronization transmission is to form a plurality of characters into one information group, and the characters can be transmitted one by one, however, the synchronization characters are added at the beginning of each group of information, and if no information is to be transmitted, the above characters are filled, because the synchronization transmission does not allow a gap. In the whole system, a unified clock control transmitting end transmits null characters. The receiving end also needs to be able to recognize the sync character, and when it is found that there is a string of BITs matching the sync character, it is considered to start an information frame, and then the BIT thereafter is treated as the actual transmission information.

Asynchronous transmission refers to the division of bits into small groups of independent transmissions. Each asynchronous transmission starts with a start bit that informs the receiver that data has arrived; at the end of the transmission, a stop bit indicates the termination of a transmission. The asynchronous transmission data format is: 1-bit start bit, 8-bit data bit, 1-bit parity bit, 1-bit stop bit, 11 bits total. During transmission, the transmitting and receiving sides decide whether to transmit high byte first or low byte first, and each byte transmits high bit first or low bit first.

Processing the current interface in a synchronous transmission mode and an asynchronous transmission mode respectively to obtain corresponding data transmission parameters, wherein if the current interface is an HMDI interface, the obtained first data transmission parameters comprise a first parameter, a second parameter and a third parameter which are obtained based on the synchronous transmission mode, and the second data transmission parameters comprise the first parameter, the second parameter and the third parameter which are obtained based on the asynchronous transmission mode; if the current interface is a VGA interface, the obtained first data transmission parameters comprise a fourth parameter, a fifth parameter and a sixth parameter which are obtained based on a synchronous transmission mode, and the second data transmission parameters comprise the fourth parameter, the fifth parameter and the sixth parameter which are obtained based on an asynchronous transmission mode.

Determining a target data transmission mode according to the first data transmission parameters and the second data transmission parameters, specifically, accumulating each parameter in the first data transmission parameters to obtain a first parameter accumulated value, accumulating each parameter in the second data transmission parameters to obtain a second parameter accumulated value, comparing the first parameter accumulated value with the second parameter accumulated value, and determining the target data transmission mode to be a synchronous transmission mode if the first parameter accumulated value is smaller than the second parameter accumulated value; if the first parameter accumulated value is larger than the second parameter accumulated value, determining a target data transmission mode asynchronous transmission mode; if the first parameter accumulation value is equal to the second parameter accumulation value, selecting one of the synchronous transmission mode and the asynchronous transmission mode as the target data transmission mode.

In another embodiment of the present application, a first data transmission parameter and a second data transmission parameter of a plurality of current interfaces may be obtained, and an optimal solution may be obtained based on the first data transmission parameter and the second data transmission parameter corresponding to each current interface, so as to determine a target data transmission mode.

In an embodiment of the application, a current ECAT coupler data set is acquired, an interface transmission character method is acquired, the current ECAT coupler data set is subjected to data transmission through the interface transmission character method to obtain a first transmission parameter, a synchronous transmission mode is acquired, the current ECAT coupler data set is subjected to data transmission through the synchronous transmission mode to obtain a second transmission parameter, the second transmission parameter is matched with the first transmission parameter, and if the difference value between the second transmission parameter and the first transmission parameter is smaller than 23% of the value of the first transmission parameter, the synchronous transmission mode is determined; if the difference value between the second transmission parameter and the first transmission parameter is greater than or equal to 23% of the value of the first transmission parameter, executing asynchronous transmission mode judgment; if the asynchronous transmission mode is judged to be failed, uploading the data abnormal message to the cloud end, and broadcasting an alarm by the control console for 3s.

Acquiring a current intelligent ECAT coupler data set, transmitting a start bit, a data bit, a parity check bit and a stop bit through an interface transmission character method to obtain a third transmission parameter, acquiring an asynchronous transmission mode, transmitting 1-bit start bit, 8-bit data bit, 1-bit parity check bit and 1-bit stop bit in the asynchronous transmission mode to obtain a fourth transmission parameter, matching the fourth transmission parameter with the third transmission parameter, judging the asynchronous transmission mode if the difference value between the fourth transmission parameter and the third transmission parameter is smaller than 13% of the value of the third transmission parameter, and executing synchronous transmission mode judgment if the difference value between the fourth transmission parameter and the third transmission parameter is larger than or equal to 13% of the value of the third transmission parameter; if the synchronous transmission mode is judged to be failed, uploading the data abnormal message to the cloud, and broadcasting an alarm by the control console for 3s.

Step S720, performing load balancing operation through the target data transmission mode.

In the embodiment of the application, the load balancing operation is performed through the target data transmission mode.

In an exemplary embodiment of the present application, the load balancing operation performed in the target data transmission mode in step S720 includes step S810 and step S820, which are described in detail below:

Step S810, obtaining a parameter weight of a data transmission parameter corresponding to the target data transmission mode.

In the embodiment of the application, the parameter weight of the data transmission parameter corresponding to the target data transmission mode is obtained, that is, the accumulated value of each parameter in the corresponding data transmission parameter is obtained.

And step S820, if the parameter weight is greater than the parameter weight threshold, switching the current interface to other interfaces, taking the other interfaces as the current interface, executing the steps of acquiring the interface data of the current interface, and detecting whether the current interface has an abnormality according to the interface data.

In this embodiment of the present application, if the parameter weight is greater than the parameter weight threshold, the parameter weight threshold may be set to 8, and the current interface may be switched to another interface, if the current interface is an HDMI interface, then may be switched to a VGA interface, and then the VGA interface is used as the current interface, and the step of obtaining the interface data of the current interface and detecting whether there is an abnormality in the current interface according to the interface data is performed.

In another embodiment of the present application, if the parameter weights of all the interfaces in the adapted interfaces are greater than the parameter weight threshold, the wireless signal transmitter is started to transmit the data to share.

The flow of correspondingly executing load balancing is as follows, wherein HDMI interfaces x1-x3 and VGA interfaces y1-y3 are arranged:

x1_qz (X1) =8// interface weight of first VGA interface

Interface weight of x2_qz (X2) =6// second VGA interface

Interface weight of x3_qz (X3) =7// third VGA interface

R_bl (y 1) =0.15// input-output equalization ratio

Jh_zx (y 2) =15%, -15%,0%// negative number is data in, positive data out

Pj_qz (x 4) =7// interface average weight

Pj_qz(x4)=[ X3_qz(x3)+ X2_qz(x3)+ X1_qz(x1)]/3

Jh_zx（y2）= [X2_qz(x2)- Pj_qz(x4)]* R_Bl(y1)*100%

Jh_zx（y2）= [X3_qz(x3)- Pj_qz(x4)]* R_Bl(y1) *100%

Jh_zx（y2）= [X1_qz(x1)- Pj_qz(x4)]* R_Bl(y1) *100%。

In an exemplary embodiment of the present application, referring to fig. 9, fig. 9 is an industrial bus load balancing apparatus of an ECAT coupler according to an exemplary embodiment, including:

an obtaining module 910, configured to obtain interface data of a current interface after detecting that the device is powered on, and detect whether an abnormality exists in the current interface according to the interface data;

a determining module 920, configured to determine an interface transmission parameter of the current interface according to the interface data if the current interface has no abnormality;

a switching module 930, configured to switch the data transmission mode of the current interface to a preset data transmission mode if the interface transmission parameter indicates that load balancing operation is required, so as to obtain a data transmission parameter of the current interface in the preset data transmission mode; wherein the preset data transmission modes comprise at least two data transmission modes;

The load balancing module 940 is configured to perform a load balancing operation based on the data transmission parameters.

In an exemplary embodiment of the present application, the current interface includes an HDMI interface, and the interface data includes TMDS data 2+ line frequency, TMDS data 0 mask line frequency, and TMDS clock signal frequency in the HDMI interface; the acquiring module 910 includes:

the first detection submodule is configured to detect whether the TMDS data 2+ line is abnormal according to the TMDS data 2+ line frequency to obtain a first detection result; and

the second detection submodule is configured to detect whether the TMDS data 0 shielding wire is abnormal according to the TMDS data 0 shielding wire frequency to obtain a second detection result; and

the third detection submodule is configured to detect whether the TMDS clock signal is abnormal according to the frequency of the TMDS clock signal to obtain a third detection result;

the first determining submodule is configured to determine whether the HDMI has an abnormality according to the first detection result, the second detection result and the third detection result.

In an exemplary embodiment of the present application, the current interface includes a VGA interface, and the interface data includes a line synchronization signal parameter, a field synchronization signal parameter, and a driving clock signal parameter in the VGA interface; the acquiring module 910 includes:

The fourth detection submodule is configured to detect whether the row synchronous signal is abnormal according to the row synchronous signal parameter to obtain a fourth detection result; and

the fifth detection submodule is configured to detect whether the field synchronous signal is abnormal according to the field synchronous signal parameter to obtain a fifth detection result; and

the sixth detection submodule is configured to detect whether the driving clock signal is abnormal according to the driving clock signal parameter to obtain a sixth detection result;

and the second determining submodule is configured to determine whether the VGA interface is abnormal according to the fourth detection result, the fifth detection result and the sixth detection result.

In an exemplary embodiment of the present application, the current interface includes an HDMI interface, and the switching module 930 includes:

the first switching sub-module is configured to switch the data transmission mode of the HDMI into a preset data transmission mode, and acquire TMDS data 2+ line frequency of a first preset time range, TMDS data 0 shielding line frequency of a second preset time range and TMDS clock signal frequency of a third preset time range, and TMDS data 2+ line frequency, TMDS data 0 shielding line frequency and TMDS clock signal frequency of the current moment of the HDMI in the preset data transmission mode;

The first parameter submodule is configured to obtain a first parameter based on the relation between TMDS data 2+ line frequency of a first preset time range and TMDS data 2+ line frequency of the current moment;

the second parameter submodule is configured to obtain a second parameter based on the relation between the TMDS data 0 shielding line frequency of the second preset time range and the TMDS data 0 shielding line frequency of the current moment;

the third parameter submodule is configured to obtain a third parameter based on the relation between the TMDS clock signal frequency of a third preset time range and the TMDS clock signal frequency of the current moment;

the first sub-module is configured to take the first parameter, the second parameter and the third parameter as data transmission parameters of the HDMI in a preset data transmission mode.

In an exemplary embodiment of the present application, the current interface comprises a VGA interface; the switching module 930 includes:

the second switching sub-module is configured to switch the data transmission mode of the VGA interface into a preset data transmission mode, acquire the current line synchronization signal frequency, the field synchronization signal frequency and the driving clock signal frequency of the VGA interface in the preset data transmission mode, and acquire the line synchronization signal frequency, the field synchronization signal frequency and the driving clock signal frequency of the VGA interface in a normal state;

A fourth parameter sub-module configured to obtain a fourth parameter based on a relationship between the current line synchronization signal frequency and the line synchronization signal frequency in a normal state;

a fifth parameter sub-module configured to obtain a fifth parameter based on a relationship between the current field synchronization signal frequency and the field synchronization signal frequency in a normal state;

a sixth parameter submodule configured to obtain a sixth parameter based on a relationship between the current driving clock signal frequency and the driving clock signal frequency in a normal state;

and the second sub-module is configured to take the fourth parameter, the fifth parameter and the sixth parameter as data transmission parameters of the VGA interface in a preset data transmission mode.

In an exemplary embodiment of the present application, the preset data transmission modes include a synchronous transmission mode and an asynchronous transmission mode, the data transmission parameters include a first data transmission parameter of the current interface in the synchronous transmission mode and a second data transmission parameter of the current interface in the asynchronous transmission mode, and the load balancing module 940 includes:

a third determination sub-module configured to determine a target data transmission mode based on the first data transmission parameter and the second data transmission parameter;

And the load balancing sub-module is configured to perform load balancing operation through the target data transmission mode.

In an exemplary embodiment of the present application, the load balancing sub-module includes:

an obtaining unit configured to obtain a parameter weight of a data transmission parameter corresponding to the target data transmission mode;

and the switching unit is configured to switch the current interface into other interfaces if the parameter weight is greater than the parameter weight threshold, take the other interfaces as the current interface, execute the steps of acquiring the interface data of the current interface and detect whether the current interface has abnormality according to the interface data.

It should be noted that, the apparatus provided in the foregoing embodiments and the method provided in the foregoing embodiments belong to the same concept, and the specific manner in which each module and unit perform the operation has been described in detail in the method embodiments, which is not repeated herein.

The embodiment of the application also provides electronic equipment, which comprises: one or more processors; and the storage device is used for storing one or more programs, and when the one or more programs are executed by the one or more processors, the electronic equipment realizes the industrial bus load balancing method of the ECAT coupler provided in the various embodiments.

It should be noted that, the computer system 1000 of the electronic device shown in fig. 10 is only an example, and should not impose any limitation on the functions and the application scope of the embodiments of the present application.

As shown in fig. 10, the computer system 1000 includes a central processing unit (Central Processing Unit, CPU) 1001 that can perform various appropriate actions and processes, such as performing the method described in the above embodiment, according to a program stored in a Read-Only Memory (ROM) 1002 or a program loaded from a storage section 1008 into a random access Memory (Random Access Memory, RAM) 1003. In the RAM 1003, various programs and data required for system operation are also stored. The CPU 1001, ROM 1002, and RAM 1003 are connected to each other by a bus 1004. An Input/Output (I/O) interface 1005 is also connected to bus 1004.

The following components are connected to the I/O interface 1005: an input section 1006 including a keyboard, a mouse, and the like; an output portion 1007 including a Cathode Ray Tube (CRT), a liquid crystal display (Liquid Crystal Display, LCD), and a speaker; a storage portion 1008 including a hard disk or the like; and a communication section 1009 including a network interface card such as a LAN (Local Area Network ) card, a modem, or the like. The communication section 1009 performs communication processing via a network such as the internet. The drive 1010 is also connected to the I/O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like, is installed on the drive 1010 as needed, so that a computer program read out therefrom is installed into the storage section 1008 as needed.

In particular, according to embodiments of the present application, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising a computer program for performing the method shown in the flowchart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication portion 1009, and/or installed from the removable medium 1011. When executed by a Central Processing Unit (CPU) 1001, the computer program performs various functions defined in the system of the present application.

It should be noted that, the computer readable medium shown in the embodiments of the present application may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium may be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-Only Memory (ROM), an erasable programmable read-Only Memory (Erasable Programmable Read Only Memory, EPROM), flash Memory, an optical fiber, a portable compact disc read-Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present application, however, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with a computer-readable computer program embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. A computer program embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. Where each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The units involved in the embodiments of the present application may be implemented by means of software, or may be implemented by means of hardware, and the described units may also be provided in a processor. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.

Another aspect of the present application also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method as described above. The computer-readable storage medium may be included in the electronic device described in the above embodiment or may exist alone without being incorporated in the electronic device.

Another aspect of the present application also provides a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the methods provided in the above-described respective embodiments.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. An industrial bus load balancing method for an ECAT coupler, comprising:

2. The ECAT coupler industrial bus load balancing method of claim 1, wherein the current interface comprises an HDMI interface, the interface data comprising TMDS data 2+ line frequency, TMDS data 0 mask line frequency, and TMDS clock signal frequency in the HDMI interface; the detecting whether the current interface has an abnormality according to the interface data comprises the following steps:

3. The ECAT coupler industrial bus load balancing method of claim 1, wherein the current interface comprises a VGA interface, the interface data comprising line synchronization signal parameters, field synchronization signal parameters, and drive clock signal parameters in the VGA interface; the detecting whether the current interface has an abnormality according to the interface data comprises the following steps:

4. The ECAT coupler industrial bus load balancing method according to claim 1, wherein the current interface includes an HDMI interface, and the switching the data transmission mode of the current interface to a preset data transmission mode to obtain the data transmission parameters of the current interface in the preset data transmission mode includes:

5. The ECAT coupler industrial bus load balancing method of claim 1, wherein the current interface comprises a VGA interface; the switching the data transmission mode of the current interface to a preset data transmission mode to obtain the data transmission parameters of the current interface in the preset data transmission mode includes:

6. The ECAT coupler industrial bus load balancing method of any one of claims 4 or 5, wherein the preset data transmission modes include a synchronous transmission mode and an asynchronous transmission mode, the data transmission parameters include a first data transmission parameter of the current interface in the synchronous transmission mode and a second data transmission parameter of the current interface in the asynchronous transmission mode, and the performing the load balancing operation based on the data transmission parameters includes:

7. The ECAT coupler industrial bus load balancing method of claim 6, wherein the load balancing operation through the target data transmission mode comprises:

8. An industrial bus load balancing device for an ECAT coupler, comprising:

9. An electronic device, comprising:

one or more processors;

storage means for storing one or more programs that, when executed by the one or more processors, cause the electronic device to implement the industrial bus load balancing method of the ECAT coupler of any of claims 1 to 7.

10. A computer readable storage medium having stored thereon computer readable instructions which, when executed by a processor of a computer, cause the computer to perform the industrial bus load balancing method of the ECAT coupler of any of claims 1 to 7.