CN116166591A - Instruction conversion system and instruction conversion method - Google Patents

Instruction conversion system and instruction conversion method Download PDF

Info

Publication number
CN116166591A
CN116166591A CN202111411616.4A CN202111411616A CN116166591A CN 116166591 A CN116166591 A CN 116166591A CN 202111411616 A CN202111411616 A CN 202111411616A CN 116166591 A CN116166591 A CN 116166591A
Authority
CN
China
Prior art keywords
order
instruction
interface
instructions
transmits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111411616.4A
Other languages
Chinese (zh)
Inventor
萧丞渊
刘松高
蔡易成
吴奇融
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Realtek Semiconductor Corp
Original Assignee
Realtek Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Realtek Semiconductor Corp filed Critical Realtek Semiconductor Corp
Priority to CN202111411616.4A priority Critical patent/CN116166591A/en
Publication of CN116166591A publication Critical patent/CN116166591A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

An instruction conversion method for use in an instruction conversion system including a first transceiver interface and a second transceiver interface, the instruction conversion method comprising: receiving at least one instruction transmitted by a first device through the first transmitting and receiving interface; judging a first order rule and a second order rule by the instruction conversion system, wherein the first order rule represents whether the first device needs to process the instruction according to the order, and the second order rule represents whether the second device needs to process the instruction according to the order; transmitting the instruction to the second device through the second transmitting and receiving interface; processing the instruction by the second device and transmitting the reply to the second transceiving interface according to the second sequence rule; and transmitting the reply to the first device by the first transceiving interface according to the first sequence rule.

Description

Instruction conversion system and instruction conversion method
Technical Field
The present invention relates to an instruction conversion system and an instruction conversion method, and more particularly, to an instruction conversion system and an instruction conversion method capable of controlling instruction conversion according to a sequential requirement.
Background
With the development of electronic technology, the transceiver interface becomes more and more diversified and the speed becomes faster and faster. Therefore, a technique of switching to the high-speed transmission/reception interface is often used. For example, USB (universal serial bus ) to PCIE (peripheral component interconnect express, high speed serial computer expansion bus standard), USB to SATA (Serial Advanced Technology Attachment ), and the like.
In order to make these high-speed transceiving interfaces smooth in transmitting instructions, an instruction conversion system is usually established that is compatible with and converts two different transceiving interfaces. However, the characteristics of each high-speed transceiver interface or the following specifications are different, and some high-speed transceiver interfaces need to process instructions sequentially, and some high-speed transceiver interfaces do not need to process instructions sequentially. Therefore, how to allow the instruction to be successfully received and executed by the instruction conversion system under the condition of meeting the instruction execution sequence requirements of different transceiving interfaces becomes an important consideration.
Disclosure of Invention
An object of the present invention is to provide an instruction conversion method for meeting the instruction execution sequence requirements of different transceiving interfaces.
Another object of the present invention is to provide an instruction conversion system that meets the instruction execution sequence requirements of different transceiving interfaces.
An embodiment of the invention discloses an instruction conversion method, which is used in an instruction conversion system comprising a first transceiver interface and a second transceiver interface, and comprises the following steps: receiving at least one instruction transmitted by a first device through the first transmitting and receiving interface; judging a first order rule of the first device and a second order rule of a second device by the instruction conversion system, wherein the first order rule represents whether the first device needs to process the instruction according to the order, and the second order rule represents whether the second device needs to process the instruction according to the order; transmitting the instruction to the second device through the second transmitting and receiving interface; processing the instruction by the second device and transmitting a reply corresponding to the instruction to the second transceiving interface according to the second sequence rule; and transmitting the reply to the first device by the first transceiving interface according to the first sequence rule.
Another embodiment of the present invention discloses an instruction converting system, including: the first transmitting and receiving interface is used for receiving at least one instruction transmitted by a first device; a second transmitting and receiving interface for transmitting the instruction to the second device; and a controller for controlling the actions of the first transceiver interface and the second transceiver interface. The instruction conversion system determines a first order rule of the first device and a second order rule of the second device, wherein the first order rule represents whether the first device needs to process the instruction according to the order, and the second order rule represents whether the second device needs to process the instruction according to the order. The second transceiver interface receives a reply generated by the second device after processing the instruction according to the second order rule. The first transceiving interface transmits the reply to the first device according to the first order rule.
According to the embodiment, the instructions can be smoothly received and executed under the condition of meeting the instruction execution sequence requirements of different transmitting and receiving interfaces, so that devices conforming to different specifications can be smoothly connected and operated.
Drawings
FIG. 1 illustrates a block diagram of an instruction conversion system according to an embodiment of the present invention.
Fig. 2-4 are schematic diagrams illustrating the operation of the instruction conversion system of fig. 1 according to various embodiments of the present invention.
Fig. 5 shows an example of a practical application of the instruction conversion system provided by the present invention.
FIG. 6 illustrates an instruction conversion method according to an embodiment of the invention.
Symbol description
100. Instruction conversion system
CR1, CRa, CRb controller
CMD1, CMD2, CMD3 commands
CMD1R, CMD2R, CMD R reply
DV1 first device
DV2 second device
TRI1 first transmitting and receiving interface
TRI2 second transmitting and receiving interface
TRia and TRIb transmitting and receiving interface
500. Instruction conversion device
501. Joint
503. 505, 507 output jack
Detailed Description
In the following, various embodiments of the present invention will be described, and it should be noted that the elements of each embodiment may be implemented in hardware (e.g., a device or a circuit) or firmware (e.g., at least one program written in a microprocessor). Furthermore, the terms "first," "second," and the like in the following description are used merely to define various elements, parameters, data, signals, or steps. And are not intended to limit the order in which they are presented.
FIG. 1 illustrates a block diagram of an instruction conversion system according to an embodiment of the present invention. As shown in fig. 1, the instruction converting system 100 includes a first transceiver interface TRI1, a second transceiver interface TRI2, and a controller CR1. The first transceiver interface TRI1 is configured to receive an instruction from the first device DV1 and transmit the instruction to the second transceiver interface TRI2. The second transceiver interface TRI2 is configured to transmit the received command to the second device DV2, receive a reply from the second device DV2, and transmit the reply to the first transceiver interface TRI1. The first transceiver interface TRI1 transmits the reply to the first device DV1. The first transceiving Interface TRI1 may be referred to as a Direct Interface (Direct Interface), and the second transceiving Interface TRI2 may be referred to as a Non-Direct Interface (indirect Interface). The first device DV1 and the second device DV2 may include controllers CRa and CRb, respectively, and may also include transceiving interfaces trim and trim, respectively.
The command conversion system 100 determines a first order rule of the first device DV1 and a second order rule of the second device DV2. The first order rule represents whether the first device DV1 needs to process the instructions in order, and the second order rule represents whether the second device DV2 needs to process the instructions in order. The second device DV2 processes the instructions according to the second order rule and transmits replies of the corresponding instructions to the second transceiving interface TRI2. The first transceiving interface TRI1 transmits a reply to the first device DV1 according to the first order rule. This determination may be made by any element in instruction conversion system 100. For example, the determination may be made by the controller CR1 or the first transceiver interface TRI1. The first order rule and the second order rule may be determined by the types of the first device DV1 and the second device DV2, and the specifications to which the first device DV1 and the second device DV2 are compliant. The first order rule and the second order rule may be set forcibly by the instruction converting system 100.
Fig. 2-4 illustrate block diagrams of the instruction conversion system shown in fig. 1, according to various embodiments of the present invention. In detail, fig. 2 to 4 are schematic diagrams showing the operation of the instruction converting system shown in fig. 1 when the first order rule and the second order rule are in different states.
In the embodiment of fig. 2, the first order rule represents that the first device DV1 needs to process the instruction according to the order, and the second order rule represents that the second device DV2 needs to process the instruction according to the order. In this case, the first transceiver interface TRI1 receives a command CMD1 transmitted by the first device DV1, and transmits the command CMD1 to the second transceiver interface TRI2. However, after the command CMD1 is transmitted to the second device DV2 through the second transceiving interface TRI2, the first device DV1 does not receive other commands from the first device DV1 through the first transceiving interface TRI1 before the first device DV1 receives the reply CMD1R corresponding to the command CMD 1. Specifically, after the command CMD1 is transmitted to the second device DV2 through the second transmitting/receiving interface TRI2, if the reply CMD1R corresponding to the command CMD1 is not received through the second transmitting/receiving interface TRI2 and the reply CMD1R corresponding to the command CMD1 is not transmitted to the first device DV1 through the first transmitting/receiving interface DV1, other commands from the first device DV1 are not received through the first transmitting/receiving interface TRI1.
In another embodiment, the first order rule still represents that the first device DV1 needs to process the command in order, and the second order rule still represents that the second device DV2 needs to process the command in order, but it is not limited to receiving other commands from the first device DV1 through the first transceiving interface TRI1 before the first device DV1 receives the reply CMD1R corresponding to the command CMD 1. In this example, the first transceiver interface TRI1 receives the plurality of instructions transmitted by the first device DV1 in a first order, and the second transceiver interface TRI2 also transmits the plurality of instructions to the second device DV2 in the first order. The second device DV2 processes the plurality of instructions in a first order and transmits a plurality of replies corresponding to the plurality of instructions to the second transceiving interface TRI2, and the first transceiving interface TRI1 transmits a plurality of replies to the first device DV in the first order. For example, the first device DV1 sequentially transmits three commands CMD1, CMD2, CMD3 (CMD 2, CMD3 are not shown in fig. 1) to the first transceiver interface TRI1, and then the second transceiver interface TRI2 sequentially transmits three commands CMD1, CMD2, CMD3 to the second device DV2. After the second device DV2 processes the commands CMD1, CMD2 and CMD3 in sequence and generates corresponding replies CMD1R, CMD R and CMD3R (CMD 2R, CMD R is not shown in fig. 1), the replies CMD1R, CMD R and CMD3R are sequentially transmitted to the first device DV1 through the first transmitting/receiving interface TRI1.
In another embodiment, the first order rule represents that the first device DV1 needs to process the instructions according to the order, and the second order rule represents that the second device DV2 does not need to process the instructions according to the order. In this case, the first transceiver interface TRI1 receives the plurality of instructions transmitted by the first device DV1 in a first order, and the second transceiver interface TRI2 transmits the plurality of instructions from the first transceiver interface TRI1 to the second device DV2 in the same first order or in a second, different order. The second device DV2 processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second transceiver interface TRI2, and the first transceiver interface TRI1 still transmits a plurality of replies from the second transceiver interface TRI2 to the first device DV1 in the first order. Fig. 3 shows one example of this embodiment. In the embodiment of fig. 3, the first device DV1 sequentially transmits three commands CMD1, CMD2, CMD3 (first order) to the first transceiving interface TRI1, and the first transceiving interface TRI1 transmits the commands CMD1, CMD2, CMD3 to the second transceiving interface TRI2. Note also that, since the second device DV2 does not need to process the commands in order, the first transceiver interface TRI1 may transmit the commands CMD1, CMD2, CMD3 to the second transceiver interface TRI2 in any order. In the embodiment of fig. 2, the first transceiver interface TRI1 transmits the commands to the second transceiver interface TRI2 in the order of commands CMD1, CMD2, CMD3 (i.e. the first order).
The second transceiver interface TRI2 may sequentially transmit three commands CMD1, CMD2, CMD3 to the second device DV2 according to the first order. However, the second transceiver interface TRI2 may also transmit the commands CMD1, CMD2, CMD3 to the second device DV2 in other order (second order). The second device DV2 processes the commands CMD1, CMD2, CMD3 in an arbitrary order (third order), and then transmits corresponding replies to the second transceiving interface TRI2 in this arbitrary order. In the embodiment of fig. 3, the second device DV2 processes the commands in the order of CMD2, CMD1, CMD3 and sequentially transmits corresponding replies CMD2R, CMD R and CMD3R to the second receiving interface TRI2, and the second receiving interface TRI2 sequentially transmits replies CMD2R, CMD R and CMD3R to the first receiving interface TRI1. The first transceiver interface TRI1 transmits replies CMD1R, CMD R and CMD3R to the first device DV1 in a first order, i.e. in sequence. In this case, the reply (e.g., reply CMD2R or CMD 3R) that is not received first is temporarily stored in the command conversion system 100, and after receiving the reply CMD1R, the replies CMD1R, CMD R and CMD3R are sequentially transmitted to the first device DV1.
In one embodiment, the next instruction may be transferred while the previous instruction is still processing, but is not limited to. For example, after the first device DV1 transmits the command CMD1 to the second device DV2 through the first transceiving interface TRI1 and the second transceiving interface TRI2 in fig. 3, the second device DV2 may notify the first device DV1 to continue transmitting the next command CMD2 when the second device DV2 is processing the command CMD 1. In the embodiment of fig. 3, if the first device DV1 only transmits one command, the operations of the first device DV1, the second device DV2 and the command conversion system 100 are the same as those of the embodiment shown in fig. 2.
In another embodiment, the first order rule represents that the first device DV1 does not need to process the instructions in order, and the second order rule represents that the second device DV2 does not need to process the instructions in order. In this case, the first transceiver interface TRI1 receives the plurality of instructions transmitted by the first device DV1 in a first order, and the second transceiver interface TRI2 transmits the plurality of instructions from the first transceiver interface TRI1 to the second device DV2 in the same first order or in a second, different order. The second device DV2 processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second transceiver interface TRI2, and the first transceiver interface TRI1 transmits the plurality of replies to the first device DV1 in the third order or a fourth order. Fig. 4 shows one example of this embodiment. In the embodiment of fig. 4, the first device DV1 sequentially transmits three commands CMD1, CMD2, CMD3 (i.e. the first order) to the first transceiving interface TRI1, and the first transceiving interface TRI1 transmits the commands CMD1, CMD2, CMD3 to the second transceiving interface TRI2. Note also that, since the second device DV2 does not need to process the commands in order, the first transceiver interface TRI1 may transmit the commands CMD1, CMD2, CMD3 to the second transceiver interface TRI2 in any order. In the embodiment of fig. 4, the first transceiver interface TRI1 transmits the commands to the second transceiver interface TRI2 in the order of commands CMD1, CMD2, CMD3 (i.e. the first order).
The second transceiver interface TRI2 may sequentially transmit three commands CMD1, CMD2, CMD3 to the second device DV2 following the first order. However, the second transceiver interface TRI2 may also transmit the commands CMD1, CMD2, CMD3 to the second device DV2 in other order (second order). Then, after the second device DV2 processes CMD1, CMD2, CMD3 in any order (third order), the corresponding reply is transmitted to the second transceiving interface TRI2 in any order. In the embodiment of fig. 4, the second device DV2 processes the commands in the order of CMD2, CMD1 and CMD3 and sequentially transmits corresponding replies CMD2R, CMD R and CMD3R to the second receiving interface TRI2, and the second receiving interface TRI2 sequentially transmits replies CMD2R, CMD R and CMD3R to the first receiving interface TRI1 in the same order. The first transceiver interface TRI1 may transmit CMD2R, CMD R and CMD3R to the first device DV1 in a third order, that is, in order as shown in fig. 4. However, since the first device DV1 does not need to process the instructions in order, the first transceiver interface TRI1 may transmit CMD1R, CMD R and CMD3R to the first device DV1 in other order (fourth order).
In one embodiment, the next instruction may be transferred while the previous instruction is still processing. For example, the first device DV1 transmits the command CMD1 to the second device DV2 through the first transceiver interface TRI1 and the second transceiver interface TRI2. While the second device DV2 is processing the command CMD1, it may inform the first device DV1 to continue transmitting the next command CMD2. In the embodiment of fig. 4, if the first device DV1 only transmits one command, the operations of the first device DV1, the second device DV2 and the command conversion system 100 are the same as those of the embodiment shown in fig. 2.
In view of the above, if the first order rule indicates that the first device DV1 needs to process the instructions according to the order, the order in which the first device DV1 transmits the instructions is the same as the order in which it receives the corresponding replies. For example, if the first device DV1 sequentially transmits the commands CMD1, CMD2, CMD3, the order in which it receives the corresponding replies is reply CMD1R, CMD2R, CMD R as shown in fig. 3. On the contrary, if the first order rule indicates that the first device DV1 does not need to process the instructions according to the order, the order in which the first device DV1 transmits the instructions may be different from the order in which the corresponding replies are received. As shown in fig. 4, if the first device DV1 sequentially transmits the commands CMD1, CMD2, CMD3, the order in which it receives the corresponding replies may be reply CMD2R, CMD1R, CMD R.
If the second order rule indicates that the second device DV2 needs to process the instructions according to the order, the order in which the instructions are received by the second device DV2 is the same as the order in which the instructions are processed and corresponding replies are generated. For example, if the second device DV2 receives the commands CMD1, CMD2, CMD3 in sequence, the second device DV2 processes the commands according to the sequence of the commands CMD1, CMD2, CMD3 and generates a reply CMD1R, CMD2R, CMD R. Conversely, if the second order rule indicates that the second device DV2 does not need to process the instructions according to the order, the order in which the instructions are received by the second device DV2 and the order in which the instructions are processed and corresponding replies are generated may be different. As shown in fig. 3 and 4, if the second device DV2 receives the commands CMD1, CMD2, CMD3 in sequence, the second device DV2 can process the commands CMD2, CMD1, CMD3 in sequence and generate corresponding replies CMD2R, CMD1R, CMD R.
Note that in the foregoing embodiment, only one indirect interface (the second transceiver interface TIR 2) and one indirect interface electronic device (the second electronic device DV 2) are included. However, the present disclosure may also include multiple indirect interfaces and multiple electronic devices connecting the indirect interfaces. For example, the instruction conversion system 100 may further include a third transceiver interface, which is also an indirect interface. The third transceiver interface is coupled to a third device. The second transceiver interface and the third transceiver interface may be transceiver interfaces using the same specification or transceiver interfaces using different specifications. The instruction converting system 100 can determine whether the first device DV1 and the third electronic device need to process the instructions according to the sequence according to the rule, and then control the operations of the first transceiving interface TRI1 and the third transceiving interface accordingly.
The first device DV1 and the second device DV2 may be various types of electronic devices. In one embodiment, the first transceiver interface TRI1 is a USB interface and the second transceiver interface TRI2 is a PCIE interface. The first device DV1 is a USB device, for example, a USB device in a host computer. The first device DV1 may be a USB device that itself includes a controller and a USB interface. The second device DV2 is a device using a PCIE interface, such as an SSD (Solid State drive) or a Solid State disk. The first device DV1 communicates with the command conversion system 100 via UASP (USB Attached SCSI Protocol), and the second device DV2 communicates with the command conversion system 100 via NVMe (Non-Volatile Memory Express, nonvolatile memory storage). In the embodiments of fig. 2, 3 and 4, the operation of the first transceiver interface TRI1 is a USB interface and the second transceiver interface TRI2 is a PCIE interface will be described below.
In one embodiment of fig. 2, when the first device DV1 is to transmit SCSI (Small Computer System Interface ) commands to the second device DV2, the SCSI commands are packaged into USB commands by UASP and then transmitted to the first transmitting/receiving interface TRI1. The command conversion system 100 first determines whether the first device DV1 and the second device DV1 need to process commands in sequence. In the embodiment of fig. 2, since the first device DV1 and the second device DV1 need to process the instructions sequentially, the instruction converting system 100 will transmit the instructions to the second device DV2 for processing through the second transmission/reception interface TRI2, and wait for the second device DV2 to process and reply to the first device DV1. If the first device DV1 transmits another command before the second device DV2 does not process the command, the command conversion system 100 may inform the first device DV1 that the previous command has not been processed through a packet (e.g., nrdy) in the USB specification.
In the embodiment of fig. 3, when the first device DV1 is to transfer the SCSI command to the second device DV2, the SCSI command is packaged into a USB command by the UASP and then transferred to the first transfer interface TRI1. The command conversion system 100 first determines whether the first device DV1 and the second device DV1 need to process commands in sequence. In the embodiment of fig. 3, since only the first device DV1 needs to process the instructions in sequence and the second device DV2 does not, the instruction converting system 100 transmits the instructions to the second device DV2 for processing through the second transmission/reception interface TRI2, and notifies the first device DV1 that the instructions can be further issued by the control packet (e.g., erdy) in the USB specification. Then, regardless of the order in which the second device DV2 processes the commands and transmits the replies accordingly, the command conversion system 100 ensures that the first transceiver interface TRI1 transmits the replies to the first device DV1 according to the order in which the commands are transmitted by the first device DV1.
In the embodiment of fig. 4, when the first device DV1 is to transfer the SCSI command to the second device DV2, the SCSI command is packaged into a USB command by the UASP and then transferred to the first transfer interface TRI1. The command conversion system 100 first determines whether the first device DV1 and the second device DV1 need to process commands in sequence. In the embodiment of fig. 4, neither the first device DV1 nor the second device DV2 needs to process the command in sequence, so the command conversion system 100 will transmit the command to the second device DV2 for processing through the second transmission/reception interface TRI2, and notify the first device DV1 that the command can be continuously issued by using the control packet (e.g., erdy) in the USB specification. Then, the first transceiver interface TRI1 transmits replies to the first device DV1 according to the order in which the replies are generated by the second device DV2.
Fig. 5 shows an example of a practical application of the instruction conversion system provided by the present invention. It should be noted that the instruction converting system provided by the present invention is not limited to the implementation of the instruction converting apparatus shown in fig. 5. As shown in fig. 5, the instruction converting apparatus 500 includes a connector 501 and output jacks 503, 505, 507. The connector 501 is a part of a direct interface (the first transceiver interface TRI 1) included in the instruction converting apparatus 500. The output jacks 503, 505, 507 are part of an indirect interface (the aforementioned second transceiving interface TRI 2) that complies with different specifications. The command conversion device 500 may be connected to the first device DV1 (e.g., the first device DV1 in a host computer) through the connector 501, and then the output jacks 503, 505, 507 may be used to connect peripheral devices that conform to different specifications, respectively. With this configuration, the user can control the peripheral devices connected to the output jacks 503, 505, 507 via the host computer, and perform instruction conversion using the instruction conversion device 500.
FIG. 6 shows an instruction converting method according to an embodiment of the invention, which is used in an instruction converting system including a first transceiver interface and a second transceiver interface, and includes the following steps:
step 601
At least one instruction transmitted by a first device (e.g., the first device DV1 of fig. 1) is received by the first transceiver interface (e.g., the first transceiver interface TRI1 of fig. 1).
Step 603
The instruction conversion system (e.g., the instruction conversion system 100 of fig. 1) determines a first order rule of the first device and a second order rule of the second device (e.g., the second device DV2 of fig. 1), wherein the first order rule represents whether the first device needs to process the instruction according to the order, and the second order rule represents whether the second device needs to process the instruction according to the order.
Step 605
The instruction is transmitted to the second device DV2 via a second transceiver interface (e.g., the second transceiver interface TRI2 of fig. 2).
Step 607
And processing the instruction by the second device according to the second sequence rule and transmitting a reply to the second transceiver interface.
Step 609
And transmitting replies to the first device through the first transceiving interface according to the first sequence rule.
Other detailed steps are disclosed in the foregoing embodiments, and thus are not repeated here.
According to the embodiment, the instructions can be smoothly received and executed under the condition of meeting the instruction execution sequence requirements of different transmitting and receiving interfaces, so that devices conforming to different specifications can be smoothly connected and operated.
The foregoing description is only of the preferred embodiments of the present invention, and all equivalent changes and modifications made in the claims should be construed to fall within the scope of the present invention.

Claims (10)

1. An instruction conversion method for use in an instruction conversion system including a first transceiver interface and a second transceiver interface, the instruction conversion method comprising:
receiving at least one instruction transmitted by a first device through the first transmitting and receiving interface;
judging a first order rule of the first device and a second order rule of a second device by the instruction conversion system, wherein the first order rule represents whether the first device needs to process the instruction according to the order, and the second order rule represents whether the second device needs to process the instruction according to the order;
transmitting the instruction to the second device through the second transmitting and receiving interface;
processing the instruction by the second device and transmitting a reply corresponding to the instruction to the second transceiving interface according to the second sequence rule; and
and transmitting the reply to the first device through the first transceiving interface according to the first sequence rule.
2. The instruction converting method according to claim 1,
wherein the first order rule represents that the first device needs to process the instruction in order and the second order rule represents that the second device needs to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order, the second device processes the plurality of instructions in the first order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface transmits the plurality of replies to the first device in the first order.
3. The instruction converting method according to claim 1,
wherein the first order rule represents that the first device needs to process the instruction according to the order, and the second order rule represents that the second device needs to process the instruction according to the order;
the first transmitting and receiving interface receives a first instruction transmitted by the first device;
after the second transceiver interface transmits the first instruction to the second device, the first transceiver interface does not receive other instructions from the first device before the first device receives a reply corresponding to the first instruction.
4. The instruction converting method according to claim 1,
wherein the first order rule indicates that the first device is required to process the instruction in order, and the second order rule indicates that the second device is not required to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order or in a second order, the second device processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface still transmits the plurality of replies to the first device in the first order.
5. The instruction converting method according to claim 1,
the first order rule represents that the first device does not need to process the instruction in order, and the second order rule represents that the second device does not need to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order or in a second order, the second device processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface transmits the plurality of replies to the first device in the third order or in a fourth order.
6. An instruction conversion system comprising:
the first transmitting and receiving interface is used for receiving at least one instruction transmitted by a first device;
a second transmitting and receiving interface for transmitting the instruction to a second device; and
a controller for controlling the actions of the first transceiver interface and the second transceiver interface;
the instruction conversion system judges a first sequence rule of the first device and a second sequence rule of the second device, wherein the first sequence rule represents whether the first device needs to process the instruction according to the sequence, and the second sequence rule represents whether the second device needs to process the instruction according to the sequence;
the second transceiver interface receives a reply generated by the second device after processing the instruction according to the second order rule;
the first transceiving interface transmits the reply to the first device according to the first order rule.
7. The instruction conversion system of claim 6,
wherein the first order rule represents that the first device needs to process the instruction in order and the second order rule represents that the second device needs to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order, the second device processes the plurality of instructions in the first order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface transmits the plurality of replies to the first device in the first order.
8. The instruction conversion system of claim 6,
wherein the first order rule represents that the first device needs to process the instruction according to the order, and the second order rule represents that the second device needs to process the instruction according to the order;
the first transmitting and receiving interface receives a first instruction transmitted by the first device;
after the second transceiver interface transmits the first instruction to the second device, the first transceiver interface does not receive other instructions from the first device before the first device receives a reply corresponding to the first instruction.
9. The instruction conversion system of claim 6,
wherein the first order rule indicates that the first device is required to process the instruction in order, and the second order rule indicates that the second device is not required to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order or in a second order, the second device processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface still transmits the plurality of replies to the first device in the first order.
10. The instruction conversion system of claim 6,
the first order rule represents that the first device does not need to process the instruction in order, and the second order rule represents that the second device does not need to process the instruction in order;
the first receiving interface receives the plurality of instructions transmitted by the first device in a first order, the second receiving interface transmits the plurality of instructions to the second device in the first order or in a second order, the second device processes the plurality of instructions in a third order and transmits a plurality of replies corresponding to the plurality of instructions to the second receiving interface, and the first receiving interface transmits the plurality of replies to the first device in the third order or in a fourth order.
CN202111411616.4A 2021-11-25 2021-11-25 Instruction conversion system and instruction conversion method Pending CN116166591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111411616.4A CN116166591A (en) 2021-11-25 2021-11-25 Instruction conversion system and instruction conversion method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111411616.4A CN116166591A (en) 2021-11-25 2021-11-25 Instruction conversion system and instruction conversion method

Publications (1)

Publication Number Publication Date
CN116166591A true CN116166591A (en) 2023-05-26

Family

ID=86418729

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111411616.4A Pending CN116166591A (en) 2021-11-25 2021-11-25 Instruction conversion system and instruction conversion method

Country Status (1)

Country Link
CN (1) CN116166591A (en)

Similar Documents

Publication Publication Date Title
US8635386B2 (en) Communication control device, data communication method and program
EP1975804B1 (en) Apparatus, method, and system for controlling communication between host device and USB device
CN107908589B (en) I3C communication verification system and method for verifying slave device and master-slave device
CN107391419B (en) Support general sequence busbar concentrator of many host computers and automobile-used host computer
CN108733600B (en) Electronic system with direct memory access controller and method of operating the same
JP7114286B2 (en) System, electronic device and connection control method
US10740172B2 (en) Communication apparatus, communication method, program, and communication system
US8521932B2 (en) Arbitrator and arbitrating method applied to system management bus system
TWI789122B (en) Command transforming system and command transforming method
CN116166591A (en) Instruction conversion system and instruction conversion method
JP2000222337A (en) Interface device
US20190097757A1 (en) Communication device, communication method, program, and communication system
US10824582B2 (en) Communication apparatus, communication method, program, and communication system
TWI512482B (en) Motherboard assembly and information handling system thereof
KR102018666B1 (en) Electronic apparatus connecting usb device and control method thereof
US20230153259A1 (en) Data transmission method and data transmission system
CN117632621B (en) Multiplexing interface configuration method and device based on multi-FPGA verification platform
US20210157764A1 (en) Data conversion device and data conversion system
KR102262501B1 (en) Multiplexer and control method thereof
CN100527113C (en) Multimedia card interface method, computer program product and apparatus
KR20110125989A (en) Semiconductor chip and semiconductor system including the same
KR20090024419A (en) Communication mehod and communication apparatus using usb
CN116166587A (en) Data transmission method and data transmission system
JP6542513B2 (en) USB transfer device, USB transfer system and USB transfer method
JP2006238209A (en) Hub apparatus and hub system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination