CN116166276A - Control flow analysis method, device, equipment, medium and product - Google Patents

Control flow analysis method, device, equipment, medium and product Download PDF

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Publication number
CN116166276A
CN116166276A CN202310450954.1A CN202310450954A CN116166276A CN 116166276 A CN116166276 A CN 116166276A CN 202310450954 A CN202310450954 A CN 202310450954A CN 116166276 A CN116166276 A CN 116166276A
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flow analysis
control flow
source code
code
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CN116166276B (en
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王祥
刘奔
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Xi'an Xintong Semiconductor Technology Co ltd
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Xi'an Xintong Semiconductor Technology Co ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
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    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/44Encoding
    • G06F8/443Optimisation

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Abstract

The embodiment of the invention discloses a control flow analysis method, a device, equipment, a medium and a product, which are applied to the technical field of computers. The control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code. Thus, the control flow analysis model can directly acquire corresponding target control information according to the target source code, and accuracy of the target control information is improved.

Description

Control flow analysis method, device, equipment, medium and product
Technical Field
Embodiments of the present invention relate to the field of computer technology, and in particular, to a control flow analysis method, apparatus, device, computer readable storage medium, and computer program product.
Background
Code optimization refers to equivalent transformation of program code without changing the running result of the program. The goal of code optimization is to generate object code that is shorter in runtime and takes up less space. In general, code optimization is to acquire intermediate (Intermediate Representation, IR) codes according to source codes, then perform control flow analysis and data flow analysis according to the IR codes, and optimize the IR codes according to control flow analysis results and data flow analysis results to acquire target codes.
However, IR codes differ greatly from the control flow structure of source codes. During the conversion of source code to IR code, a portion of the control flow structure information may be lost and may not be accurate if the control flow analysis is based on IR code.
Thus, there is a need for an accurate control flow analysis method.
Disclosure of Invention
In view of this, it is desirable to provide a control flow analysis method, which can obtain accurate control flow structure information. The application also provides a corresponding device, equipment, medium and program product of the method.
The technical scheme of the embodiment of the invention is realized as follows:
in a first aspect, an embodiment of the present invention provides a control flow analysis method, where the method includes:
acquiring a target source code;
inputting the target source code into a control flow analysis model, wherein the control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code;
and acquiring target control structure information corresponding to the target source code output by the control flow analysis model.
In a second aspect, an embodiment of the present invention provides a control flow analysis apparatus, including:
the acquisition module is used for acquiring the target source code;
the input module is used for inputting the target source code into a control flow analysis model, and the control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code;
and the output module is used for acquiring the target control structure information corresponding to the target source code output by the control flow analysis model.
In a third aspect, an embodiment of the present invention provides an apparatus, including a processor and a memory. The processor and the memory communicate with each other. The processor is configured to execute instructions stored in the memory to cause the apparatus to perform a control flow analysis method as in the first aspect or any implementation of the first aspect.
In a fourth aspect, the present application provides a computer readable storage medium, where instructions are stored to instruct a device to perform the control flow analysis method according to the first aspect or any implementation manner of the first aspect.
In a fifth aspect, the present application provides a computer program product comprising instructions which, when run on a device, cause the device to perform the control flow analysis method of the first aspect or any implementation of the first aspect.
Further combinations of the present application may be made to provide further implementations based on the implementations provided in the above aspects.
From the above technical solutions, the embodiments of the present application have the following advantages:
the embodiment of the invention provides a control flow analysis method, which is characterized in that a target source code is acquired, the target source code is input into a control flow analysis model, and the control flow analysis of the target source code is realized through target control structure information corresponding to the target source code output by the control flow analysis model. The control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code. Thus, the control flow analysis model can directly acquire corresponding target control information according to the target source code, and accuracy of the target control information is improved.
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In order to more clearly illustrate the technical method of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort to those of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
FIG. 2 is a flow chart of code optimization;
FIG. 3 is a diagram showing an example of types of section analysis, in which (A) represents an if-then type, (B) represents an if-then-else type, (C) represents a case/switch type, (D) represents a self-circulation type, (E) represents a while circulation type, (F) represents a natural circulation type, (G) represents an abnormal section type, and (H) represents one other type;
FIG. 4 is a flow chart of a control flow analysis method according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an RNN sequence structure according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a control flow analysis method applied in a compiling system according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a control flow analysis device according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another control flow analysis device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
The terms "first", "second" in the embodiments of the present application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
With the continuous progress of compiling and optimizing programs, for example, loop code expansion, invariant outlining and the like, control flow information needs to be acquired, so that the requirements for the control flow information acquisition are higher and higher.
The control flow analysis method provided by the application is applied to the electronic equipment. The electronic device refers to a device with data processing capability, for example, may be a server, or a terminal device such as a desktop, a notebook, or a smart phone.
As shown in fig. 1, a schematic diagram of an electronic device includes: radio Frequency (RF) circuitry 110, memory 120, input unit 130, display unit 140, sensor 150, audio circuitry 160, wireless fidelity (WiFi) module 170, processor 180, and power supply 190. Those skilled in the art will appreciate that the electronic device structure shown in fig. 1 is not limiting of the electronic device and may include more or fewer components than shown, or may combine certain components, or may be arranged in different components.
The following describes the respective constituent elements of the electronic device in detail with reference to fig. 1:
the RF circuit 110 may be used for receiving and transmitting signals during the process of receiving and transmitting information or communication, specifically, after receiving downlink information of the base station, the downlink information is processed by the processor 180; in addition, the data of the design uplink is sent to the base station.
The memory 120 may be used to store software programs and modules, and the processor 180 performs various functional applications and data processing of the electronic device by executing the software programs and modules stored in the memory 120. The memory 120 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like; the storage data area may store data created according to the use of the electronic device (such as audio data, phonebooks, etc.), and the like. In addition, memory 120 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
The input unit 130 may be used to receive input numeric or character information and to generate key signal inputs related to user settings and function controls of the electronic device. In particular, the input unit 130 may include a touch panel 131 and other input devices 132. In this scheme, the electronic device can obtain the target source code through the input unit, and then transmit the target source code to the processor of the electronic device for processing.
The display unit 140 may be used to display information input by a user or information provided to the user and various menus of the electronic device. The display unit 140 may include a display panel 141.
The electronic device may also include at least one sensor 150, such as a light sensor, a motion sensor, and other sensors.
Audio circuitry 160, speaker 161, microphone 162 may provide an audio interface between a user and the electronic device.
WiFi belongs to a short-distance wireless transmission technology, and the electronic equipment can help a user to send and receive emails, browse webpages, access streaming media and the like through the WiFi module 170, so that wireless broadband Internet access is provided for the user.
The processor 180 is a control center of the electronic device, connects various parts of the entire electronic device using various interfaces and lines, performs various functions of the electronic device and processes data by running or executing software programs and/or modules stored in the memory 120, and invoking data stored in the memory 120.
The electronic device also includes a power supply 190 (e.g., a battery) that provides power to the various components.
Typically, an electronic device needs to code optimize code when executing the code. The flow of code optimization is shown in fig. 2. Specifically, the source code is converted into intermediate code at the compiling front end, then optimized through a code optimizer, and optimized code is generated through the intermediate code. Wherein the code optimizer is used for performing control flow analysis, data flow analysis and code transformation according to the intermediate codes. Therefore, performing accurate control flow analysis is important in code optimization.
In the related art, control flow analysis is generally performed in a manner that is necessary to analyze through nodes and sections. Specifically, the must-pass node means that the must-pass node is used to find a loop and simply represents the found loop for optimization. Interval analysis is the analysis of the structure of the entire process and breaks down the process into nested regions called intervals. The nested structure of the intervals forms a control tree which is helpful for structuring the data flow analysis and improving the analysis speed. The interval analysis needs different algorithm area identification for each type of division, and has high difficulty in identifying complex irregular control structures and high algorithm complexity, thereby increasing development difficulty, flexibility and expansibility of a compiler.
Examples of types of section analysis are shown in fig. 3, including (a) an if-then type, (B) an if-then-else type, (C) a case/switch type, (D) a self-circulation type, (E) a while circulation type, (F) a natural circulation type, (G) an abnormal section type, (H) one other type, and the like. Wherein each block represents a basic block and the arrows indicate the order of execution between the basic blocks.
Whether it is necessary to analyze nodes or intervals, the processing is based on basic blocks, and the IR codes formed according to the basic blocks are quite different from the control flow structures of source codes. During the conversion of source code to IR code, a portion of the control flow information may be lost and may not be accurate if the control flow analysis is based on IR code.
In view of this, the present application provides a control flow analysis method, which can directly perform control flow analysis on source code, so as to improve accuracy of control flow analysis.
Specifically, the electronic device acquires a target source code, inputs the target source code into the control flow analysis model, and realizes control flow analysis of the target source code through target control structure information corresponding to the target source code output by the control flow analysis model. The control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code. Thus, the control flow analysis model can directly acquire corresponding target control information according to the target source code, and accuracy of the target control information is improved.
In order to facilitate understanding of the technical solution of the present application, a control flow analysis method provided in the present application is described below with reference to fig. 4.
Referring to the flow chart of a control flow analysis method shown in fig. 4, the specific steps of the method are as follows:
402: the electronic device obtains target source code.
The target source code refers to source code which needs to be subjected to control flow analysis.
In the related art, control flow analysis for codes is generally control flow analysis for IR codes, which are generated based on source codes. I.e. the source code is first converted into IR code and then the IR code is subjected to control flow analysis. But the results are not accurate enough, affecting the efficiency of code optimization.
In the electronic device, as shown in fig. 1, the target source code may be input through a touch panel of the input unit, may be input through other input devices, such as an external keyboard, or may be transmitted through other electronic devices through wires or wireless (such as bluetooth or WIFI). After receiving the input unit, such as the source code input by the external keyboard, the electronic device 10 can directly process the obtained target source code and perform control flow analysis according to the target source code, so that a comprehensive and accurate control flow analysis result can be obtained, and the code optimization efficiency is improved.
404: the electronic device inputs the target source code to a control flow analysis model.
The control flow analysis model is used for outputting control structure information corresponding to the source codes according to the input source codes.
The control flow analysis model may be trained from training data by deep learning methods. The training data may include training source codes and training control structure information corresponding to the training source codes.
Specifically, the electronic device may construct training data related to the control flow. The training data may be historical code data, or code data written corresponding to the control flow analysis model. The training data may be, for example, training data comprising different control structure information. Including if control structures; an if-else control structure; an if-elseif-else control structure; for a circulation control structure; a while cycle control structure; a dowhole cycle control structure; switch control structure and goto control structure.
In this scheme, only the control structure type is used as an example of the control structure information, and in this scheme, the control structure information may further include control block location information, a condition judgment statement, a loop step length, a loop block execution code, and a loop block input/output variable set.
The electronic device can adopt supervised learning for training, the classification labels are used as expected and output structure comparison, and if the output result is wrong, parameters are modified for calculation.
Specifically, the electronic device may acquire a training source code and training control structure information corresponding to the training source code, input the training source code into the control flow analysis model, acquire output control structure information corresponding to the training source code, acquire a loss function according to the training control structure information and the output control structure information, and correct parameters of the control flow analysis model according to the loss function.
Since machine learning input model data types are not programs in high-level language, conversion is required first, word2Vec models can be used to train from each sentence in the program code dataset, and slide over the sentences with a fixed window, predicting the vector of that Word in the middle of the fixed window from the context of the sentence. The model is then trained according to a loss function and optimization method. However, for deep learning models, word vectors are generally used as inputs to the model. For example, for a string of codes, for, switch, while and if can be obtained through the Word2Vec model. The electronic device may train the control flow analysis model through a recurrent neural network (Recurrent Neural Network, RNN). Unlike deep neural networks (Deep Neural Networks, hereinafter DNN), convolutional neural networks (Convolutional Neural Network, CNN) can handle sequence problems. By way of example, some sequences may be: a segment of continuous speech, a segment of continuous handwritten text, a sentence, and so on.
RNN assumes that the samples are sequence-based. For example, for a sequence from index 00 to TT, for any index number TT in the sequence, the corresponding input is the ttth element x (t) x (t) in sample xx. The hidden state h (t) h (t) of the model at the position of the sequence index number t is determined by x (t) x (t) and the hidden state h (t-1) h (t-1) at the position of t-1 t-1. The output o (t) o (t) of the model at the moment tt is obtained by nonlinear conversion of h (t) h (t).
Taking sentences as an example, in understanding the meaning of a sentence, it is not sufficient to understand each word of the sentence in isolation, and it is necessary to process the entire sequence in which the words are connected. FIG. 5 shows a schematic sequence structure of RNN.
The left side of the graph is a graph in which the RNN model is not developed in time, and the right side is a graph developed in time series. The right hand graph depicts a model of RNN around the sequence index t. Wherein: x (t) represents the input of training samples at sequence index t, and likewise, x (t-1) and x (t+1) represent the input of training samples at sequence index t-1 and t+1; h (t) represents the hidden state of the model at the time of the sequence index number t, and h (t) is jointly determined by x (t) and h (t-1); o (t) represents the output of the model at the sequence index t, and is determined only by the current hidden state h (t) of the model; l (t) represents the loss function of the model at the sequence index t, and the loss function of the model as a whole is the sum of all L (t); y (t) represents the true output of the training sample sequence at the sequence index t. The three matrices U, W and V are linear relation parameters of the model, are shared in the whole RNN network, and realize the idea of 'loop feedback' of the model of the RNN through sharing.
In the scheme, the source code is also formed by a sequence as a high-level language program, and can be used for identifying the control flow of the RNN.
Illustratively, take for loop code blocks as an example: "for (unsigned i=1; path. Path [ i ] |=null; i++ {. The use of the RNN model" training can be performed, whereby information such as an initialization variable for a loop, a judgment condition, a step size, etc. can be fed back to a subsequent character from the for keyword information and inferred that the following character means the following character.
406: and the electronic equipment acquires target control structure information corresponding to the target source code output by the control flow analysis model.
The target control structure information comprises target control structure type and target control structure sub-information, the target control structure sub-information comprises at least one of target control block position information, target condition judgment statement, target circulation step length, target circulation block execution code and target circulation block variable set, and the target circulation block variable set is an input variable and output variable set of a target circulation block.
In the scheme, the target control structure information not only comprises the control structure type, but also comprises control block position information, a condition judgment statement, a circulation step length, a circulation block execution code and a target circulation block variable set, so that richer target control structure information can be obtained, and the information can be used as supplementary information of IR codes to facilitate subsequent processing.
Taking the control block location information as an example, in this solution, a specific line number, for example if, may also be acquired in order to optimize the IR code.
Fig. 6 is a schematic diagram of the method provided by the present embodiment applied in a compiling system. The compiling system may be divided into a compiler framework and a deep learning framework. The compiler framework is responsible for compiling and optimizing codes and generating the codes. Specifically, the compiler front end converts the source code into the IR code, and obtains corresponding control structure information through the scheme provided by the scheme, and then performs IR optimization according to the IR code and the control structure information. And training a pre-designed control flow analysis model by the deep learning framework, and finally outputting the characteristics. The control flow analysis model may include an input layer, a hidden layer, and an output layer.
Specifically, for the compiler source code, the source code needs to be converted into the IR code for subsequent processing, but part of information is lost in the process of converting the source code into the IR code, so that control structure information included in the source code can be obtained by the method provided by the scheme, and then the control structure information and the IR code are integrated to obtain a control flow analysis result for IR code optimization. Specifically, the IR code may be code optimized according to the data stream analysis result corresponding to the IR code and the control stream analysis result.
Based on the above description, the embodiment of the application provides a control flow analysis method, which is to obtain a target source code, input the target source code into a control flow analysis model, and realize control flow analysis on the target source code by using target control structure information corresponding to the target source code output by the control flow analysis model. The control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code. Thus, the control flow analysis model can directly acquire corresponding target control information according to the target source code, and accuracy of the target control information is improved.
Corresponding to the above method embodiment, the present application further provides a control flow analysis device, where the device refers to fig. 7, and the device 900 includes: an acquisition module 902, an input module 904, and an output module 906.
An obtaining module 902, configured to obtain a target source code;
the input module 904 is configured to input the target source code to a control flow analysis model, where the control flow analysis model is configured to output control structure information corresponding to the source code according to the input source code;
and an output module 906, configured to obtain target control structure information corresponding to the target source code output by the control flow analysis model.
In some possible implementations, the target control structure information includes a target control structure type and target control structure sub-information, the target control structure sub-information including at least one of target control block position information, a target condition judgment statement, a target loop step size, a target loop block execution code, and a target loop block variable set, the target loop block variable set being an input variable and an output variable set of the target loop block.
In some possible implementations, the control flow analysis model is obtained by training in the following manner:
acquiring training source codes and training control structure information corresponding to the training source codes;
inputting the training source code into the control flow analysis model, and obtaining output control structure information corresponding to the training source code;
acquiring a loss function according to the training control structure information and the output control structure information;
and correcting parameters of the control flow analysis model according to the loss function.
In some possible implementations, the control flow analysis model is a recurrent neural network model.
In some possible implementations, the apparatus further includes an optimization module 908, as shown in fig. 8:
the optimization module is used for acquiring a target intermediate code corresponding to the target source code;
and the optimization module is also used for performing code optimization according to the target intermediate code and the target control structure information.
In some possible implementations, the optimization module is further configured to:
acquiring a control flow analysis result according to the target intermediate code and the target control structure information;
acquiring a data stream analysis result according to the target intermediate code;
and performing code optimization according to the control flow analysis result and the data flow analysis result.
The application provides a device for realizing a control flow analysis method. The apparatus includes a processor and a memory. The processor and the memory communicate with each other. The processor is configured to execute instructions stored in the memory to cause the device to perform the control flow analysis method described above.
The present application provides a computer readable storage medium having instructions stored therein that, when executed on a device, cause the device to perform the control flow analysis method described above.
The present application provides a computer program product containing instructions that, when run on a device, cause the device to perform the control flow analysis method described above.
It should be further noted that the above-described apparatus embodiments are merely illustrative, and that the units described as separate units may or may not be physically separate, and that units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in the drawings of the embodiment of the device provided by the application, the connection relation between the modules represents that the modules have communication connection therebetween, and can be specifically implemented as one or more communication buses or signal lines.
From the above description of the embodiments, it will be apparent to those skilled in the art that the present application may be implemented by means of software plus necessary general purpose hardware, or of course may be implemented by dedicated hardware including application specific integrated circuits, dedicated CPUs, dedicated memories, dedicated components and the like. Generally, functions performed by computer programs can be easily implemented by corresponding hardware, and specific hardware structures for implementing the same functions can be varied, such as analog circuits, digital circuits, or dedicated circuits. However, a software program implementation is a preferred embodiment in many cases for the present application. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a readable storage medium, such as a floppy disk, a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk or an optical disk of a computer, etc., including several instructions for causing a computer device (which may be a personal computer, a training device, or a network device, etc.) to perform the method described in the embodiments of the present application.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product.
The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, training device, or data center to another website, computer, training device, or data center via a wired (e.g., coaxial cable, optical fiber, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be stored by a computer or a data storage device such as a training device, a data center, or the like that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy Disk, a hard Disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.
It should be noted that: the technical schemes described in the embodiments of the present invention may be arbitrarily combined without any collision.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A control flow analysis method, the method comprising:
acquiring a target source code;
inputting the target source code into a control flow analysis model, wherein the control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code;
and acquiring target control structure information corresponding to the target source code output by the control flow analysis model.
2. The method of claim 1, wherein the target control structure information comprises a target control structure type and target control structure sub-information, the target control structure sub-information comprising at least one of target control block position information, a target condition judgment statement, a target loop step size, a target loop block execution code, and a target loop block variable set, the target loop block variable set being a set of input variables and output variables of a target loop block.
3. The method of claim 1, wherein the control flow analysis model is obtained by training:
acquiring training source codes and training control structure information corresponding to the training source codes;
inputting the training source code into the control flow analysis model, and obtaining output control structure information corresponding to the training source code;
acquiring a loss function according to the training control structure information and the output control structure information;
and correcting parameters of the control flow analysis model according to the loss function.
4. A method according to claim 3, wherein the control flow analysis model is a recurrent neural network model.
5. The method according to claim 1, wherein the method further comprises:
acquiring a target intermediate code corresponding to the target source code;
and performing code optimization according to the target intermediate code and the target control structure information.
6. The method of claim 5, wherein said performing code optimization based on said target intermediate code and said target control structure information comprises:
acquiring a control flow analysis result according to the target intermediate code and the target control structure information;
acquiring a data stream analysis result according to the target intermediate code;
and performing code optimization according to the control flow analysis result and the data flow analysis result.
7. A control flow analysis device, the device comprising:
the acquisition module is used for acquiring the target source code;
the input module is used for inputting the target source code into a control flow analysis model, and the control flow analysis model is used for outputting control structure information corresponding to the source code according to the input source code;
and the output module is used for acquiring the target control structure information corresponding to the target source code output by the control flow analysis model.
8. An apparatus comprising a processor and a memory;
the processor is configured to execute instructions stored in the memory to cause the apparatus to perform the method of any one of claims 1 to 6.
9. A computer readable storage medium comprising instructions that instruct a device to perform the method of any one of claims 1 to 6.
10. A computer program product, characterized in that the computer program product, when run on a computer, causes the computer to perform the method according to any of claims 1 to 6.
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