CN116132609B - Temperature drift correction method and device based on band gap reference BG temperature coefficient - Google Patents
Temperature drift correction method and device based on band gap reference BG temperature coefficient Download PDFInfo
- Publication number
- CN116132609B CN116132609B CN202310314228.7A CN202310314228A CN116132609B CN 116132609 B CN116132609 B CN 116132609B CN 202310314228 A CN202310314228 A CN 202310314228A CN 116132609 B CN116132609 B CN 116132609B
- Authority
- CN
- China
- Prior art keywords
- chip
- clock frequency
- temperature
- temperature coefficient
- image data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Image Processing (AREA)
Abstract
The application provides a temperature drift correction method and device based on a band gap reference BG temperature coefficient, comprising the following steps: the application processor detects a starting instruction aiming at a target application program needing image data processing, responds to the starting instruction and sends a preset control instruction to the code chip; the chip receives a preset control instruction, responds to the control instruction and executes a first temperature drift compensation operation; the application processor receiving the setting completion response message, performing a plurality of operations including a processing operation of the image data for the application interface of the target application program; and carrying out subsequent processing on the image data under the condition of the adjusted clock frequency. Therefore, before the chip adjusts the clock frequency by using a preset temperature drift compensation algorithm to compensate the temperature drift of the clock frequency, the chip is compensated by the BG temperature coefficient to compensate the frequency offset of the chip due to the temperature rise, so that the occupation pressure of offset data caused by the simple adjustment by using the temperature drift compensation algorithm on the cache space is reduced.
Description
Technical Field
The application relates to the technical field of image data processing, in particular to a temperature drift correction method and device based on a band gap reference BG temperature coefficient.
Background
Currently, when a display chip system in an electronic device processes image data using a crystal oscillator therein, there may occur a situation that buffer data inside the chip overflows as a play time or a complexity of a play picture increases.
Disclosure of Invention
According to the temperature drift correction method and device based on the band gap reference BG temperature coefficient, before the chip can adjust the clock frequency of the chip by using the preset temperature drift compensation algorithm to compensate the clock frequency temperature drift, the influence degree of the temperature variation of the decrease of the BG temperature coefficient on the clock frequency of the chip, namely the frequency offset after the temperature rise is compensated, so that the occupied pressure of offset data to a cache space caused by the simple adjustment of the preset temperature drift compensation algorithm is reduced, the unstable problems such as cache overflow and the like are easily caused, and the running stability of a display chip system is improved.
In a first aspect, the temperature drift correction method based on the temperature coefficient of the band gap reference BG provided by the embodiment of the application,
the display chip system applied to the terminal equipment comprises an application processor, a chip and a display module, wherein the application processor is in communication connection with the chip, and the method comprises the following steps:
The application processor detects a starting instruction aiming at a target application program needing image data processing, responds to the starting instruction and sends a preset control instruction to the code chip;
the chip receives the preset control instruction, responds to the control instruction, and executes the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setup complete response message to the target application;
the application processor receives the setup completion response message, performs a plurality of operations for starting the target application program, wherein the plurality of operations include a processing operation for image data of an application interface of the target application program, the processing operation including the steps of:
the application processor sends the image data to the chips, the chips receive the image data and adjust clock frequency of the chips according to a preset temperature drift compensation algorithm to compensate first clock frequency offset caused by temperature change of the chips, wherein the first clock frequency offset is clock frequency offset of second clock frequency offset compensated by the first temperature drift compensation operation, and the second clock frequency offset is clock frequency offset of the chips under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
In a second aspect, an embodiment of the present application provides a temperature drift correction method based on a band gap reference BG temperature coefficient, which is applied to a chip in a display chip system of a terminal device, where the display chip system of the terminal device includes an application processor, a chip and a display module, and the application processor is communicatively connected with the chip, and the method includes:
receiving a preset control instruction from the application processor, wherein the preset control instruction is associated with a starting instruction aiming at a target application program needing image data processing;
responding to the preset control instruction, executing the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the crystal oscillator circuit are updated according to a pre-stored empirical value; and sending a setup complete response message to the target application;
receiving image data of an application interface of the target application program from the application processor, and performing processing operations on the image data, wherein the processing operations comprise the following operations:
adjusting the clock frequency of the clock according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
In a third aspect, an embodiment of the present application provides a temperature drift correction device based on a band gap reference BG temperature coefficient, which is applied to a display chip system of a terminal device, where the display chip system of the terminal device includes an application processor, a chip and a display module, and the application processor is communicatively connected with the chip, where the device includes:
a receiving unit, configured to receive a preset control instruction from the application processor, where the preset control instruction is associated with a start instruction for a target application program that needs to perform image data processing;
the execution unit is used for responding to the preset control instruction and executing the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the crystal oscillator circuit are updated according to a pre-stored empirical value; and sending a setup complete response message to the target application;
the receiving unit is further used for receiving image data of an application interface of the target application program from the application processor;
an adjustment unit configured to perform processing operations on the image data, the processing operations including: adjusting the clock frequency of the clock according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
Fourth aspect the present embodiment provides an electronic device, which is a mobile terminal device or a central control system device, comprising a processor, a memory and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps as in the first aspect of the present embodiment.
In a fifth aspect, embodiments of the present application provide a computer readable storage medium having stored thereon a computer program/instruction which when executed by a processor performs the steps of the first and second aspects of embodiments of the present application.
In a sixth aspect, embodiments of the present application provide a computer program product comprising computer programs/instructions which when executed by a processor implement some or all of the steps as in the first and second aspects of embodiments of the present application.
It can be seen that, in this example, the display chip system of the terminal device includes an application processor, a chip and a display module, where the application processor is communicatively connected to the chip, and the application processor firstly detects a start instruction for a target application program that needs to perform image data processing, and responds to the start instruction, and sends a preset control instruction to the chip, and secondly, the chip receives the preset control instruction, responds to the control instruction, and performs the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setting completion response message to the target application; again, the application processor receives the setup complete response message, performs a plurality of operations for starting the target application program, wherein the plurality of operations include a processing operation for image data of an application interface of the target application program, the processing operation including the steps of: the application processor sends image data to the chips, the chips receive the image data, the clock frequency of the chips is adjusted according to a preset temperature drift compensation algorithm to compensate the first clock frequency offset of the chips caused by temperature change, and finally, the image data is subjected to subsequent processing under the adjusted clock frequency condition. Because the first clock frequency offset is the clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, the second clock frequency offset refers to the clock frequency offset of the chip under the condition that the first temperature drift compensation operation is not executed, and therefore, before the chip adjusts the clock frequency of the chip by using the preset temperature drift compensation algorithm to compensate the temperature drift of the clock frequency, the influence degree of the temperature coefficient of the temperature decrease of the BG on the clock frequency of the chip, namely, the frequency offset after the temperature rise is compensated, thereby reducing the unstable problems of buffer overflow and the like caused by the occupation pressure of offset data on a buffer space caused by the simple adjustment of the preset temperature drift compensation algorithm, and improving the running stability of a display chip system.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a display chip system according to an embodiment of the present application;
fig. 2 is a schematic diagram of a chip structure in a display chip system according to an embodiment of the present application;
FIG. 3 is a plot of conventional chip clock frequency offset versus chip surface temperature provided in an embodiment of the present application;
fig. 4 is a schematic flow chart of a temperature drift correction method based on a band gap reference BG temperature coefficient according to an embodiment of the present application;
fig. 5 is a schematic flow chart of another temperature drift correction method based on a band gap reference BG temperature coefficient according to an embodiment of the present application;
fig. 6 is a functional unit composition diagram of a chip according to an embodiment of the present application.
Detailed Description
In order to make the present application solution better understood by those skilled in the art, the following description will clearly and completely describe the technical solution in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the embodiment of the application, "and/or", the association relation of the association objects is described, which means that three relations can exist. For example, a and/or B may represent three cases: a alone; both A and B are present; b alone. Wherein A, B can be singular or plural.
In the embodiment of the present application, the symbol "/" may indicate that the associated object is an or relationship. In addition, the symbol "/" may also denote a divisor, i.e. performing a division operation. For example, A/B may represent A divided by B.
In the embodiments of the present application, "at least one item(s)" or the like means any combination of these items, including any combination of single item(s) or plural item(s), meaning one or more, and plural means two or more. For example, at least one (one) of a, b or c may represent the following seven cases: a, b, c, a and b, a and c, b and c, a, b and c. Wherein each of a, b, c may be an element or a set comprising one or more elements.
The 'equal' in the embodiment of the application can be used with the greater than the adopted technical scheme, can also be used with the lesser than the adopted technical scheme, and is applicable to the lesser than the adopted technical scheme. When the combination is equal to or greater than the combination, the combination is not less than the combination; when the value is equal to or smaller than that used together, the value is not larger than that used together.
In order to better understand the schemes of the embodiments of the present application, the following description will first describe terminal devices, related concepts and contexts that may be involved in the embodiments of the present application.
(1) The Application Processor (AP) and the first crystal oscillator circuit in the application processor and the second crystal oscillator circuit in the chip are both oscillation circuits formed by crystal oscillators.
(2) The crystal Oscillator circuit is composed of a crystal Oscillator (OSC). The crystal oscillator is an energy conversion device, namely, direct-current electric energy is converted into alternating-current electric energy with a specified frequency, and a circuit formed by the crystal oscillator is called a crystal oscillator circuit or an oscillating circuit.
(3) The reference voltage is Voltage reference, which is a voltage in a circuit that is always constant regardless of load, power supply, temperature drift, time, etc.
(4) BG means Bandgap voltage reference, meaning bandgap reference, and BG temperature coefficient means temperature coefficient of bandgap reference.
(5) The production yield is an index for judging whether the product has mass productivity or not, and the calculation formula is as follows: number of acceptable products/(total number of products x 100%).
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display chip system of a terminal device according to an embodiment of the present application, and as shown in fig. 1, a display chip system 100 includes a chip 110, an application processor 120 and a display module 130, wherein the display module 130 may be a touch and display driver integrated (Touch and Display Driver Integration, TDDI) chip, also referred to as a display chip. The application processor 120 is communicatively connected to the chip 110, and the display module 130 is communicatively connected to the chip 110, wherein a first crystal oscillator circuit used by the application processor 120 is different from a second crystal oscillator circuit used by the chip 110.
Referring to fig. 2, fig. 2 is a schematic diagram of a chip structure in another display chip system according to an embodiment of the present application. As shown in fig. 2, the chip 200 includes a mobile industry processor receive interface 201 (i.e., MIPI RX module), an image data pre-processing module 202 (i.e., VPRE module), an image controller module 203 (i.e., VIDC module), a display controller module 204 (i.e., LCDC module), and a mobile industry processor transmit interface 205 (i.e., MIPI TX module). The mobile industry processor receiving interface 201 is connected with the image data preprocessing module 202, the image data preprocessing module 202 is connected with the image controller module 203, the image controller module 203 is connected with the display controller module 204, and the display controller module 204 is connected with the mobile industry processor transmitting interface 205 through the display pixel interfaces (Display Pixel Interface, DPI). In addition, the mobile industry processor transmitting interface 205 is also connected to the display module in communication, and the mobile industry processor receiving interface 201 is connected to the application processor in communication. The function of the image controller module 203 is responsible for receiving the image and video data from the application processor, while the function of the display controller module 204 is responsible for processing the data and controlling the signals, like the function of a video card in a computer, mainly responsible for acquiring the image/video data from a memory or a FIFO channel, superposing and mixing the image/video data in a certain way, sending the final image to an external liquid crystal display (i.e. a display module) for displaying through a DPI interface, and generating necessary LCD control signals.
In the daily use process of the display chip, the application processor 120 processes and outputs the image data, and sends the processed image data to the chip 110 through the communication connection with the chip 110, and then the image data processed and sent by the chip 110 is output to the display module 130 for display through the communication connection. In the actual running process of the display chip system, the second crystal oscillator in the chip 110 is affected by the temperature drift, so as to cause a timing control error, and further cause unbalance of the input and output image data. Therefore, it has been proposed in the art to compensate the temperature drift problem of the chip by a temperature drift compensation algorithm to reduce the influence of temperature variation to clock frequency, wherein the temperature drift compensation algorithm can dynamically adjust the horizontal front-shoulder blanking pixel period HFP parameter in the control timing sequence of the LCDC module to achieve the same time for one line of LCDC output as the time for one line of input of the application processor, so as to achieve the input/output balance.
However, the existing temperature drift compensation algorithm is essentially a mechanism for optimizing the subsequent frame image processing process under the condition that the clock frequency of the chip is shifted, so that when the actual chip shifting degree is large, the occupied pressure of offset data to the buffer space of the chip caused by the adjustment of the temperature drift compensation algorithm is large, and the buffer overflow is easy to cause the problem of instability.
Meanwhile, as shown in fig. 3, the inventors found that there is a correspondence between the clock frequency of the chip and the chip surface temperature under the condition of different BG temperature coefficients, specifically, the clock frequency gradually shifts when the temperature rises. Under the condition that the time of inputting one frame of data is unchanged, the influence of different BG temperature coefficients on the clock frequency degree is more and more obvious along with the increase of the chip surface temperature, for example, when the chip surface temperature is 40 ℃, the clock frequency offset under the condition of different BG temperature coefficients can be 3.28 per mill different; when the surface temperature of the chip is 80 ℃, the clock offset rate under the condition of different BG temperature coefficients can be 11.37 per mill different.
Based on the research findings and the new problems found by aiming at the temperature drift compensation algorithm, the application provides a temperature drift correction method based on a band gap reference BG temperature coefficient, so that the degree of temperature drift of the clock frequency of a chip along with temperature change can be controlled and weakened in advance, the occupied pressure of offset data to a buffer space caused by simply using a preset temperature drift compensation algorithm for adjustment is reduced, unstable problems such as buffer overflow and the like are easily caused, and the running stability of a display chip system is improved.
Referring to fig. 4, fig. 4 is a schematic flow chart of a temperature drift correction method based on a temperature coefficient of a band gap reference BG according to an embodiment of the present application, which is applied to the display chip system 100 shown in fig. 1; as shown in fig. 4, the temperature drift correction method based on the band gap reference BG temperature coefficient includes the following steps.
In step 401, the application processor detects a start instruction for a target application program that needs to perform image data processing, and sends a preset control instruction to the chip in response to the start instruction.
The problem to be solved by the scheme provided by the embodiment of the application is that the second crystal oscillator in the chip changes in chip temperature along with the increase of the use time or the increase of the precision and complexity of a playing picture, so that the clock frequency is influenced, the clock frequency is offset, the dynamic parameters of a circuit are unstable, the time of outputting one line of image data of the chip is different from the time of inputting one line of image data, and even the circuit cannot work normally.
In one possible embodiment, the application processor is communicatively coupled to the chip, and the chip is communicatively coupled to the display module.
In step 402, the chip receives the preset control command, and executes a first temperature drift compensation operation in response to the control command.
The first temperature drift compensation operation includes: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setting completion response message to the target application.
In the specific implementation, the frequency offset corresponding to the software adjustment period is reduced as much as possible due to the adjustment of the BG temperature coefficient, so that the situation that the software adjustment prediction result is completed due to overlarge frequency offset and cannot be applied is avoided.
Therefore, by the action in the step 402, the frequency offset after the temperature of the crystal oscillator circuit is raised can be compensated, so that the adjusting pressure of the temperature drift correction algorithm can be reduced.
In one possible embodiment, the value of the BG temperature coefficient of the chip is configured to be a target value.
In one possible embodiment, the BG temperature coefficient of the chip is configured to have a target value, where the target value is 0x1F.
In one possible embodiment, the method for obtaining the target value includes the following steps: acquiring surface temperature data and hour hand frequency data of a chip under the numerical condition of a plurality of BG temperature coefficients; determining the offset degree of the clock frequency along with the surface temperature according to the surface temperature data and the clock frequency data; and taking the value of the BG temperature coefficient with the smallest deviation degree of the values of the plurality of BG temperature coefficients as the target value.
The speed of inputting single frame image data to the chip by the application processor is not changed as the surface temperature continues to increase, for example, 29 to 60 degrees, but the output frequency of outputting data from the chip to the display chip becomes about 98.5%.
In this example, the surface temperature data and the clock frequency data under the numerical conditions of the plurality of BG temperature coefficients are actually obtained to determine the offset degree of the clock frequency along with the surface temperature, the numerical value of the BG temperature coefficient with the smallest offset degree is selected as the target numerical value, the zero temperature coefficient reference voltage is adjusted to be the positive temperature coefficient through the BG temperature coefficient, the offset degree of the clock frequency is reduced, and the stability of the display chip system for processing the image data is further improved.
In one possible embodiment, the method for obtaining the target value includes the following steps: acquiring surface temperature data and hour hand frequency data of a chip under the numerical condition of a plurality of BG temperature coefficients; determining the deviation degree of clock frequency along with the surface temperature according to the surface temperature data and the clock frequency data, and counting the production yield of chips under the numerical condition of a plurality of BG temperature coefficients; and determining the value of the BG temperature coefficient capable of meeting the requirement according to the deviation degree and the production yield as the target value.
Wherein the production yield may be, for example, 99%.
It can be seen that, in this example, the surface temperature data and the clock frequency data under the numerical conditions of the plurality of BG temperature coefficients are actually obtained to determine the deviation degree of the clock frequency along with the surface temperature, and the production yield of the chips under the numerical conditions of the plurality of BG temperature coefficients is counted, the deviation degree and the production yield are integrated, the numerical value of the BG temperature coefficient meeting the requirement is selected as the target numerical value, the zero temperature coefficient reference voltage is adjusted to be the positive temperature coefficient through the BG temperature coefficient, the deviation degree of the clock frequency is reduced, and the stability of the display chip system for processing the image data is further improved and the production requirement is met.
In one possible embodiment, the updating the supply voltage and the reference current of the chip according to pre-stored empirical values includes: recording power supply voltage data and reference current data corresponding to the chips under the numerical condition of a plurality of BG temperature coefficients; the power supply voltage data and the reference current data are statistically analyzed, and the change condition of the corresponding power supply voltage and the corresponding reference current under the condition that the value of the BG temperature coefficient configuring the chip is the target value is determined; determining empirical values of the power supply voltage and the reference current according to the change conditions of the power supply voltage and the reference current; and updating the power supply voltage of the chip according to the empirical value.
The power supply voltage and the reference current change along with the change of the temperature coefficient, for example, the temperature coefficient is increased by about 2%, the corresponding power supply voltage becomes 2%, and if 1.1V becomes 1.13V, the reference current becomes 2%.
Therefore, in this example, the empirical values of the power supply voltage and the reference current are determined by actually obtaining the change conditions of the power supply voltage data and the reference current data of the chip under the numerical conditions of a plurality of BG temperature coefficients, and the power supply voltage of the chip is updated according to the change conditions of the corresponding power supply voltage and the reference current when the BG temperature coefficient value of the chip is the target value, so that the frequency offset after the temperature of the crystal oscillator circuit is increased is compensated, the adjustment pressure of the temperature drift correction algorithm is reduced, and the stability of processing the image data by the display chip system is improved.
In step 403, the application processor receives the setup complete response message and performs a plurality of operations for starting the target application program.
Wherein the plurality of operations include processing operations for image data of an application interface of the target application program, the processing operations including the steps of: the application processor sends the image data to the chips, the chips receive the image data and adjust clock frequency of the chips according to a preset temperature drift compensation algorithm to compensate first clock frequency offset caused by temperature change of the chips, wherein the first clock frequency offset is clock frequency offset of second clock frequency offset compensated by the first temperature drift compensation operation, and the second clock frequency offset is clock frequency offset of the chips under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
Wherein the plurality of operations for launching the target application program include: the activity manager serves a startup operation of the AMS, a recording operation of the AMS, an operation of entering a pause state pause, a check operation, a notification operation, a processing operation of image data of the application interface, and the like.
The subsequent processing of the image data under the adjusted clock frequency condition may be, for example, performing resolution conversion, graphic segmentation, denoising of the received image data, sending the processed image data to a display module, and the like.
It can be seen that, in this example, the temperature drift compensation algorithm is supplemented by the processing operation of the image data of the application interface of the target application program, so that the degree of clock frequency offset is further reduced, and the stability of processing the image data by the display chip system is further improved.
In one possible embodiment, after the configuring the BG temperature coefficient of the chip to be the target value, the method further includes: the application processor detects a start instruction of a deep sleep mode; the application processor transmits the start instruction to the chip; and the chip receives the starting instruction, restores the value of the BG temperature coefficient from the target value to 0x10, starts the programmable voltage detector PVD and enters a deep sleep mode.
The programmable voltage detector PVD is required to detect the voltage during the startup and the sleep mode of the application processor, and if the BG temperature coefficient is the target value, the application processor cannot be started normally.
It can be seen that, in this example, after the application processor detects the instruction to enter the deep sleep mode, the programmable voltage detector PVD is enabled normally, so as to ensure that the next application processor can be started normally.
It can be seen that, in the embodiment of the present application, the display chip system of the terminal device includes an application processor, a chip and a display module, where the application processor is communicatively connected to the chip, and the application processor firstly detects a start instruction for a target application program that needs to perform image data processing, responds to the start instruction, sends a preset control instruction to the chip, and secondly, the chip receives the preset control instruction, responds to the control instruction, and performs the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setting completion response message to the target application; again, the application processor receives the setup complete response message, performs a plurality of operations for starting the target application program, wherein the plurality of operations include a processing operation for image data of an application interface of the target application program, the processing operation including the steps of: the application processor sends image data to the chips, the chips receive the image data, the clock frequency of the chips is adjusted according to a preset temperature drift compensation algorithm to compensate the first clock frequency offset of the chips caused by temperature change, and finally, the image data is subjected to subsequent processing under the adjusted clock frequency condition. Because the first clock frequency offset is the clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, the second clock frequency offset refers to the clock frequency offset of the chip under the condition that the first temperature drift compensation operation is not executed, and therefore, before the chip adjusts the clock frequency of the chip by using the preset temperature drift compensation algorithm to compensate the temperature drift of the clock frequency, the influence degree of the temperature coefficient of the temperature decrease of the BG on the clock frequency of the chip, namely, the frequency offset after the temperature rise is compensated, thereby reducing the unstable problems of buffer overflow and the like caused by the occupation pressure of offset data on a buffer space caused by the simple adjustment of the preset temperature drift compensation algorithm, and improving the running stability of a display chip system.
Referring to fig. 5, fig. 5 is a flowchart of another temperature drift correction method based on a temperature coefficient of a band gap reference BG according to an embodiment of the present application, which is applied to a chip 110 in the display chip system 100 shown in fig. 1; as shown in fig. 5, the temperature drift correction method based on the band gap reference BG temperature coefficient includes the following steps.
Step 501, receiving a preset control instruction from the application processor, where the preset control instruction is associated with a start instruction for a target application program that needs to perform image data processing.
The application processor is in communication connection with the chips, and the chips are in communication connection with the display module.
Wherein, the preset control instruction is associated with a starting instruction aiming at a target application program needing image data processing;
step 502, responding to the preset control command, and executing a first temperature drift compensation operation.
The first temperature drift compensation operation includes: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the crystal oscillator circuit are updated according to a pre-stored empirical value; and sending a setting completion response message to the target application.
Wherein, the first temperature drift compensation operation includes: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the crystal oscillator circuit are updated according to a pre-stored empirical value; and sending a setting completion response message to the target application.
The method for adjusting the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip to be a preset positive temperature coefficient comprises the following steps: the value of the BG temperature coefficient of the chip is configured as a target value.
Step 503, receiving image data of an application interface of the target application program from the application processor, and performing processing operation on the image data.
The processing operations include the following operations: adjusting the clock frequency of the clock according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
It can be seen that the present example provides a temperature drift correction method based on a band gap reference BG temperature coefficient, which is applied to chips in a display chip of a terminal device, supplements a temperature drift compensation algorithm by processing operation of image data of an application interface of a target application program, further reduces the degree of clock frequency offset, and further improves the stability of processing the image data by a display chip system.
The foregoing description of the embodiments of the present application has been presented primarily in terms of a method-side implementation. It will be appreciated that the display chip, in order to implement the above-described functions, includes corresponding hardware structures and/or software modules that perform the respective functions. Those of skill in the art will readily appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein may be embodied as hardware or a combination of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The embodiment of the application provides a chip, which is applied to a chip in a display chip system, wherein the display chip system comprises: the chip communication connection display module is connected with the application processor, and the first crystal oscillator used by the application processor is different from the second crystal oscillator used by the chip.
The embodiment of the application may divide the functional modules of the chip according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules may be implemented in hardware or in software functional modules. The division of the modules in the embodiment of the present application is schematic, which is merely a logic function division, and other division manners may be implemented in practice.
Referring to fig. 6, in the case of dividing each functional module by using a corresponding function, fig. 6 is a functional unit composition diagram of a chip according to an embodiment of the present application. As shown in fig. 6, the chip 600 may include:
a receiving unit 601, configured to receive a preset control instruction from the application processor, where the preset control instruction is associated with a start instruction for a target application program that needs to perform image data processing;
The execution unit 602 is configured to execute, in response to the preset control instruction, the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the crystal oscillator circuit are updated according to a pre-stored empirical value; and sending a setup complete response message to the target application;
the receiving unit is further used for receiving image data of an application interface of the target application program from the application processor;
an adjustment unit 603 configured to perform processing operations on the image data, the processing operations including the following operations; adjusting the clock frequency of the clock according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
In one possible example, in the adjusting the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip to a preset positive temperature coefficient, the executing unit 602 is specifically configured to: and configuring the value of the BG temperature coefficient of the chip as a target value.
In one possible example, the execution unit 602 is specifically configured to: and updating the power supply voltage of the chip according to the empirical value.
In one possible example, in the performing the first temperature drift compensation operation, the performing unit 602 is specifically configured to: the value of the BG temperature coefficient is restored to 0x10 from the target value, the programmable voltage detector PVD is started, and the sleep mode is deeply entered.
In one possible embodiment, in respect of said first temperature drift compensation operation; the execution unit 602 is specifically configured to: determining the deviation degree of the clock frequency along with the surface temperature according to the surface temperature data and the clock frequency data, taking the value of the BG temperature coefficient with the smallest deviation degree among the values of the plurality of BG temperature coefficients as a target value, and configuring the value of the BG temperature coefficient of the chip as the target value.
Embodiments of the present application also provide a computer program product, the computer program product comprising: a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform part or all of the steps of any one of the methods described in the method embodiments above.
It should be understood that, in various embodiments of the present application, the sequence numbers of the foregoing processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic thereof, and should not constitute any limitation on the implementation process of the embodiments of the present application.
In the several embodiments provided in the present application, it should be understood that the disclosed method, apparatus, and system may be implemented in other manners. For example, the device embodiments described above are merely illustrative; for example, the division of the unit is just one logic function division, and there may be another division manner when actually implementing the unit; for example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may be physically included separately, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in hardware plus software functional units.
Although the present invention is disclosed above, the present invention is not limited thereto. Variations and modifications, including combinations of the different functions and implementation steps, as well as embodiments of the software and hardware, may be readily apparent to those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. The temperature drift correction method based on the band gap reference BG temperature coefficient is characterized by being applied to a display chip system of terminal equipment, wherein the display chip system of the terminal equipment comprises an application processor, chips and a display module, and the application processor is in communication connection with the chips, and the method comprises the following steps:
The application processor detects a starting instruction aiming at a target application program needing image data processing, responds to the starting instruction and sends a preset control instruction to the code chip;
the chip receives the preset control instruction, responds to the preset control instruction, and executes the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setup complete response message to the application processor;
the application processor receives the setup completion response message, performs a plurality of operations for starting the target application program, wherein the plurality of operations include a processing operation for image data of an application interface of the target application program, the processing operation including the steps of:
the application processor sends the image data to the chip, the chip receives the image data, and adjusts the clock frequency of the chip according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset of the chip caused by temperature change, wherein the first clock frequency offset is a clock frequency offset of a second clock frequency offset compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset of the chip under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
2. The method of claim 1, wherein adjusting the zero temperature coefficient reference voltage of the chip-self crystal oscillator circuit to a predetermined positive temperature coefficient reference voltage comprises:
and configuring the value of the BG temperature coefficient of the chip as a target value.
3. The method of claim 2, the target value being 0x1F.
4. A method according to claim 2 or 3, wherein the method of obtaining the target value comprises the steps of:
acquiring surface temperature data and hour hand frequency data of a chip under the numerical condition of a plurality of BG temperature coefficients;
determining the offset degree of the clock frequency along with the surface temperature according to the surface temperature data and the clock frequency data;
and taking the value of the BG temperature coefficient with the smallest deviation degree of the values of the plurality of BG temperature coefficients as the target value.
5. A method according to claim 2 or 3, wherein the method of obtaining the target value comprises the steps of:
acquiring surface temperature data and hour hand frequency data of a chip under the numerical condition of a plurality of BG temperature coefficients;
determining the deviation degree of clock frequency along with the surface temperature according to the surface temperature data and the clock frequency data, and counting the production yield of chips under the numerical condition of a plurality of BG temperature coefficients;
And determining the value of the BG temperature coefficient capable of meeting the requirement according to the deviation degree and the production yield as the target value.
6. The method of claim 2, wherein said updating the supply voltage and reference current of the chips according to pre-stored empirical values comprises:
recording power supply voltage data and reference current data corresponding to the chips under the numerical condition of a plurality of BG temperature coefficients;
the power supply voltage data and the reference current data are statistically analyzed, and the change condition of the corresponding power supply voltage and the corresponding reference current under the condition that the value of the BG temperature coefficient configuring the chip is the target value is determined;
determining empirical values of the power supply voltage and the reference current according to the change conditions of the power supply voltage and the reference current;
and updating the power supply voltage and the reference current of the chip according to the empirical values.
7. The method of claim 2, wherein after the configuring the value of the BG temperature coefficient of the chip to the target value, the method further comprises:
the application processor detects a start instruction of a deep sleep mode;
the application processor sends the starting instruction to a chip;
And the chip receives the starting instruction, restores the value of the BG temperature coefficient from the target value to 0x10, starts the programmable voltage detector PVD and enters a deep sleep mode.
8. The utility model provides a temperature drift rectifying method based on band gap benchmark BG temperature coefficient which is characterized in that, the chip that is applied to in the display chip system of terminal equipment, the display chip system of terminal equipment includes application processor, chip and display module assembly, application processor communication connection the chip, the method includes:
receiving a preset control instruction from the application processor, wherein the preset control instruction is associated with a starting instruction aiming at a target application program needing image data processing;
responding to the preset control instruction, executing the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setup complete response message to the application processor;
receiving image data of an application interface of the target application program from the application processor, and performing processing operations on the image data, wherein the processing operations comprise the following operations:
Adjusting the clock frequency of the chip according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
9. The method of claim 8, wherein adjusting the zero temperature coefficient reference voltage of the chip-self crystal oscillator circuit to a predetermined positive temperature coefficient reference voltage comprises:
and configuring the value of the BG temperature coefficient of the chip as a target value.
10. The utility model provides a temperature drift deviation correcting device based on band gap benchmark BG temperature coefficient which characterized in that is applied to terminal equipment's display chip system, terminal equipment's display chip system includes application processor, chip and display module assembly, application processor communication connection the chip, the device includes:
a receiving unit, configured to receive a preset control instruction from the application processor, where the preset control instruction is associated with a start instruction for a target application program that needs to perform image data processing;
The execution unit is used for responding to the preset control instruction and executing the following first temperature drift compensation operation: turning off the programmable voltage detector PVD; the zero temperature coefficient reference voltage of the crystal oscillator circuit of the chip is adjusted to be a preset positive temperature coefficient reference voltage, and the power supply voltage and the reference current of the chip are updated according to a pre-stored empirical value; and sending a setup complete response message to the application processor;
the receiving unit is further used for receiving image data of an application interface of the target application program from the application processor;
an adjustment unit configured to perform processing operations on the image data, the processing operations including: adjusting the clock frequency of the chip according to a preset temperature drift compensation algorithm to compensate a first clock frequency offset caused by temperature change, wherein the first clock frequency offset is a clock frequency offset after the second clock frequency offset is compensated by the first temperature drift compensation operation, and the second clock frequency offset is a clock frequency offset under the condition that the first temperature drift compensation operation is not executed; and performing subsequent processing on the image data under the adjusted clock frequency condition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310314228.7A CN116132609B (en) | 2023-03-28 | 2023-03-28 | Temperature drift correction method and device based on band gap reference BG temperature coefficient |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310314228.7A CN116132609B (en) | 2023-03-28 | 2023-03-28 | Temperature drift correction method and device based on band gap reference BG temperature coefficient |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116132609A CN116132609A (en) | 2023-05-16 |
| CN116132609B true CN116132609B (en) | 2023-08-04 |
Family
ID=86297678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310314228.7A Active CN116132609B (en) | 2023-03-28 | 2023-03-28 | Temperature drift correction method and device based on band gap reference BG temperature coefficient |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116132609B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9329614B1 (en) * | 2012-07-31 | 2016-05-03 | Cirrus Logic, Inc. | Bandgap with thermal drift correction |
| WO2022100754A1 (en) * | 2020-11-16 | 2022-05-19 | 唯捷创芯(天津)电子技术股份有限公司 | On-chip rc oscillator, chip, and communication terminal |
| CN115706562A (en) * | 2021-08-06 | 2023-02-17 | 重庆西南集成电路设计有限责任公司 | Random temperature compensation voltage function generator, crystal oscillator and resonant frequency adjusting method thereof |
| CN115831032A (en) * | 2023-02-20 | 2023-03-21 | 深圳曦华科技有限公司 | Chip temperature drift processing method and device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7106709B2 (en) * | 2000-11-29 | 2006-09-12 | Telefonaktiebologet Lm Ericsson (Publ) | Timing drift compensation in wireless packet-based systems |
| US20200343856A1 (en) * | 2019-04-25 | 2020-10-29 | Goodix Technology Inc. | Post-compensation for crystal oscillator thermal drift |
-
2023
- 2023-03-28 CN CN202310314228.7A patent/CN116132609B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9329614B1 (en) * | 2012-07-31 | 2016-05-03 | Cirrus Logic, Inc. | Bandgap with thermal drift correction |
| WO2022100754A1 (en) * | 2020-11-16 | 2022-05-19 | 唯捷创芯(天津)电子技术股份有限公司 | On-chip rc oscillator, chip, and communication terminal |
| CN115706562A (en) * | 2021-08-06 | 2023-02-17 | 重庆西南集成电路设计有限责任公司 | Random temperature compensation voltage function generator, crystal oscillator and resonant frequency adjusting method thereof |
| CN115831032A (en) * | 2023-02-20 | 2023-03-21 | 深圳曦华科技有限公司 | Chip temperature drift processing method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116132609A (en) | 2023-05-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10565965B2 (en) | Method and device for controlling refresh rate of mobile terminal and mobile terminal | |
| US10621953B2 (en) | Method for controlling display refresh rate and electronic device | |
| CN115831032B (en) | Chip temperature drift treatment method and device | |
| CN106933327B (en) | Method and device for controlling frame rate of mobile terminal and mobile terminal | |
| US10847103B2 (en) | Display control device, display control method, and computer-readable recording medium | |
| CN109165103B (en) | Frame rate control method, device, terminal and storage medium | |
| WO2014164033A1 (en) | Techniques for transmitting video content to a wirelessly docked device having a display | |
| CN106814839A (en) | A kind of method and terminal device for automatically adjusting working frequency | |
| CN116132609B (en) | Temperature drift correction method and device based on band gap reference BG temperature coefficient | |
| CN113703709A (en) | Control method, circuit and device of independent display chip and electronic equipment | |
| CN112863419B (en) | Display device driving method, display device, and computer-readable storage medium | |
| US9865205B2 (en) | Method for transmitting data from timing controller to source driver and associated timing controller and display system | |
| CN108235422B (en) | Antenna power setting method and electronic device | |
| US20180007635A1 (en) | Closed-loop clock calibration method, terminal and computer storage medium | |
| CN109712591A (en) | Sequential control method, timing controller and display device | |
| CN110174966A (en) | Control method, display module and electronic equipment | |
| CN110727340B (en) | Method, device and system for adapting dynamic bandwidth of image acquisition display | |
| US10896660B2 (en) | Display control device, display device, and display control method | |
| CN116052578B (en) | Method and device for synchronously controlling chip input and output in display chip system | |
| CN111489680A (en) | Signal transmission method and device in display device and electronic equipment | |
| CN115719580A (en) | LED screen display control method, device, equipment and medium | |
| CN113721513B (en) | Multi-shaft transmission synchronous control method, controller and storage medium | |
| CN115951855B (en) | Method and device for processing display command set of chip system based on chip | |
| CN116030748B (en) | Method and device for dynamically adjusting chip clock frequency | |
| CN117793962A (en) | Method and device for adjusting radio frequency receiving window of low-power consumption Bluetooth system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |