CN116132549A

CN116132549A - Ethernet data receiving method, transmitting method, device and receiving and transmitting system

Info

Publication number: CN116132549A
Application number: CN202211370728.4A
Authority: CN
Inventors: 蒋搏宇
Original assignee: Beijing Shengxin Network Technology Co ltd
Current assignee: Beijing Shengxin Network Technology Co ltd
Priority date: 2022-11-03
Filing date: 2022-11-03
Publication date: 2023-05-16

Abstract

The embodiment of the disclosure discloses an Ethernet data receiving method, a transmitting method, a device and a receiving and transmitting system, wherein a physical coding sublayer PCS of an Ethernet comprises a plurality of channels corresponding to the same MAC interface, and the receiving method comprises the following steps: acquiring LB marks corresponding to the channels respectively; and determining the binding relation among the channels according to the obtained LB mark, merging the data streams of at least two channels with the binding relation, and independently processing the data streams of channels with no binding relation with other channels. The transmission method inserts alignment marks with BIP marks and alignment marks with LB marks in an alternating manner when transmitting the data stream of each of the plurality of channels. By the scheme of the embodiment, the bandwidth of the Ethernet interface can be flexibly configured, and the application scene of the Ethernet interface is enriched.

Description

Ethernet data receiving method, transmitting method, device and receiving and transmitting system

Technical Field

The embodiment of the disclosure relates to flexible ethernet technology, and more particularly, to an ethernet data receiving method, an ethernet data transmitting device and an ethernet data receiving and transmitting system.

Background

40G BASE-R is a standard physical coding sublayer (PCS: physical Coding Sublayer) protocol of IEEE802.3 and is widely used in the communication field. With the rise of 5G, large bandwidth small granularity becomes a current technical hotspot. The conventional ethernet interface has a disadvantage of fixed bandwidth, and is not flexible to adjust the bandwidth according to the user's demands.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The invention provides an Ethernet data receiving method, an Ethernet data sending method, an Ethernet data receiving device and an Ethernet data receiving and sending system, which can flexibly configure the bandwidth of an Ethernet interface and enrich the application scene of the Ethernet interface.

An embodiment of the present disclosure provides an ethernet data receiving method, where a physical coding sublayer PCS of an ethernet includes a plurality of channels corresponding to the same MAC interface, the method includes:

obtaining channel binding LB marks corresponding to the channels respectively;

and determining the binding relation among the channels according to the obtained LB mark, merging the data streams of at least two channels with the binding relation, and independently processing the data streams of channels with no binding relation with other channels.

An embodiment of the present disclosure further provides an ethernet data transmission method, where a physical coding sublayer PCS of an ethernet includes a plurality of channels corresponding to the same MAC interface, where the method includes:

determining that the plurality of channels form a plurality of interfaces;

the alignment marks with the BIP flag and the alignment marks with the channel-bound LB flag are inserted at intervals in an alternating manner when transmitting the data stream of each of the plurality of channels.

An embodiment of the present disclosure further provides an ethernet data receiving device, including a processor and a memory storing a computer program, where the processor can implement the ethernet data receiving method according to any embodiment of the present disclosure when executing the computer program.

An embodiment of the present disclosure further provides an ethernet data transmission device, including a processor and a memory storing a computer program, where the processor can implement the ethernet data transmission method according to any embodiment of the present disclosure when executing the computer program.

An embodiment of the present disclosure further provides an ethernet data transceiver system, which includes an ethernet data receiving device according to any embodiment of the present disclosure and an ethernet data transmitting device according to any embodiment of the present disclosure.

Compared with the related art, the embodiment of the disclosure provides a method, a device and a receiving and transmitting system for receiving Ethernet data. The binding relation of the multiple channels is represented by adding a fixed BIP (i.e. channel binding mark) with binding relation information in the data stream of each channel of the same MAC interface of PCS of Ethernet, thereby realizing flexible configuration of the bandwidth of the Ethernet interface and enriching the application scene of the Ethernet interface

Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the disclosure. Other advantages of the present disclosure may be realized and attained by the structure particularly pointed out in the written description and drawings.

Drawings

The accompanying drawings are included to provide an understanding of the technical aspects of the present disclosure, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present disclosure and together with the embodiments of the disclosure, not to limit the technical aspects of the present disclosure.

FIG. 1 is a flow chart of an embodiment of a method of Ethernet data reception;

FIG. 2a is a schematic diagram of a binding mode for Ethernet channels in an example 40G mode;

FIG. 2b is a schematic diagram of yet another binding mode for Ethernet channels in an example 40G mode;

FIG. 2c is a schematic diagram of yet another binding mode for Ethernet channels in an example 40G mode;

FIG. 2d is a schematic diagram of yet another binding mode for Ethernet channels in an example 40G mode;

FIG. 2e is a schematic diagram of yet another binding mode for Ethernet channels in an example 40G mode;

FIG. 3 is a schematic diagram of a descrambling algorithm of an embodiment;

FIG. 4 is a flow chart of a method of Ethernet data transmission according to one embodiment;

FIG. 5 is a schematic diagram of the data flow of a channel after insertion of an alignment mark according to one embodiment;

FIG. 6a is a schematic diagram of one configuration mode of an Ethernet channel in an example 40G mode;

FIG. 6b is a schematic diagram of yet another configuration mode of Ethernet channels in an example 40G mode;

FIG. 6c is a schematic diagram of yet another configuration mode of Ethernet channels in an example 40G mode;

FIG. 6d is a schematic diagram of yet another configuration mode of Ethernet channels in an example 40G mode;

FIG. 6e is a schematic diagram of yet another configuration mode of Ethernet channels in an example 40G mode;

FIG. 7 is a schematic diagram of a scrambling algorithm according to an embodiment;

fig. 8 is a schematic diagram of an ethernet data transmitting device according to an embodiment.

Detailed Description

The present disclosure describes several embodiments, but the description is illustrative and not limiting, and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described in the present disclosure. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or in place of any other feature or element of any other embodiment unless specifically limited.

The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements of the present disclosure that have been disclosed may also be combined with any conventional features or elements to form a unique inventive arrangement as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive arrangements to form another unique inventive arrangement as defined in the claims. Thus, it should be understood that any of the features shown and/or discussed in this disclosure may be implemented alone or in any suitable combination. Accordingly, the embodiments are not to be restricted except in light of the attached claims and their equivalents. Further, various modifications and changes may be made within the scope of the appended claims.

The 10G granularity flexible configurable Ethernet interface is realized on the basis of the original 40G Ethernet interface, and the flexible configurable Ethernet interface can be communicated with a standard Ethernet interface, so that the flexible configurable Ethernet interface is an effective scheme for improving the competitiveness of products.

The present disclosure is an improvement of PCS processing based on IEEE802.3 40G BASE-R. The Alignment Marker of the original 40G BASE-R is used for channel Alignment and verification only, and under the condition that the function of an original 40G standard interface is not affected, the original Alignment Marker is changed into one BIP field corresponding to one Alignment Marker, and one BIP field is shared in two Alignment markers, namely the BIP field of one Alignment Marker is unchanged, and the BIP field of the other Alignment Marker uses a specific format to distinguish binding relations of different channels, so that the flexible use of 4 10G channels is realized, and the effect of 10G granularity is achieved.

An embodiment of the present disclosure provides a method for receiving ethernet data, where a physical coding sublayer PCS of the ethernet includes multiple channels corresponding to the same MAC interface, where when receiving ethernet interface data, as shown in fig. 1, the method includes performing the following processing on multiple channels corresponding to the same MAC interface included in the physical coding sublayer PCS:

step S110, obtaining channel binding LB marks corresponding to the channels respectively, wherein the LB marks contain information of binding relations among the channels;

step S120, determining the binding relation among the channels according to the obtained LB mark, merging the data streams of at least two channels with the binding relation, and independently processing the data streams of channels with no binding relation with other channels.

The binding relation between channels is determined based on the LB mark added by the PCS layer, so that flexible binding between channels can be realized.

In an exemplary embodiment of the present disclosure, the determining the binding relationship between the plurality of channels according to the obtained LB flag includes:

acquiring the value of an LB mark of each channel in the plurality of channels, wherein the value of the LB mark comprises a value representing that the binding relationship exists between the LB mark and other channels and a value representing that the binding relationship does not exist between the LB mark and other channels; the method comprises the steps of,

and determining that the values of the LB marks in the channels are the same and the binding relationship exists between at least two channels which have binding relationship with other channels, and determining that each channel which has no binding relationship with other channels is not in binding relationship with other channels.

In an exemplary embodiment of the present disclosure, the method further comprises: after alignment among a plurality of channels is realized, each channel is detected, and under the condition that a set number of alignment mark pairs are continuously detected and each alignment mark pair comprises an alignment mark with a BIP mark and an alignment mark with an LB mark, LB field locking is completed;

and after the LB field locking is completed, obtaining the channel binding LB marks corresponding to the channels respectively.

In an example of this embodiment, the LB flag includes data of a BIP3 field and data of a BIP7 field in the alignment mark, and the data of the BIP3 field and the data of the BIP7 field are the same, and the value of the LB flag is equal to the value of the BIP3 field or the BIP7 field;

when each channel is detected, if the data of the BIP3 field and the data of the BIP7 field in the alignment mark are detected to be the same, the detection of the alignment mark with the LB mark is determined.

The BIP3 field data and the BIP7 field data of the LB mark in the example are the same, the BIP mark can be distinguished, the BIP mark is prevented from being mismatched into the LB mark, the binding time can be shortened, and the binding flow is simplified.

In an example of this embodiment, the BIP flag includes data of a BIP3 field and data of a BIP7 field in the alignment mark, and the data of the BIP3 field is a bit-wise inversion of the data of the BIP7 field;

when each channel is detected, if the data of the BIP3 field in the alignment mark is detected to be the bit reversal of the data of the BIP7 field, determining that the alignment mark with the BIP mark is detected;

after completion of the LB field lock, the method further comprises: after detecting an alignment mark with an LB mark, comparing the exclusive OR result of set position bits in the first 2 x 16384 66B code blocks of the LB mark with the data of a BIP3 field or a BIP7 field in the LB mark, and carrying out error code statistics.

The checking algorithm and the protocol are kept consistent, and the word bits corresponding relation of each BIP bit check is shown in a table 1. Bit0, such as BIP3, is the exclusive OR of bit2, bit10, bit18, bit26, bit34, bit42, bit50, bit58 for each 66bit block. Other bit calculation methods are similar.

BIP ₃ bit number	Assigned 66-bit word bits
		0	2,10,18,26,34,42,50,58
1	3,11,19,27,35,43,51,59
		2	4,12,20,28,36,44,52,60
3	0,5,13,21,29,37,45,53,61
		4	1,6,14,22,30,38,46,54,62
5	7,15,23,31,39,47,55,63
		6	8,16,24,32,40,48,56,64
7	9,17,25,33,41,49,57,65

TABLE 1

Because the BIP field in the inserted alignment mark is consistent with the protocol, and the BIP field in the protocol only makes error statistics, the normal operation of the Ethernet interface link is not affected after replacement.

The present example compares the exclusive or result of the set position bits in the first 2×16384 66B code blocks of the LB flag with the data of the BIP3 field or the BIP7 field in the LB flag, that is, expands the checking length of the BIP from the original 16384 code blocks to 2 16384 code blocks, so that checking of all data on the ethernet interface link can be ensured.

In an example of this embodiment, the PCS includes 4 channels each having a bandwidth of 10G; the method further comprises the steps of:

after alignment among a plurality of channels is achieved, locking of BIP fields is completed when a set number of alignment marks with BIP marks are continuously detected for each channel, and binding relations among the 4 channels are determined to form a 40G interface.

In an example of this embodiment, the PCS includes 4 channels with bandwidths of 10G, the LB flag has 4 set values, which respectively represent a 10G interface, a 20G interface one, a 20G interface two, and a 30G interface, and the correspondence between the values of the LB flag and the bandwidths of the interfaces is shown in the following table 2:

	BIP3	BIP7
			10G
	55	55
			20G-0	5A	5A
20G-1	A5	A5
			30G	AA	AA

TABLE 2

The determining the binding relationship between the channels according to the obtained LB mark comprises any one or more of the following modes:

determining that binding relations exist among three channels of the 30G interface and the values of LB marks in the 4 channels to form a 30G interface; determining that the value of the LB mark represents that the other channel of the 10G interface has no binding relation with other channels, and forming a 10G interface;

determining that binding relations exist between two channels of a 20G interface I in the 4 channels by using LB mark values to form a 20G interface; determining that the values of the LB marks all represent that a binding relationship exists between two channels of the 20G interface II, and forming the other 20G interface;

determining that the values of LB marks in the 4 channels respectively represent that binding relations exist between two channels of a first 20G interface or a second 20G interface to form a 20G interface; determining that values of LB marks respectively represent that two channels of the 10G interface have no binding relation with other channels, and respectively forming a 10G interface;

and determining that the values of LB marks in the 4 channels all represent that the four channels of the 10G interface have no binding relation with other channels, and respectively forming a 10G interface.

The present example uses the characteristic that the BIP field is only used for statistical verification based on the BIP field in the alignment mark added by the PCS layer, and determines the binding relationship between channels through BIP with special meaning (namely LB mark), so that flexible binding between channels can be realized.

In an example of the present embodiment, when the physical coding sublayer PCS MAC interface is in 40G mode, the PCS includes 4 channels with bandwidths of 10G, respectively from LANE0 to LANE 3; the 4 channels with the bandwidths of 10G comprise the following binding modes:

in the first binding mode, as shown in fig. 2a, when each channel alignment identifier in the 4 channels is a BIP identifier, it represents only one data stream of 40G, and the LANEs 0 to 3 are spliced into one data stream of 40G;

a second binding mode, as shown in table 2, is that identifier 5A corresponds to 20G-0 and identifier A5 corresponds to 20G-1, and as shown in fig. 2b, when the alignment identifier of LANE0 and LANE2 is 5A, LANE1 and the alignment identifier of LANE3 is A5, the combination of two 20G data streams is represented; splicing LANE0 and LANE2 into one 20G data stream, and splicing LANE1 and LANE3 into the other 20G data stream;

a third binding mode, as shown in table 2, is that the identifier AA corresponds to 30G and the identifier 55 corresponds to 10G, and as shown in fig. 2c, when the alignment identifier of the LANE0, LANE1, LANE3 is AA and the alignment identifier of the LANE2 is 55, the combination of the 30G data stream and the 10G data stream is represented; splicing LANE0, LANE1 and LANE3 into a 30G data stream, and independently using LANE2 as a 10G data stream;

a fourth binding mode, as shown in table 2, wherein identifier 5A corresponds to 20G-0 and identifier 55 corresponds to 10G, and as shown in fig. 2d, when the alignment of LANE0 and LANE2 is identified as 5A, LANE and the alignment of LANE3 is identified as 55, the combination of 20G data stream and 10G data stream is represented; splicing LANE0 and LANE2 into a 20G data stream, and respectively using LANE1 and LANE3 as a 10G data stream;

a fifth binding mode, as shown in table 2, indicates that the identifier 55 corresponds to 10G, and as shown in fig. 2e, when the alignment identifiers of the LANE0 to LANE3 are 55, the combination of 4 10G data streams is represented; lane0 to Lane3 are respectively used as a 10G data stream.

The specific configuration of the binding modes above is merely exemplary, and the same binding mode may be fully configured in a variety of different configurations. But care should be taken to ensure the rationality of the configuration. Such as: as shown in table 1, when the physical coding sublayer PCS MAC interface of the ethernet is in the 40G mode, if multiple channels are bound to the 20G-0 mode, it must be ensured that there are only two channels configuring the mode, and one or three cannot be configured.

This implementation example can ensure that the maximum limit at the MAC interface remains consistent with the standard 40G BASE-R protocol. Under the condition of not influencing the original 40G MAC interface, the flexible splitting of the 40G MAC interface into any 10G interface combination is realized, each interface is physically independent and has independent pipelines, and the interfaces cannot influence each other, so that the system can be completely used as independent interfaces. Thereby realizing flexible configuration of the bandwidth of the 40G Ethernet interface and enriching the application scene of the 40G Ethernet interface.

In an exemplary embodiment of the present disclosure, the determining, according to the obtained LB flag, a binding relationship between the multiple channels, merging data streams of at least two channels having a binding relationship, and processing data streams of channels having no binding relationship with other channels separately, where after the method further includes:

the data flow of each channel of the physical medium adaptation layer PMA to the MII direction of the medium independent interface is descrambled and decoded in the following way:

deleting the alignment mark;

descrambling the data stream of each channel;

inserting an IDLE at the end of the data stream of each channel;

the data in the data stream for each channel is decoded.

In an example of this embodiment, the decoding the data in the data stream of each channel includes: decoding the data according to table 3, and recovering the corresponding MII data after decoding. If the decoded data is not in Table 3, it is decoded into an error code.

TABLE 3 Table 3

In an exemplary embodiment of the present disclosure, there is provided an ethernet data receiving method, in which the following operation steps are performed when receiving ethernet data:

first, 66bit code blocks are synchronized according to a standard flow. If the code blocks detected for 64 times are 01 or 10, the code block locking is indicated; if the illegal synchronization head 00 or 11 is detected in the middle of the continuous 64 code block detection process, namely the error of the synchronization head is indicated, the 1bit of the sliding frame is re-detected; if the sync head error accumulation reaches 65 after the code block lock indicates a loss of sync, the code block lock is released and the frame is resynchronized.

And secondly, synchronizing the alignment marks according to a standard flow. If two alignment marks are detected consecutively, indicating that the alignment marks are locked; if 4 wrong alignment marks are continuously detected, the locking of the alignment marks is released, and a 66bit code block of a sliding frame is used for carrying out code block synchronization again. Wherein, when detecting the alignment mark, only the fixed M field in the alignment mark is matched, and the BIP field is not matched.

And thirdly, aligning the channels according to the positions of the alignment marks of each channel.

And fourthly, locking the channel. Accumulating LB_cnt when the BIP mark and the LB mark are detected at successive intervals; resetting the BIP_cnt every time the LB mark is detected; the LB flag or BIP flag is cleared to clear LB_cnt continuously detected. When LB_cnt is greater than or equal to 4 or BIP_cnt is greater than or equal to 8, the channel binding is completed, and the channel enters a locking state. The channel lock state is exited when 4 false alignment marks are consecutively detected.

Fifthly, obtaining channel binding LB marks corresponding to the channels, determining binding relations among the channels according to the obtained LB marks, merging data streams of at least two channels with the binding relations, and independently processing the data streams of channels with no binding relations with other channels.

Sixth, the data stream from the physical media adaptation layer PMA to each channel in the MII direction of the media independent interface is descrambled and decoded, and the schematic diagram of the descrambling algorithm is shown in fig. 3, where S0-S57 in fig. 3 represent one bit.

An embodiment of the present disclosure further provides a method for transmitting ethernet data, where a physical coding sublayer PCS of ethernet includes multiple channels corresponding to the same MAC interface, where when transmitting ethernet interface data, as shown in fig. 4, the following processes are performed on multiple channels corresponding to the same MAC interface included in the physical coding sublayer PCS of ethernet:

step S210, determining that the channels form a plurality of interfaces;

step S220, inserting the alignment mark with the BIP flag and the alignment mark with the channel-bound LB flag at intervals in an alternating manner while transmitting the data stream of each of the plurality of channels.

After the alignment mark is inserted, the physical coding sublayer PCS of the ethernet includes mark information corresponding to a plurality of channels of the same MAC interface as shown in fig. 5;

in this embodiment, when the data stream of each channel in the plurality of channels is sent, the alignment mark with the BIP flag and the alignment mark with the channel binding LB flag are inserted at intervals in an alternating manner, and the plurality of channels are configured into different combination modes, so that a 40G MAC interface is flexibly split into any 10G interface combination, and each interface is physically independent, has independent pipelines, does not affect each other, and can be completely used as an independent interface.

In an exemplary embodiment of the present disclosure, the PCS includes 4 channels with bandwidths of 10G, and the LB flag has 4 set values, which respectively represent a 10G interface, a 20G interface one, a 20G interface two, and a 30G interface.

In an example of this embodiment, when the alignment mark with the LB flag is inserted, the value of the LB flag is determined as follows:

when three channels form a 30G interface and one channel forms a 10G interface, setting LB marks inserted in data streams of the three channels as values representing the 30G interface and setting LB marks inserted in data streams of the one channel as values representing the 10G interface;

two channels form one 20G interface, the other two channels form the other 20G interface, LB marks inserted in data streams of the two channels are set as a value representing the first 20G interface, and LB marks inserted in data streams of the other two channels are set as a value representing the second 20G interface;

two channels in the 4 channels form a 20G interface, the other two channels respectively form a 10G interface, LB marks inserted in data streams of the two channels are set to be values representing the 20G interface I or the 20G interface II, and LB marks inserted in data streams of the other two channels are set to be values representing the 10G interface;

and respectively forming a 10G interface in each of the 4 channels, and setting an LB mark inserted in a data stream of each of the 4 channels as a value representing the 10G interface.

In an example of the present embodiment, when the physical coding sublayer PCS MAC interface of the ethernet is in 40G mode, the PCS includes 4 channels with bandwidths of 10G, respectively from LANE0 to LANE 3; the PCS channel may include the following 5 configuration modes:

first, as shown in fig. 6a, the original 40G MAC configuration is kept unchanged, and the configuration is sent in the order of LANE0-LANE 3;

second, as shown in fig. 6b, configured as one 20G MAC consisting of LANE0, LANE2 and the other 20G MAC consisting of LANE1, LANE3, each of which is transmitted in the order PCS LANE0-LANE 3;

third, as shown in fig. 6c, one 30G MAC composed of LANE0, LANE1, LANE3, and one 10G MAC composed of LANE2 are configured;

fourth, as shown in fig. 6d, one 20G MAC composed of LANE0, LANE2, and two 10G MACs composed of LANE1, LANE3, respectively;

fifth, as shown in fig. 6e, four 10G MACs each configured of LANE0, LANE1, LANE2, and LANE3 are configured.

In an exemplary embodiment of the present disclosure, the LB flag includes data of a BIP3 field and data of a BIP7 field in the alignment mark, and the data of the BIP3 field and the data of the BIP7 field are identical, and a value of the LB flag is equal to a value of the BIP3 field or the BIP7 field;

the BIP mark comprises data of a BIP3 field and data of a BIP7 field in the alignment mark, and the data of the BIP3 field is the bit inversion of the data of the BIP7 field.

In an exemplary embodiment of the present disclosure, the method further comprises: determining that the plurality of channels form an interface; and continuously inserting an alignment mark with a BIP mark when transmitting the data stream of each channel in the plurality of channels.

In an exemplary embodiment of the present disclosure, before inserting the alignment mark with the BIP flag and the alignment mark with the channel-bound LB flag in the data stream of each of the plurality of channels at intervals in an alternating manner, the method further includes:

the data stream of each channel of the media independent interface MII to the direction of the physical media adaptation layer PMA is encoded and scrambled as follows:

the data flow of each channel is independently subjected to 64B/66B coding and scrambling;

the 64B/66B coding and scrambling Start character and the Order character are arranged at the S0 position;

each channel is provided with a channel number, and when the data stream of each channel in the plurality of channels is sent, the data stream of the corresponding channel is sent according to the sequence of the channel numbers.

The embodiment of the present disclosure also provides an ethernet data transmission method, where a physical coding sublayer PCS of an ethernet includes multiple channels corresponding to the same MAC interface, and the ethernet data transmission is performed according to the following steps:

the first step, independently carrying out coding processing on the data flow corresponding to each channel of each MAC interface according to the standard flow of 40G BASE-R; the encoding is performed according to table 3 above.

If 64 bits are all data, the sync header is 2' b 01, the data character remains unchanged;

if 64 bits are all control characters, the sync header is 2' b10, the first byte is 0x1E, the following control characters are converted according to Table 4, and the control characters not in Table 4 are converted according to error codes;

if Control Block Formats is S ₀ D ₁ D ₂ D ₃ D ₄ D ₅ D ₆ D ₇ The sync header is 2' b10, the first byte is 0x78, the next 7 bytes of data remain unchanged;

if Control Block Formats is O ₀ D ₁ D ₂ D ₃ Z ₄ Z ₅ Z ₆ Z ₇ The synchronization head is 2' B10, the first byte is 0x4B, the data of the following 3 bytes are kept unchanged, and the last 4 bytes are all 0;

if Control Block Formats is T ₀ C ₁ C ₂ C ₃ C ₄ C ₅ C ₆ C ₇ The sync header is 2' b10, the first byte is 0x87, followed by 7bit0, and the 7 byte control code is converted according to table 4;

if Control Block Formats is D ₀ T ₁ C ₂ C ₃ C ₄ C ₅ C ₆ C ₇ The synchronization head is 2' b10, the first byte is 0x99, the second byte is the first byte data before encoding, the 6bit0 is connected to the second byte, and the 6 byte control code is converted according to the table 4;

if Control Block Formats is D ₀ D ₁ T ₂ C ₃ C ₄ C ₅ C ₆ C ₇ The synchronization head is 2' b10, the first byte is 0xAA, the next two bytes are the second byte data before encoding, the next 5 bits 0 are connected, and the next 5 bytes control codes are converted according to the table 4;

if Control Block Formats is D ₀ D ₁ D ₂ T ₃ C ₄ C ₅ C ₆ C ₇ The synchronous head is 2' b10, the first byte is 0xB4, the next three bytes are the third byte data before encoding, the next 4 bits 0 are connected, and the next 4 bytes control codes are converted according to the table 4;

if Control Block Formats is D ₀ D ₁ D ₂ D ₃ T ₄ C ₅ C ₆ C ₇ The synchronous head is 2' b10, the first byte is 0xCC, the next four bytes are the fourth byte data before encoding, the next 3 bits 0 are connected, and the next 3 bytes control codes are converted according to the table 4;

if Control Block Formats is D ₀ D ₁ D ₂ D ₃ D ₄ T ₅ C ₆ C ₇ The synchronization head is 2' b10, the first byte is 0xD2, the next five bytes are the fifth byte data before encoding, the next 2 bits 0 are connected, and the next 2 bytes control codes are converted according to the table 4;

if Control Block Formats is D ₀ D ₁ D ₂ D ₃ D ₄ D ₅ T ₆ C ₇ The synchronization head is 2' b10, the first byte is 0xE1, the next six bytes are the sixth byte data before encoding, the next 1bit0 and the last 1 byte control code are converted according to the table 4;

if Control Block Formats is D ₀ D ₁ D ₂ D ₃ D ₄ D ₅ D ₆ T ₇ The sync header is 2' b10, the first byte is 0xFF, and the next seven bytes are the pre-encoding seventh byte of data.

Table 4: control word encoding table

The Sequence ordered supported in table 4 is shown in table 5 below:

TABLE 5

Second, according to scrambling polynomial G (x) =1+x ³⁹ +X ⁵⁸ The coded data stream is scrambled, and the flow of the scrambling is shown in fig. 7, where S0-S57 each represent one bit in fig. 7.

Third, an alignment mark with a BIP flag and an alignment mark with a channel binding LB flag are inserted at intervals in an alternating manner in each channel for alignment and binding. For example, an alignment mark is inserted every 16383 66b code blocks transmitted.

Wherein, the M0 field, the M1 field, the M2 field, the M4 field, the M5 field, the M6 field and the protocol of the BIP mark are kept consistent, thereby ensuring the compatibility of the link; the value of the LB flag is set to the value of the corresponding mode in table 1 according to the configuration mode of the channel.

And step four, transmitting the data stream of the corresponding channel according to the sequence of the channel numbers.

An embodiment of the present disclosure further provides an ethernet data receiving apparatus, referring to fig. 8, including a processor and a memory storing a computer program, where the processor can implement the ethernet data receiving method according to any embodiment of the present disclosure when executing the computer program.

An embodiment of the present disclosure further provides an ethernet data transmission apparatus, referring to fig. 8, including a processor and a memory storing a computer program, where the processor can implement the ethernet data transmission method according to any embodiment of the present disclosure when executing the computer program.

The processor of the above embodiment of the present disclosure may be a general-purpose processor, including a Central Processing Unit (CPU), a network processor (Network Processor, NP for short), a microprocessor, etc., or may be other conventional processors, etc.; the processor may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA), a discrete logic or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, or other equivalent integrated or discrete logic circuit, or a combination thereof. That is, the processor of the above-described embodiments may be any processing device or combination of devices that implements the methods, steps, and logic blocks disclosed in embodiments of the invention. If the disclosed embodiments are implemented, in part, in software, the instructions for the software may be stored in a suitable non-volatile computer-readable storage medium and executed in hardware using one or more processors to implement the methods of the disclosed embodiments. The term "processor" as used herein may refer to the above-described structure or any other structure suitable for implementation of the techniques described herein.

In one or more of the exemplary embodiments above, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium, and executed by a hardware-based processing unit. The computer-readable medium may comprise a computer-readable storage medium corresponding to a tangible medium, such as a data storage medium, or a communication medium that facilitates transfer of a computer program from one place to another, such as according to a communication protocol. In this manner, a computer-readable medium may generally correspond to a non-transitory tangible computer-readable storage medium or a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementing the techniques described in this disclosure. The computer program product may include a computer-readable medium.

By way of example, and not limitation, such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Moreover, any connection may also be termed a computer-readable medium, for example, if the instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. It should be appreciated, however, that computer-readable storage media and data storage media do not include connection, carrier wave, signal, or other transitory (transient) media, but are instead directed to non-transitory tangible storage media. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, digital Versatile Disc (DVD), floppy disk or blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

Claims

1. An ethernet data receiving method, a physical coding sublayer PCS of an ethernet network comprising a plurality of channels corresponding to the same MAC interface, the method comprising:

obtaining channel binding LB marks corresponding to the channels respectively, wherein the LB marks contain information of binding relations among the channels;

2. The method according to claim 1, characterized in that:

the determining the binding relationship between the channels according to the obtained LB mark includes:

3. The method according to claim 1, characterized in that:

the method further comprises the steps of: after alignment among a plurality of channels is realized, each channel is detected, and under the condition that a set number of alignment mark pairs are continuously detected and each alignment mark pair comprises an alignment mark with a BIP mark and an alignment mark with an LB mark, LB field locking is completed;

4. A method according to claim 3, characterized in that:

the LB mark comprises data of a BIP3 field and data of a BIP7 field in the alignment mark, the data of the BIP3 field and the data of the BIP7 field are the same, and the value of the LB mark is equal to the value of the BIP3 field or the BIP7 field;

5. A method according to claim 3, characterized in that:

the BIP mark comprises data of a BIP3 field and data of a BIP7 field in the alignment mark, and the data of the BIP3 field is the bit-wise inversion of the data of the BIP7 field;

6. A method according to claim 3, characterized in that:

the PCS comprises 4 channels with bandwidths of 10G; the method further comprises the steps of:

7. A method according to claim 3, characterized in that:

the PCS comprises 4 channels with the bandwidths of 10G, and the LB mark has 4 set values which respectively represent a 10G interface, a 20G interface I, a 20G interface II and a 30G interface;

8. The method according to claim 1, characterized in that:

the method further comprises the steps of after determining the binding relation among the channels according to the obtained LB mark, merging the data streams of at least two channels with the binding relation, and independently processing the data streams of channels without the binding relation with other channels:

deleting the alignment mark;

descrambling the data stream of each channel;

inserting an IDLE at the end of the data stream of each channel;

the data in the data stream for each channel is decoded.

9. An ethernet data transmission method, a physical coding sublayer PCS of an ethernet includes a plurality of channels corresponding to the same MAC interface, the method comprising:

determining that the plurality of channels form a plurality of interfaces;

10. The method according to claim 9, wherein:

the PCS comprises 4 channels with the bandwidth of 10G, and the LB mark has 4 set values which respectively represent a 10G interface, a 20G interface I, a 20G interface II and a 30G interface.

11. The method according to claim 10, wherein:

when the alignment mark with the LB mark is inserted, the value of the LB mark is determined as follows:

12. The method according to claim 9, wherein:

13. The method according to claim 9, wherein:

the method further comprises the steps of: determining that the plurality of channels form an interface; and continuously inserting an alignment mark with a BIP mark when transmitting the data stream of each channel in the plurality of channels.

14. The method according to claim 9, wherein:

the method further comprises the steps of before inserting the alignment mark with the BIP mark and the alignment mark with the channel binding LB mark in an alternating mode in the data stream of each channel of the plurality of channels:

15. An ethernet data receiving device comprising a processor and a memory storing a computer program, wherein the processor is capable of implementing the ethernet data receiving method according to any of claims 1 to 8 when executing the computer program.

16. An ethernet data transmission device comprising a processor and a memory storing a computer program, wherein the processor is capable of implementing the ethernet data transmission method according to any of claims 9 to 14 when executing the computer program.

17. An ethernet data transceiving system comprising an ethernet data receiving device according to claim 15 and an ethernet data transmitting device according to claim 16.