CN116126406A - Drive chip, drive method, and computer-readable storage medium - Google Patents

Abstract

The application provides a driving chip, a driving method and a computer readable storage medium, wherein the chip comprises: a first memory and a second memory; the second memory is used for storing a plurality of configuration parameters; the configuration parameters are used for driving the target element to run in a corresponding state; the first memory is used for acquiring target configuration parameters in a plurality of configuration parameters from the second memory and providing the target configuration parameters for the target element so as to drive the target element to operate in a target state. The chip stores a plurality of configuration parameters for driving the target element to run in different states on the second memory, and in the process of driving the target element to run, the corresponding configuration parameters on the second memory are acquired through the first memory, so that the target element is driven to run in the corresponding state, the number of the first memories is reduced, even only a single or a very small number of the first memories can be arranged, the size of the driving chip is reduced, and the layout of the electrical elements and circuits is simplified.

Description

Drive chip, drive method, and computer-readable storage medium

Technical Field

The present application relates to the field of electronic technology, and in particular, to a driving chip, a driving method, and a computer readable storage medium.

Background

The driving chip is a chip for driving the operation of the target element. Typically, the configuration parameters for driving the target element to operate in the corresponding state are stored in a memory such as a register on the driver chip. In the process of operating the driving target element, the configuration parameters on the memory are called to realize that the driving target element operates in a corresponding state.

However, in the case where the operation process of the target element is required to switch the operation state, the designed corresponding driving chip is mostly oversized, and/or the electrical elements and circuit layout of the chip are too complex.

Especially in relation to the design of display driver chips (DDIC, display Driver Integrated Circuit). The display driving chip is used for driving the display panel to display, and a register is designed on the display driving chip and is stored with display configuration parameters for driving the display panel to display in a corresponding state. Under the circumstance that the display panel is required to switch the display state, the correspondingly designed display driving chip faces the problems of oversized size and/or excessively complex layout of electrical elements and circuits.

Disclosure of Invention

The embodiment of the application aims at a driving chip, a driving method and a computer readable storage medium, wherein a plurality of sets of configuration parameters for driving a target element to operate in different states are stored on a second memory, and in the process of driving the target element, the corresponding configuration parameters on the first memory are acquired through the first memory, so that the target element is driven to operate in the corresponding state, the number of memories is reduced, the size of the driving chip is further reduced, and the layout of electrical elements and circuits is simplified.

In a first aspect, an embodiment of the present application provides a driving chip, including: a first memory and a second memory; the second memory is used for storing a plurality of configuration parameters; the configuration parameters are used for driving the target element to run in a corresponding state; the first memory is used for acquiring target configuration parameters in the plurality of configuration parameters from the second memory and providing the target configuration parameters for the target element so as to drive the target element to operate in a target state.

According to the driving chip, the plurality of configuration parameters for driving the target element to operate in different states are stored in the second memory, and in the process of driving the target element to operate, the corresponding configuration parameters on the second memory are acquired through the second memory, so that the target element is driven to operate in the corresponding state, the problem that the plurality of operation states of the target element need the corresponding number of the second memories to store the plurality of configuration parameters is avoided, the number of the second memories is further reduced, even only one second memory can be arranged, the size of the driving chip is further reduced, and the layout of the electric appliance elements and circuits is simplified. And further, the difficulty of the chip design, the difficulty of processing and manufacturing and the difficulty of subsequent maintenance are reduced.

With reference to the first aspect, optionally, the chip further includes a write control module and a read control module; the second memory comprises at least two sub memories; the writing control module is used for writing the configuration parameters into the at least two sub-memories respectively; the read control module is used for controlling the sub-memory to send the target configuration parameters to the first memory.

In the driving chip, when the number of configuration parameters is large, the second memory with large capacity is often required, and the second memory with large capacity is also often large in size, so that the second memory is inconvenient to be laid out on the driving chip. And the second memory is divided into at least two sub memories, and the number of the sub memories is determined according to the residual space available for layout of the sub memories on the driving chip, so that the difficulty of chip design, the difficulty of processing and manufacturing and the difficulty of subsequent maintenance are further reduced.

With reference to the first aspect, optionally, the chip includes a display panel driving chip; the target element includes a display panel.

Above-mentioned driver chip, owing to the register quantity on the display driver chip is many can reach tens of thousands, and through being applied to the drive to display panel with the driver chip that this application provided, can be just one to the demand of register, and then reduced the quantity of register by a wide margin, finally make the size of display driver chip reduce by a wide margin, the overall arrangement of electrical components and circuit is simplified by a wide margin, the design degree of difficulty of this display driver chip, the degree of difficulty of processing manufacturing and follow-up maintenance is also reduced by a wide margin at random.

In a second aspect, embodiments of the present application further provide a driving method applied to a driving chip having a first memory and a second memory; the method comprises the following steps: determining a target configuration parameter used for driving a target element to operate in a target state in a plurality of configuration parameters; wherein the plurality of configuration parameters are stored in the second memory; and reading the target configuration parameters from the second memory and writing the target configuration parameters into the first memory to drive the target element to operate in a target state.

The driving method has the same advantages as those of the driving chip provided by the first optional embodiment of the first aspect, and is not described herein.

With reference to the second aspect, optionally, the second memory includes at least two sub memories; before determining the target configuration parameters used for driving the target element to operate in the target state, the method further comprises: and controlling the writing control module to write the configuration parameters into the at least two sub-memories respectively.

The driving method has the same advantages as the driving chip provided in the second alternative embodiment of the first aspect, and is not described herein.

With reference to the second aspect, optionally, the controlling the writing control module to write the plurality of configuration parameters into the at least two sub-memories includes: the control write control module writes the configuration parameters into the at least two sub-memories in time sequence or synchronously.

According to the driving method, all the configuration parameters are written into the sub-memories according to the time sequence by controlling the writing module, so that the bus bandwidth of the driving chip is saved. All configuration parameters are synchronously written into the sub-memories by controlling the writing module, so that the writing speed is improved, and the running efficiency of the driving chip is further improved.

With reference to the second aspect, optionally, the controlling the writing control module to write the plurality of configuration parameters into the at least two sub-memories includes: establishing a mapping relation between the plurality of configuration parameters and the at least two sub-memories; the read control module is controlled to write the configuration parameters into the two sub-memories according to the mapping relation; the reading and writing the target configuration parameters from and to the second memory includes: determining a storage address of the target configuration parameter from the second memory according to the mapping relation; and reading the target configuration parameters according to the storage address and writing the target configuration parameters into the first memory.

According to the driving method, the mapping relation between each configuration parameter and the storage address of the second storage is established, so that the efficiency of identifying the target configuration parameters is improved.

With reference to the second aspect, optionally, the reading and writing the target configuration parameter from and into the second memory includes: if the current configuration parameters stored in the current first memory are not consistent with the target configuration parameters, updating the parameter values of the current configuration parameters by the parameter values of the target configuration parameters.

According to the driving method, whether the current running state of the target element needs to be switched is determined according to whether the current configuration parameters are consistent with the target configuration parameters or not. When the target element needs to switch the running state, the method of updating the parameter value of the current configuration parameter by adopting the parameter value of the target configuration parameter improves the writing efficiency of the target configuration parameter compared with the method of directly replacing the current configuration parameter by the whole target configuration parameter, and the like, thereby enabling the process of driving the target element to switch the running state to be faster.

With reference to the second aspect, optionally, the target element includes a display panel; the driving method is applied to a display screen driving chip to drive the display screen to display.

The driving method has the same advantages as those of the driving chip provided by the third optional embodiment of the first aspect, and will not be described herein. In addition, the driving method provided by the application is applied to the driving of the display panel, and in the process of writing each configuration parameter into the second memory, a mode of writing is adopted according to a time sequence, so that the command bus bandwidth of a driving chip for driving the display panel is saved; and the synchronous writing mode is adopted, so that the writing speed is improved, and the efficiency of the driving chip in driving the display panel to operate is further improved. In addition, by establishing the mapping relation between each configuration parameter and the storage address of the second memory, the efficiency of writing the configuration parameter into the second memory and recognizing and writing the configuration parameter from the second memory into the first memory is improved, and the operation efficiency of driving the display panel to perform multi-state display is further improved.

In a third aspect, an embodiment of the present application further provides an electronic device, including: a processor and a memory storing machine-readable instructions executable by the processor to perform the method as described above when executed by the processor.

In a fourth aspect, embodiments of the present application also provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the method described above.

The foregoing embodiments provide a computer readable storage medium having the same advantages as those of the second aspect or any optional implementation of the second aspect, which are not described herein.

In summary, the driving chip, the driving method and the computer readable storage medium provided in the present application store a plurality of configuration parameters for driving the target element to operate in different states on the second memory, and in the process of driving the target element to operate, the corresponding configuration parameters on the second memory are obtained through the first memory, so that the driving target element operates in the corresponding state, the number of the first memories is reduced, and even only a single or a very small number of the first memories can be set, thereby reducing the size of the driving chip and simplifying the layout of the electrical elements and circuits. When the number of configuration parameters is large, the second memory is divided into at least two sub-memories, and the number of the sub-memories is determined according to the space left on the driving chip for layout of the sub-memories, and the number of the first memory is usually higher than the number of the sub-memories by several orders of magnitude on the driving chip, so that the number of the first memory is greatly reduced by increasing the number of a small number of the sub-memories, and further the difficulty of chip design, processing and manufacturing and subsequent maintenance are further reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a block diagram of a first driving chip according to an embodiment of the present application;

fig. 2 is a block diagram of a second driving chip according to an embodiment of the present application;

FIG. 3 is a flow chart of a driving method according to an embodiment of the present disclosure;

fig. 4 is a detailed flowchart of step S121 in the driving method according to the embodiment of the present application;

fig. 5 is a detailed flowchart of step S140 in the driving method provided in the embodiment of the present application;

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Embodiments of the technical solutions of the present application will be described in detail below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical solutions of the present application, and thus are only examples, and are not intended to limit the scope of protection of the present application.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

In the description of the embodiments of the present application, the technical terms "first," "second," etc. are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.

In the related art, since the memory on the driving chip for storing the configuration parameters is often only capable of storing a set of configuration parameters for driving the target device to operate in a corresponding state. However, in the case where the target element operation process needs to switch the operation states, a corresponding amount of memory is required to store the configuration parameters according to the number of states that the target element needs to switch.

For example, a display driver chip (DDIC, display Driver Integrated Circuit) is provided with a plurality of registers for storing a corresponding number of display configuration parameters for driving the display panel to display in different states. Under such a situation, since the display driving chip is provided with the plurality of registers, the display driving chip is naturally oversized, and the electric elements and the circuit are excessively complicated in layout, so that the difficulty of chip design, the difficulty of processing and manufacturing and the difficulty of subsequent maintenance are increased.

In view of the above, embodiments of the present application provide a dynamic chip, a driving method and a computer readable storage medium to solve the above technical problems. In particular, reference is made to the examples and figures provided herein.

Referring to fig. 1, fig. 1 is a block diagram illustrating a first driving chip 100 according to an embodiment of the present application. The driving chip 100 provided herein may include a second memory 120 and a second memory. The second memory is used for storing a plurality of configuration parameters. The configuration parameters are used for driving the target element to run in a corresponding state; the second memory 120 is configured to obtain a target configuration parameter of the plurality of configuration parameters from the second memory, and provide the target configuration parameter to the target element to drive the target element to operate in a target state.

The second memory 120 may be a memory having a data operation and temporary storage function of operation results, similar to a register, or the like, and may be a memory which can be read and written quickly at any time, similar to a random access memory (Random Access Memory RAM), or the like.

In addition, the driver chip 100 may further include a Memory similar to a Flash Memory (Flash Memory), a one-time programmable Memory (OTP, one Time Programmable), etc. for storing the above-mentioned configuration parameters. After the drive chip 100 is powered up, the number of configuration parameters may be written to the second memory. In this way, the data on the second memory can be prevented from being lost after the driving chip 100 is powered off.

In the implementation process, by storing the configuration parameters for driving the target element to operate in different states on the second memory, during the operation process of the driving target element, the second memory 120 obtains the corresponding configuration parameters on the second memory to drive the target element to operate in the corresponding state, so that the problem that the corresponding number of the second memories 120 are needed to store the configuration parameters due to the multiple operation states of the target element is avoided, the number of the second memories 120 is further reduced, even only one second memory 120 can be arranged, the size of the driving chip 100 is further reduced, and the layout of the electrical elements and the circuits is simplified. And further, the difficulty of the chip design, the difficulty of processing and manufacturing and the difficulty of subsequent maintenance are reduced.

Referring to fig. 2, fig. 2 is a block diagram illustrating a second driving chip 100 according to an embodiment of the present application. In some alternative embodiments, the driver chip 100 provided herein may further include a write control module 140 and a read control module 130. The second memory may include at least two sub memories 121. The write control module 140 is configured to write a plurality of configuration parameters into at least two sub-memories 121 respectively. The read control module 130 is configured to control the sub-memory 121 to send the target configuration parameters to the second memory 120.

The write control module 140 and the read control module 130 may be configured to write configuration parameters into the at least two sub-memories 121 and read configuration parameters from the at least two sub-memories 121 by receiving control instructions sent from the host side. The number of the at least two sub-memories 121 may be two, three, four, etc., and the present application is not particularly limited. In the case of laying out a single or a small number of sub-memories 121 on a chip, a sub-memory 121 having a large storage capacity is often required, and the size of the sub-memory 121 having a large storage capacity is often also large, so that the layout of the sub-memory 121 is affected to some extent. While the number of sub-memories 121 may be determined based on the space remaining on the chip available for layout of the sub-memories 121 in order to accommodate the layout of other electrical components on the driver chip 100.

In the implementation process, when the number of configuration parameters is large, a second memory with a large capacity is often required, and the size of the second memory with a large capacity is also often large, which is inconvenient to layout on the driving chip 100. By dividing the second memory into at least two sub-memories 121, the number of sub-memories 121 is determined according to the remaining space available for layout of the sub-memories 121 on the driving chip 100, so as to further reduce the difficulty of chip design, manufacturing and subsequent maintenance.

It should be noted that, taking the display driving chip as an example, by dividing the second memory into several or more than ten sub-memories 121, the layout difficulty of the driving display chip is increased to some extent, but the number of registers (second memories 120) laid out on the display driving chip can be more than eighteen, so the number of registers is still greatly reduced from the total number of the second memories and the registers. That is, in this way, it is still possible and further functions to reduce the size of the driving chip 100 and simplify the layout of the electrical components and the wiring.

In some alternative embodiments, the driving chip 100 provided herein may include a display panel driving chip 100, and the target element may include a display panel.

That is, the driving chip 100 provided in the present application is applied to driving of a display panel to realize that a display screen displays in a plurality of different states. The second memory 120 in the display driving chip may be a register, and the second memory may be a random access memory (Random Access Memory RAM).

In the implementation process, the number of the registers on the display driving chip is tens of thousands, and by applying the driving chip 100 provided by the application to driving of the display panel, the requirement on the registers can be only one, so that the number of the registers is greatly reduced, the size of the display driving chip is finally greatly reduced, the layout of the electrical elements and the circuits is greatly simplified, and the design difficulty, the processing and manufacturing difficulty and the subsequent maintenance difficulty of the display driving chip are also randomly and greatly reduced.

Based on the same concept, please refer to fig. 3, fig. 3 is a flowchart of a driving method provided in an embodiment of the present application. The driving method provided by the embodiment of the application is applied to the driving chip with the first memory and the second memory.

The first memory may also be a memory having a data operation and temporary storage function of operation results like a register or the like. The second memory may also be a memory which is fast readable and writable at any time, similar to a random access memory or the like.

The method may include:

step S120: and determining a target configuration parameter used for driving the target element to operate in a target state in the plurality of configuration parameters. Wherein, a plurality of configuration parameters are stored in the second memory.

In the step S120, the execution body may be the host, and the target configuration parameters may be determined according to the driving requirement of the current target element, that is, the required parameters for driving the target element to operate in the target state, for example: parameters such as frequency, gray value, brightness value and the like required for driving the display panel.

The source of the configuration parameters stored in the second memory may be a memory which is configured on the driver chip like a flash memory, a disposable memory, etc. and on which the configuration parameters are stored, and which will not be lost after power failure. After the drive chip is powered on, the configuration parameters on the flash memory or the disposable memory are written into the second memory.

Step S140: the target configuration parameters are read from the second memory and written to the first memory to drive the target element to operate in the target state.

In step S140, the execution body may be the host, and after determining the target configuration parameters, it is often required to identify the target configuration parameters from the plurality of configuration parameters in the second memory, so as to write the target configuration parameters into the first memory. The identification mode may be that in the process of writing a plurality of configuration parameters into the second memory from the flash memory or the disposable memory, a unique identifier is added for each configuration parameter, and the target configuration parameter is identified from the unique identifier according to the mapping relation between the identifier and the configuration parameter and written into the first memory.

The implementation process corresponds to the first embodiment of the foregoing product embodiments, and is not described herein.

In some alternative embodiments, the second memory may include at least two sub-memories.

Accordingly, the step S120 may include:

step S121: the control writing control module is used for respectively writing a plurality of configuration parameters into at least two sub-memories.

In the step S121, the execution body may be a host, and the host sends a corresponding control instruction to the write control module to control the write module to write a plurality of configuration parameters into the sub-memory.

The implementation process corresponds to the first embodiment of the foregoing product embodiments, and is not described herein.

In some alternative embodiments, the step S121 may include:

step S1211: the control write control module writes a plurality of configuration parameters into at least two sub-memories in time sequence or synchronously.

In the step S1211, the execution body may be a host, and the host sends a corresponding control instruction to the writing module to control the writing module to write the configuration parameters into the sub-memory in a time sequence or synchronously. The writing may be performed simultaneously or asynchronously within a certain time range.

In the case that the control writing module writes the configuration parameters into the sub-memories in time sequence, a control instruction for writing in time sequence may be sent from the host side, and after receiving the control instruction, the writing module converts the control instruction into a read-write time sequence, and the read-write time sequence writes the configuration parameters into the sub-memories, so that the bandwidth of the bus can be saved.

In the case that the control writing module synchronously writes all the configuration parameters into the sub-memories, a control instruction about synchronous writing can be sent by the host side, and after receiving the control instruction, the writing module synchronously writes all the configuration parameters into the sub-memories, so that the writing speed can be improved, and the running efficiency of the driving chip can be improved.

In the implementation process, all configuration parameters are written into the sub-memories according to the time sequence by controlling the writing module, so that the bus bandwidth of the driving chip is saved. All configuration parameters are synchronously written into the sub-memories by controlling the writing module, so that the writing speed is improved, and the running efficiency of the driving chip is further improved.

Referring to fig. 4, fig. 4 is a detailed flowchart of step S121 in the driving method according to the embodiment of the present application. In some alternative embodiments, the step S121 may include:

step S1212: and establishing a mapping relation between a plurality of configuration parameters and at least two sub memories.

Step S1213: and the control read control module writes a plurality of configuration parameters into the two sub-memories according to the mapping relation.

The step S1212 may be performed by the host, and may be specifically implemented by the host establishing a mapping relationship with the storage address parameters of at least two sub-memories according to a plurality of configuration parameters. The mapping relation can be established when the configuration parameters are stored in the sub-memory, or the mapping relation can be established in advance before the configuration parameters are written in, and the configuration parameters are written in the sub-memory according to the mapping relation. In the process of identifying the target configuration parameter, the target configuration parameter can be identified according to the mapping relationship so as to write the target configuration parameter into the first memory.

Referring to fig. 5, fig. 5 is a detailed flowchart of step S140 in the driving method according to the embodiment of the application. Accordingly, the step S140 may include:

step S141: and determining the storage address of the target configuration parameter from the second memory according to the mapping relation.

Step S142: and reading the target configuration parameters according to the storage address and writing the target configuration parameters into the first memory.

The step S142 may be performed by the host, and the host determines the address parameter stored in the second memory by the target configuration parameter according to the mapping relationship, identifies the target configuration parameter, and writes the target configuration parameter into the first memory.

In the implementation process, the mapping relation is established between each configuration parameter and the storage address of the second memory, so that the efficiency of identifying the target configuration parameters is improved.

In some alternative embodiments, the step S140 may include:

if the current configuration parameters stored in the current first memory are not consistent with the target configuration parameters, that is, the running state of the target element when running according to the current configuration parameters needs to be switched, so that the target element runs according to the target configuration parameters. In this case, step S143 is performed: and updating the parameter value of the current configuration parameter with the parameter value of the target configuration parameter.

In step S143, the execution body may be the host, and the configuration parameter written for the first time on the first memory after the driving chip is powered up includes "gray value=256", and "256" is the parameter value of the parameter. In the case where the operation state of the target element needs to be switched, the target configuration parameter includes "gray value=128", and "128" in the target configuration parameter is updated to "256" in the process of writing the target configuration parameter into the first memory.

In the implementation process, whether the current running state of the target element needs to be switched is determined according to whether the current configuration parameter is consistent with the target configuration parameter or not. When the target element needs to switch the running state, the method of updating the parameter value of the current configuration parameter by adopting the parameter value of the target configuration parameter improves the writing efficiency of the target configuration parameter compared with the method of directly replacing the current configuration parameter by the whole target configuration parameter, and the like, thereby enabling the process of driving the target element to switch the running state to be faster.

In some alternative embodiments, the target element may comprise a display panel. Correspondingly, the driving method is applied to the display screen driving chip to drive the display screen to display.

That is, the driving method provided by the application is applied to driving of the display panel to realize that the display screen displays in a plurality of different states.

The above implementation process corresponds to the third embodiment part of the foregoing product embodiment, and is not described herein. In addition, the driving method provided by the application is applied to the driving of the display panel, and in the process of writing each configuration parameter into the second memory, a mode of writing is adopted according to a time sequence, so that the command bus bandwidth of a driving chip for driving the display panel is saved; and the synchronous writing mode is adopted, so that the writing speed is improved, and the efficiency of the driving chip in driving the display panel to operate is further improved. In addition, by establishing the mapping relation between each configuration parameter and the storage address of the second memory, the efficiency of writing the configuration parameter into the second memory and recognizing and writing the configuration parameter from the second memory into the first memory is improved, and the operation efficiency of driving the display panel to perform multi-state display is further improved.

Based on the same inventive concept, please refer to fig. 6, fig. 6 is a schematic structural diagram of an electronic device 600 according to an embodiment of the present application. The electronic device 600 may include a memory 611, a memory controller 612, a processor 613, a peripheral interface 614, an input output unit 615, and a display unit 616. It will be appreciated by those of ordinary skill in the art that the configuration shown in fig. 6 is merely illustrative and is not intended to limit the configuration of the electronic device 600. For example, electronic device 600 may also include more or fewer components than shown in FIG. 6, or have a different configuration than shown in FIG. 6.

The above-mentioned memory 611, memory controller 612, processor 613, peripheral interface 614, input/output unit 615 and display unit 616 are electrically connected directly or indirectly to each other, so as to realize data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines. The processor 613 is configured to execute executable modules stored in the memory.

The Memory 611 may be, but is not limited to, a random access Memory (Random Access Memory, RAM), a Read Only Memory (ROM), a programmable Read Only Memory (Programmable Read-Only Memory, PROM), an erasable Read Only Memory (Erasable Programmable Read-Only Memory, EPROM), an electrically erasable Read Only Memory (Electric Erasable Programmable Read-Only Memory, EEPROM), etc. The memory 611 is configured to store a program, and the processor 613 executes the program after receiving an execution instruction, where a method executed by the electronic device 600 defined by the process disclosed in any one of the embodiments of the present application may be applied to the processor 613 or implemented by the processor 613.

The processor 613 may be an integrated circuit chip with signal processing capabilities. The processor 613 may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but also digital signal processors (digital signal processor, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field Programmable Gate Arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The peripheral interface 614 couples various input/output devices to the processor 613 and the memory 611. In some embodiments, the peripheral interface 614, the processor 613, and the memory controller 612 may be implemented in a single chip. In other examples, they may be implemented by separate chips.

The input-output unit 615 described above is used to provide input data to a user. The input/output unit 615 may be, but is not limited to, a mouse, a keyboard, and the like.

The display unit 616 described above provides an interactive interface (e.g., a user-operated interface) between the electronic device 600 and a user or is used to display image data to a user reference. In this embodiment, the display unit may be a liquid crystal display or a touch display. In the case of a touch display, the touch display may be a capacitive touch screen or a resistive touch screen, etc. supporting single-point and multi-point touch operations. Supporting single-point and multi-point touch operations means that the touch display can sense touch operations simultaneously generated from one or more positions on the touch display, and the sensed touch operations are passed to the processor for calculation and processing.

The electronic device 600 in the present embodiment may be used to perform each step in each method provided in the embodiments of the present application.

Embodiments of the present application also provide a storage medium including a computer-readable storage medium. The computer readable storage medium has stored thereon a computer program which, when run by a processor, performs the method as above.

The computer readable storage medium may be implemented by any type or combination of volatile or non-volatile Memory devices, such as static random access Memory (Static Random Access Memory, SRAM), electrically erasable Programmable Read-Only Memory (EEPROM), erasable Programmable Read-Only Memory (Erasable Programmable Read Only Memory, EPROM), programmable Read-Only Memory (PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk.

In summary, the driving chip, the driving method and the computer readable storage medium provided in the embodiments of the present application store a plurality of configuration parameters for driving a target element to operate in different states on the second memory, and in the process of driving the target element to operate, the corresponding configuration parameters on the second memory are obtained through the first memory, so that the driving target element operates in the corresponding state, the number of the first memories is reduced, and even only a single or a very small number of the first memories can be set, thereby reducing the size of the driving chip and simplifying the layout of electrical elements and circuits. When the number of configuration parameters is large, the second memory is divided into at least two sub-memories, and the number of the sub-memories is determined according to the space left on the driving chip for layout of the sub-memories, and the number of the first memory is usually higher than the number of the sub-memories by several orders of magnitude on the driving chip, so that the number of the first memory is greatly reduced by increasing the number of a small number of the sub-memories, and further the difficulty of chip design, processing and manufacturing and subsequent maintenance are further reduced.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The apparatus embodiments described above are merely illustrative, for example, of the flowcharts and block diagrams in the figures that illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, the functional modules in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.

The foregoing description is merely an optional implementation of the embodiments of the present application, but the scope of the embodiments of the present application is not limited thereto, and any person skilled in the art may easily think about changes or substitutions within the technical scope of the embodiments of the present application, and the changes or substitutions should be covered in the scope of the embodiments of the present application.

Claims (10)

1. A driver chip, comprising: a first memory and a second memory;

the second memory is used for storing a plurality of configuration parameters; the configuration parameters are used for driving the target element to run in a corresponding state;

the first memory is used for acquiring target configuration parameters in the plurality of configuration parameters from the second memory and providing the target configuration parameters for the target element so as to drive the target element to operate in a target state.

2. The driver chip of claim 1, wherein the chip further comprises a write control module and a read control module;

the second memory comprises at least two sub memories;

the writing control module is used for writing the configuration parameters into the at least two sub-memories respectively;

the read control module is used for controlling the sub-memory to send the target configuration parameters to the first memory.

3. The drive chip according to claim 1 or 2, wherein the chip comprises a display panel drive chip; the target element includes a display panel.

4. A driving method, wherein the driving method is applied to a driving chip having a first memory and a second memory; the method comprises the following steps:

determining a target configuration parameter used for driving a target element to operate in a target state in a plurality of configuration parameters; wherein the plurality of configuration parameters are stored in the second memory;

and reading the target configuration parameters from the second memory and writing the target configuration parameters into the first memory to drive the target element to operate in a target state.

5. The driving method according to claim 4, wherein the second memory includes at least two sub memories;

before determining the target configuration parameters used for driving the target element to operate in the target state, the method further comprises: and controlling the writing control module to write the configuration parameters into the at least two sub-memories respectively.

6. The driving method according to claim 5, wherein the controlling the writing control module to write the plurality of configuration parameters into the at least two sub-memories respectively includes:

the control write control module writes the configuration parameters into the at least two sub-memories in time sequence or synchronously.

7. The driving method according to claim 5, wherein the controlling the writing control module to write the plurality of configuration parameters into the at least two sub-memories respectively includes: establishing a mapping relation between the plurality of configuration parameters and the at least two sub-memories; the read control module is controlled to write the configuration parameters into the two sub-memories according to the mapping relation;

the reading and writing the target configuration parameters from and to the second memory includes: determining a storage address of the target configuration parameter from the second memory according to the mapping relation; and reading the target configuration parameters according to the storage address and writing the target configuration parameters into the first memory.

8. The driving method according to claim 4, wherein the reading and writing the target configuration parameter from and to the second memory includes:

if the current configuration parameters stored in the current first memory are not consistent with the target configuration parameters, updating the parameter values of the current configuration parameters by the parameter values of the target configuration parameters.

9. The driving method according to any one of claims 4 to 8, wherein the target element includes a display panel;

the driving method is applied to a display screen driving chip to drive the display screen to display.

10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program which, when executed by a processor, performs the method according to any of claims 4 to 9.

Images