CN116111835A - Power converter and operation method thereof - Google Patents

Power converter and operation method thereof Download PDF

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Publication number
CN116111835A
CN116111835A CN202111335320.9A CN202111335320A CN116111835A CN 116111835 A CN116111835 A CN 116111835A CN 202111335320 A CN202111335320 A CN 202111335320A CN 116111835 A CN116111835 A CN 116111835A
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China
Prior art keywords
value
reference value
power converter
processor
inductor
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CN202111335320.9A
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Chinese (zh)
Inventor
詹子增
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Acer Inc
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Acer Inc
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Priority to CN202111335320.9A priority Critical patent/CN116111835A/en
Publication of CN116111835A publication Critical patent/CN116111835A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/44Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a power converter and an operation method thereof. The power converter includes a boost circuit, a current sensor, and a processor. The rectifier rectifies the alternating current power to produce a rectified power. The boost circuit includes a boost inductor. The boost circuit boosts the rectified power to generate an output power. The current sensor senses an inductor current value located in the boost inductor to generate a sensed value corresponding to the inductor current value. The processor generates a first reference value according to an output voltage value, an input impedance value and a first value of the output power supply. When the sensing value is larger than the first reference value, the processor enters a first operation mode so that the sensing value is not lower than the first reference value.

Description

Power converter and operation method thereof
Technical Field
The present invention relates to the field of power conversion, and more particularly, to a power converter capable of suppressing noise generated by inductor current and an operation method thereof.
Background
In the field of high power applications, power converters produce a drastically changing dynamic current when converting an ac power source in a boost. The dynamic current of the power supply varies greatly, which makes the inductance current of the boost inductor fluctuate greatly. The frequency of the fluctuation of the inductor current is in the range of the auditory frequency of the human ear, so when the fluctuation of the inductor current is severe, the user can hear the noise, thereby reducing the use feeling of the user. Therefore, how to suppress noise of the power converter is one of the important points of study by those skilled in the art.
Disclosure of Invention
The invention provides a power converter and an operation method thereof, which can inhibit noise generated by inductive current.
The power converter comprises a rectifier, a boost circuit, a current sensor and a processor. The rectifier rectifies the ac power at the input to produce a rectified power. The boost circuit includes a boost inductor. The boost circuit boosts the rectified power to generate an output power. The current sensor senses an inductor current located in the boost inductor to generate a sensed value corresponding to the inductor current. The processor is coupled to the rectifier, the boost circuit and the current sensor. The processor generates an input impedance value of the input end and an output voltage value of the output power supply, and generates a first reference value according to the output voltage value, the input impedance value and the first value. The processor enters a first mode of operation when the sensed value is greater than a first reference value. In the first operation mode, the processor controls the boost circuit so that the sensing value is not lower than the first reference value.
The operation method of the invention is suitable for the power converter. The power converter includes a rectifier and a boost circuit. The rectifier is configured to rectify an alternating current power supply at the input to produce a rectified power supply. The boost circuit includes a boost inductor. The boost circuit is configured to boost the rectified power supply to generate an output power supply. The operation method comprises the following steps: sensing an inductor current value of the boost inductor to generate a sensed value corresponding to the inductor current value; receiving an input impedance value of an input end and an output voltage value of an output power supply, and generating a first reference value according to the output voltage value, the input impedance value and a first value; and when the sensing value is larger than the first reference value, entering a first operation mode to control the boost circuit so that the sensing value is not lower than the first reference value.
Based on the above, the power converter generates a first reference value according to the output voltage value, the input impedance value and the first value. And when the sensing value corresponding to the inductance current value is larger than the first reference value, the power converter enters a first operation mode so that the sensing value is not lower than the first reference value. Therefore, fluctuation of the inductance current value is reduced. In this way, the power converter can suppress noise of the power converter.
In order to make the above features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a schematic diagram of waveforms of dynamic current and inductor current in a high power application according to a conventional power converter;
FIG. 2 is a schematic diagram of an apparatus for a power converter according to an embodiment of the invention;
FIG. 3 is a flow chart of a method of operation according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a current waveform of a power converter according to an embodiment of the invention;
FIG. 5 is a flow chart of another method of operation according to an embodiment of the present invention;
FIG. 6 is a schematic circuit diagram of a power converter according to an embodiment of the invention;
fig. 7 is another schematic circuit diagram of a power converter according to an embodiment of the invention.
Description of the reference numerals
100. 200, 300: a power converter;
110. 210, 310: a rectifier;
120. 220, 320: a booster circuit;
130. 230, 330: a current sensor;
140. 240, 340: a processor;
241. 341: an impedance sensor;
242. 342_1, 342_2: an arithmetic unit;
243. 343_1, 343_2: a comparator;
244. 344: a mode controller;
245. 345, in the following description: a driver;
CD: discharging the capacitor;
CO: a capacitor;
CP1: a first comparison result;
CP2: a second comparison result;
DO: a diode;
LM: a boost inductor;
LN: an inductor;
q: a power switch;
r1, R2, RX: a resistor;
RIN: inputting an impedance value;
RS: a sense resistor;
s110 to S130: a step of;
s210 to S260: a step of;
SC: a control signal;
SV: a sensing value;
v_id: a dynamic current value;
v_il: an inductance current value;
v_vo: outputting a voltage value;
v1: a first value;
v2: a second value;
VAC: an alternating current power supply;
VOUT: an output power supply;
VR: a rectified power supply;
VR1: a first reference value;
VR2: and a second reference value.
Detailed Description
Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
Referring to fig. 1, fig. 1 is a schematic waveform diagram of a dynamic current and an inductor current of a conventional power converter in a high power application field. In the field of high power applications, current power converters produce a dynamic current value v_id that varies drastically when converting an ac power supply in a boost mode. This severe dynamic current value v_id directly affects the response of the inductor current switching. As shown in fig. 1, it can be found that the dynamic current value v_id of the power supply is near the peak value, and the fluctuation of the inductor current value v_il is most severe. The frequency of vibration generated by the fluctuation of the inductor current value v_il is within the range of the auditory frequency of the human ear, so that when the fluctuation of the inductor current value v_il is severe, the user can hear the noise.
The invention can restrain fluctuation of inductance current when approaching peak value of dynamic current, thereby restraining noise.
Referring to fig. 2 and fig. 3, fig. 2 is a schematic diagram of an apparatus of a power converter according to an embodiment of the invention. FIG. 3 is a flow chart of a method of operation according to an embodiment of the present invention. In the present embodiment, the power converter 100 includes a rectifier 110, a boost circuit 120, a current sensor 130, and a processor 140. The rectifier 110 rectifies the ac power VAC at the input to produce a rectified power VR. The current value of the rectified power supply VR is a dynamic current value v_id. The rectifier 110 of the present embodiment may be a bridge rectifier. In the present embodiment, the boost circuit 120 includes a boost inductor LM. The boost circuit 120 boosts the rectified power VR to generate the output power VOUT.
The boost circuit 120 may be a circuit with a power factor correction (power factor correction, PFC) function. For example, the boost circuit 120 further includes a power switch Q, a diode DO, and a capacitor CO (but not limited to the present invention). Boost inductor LM is coupled between the anode of diode DO and rectifier 110. The first terminal of the power switch Q is coupled to the anode of the diode DO. The second terminal of the power switch Q is coupled to a reference low voltage (e.g., ground). The control terminal of the power switch Q receives the control signal SC. The on or off state of the power switch Q may determine the inductor current value v_il of the boost inductor LM. The first terminal of the capacitor CO is coupled to the cathode of the diode DO. The second terminal of the capacitor CO is coupled to a reference low voltage. The first terminal of the capacitor CO serves as the output terminal of the boost circuit 120.
In the present embodiment, the current sensor 130 senses the inductance current value v_il of the boost inductor LM in step S110 to generate a sensed value SV corresponding to the inductance current value v_il. The base value of the inductor current value v_il fluctuates with the dynamic current value v_id. The inductor current value v_il fluctuates in response to the operation of the power switch Q. It should be noted that fluctuations in the sense value SV may directly reflect fluctuations in the inductor current value v_il. For example, the sensing value SV is substantially equal to the inductor current value v_il.
The processor 140 is coupled to the rectifier 110, the boost circuit 120, and the current sensor 130. In step S120, the processor 140 receives the input impedance RIN of the input terminal and the output voltage v_vo of the output power VOUT. The processor 140 generates a first reference value VR1 according to the output voltage v_vo, the input impedance RIN, and the first value V1. The processor 140 determines whether the sensing value SV is greater than the first reference value VR1. In step S130, when the sensing value SV is determined to be greater than the first reference value VR1, the processor 140 enters the first operation mode. In the present embodiment, the processor 140 controls the boost circuit 120 in the first operation mode so that the sensing value SV is not lower than the first reference value VR1. Therefore, the drastic fluctuation of the inductor current value v_il is reduced. In this way, the power converter 100 can suppress noise of the power converter.
Referring to fig. 2 and fig. 4, fig. 4 is a schematic diagram of a current waveform of a power converter according to an embodiment of the invention. In the present embodiment, the first reference value VR1 can be obtained according to the formula (1):
v1=v_vo/(v1×rin) … … … … … … … … … … … formula (1)
That is, the processor 140 divides the output voltage v_vo by the product of the first value V1 and the input impedance RIN to generate the first reference value VR1. In the present embodiment, the first value V1 may be set so that the first reference value VR1 approaches a peak value corresponding to the dynamic current value v_id. The first reference value VR1 is, for example, a peak value 95% (the invention is not limited thereto). In the present embodiment, the first value V1 is, for example, equal to 4 (the invention is not limited thereto).
In the present embodiment, the processor 140 provides the control signal SC with the first switching frequency in the first operation mode, and controls the power switch Q by using the control signal SC with the first switching frequency. The first switching frequency is, for example, 35kHz (the invention is not limited thereto). In addition, when the sensing value SV falls to be equal to the first reference value VR1 in the first operation mode, the processor 140 turns on the power switch Q. Therefore, the inductor current value v_il increases. The sensing value SV will also rise. Therefore, the fluctuation of the inductor current value v_il is limited by the first reference value VR1.
In the present embodiment, the processor 140 generates the second reference value VR2 according to the output voltage v_vo, the input impedance RIN, and the second value V2. In the present embodiment, the second reference value VR2 can be obtained according to the formula (2):
vqv=v_vo/(v2×rin) … … … … … … … … … … … formula (2)
The processor 140 divides the output voltage v_vo by the product of the second value V2 and the input impedance RIN to generate a second reference value VR2. The second value V2 is greater than the first value V1. Therefore, the second reference value VR2 is smaller than the first reference value VR1.
In the present embodiment, the second value V2 may be set such that the second reference value VR2 is substantially equal to the value of the light load upper limit of the dynamic current value v_id. In the present embodiment, the second value V2 is, for example, equal to 5.5 (the invention is not limited thereto).
In the case that the sensing value SV is less than or equal to the first reference value VR1, the processor 140 further determines whether the sensing value SV is greater than the second reference value VR2. When the sensing value SV is determined to be greater than the second reference value VR2 and less than or equal to the first reference value VR1, the processor 140 enters the second operation mode. The processor 140 provides a control signal SC with a second switching frequency in the second operation mode, and controls the power switch Q by using the control signal SC with the second switching frequency. The processor 140 controls the boost circuit 120 based on the second switching frequency to avoid electromagnetic interference generated by the power converter 100. In the present embodiment, the second frequency is, for example, 35kHz (the invention is not limited thereto).
When the sensing value SV is determined to be less than or equal to the second reference value VR2, the processor 140 enters the third operation mode. In the third operation mode, the processor 140 controls the boost circuit based on the frequency range to maintain the optimal efficiency of the power converter under light load. The frequency range may be, for example, 65kHz to 85kHz.
In the present embodiment, the processor 140 can also determine whether an abnormality occurs in the frequency of fluctuation of the inductor current value v_il. Specifically, processor 140 may be coupled to boost inductor LM through resistor RX to sense the actual frequency of variation of inductor current value v_il. When the frequency of the variation of the inductor current value v_il does not substantially match the logic level of the control signal SC or the switching state of the power switch Q, the processor 140 determines that the frequency of the variation of the inductor current value v_il is abnormal. On the other hand, when the frequency of the variation of the inductor current value v_il substantially matches the logic level of the control signal SC or the switching state of the power switch Q, the processor 140 determines that no abnormality occurs in the frequency of the variation of the inductor current value v_il. In this embodiment, resistor RX is used as a protection resistor to protect processor 140 from damage from dynamic current value v_ID.
Referring to fig. 2 and 5, fig. 5 is a flowchart illustrating another operation method according to an embodiment of the invention. In the present embodiment, the current sensor 130 senses the inductance current value v_il of the boost inductor LM to generate a sensed value SV corresponding to the inductance current value v_il in step S210. In step S220, the processor 140 receives the input impedance RIN of the input terminal and the output voltage v_vo of the output power VOUT. The processor 140 generates a first reference value VR1 according to the output voltage v_vo, the input impedance RIN, and the first value V1. In addition, the processor 140 generates the second reference value VR2 according to the output voltage v_vo, the input impedance RIN, and the second value V2. In step S230, the processor 140 determines the sensing value SV. When the sensed value SV is determined to be greater than the first reference value VR1 in step S230, a current value (v_id shown in fig. 1) representing a dynamic current entering the boost inductor LM is greater than the first reference value VR1. That is, the current value of the dynamic current approaches the peak value, so that the inductor current value v_il is greater than the first reference value VR1. Therefore, the processor 140 enters the first operation mode in step S240. In the first operation mode, the processor 140 controls the voltage boost circuit 120 so that the sensing value SV is not lower than the first reference value VR1. Therefore, the fluctuation of the inductor current value v_il is reduced. In this way, the power converter 100 can suppress noise of the power converter 100.
When the sensing value SV is determined to be less than or equal to the first reference value VR1 and greater than the second reference value VR2 in step S230, the current value representing the dynamic current causes the inductor current value v_il to be between the first reference value VR1 and the second reference value VR2. Accordingly, the processor 140 enters the second operation mode in step S250. In the second operation mode, the processor 140 controls the boost circuit 120 based on the switching frequency, so as to avoid electromagnetic interference generated by the power converter 100.
When the sensing value SV is determined to be less than or equal to the second reference value VR2 in step S230, the current value representing the dynamic current makes the inductor current value v_il less than or equal to the second reference value VR2. Therefore, the processor 140 enters the third operation mode in step S260. In the third mode of operation, the processor 140 controls the boost circuit 120 based on the frequency range, thereby maintaining the optimal efficiency of the power converter 100 under light load.
For details of the implementation of the current sensor and the processor, please refer to fig. 6, fig. 6 is a schematic circuit diagram of the power converter according to an embodiment of the present invention. In the present embodiment, the power converter 200 includes a rectifier 210, a boost circuit 220, a current sensor 230, and a processor 240. The current sensor 230 includes a coupled inductor LN, a sense resistor RS, and a discharge capacitance CD. The coupling inductor LN is inductively coupled with the boost inductor LM to induce the inductor current value v_il. For example, boost inductor LM, coupling inductor LN, and a magnetically permeable component (e.g., a core) may form an inductive coupling circuit. The invention is not limited to this example. A first end of the sense resistor RS is coupled to a first end of the coupled inductor LN. The second terminal of the sense resistor RS is coupled to a reference low voltage. The sense resistor RS is used for determining a numerical relationship between the sense value SV and the inductor current value v_il. The resistance value of the sensing resistor RS in the embodiment may be 1Ω (the invention is not limited thereto). Therefore, the value of the sensing value SV is substantially equal to the value of the inductor current value v_il. The first terminal of the discharge capacitor CD is coupled to the second terminal of the coupling inductor LN. The second terminal of the discharging capacitor CD is coupled to the second terminal of the sensing resistor RS. The discharge capacitance CD serves as an energy discharge path for the sense resistor RS and the coupling inductor LN. In this way, the current sensor 230 can have a fast response speed, so that the sensing value SV can reflect the fluctuation of the inductor current value v_il in real time.
In the present embodiment, the processor 240 includes an input impedance sensor 241, an operator 242, a comparator 243, a mode controller 244, and a driver 245. The input impedance sensor 241 senses the real-time input impedance value RIN. The operator 242 is coupled to the input impedance sensor 241. The operator 242 receives the output voltage v_vo, multiplies the input impedance value RIN and the first value V1 based on the formula (1) to generate a first product, and divides the output voltage v_vo by the first product to generate the first reference value VR1. In some embodiments, the operator 242 may be implemented at least by a divider. The divider may divide the output voltage value v_vo by the input impedance value RIN and then by the first value V1 to generate the first reference value VR1.
Further, a resistor R1 may be disposed between the operator 242 and the reference low voltage. The resistor R1 can be used to determine a voltage value corresponding to the first reference VR1.
In the present embodiment, the comparator 243 is coupled to the operator 242 and the current sensor 230. The comparator 243 compares the sensing value SV with the first reference value VR1 to generate a first comparison result CP1. In the present embodiment, the non-inverting input of the comparator 243 is coupled to the current sensor 130. An inverting input of the comparator 243 is coupled to the operator 242. The output of the comparator 243 is coupled to the mode controller 244.
In the present embodiment, the mode controller 244 is coupled to the comparator 243. The mode controller 244 receives the first comparison result CP1. When the first comparison result CP1 indicates that the sensing value SV is greater than the first reference value VR1, the mode controller 244 controls the processor 240 to enter the first operation mode. In the present embodiment, when the first comparison result CP1 indicates that the sensing value SV is greater than the first reference value VR1, the comparator 243 outputs the first comparison result CP1 with a high voltage level. The mode controller 244 controls the processor 240 to enter a first mode of operation. On the other hand, when the first comparison result CP1 indicates that the sensing value SV is less than or equal to the first reference value VR1, the comparator 243 outputs the first comparison result CP1 with a low voltage level. The mode controller 244 does not control the processor 240 to enter the first mode of operation.
In the present embodiment, the driver 245 provides the control signal SC to control the boost circuit 220 in the first operation mode so that the sensing value SV is not lower than the first reference value VR1. In some embodiments, the mode controller 244 may directly control the driver 245 to provide the control signal SC.
For further details of the processor, please refer to fig. 7, fig. 7 is another schematic diagram of the power converter according to an embodiment of the present invention. In the present embodiment, the power converter 300 includes a rectifier 310, a boost circuit 320, a current sensor 330, and a processor 340. The circuit configuration of the current sensor 330 may be sufficiently taught by the embodiment of fig. 6 and is therefore not repeated here. The processor 340 includes an impedance sensor 341, operators 342_1, 342_2, comparators 343_1, 343_2, a mode controller 344, and a driver 345. The embodiments of the impedance sensor 341, the operator 342_1, and the comparator 343_1 can refer to the embodiments of the impedance sensor 241, the operator 242, and the comparator 243 of the example of fig. 6, and thus are not repeated here.
In the present embodiment, the operator 342_2 receives the output voltage v_vo, multiplies the input impedance value RIN and the second value V2 based on the formula (2) to generate a second product, and divides the output voltage v_vo by the second product to generate the second reference value VR2. In some embodiments, the operator 342_2 may be implemented at least by a divider. The divider may divide the output voltage value v_vo by the input impedance value RIN and by the second value V2 to generate the second reference value VR2.
Further, a resistor R2 may be disposed between the operator 342_2 and the reference low voltage. The resistor R2 can be used to determine a voltage value corresponding to the second reference value VR2.
In the present embodiment, the comparator 343_2 is coupled to the operator 342_2 and the current sensor 330. The comparator 343_2 compares the sensing value SV with the second reference value VR2 to generate a second comparison result CP2. In the present embodiment, the non-inverting input of the comparator 343_2 is coupled to the current sensor 330. The inverting input of the comparator 343_2 is coupled to the operator 342_2. The output terminal of the comparator 343_2 is coupled to the mode controller 344. When the second comparison result CP2 indicates that the sensing value SV is greater than the second reference value VR2, the comparator 343_2 outputs the second comparison result CP2 with a high voltage level. When the second comparison result CP2 indicates that the sensing value SV is less than or equal to the second reference value VR2, the comparator 343_2 outputs the second comparison result CP2 with a low voltage level.
In the present embodiment, the mode controller 344 receives the first comparison result CP1 and the second comparison result CP2, and determines the operation mode according to table 1.
Table 1:
first comparison result Second comparison result Mode of operation
High voltage level High voltage level First mode of operation
Low voltage level High voltage level Second mode of operation
Low voltage level Low voltage level Third mode of operation
In other words, when the first comparison result CP1 indicates that the sensing value SV is greater than the first reference value VR1, the mode controller 344 controls the processor 340 to enter the first operation mode. When the first comparison result CP1 indicates that the sensing value SV is less than or equal to the first reference value VR1 and the second comparison result CP2 indicates that the sensing value SV is greater than the second reference value VR2, the mode controller 344 controls the processor 340 to enter the second operation mode. When the second comparison result CP2 indicates that the sensing value SV is less than or equal to the second reference value VR2, the mode controller 344 controls the processor 340 to enter the third operation mode.
In summary, the power converter generates the first reference value according to the output voltage value, the input impedance value and the first value. And when the sensing value corresponding to the inductance current value is larger than the first reference value, the power converter enters a first operation mode so that the sensing value is not lower than the first reference value. The fluctuation of the inductor current value may be reduced due to the limitation of the first reference value. In this way, the power converter can suppress noise of the power converter.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (17)

1. A power converter, the power converter comprising:
a rectifier configured to rectify an ac power source at an input to produce a rectified power source;
a boost circuit comprising a boost inductor configured to boost the rectified power supply to generate an output power supply;
a current sensor configured to sense an inductor current value at the boost inductor to generate a sensed value corresponding to the inductor current value; and
a processor coupled to the rectifier, the boost circuit and the current sensor, configured to receive an input impedance value of the input terminal and an output voltage value of the output power source, generate a first reference value according to the output voltage value, the input impedance value and a first value, enter a first operation mode when the sensed value is greater than the first reference value,
wherein in the first mode of operation, the processor controls the boost circuit so that the sensed value is not lower than the first reference value.
2. The power converter of claim 1, wherein:
the boost circuit further includes a power switch, and
in a first mode of operation, when the sensed value falls to be equal to the first reference value, the processor turns on the power switch to raise the inductor current value.
3. The power converter of claim 1, wherein:
the processor also generates a second reference value according to the output voltage value, the input impedance value and a second value, and
the second value is greater than the first value.
4. A power converter according to claim 3, characterized in that:
when the sensed value is greater than the second reference value and less than or equal to the first reference value, the processor enters a second mode of operation and
in the second mode of operation, the processor controls the boost circuit based on a switching frequency to avoid electromagnetic interference from the power converter.
5. The power converter of claim 4, wherein:
when the sensed value is less than or equal to the second reference value, the processor enters a third mode of operation, and
in the third mode of operation, the processor controls the boost circuit based on a frequency range to maintain optimal efficiency of the power converter at light loads.
6. The power converter of claim 5, wherein the processor comprises:
an input impedance sensor configured to sense the input impedance value;
a first operator coupled to the input impedance sensor and configured to receive the output voltage value, multiply the input impedance value and the first value to generate a first product, and divide the output voltage value by the first product to generate the first reference value;
a first comparator, coupled to the first operator and the current sensor, configured to compare the sensed value with the first reference value to generate a first comparison result; and
and a mode controller, coupled to the first comparator, configured to control the processor to enter the first operation mode when the first comparison result indicates that the sensing value is greater than the first reference value.
7. The power converter of claim 6, wherein the processor comprises:
a second operator coupled to the input impedance sensor and configured to receive the output voltage value, multiply the input impedance value and the second value to generate a second product, and divide the output voltage value by the second product to generate the second reference value; and
and a second comparator, coupled to the second operator, the current sensor and the mode controller, configured to compare the sensing value with the second reference value to generate a second comparison result.
8. The power converter of claim 7, wherein the mode controller controls the processor to enter the second mode of operation when the first comparison indicates that the sensed value is less than or equal to the first reference value and the second comparison indicates that the sensed value is greater than the second reference value.
9. The power converter of claim 7, wherein the mode controller controls the processor to enter the third operating mode when the second comparison indicates that the sensed value is less than or equal to the second reference value.
10. The power converter of claim 6, wherein the boost circuit further comprises a power switch, wherein the processor further comprises:
and the control signal generator is used for providing a corresponding control signal in response to one of the first operation mode, the second operation mode and the third operation mode and controlling the on and off of the power switch by using the control signal.
11. The power converter of claim 1, wherein the processor is further configured to determine whether an anomaly has occurred in a frequency of variation of the inductor current value.
12. The power converter of claim 1, wherein the current sensor comprises:
a coupling inductor coupled to the boost inductor to induce the inductor current value;
a sense resistor having a first end coupled to the first end of the coupling inductor and a second end coupled to a reference low voltage; and
and the first end of the discharge capacitor is coupled with the second end of the coupling inductor, and the second end of the discharge capacitor is coupled with the second end of the sensing resistor.
13. A method of operation for a power converter, the power converter comprising a rectifier and a boost circuit, wherein the rectifier is configured to rectify an ac power source at an input to produce a rectified power source, wherein the boost circuit comprises a boost inductor, wherein the boost circuit is configured to boost the rectified power source to produce an output power source, wherein the method of operation comprises:
sensing an inductor current value at the boost inductor to generate a sensed value corresponding to the inductor current value;
receiving an input impedance value of the input end and an output voltage value of the output power supply, and generating a first reference value according to the output voltage value, the input impedance value and a first value; and
and when the sensing value is larger than the first reference value, entering a first operation mode to control the boost circuit so that the sensing value is not lower than the first reference value.
14. The method of operation of claim 13, wherein the boost circuit further comprises a power switch, wherein the step of entering the first mode of operation to control the boost circuit such that the sensed value is not below the first reference value comprises:
when the sensing value is reduced to be equal to the first reference value, the power switch is turned on to enable the inductance current value to rise.
15. The method of claim 13, wherein receiving the input impedance value of the input terminal and the output voltage value of the output power source, and generating the first reference value based on the output voltage value, the input impedance value, and the first value comprises:
generating a second reference value according to the output voltage value, the input impedance value and a second value,
wherein the second value is greater than the first value.
16. The method of operation of claim 15, further comprising:
and when the sensing value is larger than the second reference value and smaller than or equal to the first reference value, entering a second operation mode to control the boost circuit based on the switching frequency, so as to avoid electromagnetic interference generated by the power converter.
17. The method of operation of claim 16, further comprising:
and when the sensing value is smaller than or equal to the second reference value, entering a third operation mode to control the boost circuit based on a frequency range, so as to maintain the optimal efficiency of the power converter under light load.
CN202111335320.9A 2021-11-11 2021-11-11 Power converter and operation method thereof Pending CN116111835A (en)

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Application Number Priority Date Filing Date Title
CN202111335320.9A CN116111835A (en) 2021-11-11 2021-11-11 Power converter and operation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111335320.9A CN116111835A (en) 2021-11-11 2021-11-11 Power converter and operation method thereof

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Publication Number Publication Date
CN116111835A true CN116111835A (en) 2023-05-12

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