CN116107371A - Stable current generation method and circuit - Google Patents
Stable current generation method and circuit Download PDFInfo
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- CN116107371A CN116107371A CN202211490820.4A CN202211490820A CN116107371A CN 116107371 A CN116107371 A CN 116107371A CN 202211490820 A CN202211490820 A CN 202211490820A CN 116107371 A CN116107371 A CN 116107371A
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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Abstract
The application relates to a method and a circuit for generating stable current, which belong to the technical field of electronic circuits and comprise the steps of respectively conveying N paths of driving current to corresponding paths of N paths in each branch according to time periods in N time periods based on a preset mapping table; the mapping table comprises a corresponding relation between each time period and a passage conveyed by the driving current; and, each path of driving current corresponds to a mapping table; and superposing the currents of all the paths in each branch circuit in N time periods to generate the stable current corresponding to each branch circuit. Therefore, in N time periods, each branch is driven by all driving currents together, not by a certain driving current, when errors exist among the driving currents, the errors cannot directly act on one branch, and the constant current source driving circuit has the effect of reducing the errors of output currents among a plurality of constant current sources.
Description
Technical Field
The present invention relates to the field of electronic circuits, and in particular, to a method and a circuit for generating a stable current.
Background
The RGB circuit is a circuit for controlling color conversion, and is widely applied to various lighting lamps, LED electronic screens and other devices, each luminous point on the RGB circuit is composed of three small lamps, the three small lamps can respectively emit red, green and blue lights, and the proportion of red light, green light and blue light is controlled by controlling the current proportion of corresponding R channel, G channel and B channel, so that the luminous points represent different colors.
At present, the R channel, the G channel and the B channel are usually powered by multiple constant current sources, that is, each channel corresponds to one constant current source, however, under the influence of a production process or external factors, the output current of each constant current source may generate errors, so that the ratio of the output currents of the R channel, the G channel and the B channel has errors, thereby causing color difference of RGB color development, and how to reduce the errors of the output currents of the constant current sources is a problem to be solved urgently.
Disclosure of Invention
In order to reduce errors of output currents among a plurality of constant current sources, the application provides a generation method and circuit of stable currents.
In a first aspect, the present application provides a method for generating a stable current, which adopts the following technical scheme:
the generation method of the stable current comprises the steps of respectively conveying N paths of driving currents to corresponding paths of N paths in each branch according to time periods based on a preset mapping table in N time periods; the mapping table comprises a corresponding relation between each time period and a passage conveyed by the driving current; and, each path of driving current corresponds to a mapping table;
and superposing the currents of all the paths in each branch circuit in N time periods to generate the stable current corresponding to each branch circuit.
Through adopting above-mentioned technical scheme, according to the mapping table, in N time slots, carry N way drive current respectively to the corresponding passageway in every branch road for every branch road all has the drive current that uniquely corresponds in every time slot, thereby make in N time slots, every branch road all jointly drive by all drive currents, not by a certain drive current carries out independent drive, thereby when there is the error between the drive currents, the error can not directly be acted on a branch road, but act on all branch roads, make the error be averaged on all branch roads, thereby reduced the error between the stable electric current of every branch road output.
Optionally, the N time periods are all equal-time-length settings.
By adopting the technical scheme, the time periods are equal in time length, so that the power supply time of all driving currents is kept consistent, and errors among different driving currents are counteracted.
Optionally, the preset mapping table specifically includes:
generating a pulse control signal for each path in each branch;
a map of each path of drive current is generated based on the pulse control signals of all paths.
By adopting the technical scheme, the on-off of the channels is controlled by using the pulse control signals, and then the mapping table of the driving current is generated according to the on-off of each channel, so that the driving current can be controlled according to the mapping table.
Optionally, the generating the pulse control signal of each path in each branch specifically includes:
generating a period of a pulse control signal according to the total duration of the N time periods;
dividing each period into N subcycles consistent with the number of the paths;
generating an initial phase of a pulse control signal corresponding to each path according to the starting moment of each subcycle;
presetting the duty ratio of a pulse control signal corresponding to each branch;
the pulse control signal for each path is generated based on the period, the initial phase, and the duty cycle.
By adopting the technical scheme, the period of the pulse control signal is generated according to the total duration of N time periods, the initial phase of the pulse control signal corresponding to each channel is generated according to the starting time of the sub-period, namely the conduction time of each channel, the duty cycle of each branch is preset, and the cutting-off time of each channel is determined by combining the initial phase, so that the pulse control signal corresponding to each channel can be generated according to the period, the initial phase and the duty cycle.
Optionally, the step of superposing currents of all paths in each branch in the N time periods to generate a stable current corresponding to each branch specifically includes:
obtaining the corresponding relation between all paths in each branch and N paths of driving currents according to all mapping tables;
calculating the channel current of each channel in each branch in N time periods according to the corresponding relation between all channels in each branch and the driving current;
and superposing the channel currents of all channels in each branch circuit to generate the stable current corresponding to each branch circuit.
By adopting the technical scheme, the corresponding relation between all the channels in each branch and N paths of driving currents is obtained according to all the mapping tables, then the channel current of each channel in each branch in N time periods is calculated according to the corresponding relation between all the channels in each branch and the driving currents, and at the moment, all the channel currents in each branch are overlapped, so that the stable current corresponding to each branch can be obtained.
In a second aspect, the present application provides a method for generating RGB stable current, which adopts the following technical scheme:
a method of generating RGB stable currents, comprising:
dividing each refresh period into three time periods;
in a first time period, transporting a first driving current to a first path of an R branch, transporting a second driving current to a first path of a G branch, and transporting a third driving current to a first path of a B branch;
in a second time period, the first driving current is conveyed to a second path of the B branch, the second driving current is conveyed to a second path of the R branch, and the third driving current is conveyed to a second path of the G branch;
in a third time period, the first driving current is transported to a third path of the G branch, the second driving current is transported to a third path of the B branch, and the third driving current is transported to a third path of the R branch;
and superposing the currents of the first passage, the second passage and the third passage of the R branch to generate a stable current of the R branch, superposing the currents of the first passage, the second passage and the third passage of the G branch to generate a stable current of the G branch, and superposing the currents of the first passage, the second passage and the third passage of the B branch to generate a stable current of the B branch.
By adopting the technical scheme, in the RGB circuit, stable currents of the R branch, the G branch and the B branch need to be output, and in three time periods, the first driving current, the second driving current and the third driving current are used for alternately supplying power, so that the R branch, the G branch and the B branch can use the first driving current, the second driving current and the third driving current, and errors among the first driving current, the second driving current and the third driving current are counteracted.
In a third aspect, the present application provides a stable current generating circuit, which adopts the following technical scheme:
the stable current generation circuit comprises a control unit, a first switching unit, a second switching unit and a third switching unit, wherein the control unit is used for respectively conveying N paths of driving currents to corresponding paths of N paths in each branch according to a preset mapping table in N time periods; the mapping table comprises a corresponding relation between each time period and a passage conveyed by the driving current; and, each path of driving current corresponds to a mapping table;
and the driving unit is connected with the control unit and is used for superposing the currents of all the paths in each branch in N time periods to generate stable currents corresponding to each branch.
Through adopting above-mentioned technical scheme, utilize the control unit in N time quantum, based on the mapping table that presets, carry N way drive current to the corresponding passageway in every branch road respectively, utilize the stable electric current of drive unit output corresponding branch road for every branch road has all used drive current, no longer each drive current only provides the drive to a branch road, thereby the error of the drive current that makes there is the error is averaged by all branch roads, and then the proportion of the electric stable current of making all branch roads keeps stable.
Optionally, the driving unit includes a plurality of groups of driving sub-circuits, and the driving sub-circuits are used for generating currents of each path based on the pulse control signals and the driving currents; and superposing the currents of all the paths in the branch circuits to obtain the stable current of the corresponding branch circuit.
By adopting the technical scheme, each passage in the branch circuit uniquely corresponds to one driving power supply, and the mode of superposing the currents of all passages in the branch circuit is adopted, so that each branch circuit receives the control of all driving currents, and the branch circuit can conveniently output stable currents.
Optionally, the current driving method is applied to RGB, and is characterized in that:
the driving unit comprises a first driving sub-circuit, a second driving sub-circuit and a third driving sub-circuit; the first driving sub-circuit, the second driving sub-circuit and the third driving sub-circuit all comprise a control end, a first driving end, a second driving end, a third driving end and a channel connecting end;
the first driving sub-circuit is characterized in that a control end is connected to the control unit, a channel connection end is connected to the R channel, a first driving end is connected to a first reference current end, a second driving end is connected to a second reference current end, and a third driving end is connected to a third reference current end;
the second driving sub-circuit is characterized in that a control end is connected with the control unit, a channel connecting end is connected with the G channel, a first driving end is connected with a second reference current end, a second driving end is connected with a third reference current end, and the third driving end is connected with the first reference current end;
the control end of the third driving sub-circuit is connected with the control unit, the channel connecting end is connected with the B channel, the first driving end is connected with the third reference current end, the second driving end is connected with the first reference current end, and the third driving end is connected with the second reference current end;
the first reference current end is used for outputting a first driving current, the second reference current end is used for outputting a second driving current, and the third reference current end is used for outputting a third driving current.
By adopting the technical scheme, the first reference current end is conducted with the first driving sub-circuit, the second driving current and the third driving sub-circuit, the second reference current end is conducted with the first driving sub-circuit, the second driving current and the third driving sub-circuit, and the third reference current end is conducted with the first driving sub-circuit, the second driving current and the third driving sub-circuit, so that the first reference current end, the second reference current end and the third reference current can jointly control the first driving sub-circuit, the second driving current and the third driving sub-circuit, and the first driving sub-circuit, the second driving current and the third driving sub-circuit can receive the driving currents output by the first reference current end, the second reference current end and the third reference current, thereby being convenient for counteracting errors among the driving currents output by the first reference current end, the second reference current end and the third reference current.
Optionally, the first driving sub-circuit includes a first switching tube Q1, a second switching tube Q2 and a third switching tube Q3, drain electrodes of the first switching tube Q1, the second switching tube Q2 and the third switching tube Q3 are all connected to the R channel, and a gate electrode is connected to the control end; the source electrode of the first switching tube Q1 is connected with the first driving end of the first driving sub-circuit, the source electrode of the second switching tube Q2 is connected with the second driving end of the first driving sub-circuit, and the source electrode of the third switching tube Q3 is connected with the third driving end of the first driving sub-circuit;
the second driving sub-circuit comprises a fourth switching tube Q4, a fifth switching tube Q5 and a sixth switching tube Q6, drain electrodes of the fourth switching tube Q4, the fifth switching tube Q5 and the sixth switching tube Q6 are all connected with the G channel, and a grid electrode is connected with the control end; the source electrode of the fourth switching tube Q4 is connected with the first driving end of the second driving sub-circuit, the source electrode of the fifth switching tube Q5 is connected with the second driving end of the second driving sub-circuit, and the source electrode of the sixth switching tube Q6 is connected with the third driving end of the second driving sub-circuit;
the third driving sub-circuit comprises a seventh switching tube Q7, an eighth switching tube Q8 and a ninth switching tube Q9, drain electrodes of the seventh switching tube Q7, the eighth switching tube Q8 and the ninth switching tube Q9 are all connected with the B channel, and a grid electrode is connected with the control end; the source electrode of the seventh switching tube Q7 is connected to the first driving end of the third driving sub-circuit, the source electrode of the eighth switching tube Q8 is connected to the second driving end of the third driving sub-circuit, and the source electrode of the ninth switching tube Q9 is connected to the third driving end of the third driving sub-circuit.
By adopting the technical scheme, the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are conducted one by one, so that the first reference current end, the second reference current end and the third reference current end sequentially supply driving currents to the R channel, and so on, the fourth switch tube Q4, the fifth switch tube Q5 and the sixth switch tube Q6 are conducted one by one, so that the first reference current end, the second reference current end and the third reference current end sequentially supply driving currents to the G channel, the seventh switch tube Q7, the eighth switch tube Q8 and the ninth switch tube Q9 are conducted one by one, and the first reference current end, the second reference current end and the third reference current end sequentially supply driving currents to the B channel, so that the R channel, the G channel and the B channel are driven by the driving currents output by the first reference current end, the second reference current end and the third reference current end, errors between the driving currents output by the first reference current end, the second reference current end and the third reference current end are offset by the R channel and the B channel, and errors of the R channel and the G channel are reduced.
Drawings
FIG. 1 is a flow chart of a method for stabilizing current generation in one embodiment of the present application.
Fig. 2 is a flowchart of a method for generating a pulse control signal according to one embodiment of the present application.
FIG. 3 is a flow chart of a method for stabilizing current calculation according to one embodiment of the present application.
Fig. 4 is a flow chart of a method for demonstrating RGB stable current generation in accordance with another embodiment of the application.
Fig. 5 is a waveform diagram of a pulse control signal for generating an R channel according to another embodiment of the present application.
Fig. 6 is a waveform diagram of a pulse control signal for generating a G channel according to another embodiment of the present application.
Fig. 7 is a waveform diagram of a pulse control signal for generating a B channel according to another embodiment of the present application.
Fig. 8 is a block diagram of a structure of a stabilizing current generation according to still another embodiment of the present application.
Fig. 9 is a circuit connection configuration diagram of a stabilizing current generation according to still another embodiment of the present application.
Reference numerals illustrate: 1. a reference current unit; 2. a control unit; 3. a driving unit; 31. a first drive sub-circuit; 32. a second drive sub-circuit; 33. and a third driving sub-circuit.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to fig. 1 to 9 and the embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
The embodiment of the application discloses a method and a circuit for generating stable current. Referring to fig. 1, a method for generating a stabilizing current includes:
step S101: in N time periods, based on a preset mapping table, N paths of driving currents are respectively transmitted to corresponding paths in N paths in each branch according to time periods;
the mapping table comprises a corresponding relation between time periods and paths conveyed by the driving current; and, each path of driving current corresponds to a mapping table; n is a positive integer greater than or equal to two.
It should be noted that, N driving currents may be output by the constant current source, but the current output by each driving power source may still have an error due to the influence of the manufacturing process of the circuit components.
The branches are circuit branches for outputting current, the number of the branches is at least two, and the number of the preferable branches is consistent with the number of the driving current.
It will be appreciated that the drive current is delivered to the unique corresponding path for a specified period of time in accordance with a preset map, i.e. the number of paths included in each branch corresponds to the number of paths of the drive current. For each drive current, all branches are fed, and for each branch all drive currents are fed.
Step S103: and superposing the currents of all the paths in each branch circuit in N time periods to generate the stable current corresponding to each branch circuit.
It will be appreciated that since all paths in each branch are correspondingly receiving N drive currents, each branch is no longer driven by a single drive current, at which point the current output by each branch is a superposition of the currents of all paths in each branch.
It should be noted that the steady current is not a current that the branch outputs a certain value. Because the current output by each branch circuit is derived from all driving currents, errors generated among different driving currents can be counteracted, and the current output by the branch circuit can form stable currents with a certain proportion or equal.
In the above embodiment, according to the mapping table, N driving currents are respectively delivered to the corresponding paths in each branch in N time periods, so that each branch has a unique corresponding driving current in each time period, so that in N time periods, each branch is commonly driven by all driving currents, and is not separately driven by a certain driving current, so that when an error exists between the driving currents, the error does not directly act on one branch, but acts on all branches, so that the error is averaged over all branches, and the error between the stable currents output by each branch is reduced.
As one embodiment of the time periods, N time periods are all set at equal time lengths.
As an embodiment of the time periods, the N time periods may also be set in a proportion, for example, in three time periods, the proportion of the durations of the three time periods is 1:1:2.
as an embodiment of the preset mapping table, the preset mapping table specifically includes: generating a pulse control signal for each path in each branch; generating a mapping table of each path of driving current based on pulse control signals of all paths;
the pulse control signal adopts a rectangular wave signal and is used for controlling the on-off of the channels, so that the on-off between the driving current and the channels is controlled, namely, the channels conveyed by each channel of driving current are controlled through the pulse control signal.
It should be understood that, after the pulse control signals of all the paths are generated, the time period for conducting the corresponding path of each path of the driving current can be obtained through the pulse control signals of all the paths, so that the mapping table of each path of the driving current can be generated.
In the above embodiment, the on-off of each channel is controlled by the pulse control signal, so that the corresponding relation between the driving current and the channel in each time period can be obtained from the pulse control signal, and the effect of generating the mapping table of the driving current in each channel can be realized according to all the pulse control signals.
Referring to fig. 2, as one embodiment of generating the pulse control signal for each path in each branch, generating the pulse control signal for each path in each branch specifically includes:
step S201: generating a period of a pulse control signal according to the total duration of the N time periods;
it should be understood that, since the paths to which the driving currents are supplied are different in each of the N periods, there is no periodicity in the correspondence between the driving currents and the paths in the N periods, and when the supply of all the branches is completed in each of the N periods, the next group of N periods starts to be supplied, and at this time, the pulse control signal has periodicity, and the period of the pulse signal is the total duration of the N periods.
Step S202: dividing each period into N subcycles consistent with the number of the paths;
the number of the paths, the number of the time periods and the number of the driving current paths are the same, that is, the number of the paths is N, each period is divided into N subcycles, and one path of the paths in each subcycle is conducted.
It will be appreciated that the duration of each sub-period corresponds to the duration of each time period.
Step S203: generating an initial phase of a pulse control signal corresponding to each path according to the starting moment of each subcycle;
it should be noted that, in all paths of the same branch, only one path is conducted in each subcycle, and in each subcycle, one path is conducted between the corresponding driving current and each path.
Wherein generating the initial phase of the pulse control signal corresponding to each path further comprises: in the paths of the same branch, the initial phase corresponding to each path corresponds to the starting moment of each subcycle one by one. I.e. in the same branch, each path has a unique corresponding initial phase.
Step S204: presetting the duty ratio of a pulse control signal corresponding to each branch;
the duty ratio refers to the proportion of the power-on duration relative to the whole period in one period, the duty ratio can be set according to practical situations, and the proportion of the stable current output by each branch can be adjusted by setting the duty ratio, for example, the duty ratio of the first branch is preset to be 0.5, the duty ratio of the second branch is preset to be 0.2, and then the ratio of the stable current output by the first branch to the stable current output by the second branch is 5:2.
the duty ratios of all the paths of the same branch should be kept consistent, so that only the duty ratio of the pulse control signal of the branch needs to be set in the preset process.
It should be understood that when the duty cycle of the pulse control signals of all the branches is 1, the stabilizing currents of all the branches are average values of all the driving currents, and the stabilizing currents output by all the branches are equal.
Step S205: the pulse control signal for each path is generated based on the period, the initial phase, and the duty cycle.
Referring to fig. 3, as an embodiment of step S103, step S103 specifically includes:
step S1031: obtaining the corresponding relation between all paths in each branch and N paths of driving currents according to all mapping tables;
it should be understood that the mapping table is generated according to the pulse control signal, so that not only the correspondence between all paths in each branch and the driving current, but also the duty ratio of the pulse control signal corresponding to each path, that is, the on time of each path, can be obtained from the mapping table.
Step S1032: calculating the channel current of each channel in each branch in N time periods according to the corresponding relation between all channels in each branch and the driving current;
it should be understood that the N time periods are one period of the pulse control signal, and the channel currents outputted from the same channel are uniform in each period of the pulse control signal. The path current of each path=the driving current of the path corresponds to the duty ratio of the pulse control signal of the path.
Step S1033: and superposing the channel currents of all channels in each branch circuit to generate the stable current corresponding to each branch circuit.
Wherein, because there may be a certain error between each path of driving current, there is a certain difference between the currents of each path in the same branch. But all paths in the same branch are driven by N paths of driving currents together, namely, the stable currents of the branches obtained by superposition of the currents of all paths counteract errors among the driving currents.
The implementation principle of the generation method of the stable current in the embodiment of the application is as follows: generating N paths of driving currents, and respectively conveying the N paths of driving currents to corresponding paths of each branch based on a preset mapping table in N time periods, so that the N paths of driving currents are respectively conveyed to all paths in the same branch one by one, namely, each branch is simultaneously driven by the N paths of driving currents, when errors exist among the N paths of driving currents, the driving currents with the errors do not only act on one path of branch, but are averaged to all branches, and therefore the errors among stable currents output by all branches are reduced.
Referring to fig. 4, an embodiment of the present application discloses a method for generating RGB stabilizing currents. It will be appreciated that the RGB circuit is used to control the RGB three-way colour conversion so that different colours of light can be displayed, and that the RGB circuit requires at least three channels, the R channel, the B channel and the G channel, so that in the RGB circuit it is preferred to generate three stable currents.
A method of generating RGB stable currents, comprising:
step S301: dividing each refresh period into three time periods;
in the RGB circuit, the refresh period refers to the refresh period of the lamplight, and the refresh frequency of the lamplight is reciprocal.
Step S302: in a first time period, transporting a first driving current to a first path of an R branch, transporting a second driving current to a first path of a G branch, and transporting a third driving current to a first path of a B branch;
step S303: in a second time period, the first driving current is conveyed to a second path of the B branch, the second driving current is conveyed to a second path of the R branch, and the third driving current is conveyed to a second path of the G branch;
step S304: in a third time period, the first driving current is transported to a third path of the G branch, the second driving current is transported to a third path of the B branch, and the third driving current is transported to a third path of the R branch;
it should be understood that the mapping table includes a correspondence relationship between each time period and the path through which the driving current is delivered, that is, the first driving current, the second driving current, and the third driving current are transported based on the mapping table in the first time period, the second time period, and the third time period.
The first period, the second period, and the third period are cycled, that is, the steady current can be continuously generated.
Step S305: and superposing the currents of the first passage, the second passage and the third passage of the R branch to generate a stable current of the R branch, superposing the currents of the first passage, the second passage and the third passage of the G branch to generate a stable current of the G branch, and superposing the currents of the first passage, the second passage and the third passage of the B branch to generate a stable current of the B branch.
Specifically, referring to fig. 5, the C1 waveform is the pulse control signal of the first path of the R branch, the C2 waveform is the pulse control signal of the second path of the R branch, the C3 waveform is the pulse control signal of the third path of the R branch, and the outl is the pulse waveform of the R branch.
Referring to fig. 6, similarly, the C4 waveform is a pulse control signal of the first path of the G branch, the C5 waveform is a pulse control signal of the second path of the G branch, the C6 waveform is a pulse control signal of the third path of the G branch, and the OUTB is a pulse waveform of the G branch.
Referring to fig. 7, similarly, the C7 waveform is a pulse control signal of the first path of the B-branch, the C8 waveform is a pulse control signal of the second path of the B-branch, the C9 waveform is a pulse control signal of the third path of the B-branch, and the OUTB is a pulse waveform of the B-branch.
It should be noted that, the period of the pulse control signal is a refresh period.
The implementation principle of the method for generating the RGB stable current in the embodiment of the application is as follows: in an RGB circuit, stable R, G and B currents need to be output, and in three periods, the R, G and B currents are alternately supplied by the first, second and third driving currents, so that the R, G and B currents can each use the first, second and third driving currents, and the stable currents generated by the R, G and B branches cancel errors among the first, second and third driving currents.
The embodiment of the application discloses a generation circuit of stable current. Referring to fig. 8, a stable current generation circuit includes:
a control unit 2, configured to respectively transmit N driving currents to corresponding paths among N paths in each branch according to a time period, based on a preset mapping table, in N time periods; the mapping table comprises the corresponding relation between each time period and a path conveyed by the driving current; and, each path of driving current corresponds to a mapping table;
and the driving unit 3 is connected to the control unit 2 and is used for superposing the currents of all the paths in each branch in N time periods to generate a stable current corresponding to each branch.
It should be understood that the stabilizing current generating circuit further comprises a reference current unit 1, the reference current unit 1 being connected to the driving unit 3 for generating N driving currents. N driving currents are then supplied to the respective paths by the control unit 2.
Referring to fig. 9, as an embodiment of the reference current unit 1, the reference current unit 1 includes a first shunt transistor Q10, a second shunt transistor, a third shunt transistor Q12, and a fourth shunt transistor Q13; the sources of the first shunt transistor Q10, the second shunt transistor, the third shunt transistor Q12 and the fourth shunt transistor Q13 are grounded, and the grids are connected with an input current source;
the drain of the first shunt transistor Q10 is connected to an input current source, the source of the second shunt transistor Q11 is connected to a first reference current terminal, the source of the third shunt transistor Q12 is connected to a second reference current terminal, and the source of the fourth shunt transistor Q13 is connected to a third reference current terminal.
As an embodiment of the driving unit 3, the driving unit 3 includes a plurality of sets of driving sub-circuits for generating currents of respective paths based on the pulse control signal and the driving current; and superposing the currents of all the paths in the branch circuits to obtain the stable current of the corresponding branch circuit.
As a further embodiment of the generating circuit, the generating circuit is applied to current driving of RGB, specifically, the reference current unit 1 includes a first reference current terminal, a second reference current terminal, and a third reference current terminal;
the driving unit 3 includes a first driving sub-circuit 31, a second driving sub-circuit 32, and a third driving sub-circuit 33; the first driving sub-circuit 31, the second driving sub-circuit 32 and the third driving sub-circuit 33 each include a control terminal, a first driving terminal, a second driving terminal, a third driving terminal and a channel connection terminal;
the first driving sub-circuit 31, the control end is connected to the control unit 2, the channel connection end is connected to the R channel, the first driving end is connected to the first reference current end, the second driving end is connected to the second reference current end, and the third driving end is connected to the third reference current end;
a second driving sub-circuit 32, the control end of which is connected to the control unit 2, the channel connection end of which is connected to the G channel, the first driving end of which is connected to the second reference current end, the second driving end of which is connected to the third reference current end, and the third driving end of which is connected to the first reference current end;
the third driving sub-circuit 33 has a control end connected to the control unit 2, a channel connection end connected to the B channel, a first driving end connected to the third reference current end, a second driving end connected to the first reference current end, and a third driving end connected to the second reference current end.
It should be understood that the first reference current terminal of the reference current unit 1 is used for outputting the first driving current, the second reference current terminal is used for outputting the second driving current, and the third reference current terminal is used for outputting the third driving current.
Referring to fig. 9, as an embodiment of the first driving sub-circuit 31, the second driving sub-circuit 32, and the third driving sub-circuit 33, the first driving sub-circuit 31 includes a first switching tube Q1, a second switching tube Q2, and a third switching tube Q3, drains of the first switching tube Q1, the second switching tube Q2, and the third switching tube Q3 are all connected to the R channel, and a gate is connected to the control terminal; the source electrode of the first switching tube Q1 is connected to the first driving end of the first driving sub-circuit 31, the source electrode of the second switching tube Q2 is connected to the second driving end of the first driving sub-circuit 31, and the source electrode of the third switching tube Q3 is connected to the third driving end of the first driving sub-circuit 31;
the second driving sub-circuit 32 includes a fourth switching tube Q4, a fifth switching tube Q5 and a sixth switching tube Q6, and a gate is connected to the control end; the source electrode of the fourth switching tube Q4 is connected with the first driving end of the second driving sub-circuit 32, the source electrode of the fifth switching tube Q5 is connected with the second driving end of the second driving sub-circuit 32, and the source electrode of the sixth switching tube Q6 is connected with the third driving end of the second driving sub-circuit 32;
the third driving sub-circuit 33 includes a seventh switching tube Q7, an eighth switching tube Q8, and a ninth switching tube Q9, drain electrodes of the seventh switching tube Q7, the eighth switching tube Q8, and the ninth switching tube Q9 are all connected to the B channel, and a gate electrode is connected to the control end; the source of the seventh switching tube Q7 is connected to the first driving end of the third driving sub-circuit 33, the source of the eighth switching tube Q8 is connected to the second driving end of the third driving sub-circuit 33, and the source of the ninth switching tube Q9 is connected to the third driving end of the third driving sub-circuit 33.
As an example, the pulse control signal received by the gate of the first switching tube Q1 is the waveform C1 in fig. 5, the pulse control signal received by the gate of the second switching tube Q2 is the waveform C1 in fig. 5, and the pulse control signal received by the gate of the third switching tube Q3 is the waveform C1 in fig. 5; the pulse control signal received by the grid electrode of the fourth switching tube Q4 is the waveform C4 in fig. 6, the pulse control signal received by the grid electrode of the fifth switching tube Q5 is the waveform C5 in fig. 6, and the pulse control signal received by the grid electrode of the sixth switching tube Q6 is the waveform C6 in fig. 6; the pulse control signal received by the gate of the seventh switching tube Q7 is the waveform C7 in fig. 6, the pulse control signal received by the gate of the seventh switching tube Q7 is the waveform C9 in fig. 6, and the pulse control signal received by the gate of the ninth switching tube Q9 is the waveform C9 in fig. 6.
The first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5, the sixth switching tube Q6, the seventh switching tube Q7, the eighth switching tube Q8 and the ninth switching tube Q9 are all NMOS tubes or PMOS tubes.
The foregoing description of the preferred embodiments of the present application is not intended to limit the scope of the application, in which any feature disclosed in this specification (including abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. That is, each feature is one example only of a generic series of equivalent or similar features, unless expressly stated otherwise.
Claims (10)
1. A method of generating a steady current, comprising:
in N time periods, based on a preset mapping table, N paths of driving currents are respectively transmitted to corresponding paths in N paths in each branch according to time periods; the mapping table comprises a corresponding relation between each time period and a passage conveyed by the driving current; and, each path of driving current corresponds to a mapping table;
and superposing the currents of all the paths in each branch circuit in N time periods to generate the stable current corresponding to each branch circuit.
2. The method for generating a steady current according to claim 1, characterized in that: and N time periods are all set at equal time length.
3. The method for generating a stable current according to claim 1, wherein the preset mapping table specifically includes:
generating a pulse control signal for each path in each branch;
a map of each path of drive current is generated based on the pulse control signals of all paths.
4. A method of generating a stabilizing current according to claim 3, wherein: the generating the pulse control signal of each path in each branch specifically comprises the following steps:
generating a period of a pulse control signal according to the total duration of the N time periods;
dividing each period into N subcycles consistent with the number of the paths;
generating an initial phase of a pulse control signal corresponding to each path according to the starting moment of each subcycle;
presetting the duty ratio of a pulse control signal corresponding to each branch;
the pulse control signal for each path is generated based on the period, the initial phase, and the duty cycle.
5. A method of generating a stabilizing current according to claim 2, wherein: the step of superposing the currents of all the paths in each branch circuit in N time periods to generate the stable current corresponding to each branch circuit specifically comprises the following steps:
obtaining the corresponding relation between all paths in each branch and N paths of driving currents according to all mapping tables;
calculating the channel current of each channel in each branch in N time periods according to the corresponding relation between all channels in each branch and the driving current;
and superposing the channel currents of all channels in each branch circuit to generate the stable current corresponding to each branch circuit.
6. A method for generating an RGB stable current, comprising:
dividing each refresh period into three time periods;
in a first time period, transporting a first driving current to a first path of an R branch, transporting a second driving current to a first path of a G branch, and transporting a third driving current to a first path of a B branch;
in a second time period, the first driving current is conveyed to a second path of the B branch, the second driving current is conveyed to a second path of the R branch, and the third driving current is conveyed to a second path of the G branch;
in a third time period, the first driving current is transported to a third path of the G branch, the second driving current is transported to a third path of the B branch, and the third driving current is transported to a third path of the R branch;
and superposing the currents of the first passage, the second passage and the third passage of the R branch to generate a stable current of the R branch, superposing the currents of the first passage, the second passage and the third passage of the G branch to generate a stable current of the G branch, and superposing the currents of the first passage, the second passage and the third passage of the B branch to generate a stable current of the B branch.
7. A stabilizing current generating circuit, comprising:
a control unit (2) for respectively transmitting N paths of driving currents to corresponding paths of N paths in each branch according to time periods based on a preset mapping table in N time periods; the mapping table comprises a corresponding relation between each time period and a passage conveyed by the driving current; and, each path of driving current corresponds to a mapping table;
and the driving unit (3) is connected with the control unit (2) and is used for superposing the currents of all the paths in each branch in N time periods to generate stable currents corresponding to each branch.
8. The stabilizing current generating circuit according to claim 7, wherein: the driving unit (3) comprises a plurality of groups of driving sub-circuits, and the driving sub-circuits are used for generating currents of all paths based on pulse control signals and driving currents; and superposing the currents of all the paths in the branch circuits to obtain the stable current of the corresponding branch circuit.
9. The stable current generation circuit according to claim 7, applied to current driving of RGB, characterized in that: the driving unit (3) comprises a first driving sub-circuit (31), a second driving sub-circuit (32) and a third driving sub-circuit (33); the first driving sub-circuit (31), the second driving sub-circuit (32) and the third driving sub-circuit (33) comprise a control end, a first driving end, a second driving end, a third driving end and a channel connecting end;
the first driving sub-circuit (31) is characterized in that a control end is connected with the control unit (2), a channel connecting end is connected with the R channel, a first driving end is connected with a first reference current end, a second driving end is connected with a second reference current end, and a third driving end is connected with a third reference current end;
the second driving sub-circuit (32) is characterized in that a control end is connected with the control unit (2), a channel connecting end is connected with the G channel, a first driving end is connected with a second reference current end, a second driving end is connected with a third reference current end, and the third driving end is connected with the first reference current end;
the control end of the third driving sub-circuit (33) is connected with the control unit (2), the channel connecting end is connected with the B channel, the first driving end is connected with the third reference current end, the second driving end is connected with the first reference current end, and the third driving end is connected with the second reference current end;
the first reference current end is used for outputting a first driving current, the second reference current end is used for outputting a second driving current, and the third reference current end is used for outputting a third driving current.
10. The stabilizing current generating circuit according to claim 9, wherein: the first driving sub-circuit (31) comprises a first switching tube Q1, a second switching tube Q2 and a third switching tube Q3, drain electrodes of the first switching tube Q1, the second switching tube Q2 and the third switching tube Q3 are all connected with an R channel, and a grid electrode is connected with a control end; the source electrode of the first switching tube Q1 is connected with the first driving end of the first driving sub-circuit (31), the source electrode of the second switching tube Q2 is connected with the second driving end of the first driving sub-circuit (31), and the source electrode of the third switching tube Q3 is connected with the third driving end of the first driving sub-circuit (31);
the second driving sub-circuit (32) comprises a fourth switching tube Q4, a fifth switching tube Q5 and a sixth switching tube Q6, drain electrodes of the fourth switching tube Q4, the fifth switching tube Q5 and the sixth switching tube Q6 are all connected with the G channel, and a grid electrode is connected with the control end; the source electrode of the fourth switching tube Q4 is connected with the first driving end of the second driving sub-circuit (32), the source electrode of the fifth switching tube Q5 is connected with the second driving end of the second driving sub-circuit (32), and the source electrode of the sixth switching tube Q6 is connected with the third driving end of the second driving sub-circuit (32);
the third driving sub-circuit (33) comprises a seventh switching tube Q7, an eighth switching tube Q8 and a ninth switching tube Q9, drain electrodes of the seventh switching tube Q7, the eighth switching tube Q8 and the ninth switching tube Q9 are all connected with the B channel, and a grid electrode is connected with the control end; the source electrode of the seventh switching tube Q7 is connected to the first driving end of the third driving sub-circuit (33), the source electrode of the eighth switching tube Q8 is connected to the second driving end of the third driving sub-circuit (33), and the source electrode of the ninth switching tube Q9 is connected to the third driving end of the third driving sub-circuit (33).
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