CN116094995A - Label processing method, system, device and computer storage medium - Google Patents

Label processing method, system, device and computer storage medium Download PDF

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CN116094995A
CN116094995A CN202111323419.7A CN202111323419A CN116094995A CN 116094995 A CN116094995 A CN 116094995A CN 202111323419 A CN202111323419 A CN 202111323419A CN 116094995 A CN116094995 A CN 116094995A
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node
label
sum
converged
network
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汤庆坤
刘毅
陆钱春
严峰
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ZTE Corp
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ZTE Corp
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Priority to PCT/CN2022/110686 priority patent/WO2023077894A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/18Loop-free operations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/28Routing or path finding of packets in data switching networks using route fault recovery
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/34Source routing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/50Routing or path finding of packets in data switching networks using label swapping, e.g. multi-protocol label switch [MPLS]

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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Abstract

The invention discloses a label processing method, a label processing system and a label processing device, wherein the label processing method comprises the following steps: when a network fails, determining a node to be converged and a shortest path after convergence of the node to be converged, sequentially setting nodes in the shortest path after convergence as intermediate nodes from child nodes of the node to be converged, setting the node to be converged as a first node, and judging whether the intermediate nodes meet a loop-free condition; when satisfied, replacing the label of the parent node of the intermediate node in the label set with the label of the intermediate node, or replacing the adjacent label from the parent node of the intermediate node to the intermediate node in the label set; otherwise, adding the adjacency label from the father node of the intermediate node to the label set, and changing the first node into the father node of the intermediate node; outputting the adjusted label set. The invention can ensure that the micro-ring phenomenon can not occur in the network in the convergence process, and can optimize the number of the labels in the label set, thereby reducing the stack depth of the label stack generated according to the label set and further meeting the constraint of MSD.

Description

Label processing method, system, device and computer storage medium
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a tag processing method, a system, an apparatus, and a computer storage medium.
Background
The micro-loop is needed to be avoided to the greatest extent when the route converges, and is derived from inconsistent convergence conditions of all nodes to be converged in the network. While the solutions presented in the prior art are sequences specifying convergence, although the micro-ring problem can be solved to some extent by specifying the sequence of convergence, the drawbacks of this solution are also quite obvious: 1. since the nodes to be converged are converged one by one according to the prescribed convergence sequence, the next node to be converged cannot be converged before the last node to be converged is not converged, so that the actual convergence time is prolonged, and the convergence process is more complicated than the original one.
Segment Routing (SR) is a novel MPLS technology, where a control plane is implemented based on IGP Routing protocol extensions, a forwarding plane is implemented based on an MPLS forwarding network, and a corresponding Segment identifier appears as a label at the forwarding plane. SR-TE (SR Traffic Engineering) is a novel MPLS tunneling technology using SR as control signaling, SDN controller is responsible for calculating the forwarding path of the tunnel, and issuing the label stack list corresponding to the path to the forwarding device of the entering node, and the forwarding device sequentially carries out route forwarding according to the label stack list.
Although the problem of the convergence scheme according to the convergence sequence in the prior art can be solved by applying the SR technique or the SR-TE technique to the network to allow each node to be converged to calculate the label stack of the full adjacent Segment Identifier (SID) concurrently, the forwarding device produced by each large communication equipment manufacturer has a limit on the deep support degree of the label stack list stack, that is, when the stack depth exceeds MSD (Maximum Stack Depth), the forwarding device fails, which affects the SR technique and the SR-TE popularization to a great extent, so that a new label processing method needs to be designed to solve the problem by utilizing the characteristics of the SR technique.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The embodiment of the invention provides a label processing method, a system, a device and a computer storage medium, which can ensure that a micro-ring phenomenon can not occur in a network in a convergence process, and can optimize the number of labels in a label set, thereby reducing the stack depth of a label stack generated according to the label set and further meeting the constraint of MSD.
In a first aspect, an embodiment of the present invention provides a label processing method, which is applied to a network in a segment routing scenario, where the processing method includes:
When the network fails, determining a node to be converged and a converged shortest path obtained after the node to be converged is re-converged;
starting from the child node of the node to be converged, sequentially setting the node in the shortest path after convergence as an intermediate node, setting the node to be converged as a first node, and judging whether the intermediate node meets a loop-free condition;
when the intermediate node meets the loop-free condition, replacing the node label of the father node of the intermediate node in the label set with the node label of the intermediate node, or replacing the adjacent label from the father node of the intermediate node to the intermediate node in the label set;
when the intermediate node does not meet the loop-free condition, adding an adjacency tag from a parent node of the intermediate node to the tag set, and assigning the parent node of the intermediate node as a first node;
outputting the adjusted tag set;
the loop-free condition is that the sum of overheads after convergence is smaller than the sum of overheads before convergence, the sum of overheads before convergence is the sum of minimum overheads of the first node reaching the intermediate node through a fault link, and the sum of overheads after convergence is the sum of minimum overheads of the first node reaching the intermediate node.
In a second aspect, an embodiment of the present invention provides a label processing system, applied to a network in a segment routing scenario, including:
the fault identification and transmission unit is used for identifying and transmitting information of node faults and link faults in the network;
the computing unit is used for computing the shortest path from the current node to the destination node;
a label processing unit, which executes the label processing method according to the first aspect according to the fault recognition and transmission unit and the road calculation unit;
the backup unit is used for backing up the information in the links and nodes where the network fails;
and the label switching path processing unit forwards the information in the backup unit according to the label set obtained by the label processing unit.
In a third aspect, an embodiment of the present invention provides a tag processing apparatus, applied to a network in a segment routing scenario, including at least one processor and a memory communicatively connected to the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the tag processing method of the first aspect.
In a fourth aspect, embodiments of the present invention further provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform the tag processing method according to the first aspect.
The label processing method provided by the embodiment of the invention has at least the following beneficial effects:
when the network fails, determining a node to be converged and a converged shortest path obtained after the node to be converged is re-converged, then starting from a child node of the node to be converged, sequentially setting a node in the converged shortest path as an intermediate node, setting the node to be converged as a first node, and judging whether the intermediate node meets a loop-free condition; the loop-free condition is that the sum of overheads after convergence is smaller than the sum of overheads before convergence, the sum of overheads before convergence is the sum of the minimum overheads of the first node reaching the intermediate node through a fault link, and the sum of overheads after convergence is the sum of the minimum overheads of the first node reaching the intermediate node;
when the intermediate node meets the loop-free condition, replacing the node label of the father node of the intermediate node in the label set with the node label of the intermediate node, or replacing the adjacent label from the father node of the intermediate node to the intermediate node in the label set;
When the intermediate node does not meet the loop-free condition, adding an adjacency tag from a parent node of the intermediate node to the tag set, and assigning the parent node of the intermediate node as a first node;
outputting the adjusted tag set;
the intermediate node meets the loop-free condition, the node label of the father node in the label set is replaced by the node label of the intermediate node, or the adjacent label from the father node in the label set to the intermediate node is replaced so as to optimize the label number in the label set, when the intermediate node does not meet the loop-free condition, the father node in the intermediate node to the adjacent label in the intermediate node is added to the label set so as to ensure that the calculated label set does not generate a micro-ring phenomenon in a network, therefore, the label processing method provided by the embodiment of the invention can ensure that the micro-ring phenomenon does not occur in the network in the convergence process, and simultaneously can optimize the label number in the label set, thereby reducing the stack depth of a label stack generated according to the label set so as to meet the constraint of MSD.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate and do not limit the invention.
FIG. 1 is an overall method flow diagram of a tag processing method provided by one embodiment of the present invention;
FIG. 2 is a network failure diagram provided by one embodiment of the present invention;
FIG. 3 is a flow chart of a process provided by one embodiment of the present invention prior to determining a loop-free condition;
FIG. 4 is a shortest path tree with a node to be converged as a root node provided by one embodiment of the present invention;
FIG. 5 is a diagram of an asymmetry of the costs provided by an embodiment of the present invention;
FIG. 6 is a shortest path tree that protects nodes as root nodes provided by one embodiment of the present invention;
FIG. 7 is another method for finding a sum of pre-convergence overheads provided by one embodiment of the invention;
FIG. 8 is a flow chart of a process for when a link cost reduction failure occurs in accordance with one embodiment of the present invention;
FIG. 9 is a schematic diagram of a functional module of a tag processing system according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a label processing apparatus according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The micro-loop is needed to be avoided to the greatest extent when the route converges, and is derived from inconsistent convergence conditions of all nodes to be converged in the network. While the solutions presented in the prior art are sequences specifying convergence, although the micro-ring problem can be solved to some extent by specifying the sequence of convergence, the drawbacks of this solution are also quite obvious: 1. since the nodes to be converged are converged one by one according to the prescribed convergence sequence, the next node to be converged cannot be converged before the last node to be converged is completed, so that the actual convergence time is prolonged, and the convergence process is more complicated than the original one.
Segment Routing (SR) is a novel MPLS technology, where a control plane is implemented based on IGP Routing protocol extensions, a forwarding plane is implemented based on an MPLS forwarding network, and a corresponding Segment identifier appears as a label at the forwarding plane. SR-TE (SR Traffic Engineering) is a novel MPLS tunneling technology using SR as control signaling, SDN controller is responsible for calculating the forwarding path of the tunnel, and issuing the label stack list corresponding to the path to the forwarding device of the entering node, and the forwarding device sequentially carries out route forwarding according to the label stack list.
Although the problem of the scheme of converging according to the convergence sequence in the prior art can be solved by applying the SR technique or the SR-TE technique to the network to let each node to be converged calculate the tag set of the full adjacent Segment Identifier (SID) concurrently, the forwarding device produced by each large communication equipment manufacturer has a limit on the deep support degree of the tag stack list stack, that is, when the stack depth exceeds MSD (Maximum Stack Depth), the routing forwarding fails, which affects the SR technique and the SR-TE popularization to a great extent, so that a new tag processing method needs to be designed to solve the problem by utilizing the characteristics of the SR technique.
Based on the above, the embodiment of the invention provides a label processing method, which can ensure that no micro-ring phenomenon occurs in a network in the convergence process, and can optimize the number of labels in a label set, thereby reducing the stack depth of a label stack generated according to the label set and further meeting the constraint of MSD.
Referring to fig. 2, in the segment routing technology, labels in a label stack may be divided into a node label and an adjacent label, the node label is used to label the node, the adjacent label is used to label the link, and for better understanding of the present invention, the distinction between the node label and the adjacent label is described below by way of example, for example, assuming that the labels from the top to the bottom of the stack in the label stack from node 0 to node 9 in fig. 2 are {4,4-8,8-9}, it should be noted that the present invention does not limit the format of the labels in the label stack, but for better understanding of the present invention, the corresponding node 4 is denoted by 4 and the corresponding link 4-8 is denoted by 4-8. The forwarding process of the label stack is that the label reaches the node 0, the node 0 searches the shortest path for forwarding according to the label of the label 4, and the shortest path only has a link from 0 to 4 so as to forward through the link, and then the label 4 is popped up; when the node 4 arrives, the node 4 forwards the adjacent label with the label of 4-8 to the node 8 through the link 4-8, and then pops up the label of 4-8; when the node 8 arrives, the node 8 forwards the note to the node 9 through the link 8-9 according to the note 8-9, and then pops up the tag 8-9; it should be noted that, in the foregoing forwarding process from node 0 to node 9, if the adjacency labels 4-8 and 8-9 in the label stack are replaced with node label 9, there are two shortest paths, i.e., 4-5-9 and 4-8-9, between node 4 and node 9, so node 4 can arbitrarily select one path for forwarding between these two paths, which is different between the node label and the adjacency label, if the forwarding device looks up the label in the label stack as the node label, forwarding is performed according to its shortest path to the node, i.e., node 0 is forwarded to node 4, and if the forwarding device looks up the label in the label stack as the adjacency label, the link corresponding to the adjacency label is searched for forwarding, and the foregoing relationship between the foregoing differences and the processing method of the label of the present invention will be analyzed in detail below, which is only to point out the differences between the node label and the adjacency label in the network forwarding process.
With continued reference to fig. 2, each link in fig. 2 has a cost of 1, as shown in fig. 2, where links 0-1 and 4-5 fail, and the shortest path for node 0 to node 5 passes through the failed link, where the failed link refers to an unavailable network link, may include a failure of the link itself, or a failure of a next-hop node connected to the link, and may include an artificially configured link or node unavailability. Node 0 is the node to be converged, and the shortest path from the node to be converged to the destination node is defined as passing through the fault link, so that node 0 is converged, and in order to avoid micro-loops, a method can be adopted to define the convergence sequence and calculate a label set of all-adjacent labels. Although the convergence sequence is defined to enable the nodes to be converged in sequence, so as to avoid micro-loop phenomenon caused by inconsistent convergence conditions, it is conceivable that each node to be converged in sequence is not converged, the last node to be converged is not converged, the next node to be converged cannot be converged, the convergence time is increased, the complexity of the convergence processing procedure is increased, a label set of all-adjacent-segment labels is calculated, as in the embodiment, the label set of all-leader-segment labels to the node 5 is calculated by the node 0, it is worth mentioning that the label set is the label on the shortest path from the node 0 to the node 5, the definition of the shortest path is the path overhead and the minimum path from the node to the destination node, and the label set is {0-4,4-8,8-9,9-5}, then, a label stack {0-4,4-8,8-9,9-5} is generated according to the label set, although the stack depth of the label stack is not large in this embodiment, the label stack is switched into an actual network, if the stack depth in the label stack is too large to exceed the MSD due to too many links connected between devices, the MSD is the maximum depth of the forwarding stack that can be supported by the devices, and after that, the label stack cannot be forwarded by the route, so that the forwarding failure of the route is caused, and it can be understood that too large a depth of the label stack not only affects the forwarding capability of the route but also occupies the memory of the route, so that although the above two solutions for preventing micro-loops can avoid micro-loops to a certain extent, there is still a large defect, and the proposed object of the present invention is to optimize the above solutions.
Specifically, referring to fig. 1, an embodiment of the present invention provides a label processing method applied to a network in a segment routing scenario, where the processing method includes, but is not limited to, the following steps S100, S200, S300, S400, and S500.
Step S100, when a network fails, determining a node to be converged and a shortest path after convergence obtained after the node to be converged re-converged;
step S200, starting from the child node of the node to be converged, sequentially setting the node in the shortest path after convergence as an intermediate node, setting the node to be converged as a first node, and judging whether the intermediate node meets a loop-free condition;
step S300, the intermediate node meets the loop-free condition, and the node label of the father node of the intermediate node in the label set is replaced by the node label of the intermediate node, or the adjacent label from the father node of the intermediate node to the intermediate node in the label set is replaced;
step S400, the intermediate node does not meet the loop-free condition, the adjacency label from the father node of the intermediate node to the intermediate node is added to the label set, and the father node of the intermediate node is assigned as a first node;
step S500, outputting the adjusted label set;
the loop-free condition in step S200 is that the sum of overheads after convergence is smaller than the sum of overheads before convergence, which is the sum of the minimum overheads of the first node before convergence to the intermediate node through the failed link, and the sum of overheads after convergence is the sum of the minimum overheads of the first node to the intermediate node.
Further, the embodiment of the invention is applied to a network under a segmented routing scene, the segmented routing technology is a novel MPLS technology, the MPLS technology has the advantages that the label can be used for guiding the routing to forward, the label can be used for specifically explaining the node or the link to be converged, when a message is forwarded to the routing, the routing can be directly forwarded according to the label without extracting an IP address in the message and forwarding the message again, the forwarding efficiency of the routing can be effectively improved, the segmented routing technology has the advantages that the network micro-ring problem after the network fails can be better processed on the basis of the MPLS technology, the segmented routing technology can enable each node to be converged to independently and concurrently calculate the optimal label set after the network fails, so that the specific regulation of the node sequence of the node to be converged is not needed after the network fails, and the convergence time and the convergence complexity can be reduced on the basis of no loop of the network are avoided.
It may be understood that, to recover the network with the failure and to prevent the micro-ring phenomenon during the recovery process, the first step should be to obtain the node to be converged that needs to be converged due to the failure and the shortest path after convergence after the node to be converged is reconverged, where the shortest path after convergence is confirmed to be the node to be processed, so the embodiment of the present invention performs step S100 first.
After obtaining the node to be converged and the shortest paths after convergence, it is worth mentioning that if the shortest paths after convergence have equivalent paths, one of the shortest paths after convergence is randomly selected, wherein the equivalent paths are paths of the same cost from the node to the destination node, and one shortest path after convergence is selected, if a label set of all adjacent labels is generated according to the shortest paths according to the prior art, but the problem that the stack depth of the label stack generated according to the label set cannot meet the constraint of MSD is caused, so that the invention performs optimization processing on the label number in the processing process based on the problem.
The invention optimizes the label to further optimize the label quantity under the condition of ensuring no loop, so that in the step of optimizing the label, whether the processed label path meets the condition of no loop is judged, and it can be understood that the first step of optimizing the label quantity is to obtain the label to be processed: and starting from the child node of the node to be converged, sequentially setting the node in the shortest path after convergence as an intermediate node. The node to be converged and the intermediate node are both on the shortest path after convergence obtained in step S100, and the parent-child relationship between the nodes is derived from the shortest path after convergence in step S100, so that after the label to be processed is found, the label to be processed is optimized, that is, the number of labels is simply compressed.
The existing SR technology has the disadvantage that the number of the obtained adjacent labels is too large, and to solve the problem, the difference between the adjacent labels and the node labels needs to be considered, and the difference between the adjacent labels and the node labels can be obtained according to the above, referring to fig. 2, the label stacks from node 0 to node 5 can be {8,8-9,9-5}, the basis of the processing is that the micro-ring phenomenon is not generated from node 0 to node 8, and the forwarding process of the label stacks from node 0 to node 8 is as follows: the shortest path of the node 0 found by forwarding according to the label 8 is 0-4-8, so the shortest path of the node 8 found by forwarding according to the label 8 is 4-8, so the node 4 is forwarded to the node 8 by forwarding according to the label 8, and the label stack of the node 0 to the node 5 is not directly compressed to {5}, because if the node 0 is converged first, the node 8 is not converged, the convergence capacity of the node 0 is different from the convergence capacity of the node 8, and it is understood that the convergence capacity of the node 0 is stronger than the convergence capacity of the node 8, and the convergence of the nodes to be converged in the network adopting the segment routing technology is concurrent, but because the convergence capacities between devices are different, the convergence is completed successively, and the calculation method of the full adjacency label can not appear, but the deep problem of the stack calculation method of the full adjacency label cannot be effectively solved, so the label optimization processing step of the present invention is not solved, and if the node 8 is not converged, and the node 8 is not converged according to the shortest, the shortest path is calculated from the node 8, and the node 8 is closest to the node 5 if the node 8 is forwarded to the old node 5: 8-4-5 and 8-9-5, the former of which is chosen, and node 4 has knowledge that the link of 4-5 has failed and cannot pass, will send this information back to node 8 in the shortest path 4-8-9-5 it considers to be to node 5, and thus a micro-loop phenomenon will occur between node 4 and node 8, so that the label stacks of nodes 0 to 5 cannot be directly compressed to {5}.
After discussing the principle of performing label optimization according to the difference between the adjacency label and the node label in the network forwarding process, for further understanding the present invention, the following explains the loop-free condition in step S100: the post-convergence overhead sum is less than the pre-convergence overhead sum. For example, in the above example, the node to be converged is node 0, the sum of the overheads after convergence of node 0 to node 4, i.e., the sum of the overheads of the shortest paths after convergence, is 1, and the sum of the overheads before convergence of node 0 to node 4 through the failed link 0-1 is equal to 3, the sum of the overheads before convergence of node 0 to node 4 through the failed link 4-5 is also 3, and the label stack of node 0 to node 5 can be {4,4-8,8-9,9-5}, because of 1<3; the same is true of the following judgment, the sum of the overheads after the node 0 reaches the node 8 is 2, the shortest path before the node 0 reaches the node 8 through the fault link 0-1 is 0-1-5-4-8 or 0-1-5-9-8, the sum of the overheads is 4, the shortest path before the node 0 reaches the node 8 through the fault link 4-5 is 0-4-5-9-8, the sum of the overheads is also 4, and the label stacks from the node 0 to the node 5 can be {8,8-9,9-5}, because of 2<4; it will be appreciated that the sum of the overheads of the shortest paths after convergence from node 0 to node 9 is 3, while the shortest paths before convergence from node 0 to node 9 through failed link 0-1 are 0-1-5-9, the sum of overheads is 3, the shortest paths before convergence from node 0 to node 9 through failed link 4-5 are 0-4-5-9, the sum of overheads is 3, and there is one shortest path before convergence that is also 3: 0-4-8-9, since 3=3, the label stack that node 0 reaches node 5 cannot be {9,9-5}, but should be {8,8-9,9-5}; it will be further appreciated that one of the purposes of the present invention to devise this loop-free condition is to prevent mishandling of the case where there are one or more equivalent paths to intermediate nodes in the network before convergence for the first node and the equivalent paths pass through the failed link, resulting in a micro-ring phenomenon.
The foregoing discussion is a label optimization principle and loop-free condition of an embodiment of the present invention, and the present invention is further explained below by way of example of step S300 and step S400, for example, referring to fig. 2, the cost of each link in fig. 2 is 1, as shown in fig. 2, the link 0-1 and the link 4-5 fail, the node 0 is a node to be converged, the label set from the node 0 to the node 5 is { }, the intermediate node is the node 4, the first node is the node 0, and then it is determined whether the loop-free condition is satisfied, that is
Metric new (K,M)<Metric old (K,Y i )+Metric old (Y i ,M),
Wherein Metric represents the sum of the overhead of the shortest path between two nodes, subscript old represents the result in the original network, new represents the result after the network has changed, K represents the first node, M represents the intermediate node, Y i Indicating nodes in the fault link, and the subscript i indicates the number of the corresponding fault link, wherein the result of the first judgment is as follows:
Metric new (0,4)<Metric old (0,1)+Metric old (1,4),
Metric new (0,4)<Metric old (0,5)+Metric old (5,4),
according to the first judging result, the label set from the node 0 to the node 5 is {4}, then K is unchanged, and M is 8; and continuing to execute the processing steps, wherein the result of the second judgment:
Metric new (0,8)<Metric old (0,1)+Metric old (1,8),
Metric new (0,8)<Metric old (0,5)+Metric old (5,8),
according to the result of the second judgment, the label set from the node 0 to the node 5 is {8}, namely M is used for replacing the last intermediate node 4, then K is unchanged, and M is 9; continuing, and judging the result of the third time:
Metric new (0,9)=Metric old (0,1)+Metric old (1,9),
Metric new (0,9)=Metric old (0,5)+Metric old (5,9),
The loop-free condition is not satisfied, so according to the result of the third judgment, the label set from node 0 to node 5 is {8,8-9}, i.e., the parent node to M adjacent label to which M is added, then K becomes 8, and M becomes 5; continuing, the result of the fourth judgment:
Metric new (8,5)<Metric old (8,1)+Metric old (1,5),
Metric new (8,5)=Metric old (8,5)+Metric old (5,5),
the loop-free condition is not satisfied, so that the label set from node 0 to node 5 is {8,8-9,9-5}; the nodes on the shortest path after convergence are processed, so that the final label set is {8,8-9,9-5}, and it can be understood that the number of labels in the label set calculated by the embodiment of the invention is smaller than that of labels in the label set calculated by the original segment routing technology, and the number of labels is further optimized on the basis that the original segment routing technology ensures that no micro-loop appears after the network is converged.
It should be noted that in the above-described embodiment, there are some special cases in processing the label set from the node to be converged to the destination node, for example, referring to fig. 2, the shortest path from node 0 to node 4 is not affected by two failed links, and the shortest path from node 0 to node 8: 0-4-8 is also not affected by two failed links, i.e., the shortest paths from node 0 to node 4, node 8 are unchanged before and after convergence, and the shortest paths from node 0 to node 9 are: 0-4-8-9, 0-1-5-9 and 0-4-5-9, after convergence, the two shortest paths are eliminated for 0-4-8-9, and are affected by the parts of two failed links, and in the same way, the shortest paths from node 0 to node 5 are: 0-4-5 and 0-1-5, after convergence: 0-4-8-9-5, the shortest path is completely changed and is therefore completely affected by the failed link 4-5 and a portion of the failed link 0-1. With reference to the processing procedure of the above embodiment, it can be found that the loop-free condition is satisfied between the nodes 0 to 4 and between the nodes 0 to 8, and the shortest path between the nodes 0 to 4 or 8 is not changed before and after convergence, so that the Metric new (K,M)<Metric old (K,Y i )+Metric old (Y i M) will hold: since the shortest path in the K-to-M pre-convergence network does not pass through the failed link, the overhead and Metric of the shortest path through the failed link to M in the pre-convergence network old (K,Y i )+Metric old (Y i M) must be greater than Metric new (K,M)=Metric old (K,M)。
Further, in the above-described case, if the above-described loop-free condition determination is also performed on the node 0 to the node 4 or the node 8, the time for network convergence increases, but if the general loop-free condition determination is not performed, a micro-ring phenomenon may occur when the similar condition of the node 0 to the node 5 or the node 0 to the node 9 is handled, and it is conceivable that in the above-described analysis, there are three kinds of the degree of influence of the shortest path to be converged by the failed link, the first kind is the case of the node 4 or the node 8, that is, before and after convergence, the shortest path to be converged by the node 4 or the node 8 does not change, the second kind is the case of the node 9, the influence of the part of the shortest path to the failed link 0-1 by the node 0 to the node 9 becomes 0 to 4 to 8 to 9 and 0 to 4 to 5 to 9, the influence of the part of the failed link 4 to 5 by the failed link becomes 0 to 4 to 8 to 9, and the third kind is the case of the shortest path to the node 5 by the failed link 4 to 5 by the failed link 5, that the shortest path to the node 5 by the failed link 5 is affected by the node 5 to the failed link 4 to 5 to the node 5.
In order to distinguish the three conditions of the influence degree of the fault link, the invention introduces the concept of a state quantity value, wherein the state quantity value represents the influence degree of the fault link on the current node, and the state quantity value can be represented by one of a first type of state quantity value, a second type of state quantity value and a third type of state quantity value; the first state quantity value is used for expressing that the shortest path from the node to be converged to the current node is not influenced by a fault link; the second class state value is used for expressing that the shortest path from the node to be converged to the current node is partially influenced by the fault link; the third class of state values is used to express that the shortest path from the node to be converged to the current node is completely affected by the failed link. It may be understood that the shortest path from the node to be converged to the node to be converged is not affected by the failed link, so the state value of the node to be converged is the first state value, and this may also result in the loop-free condition in step S200 of the present invention further includes: the state magnitude of the node to be converged is the same as the state magnitude of the intermediate node.
Specifically, if the number of bits of the state quantity value is 1 bit, only two cases can be distinguished in the computer language, and if the number of bits of the state quantity value is 2 bits, four cases can be distinguished in the computer language, since the state quantity value of the present invention has three values, the state quantity value can be set to be 2 bits, it should be noted that the present invention is not limited to the number of bits of the state quantity, the number of bits of the state quantity can be 3 bits or other reasonable number of bits, and the following step of obtaining the state quantity value of the node on the shortest path after convergence of the present invention is illustrated with reference to fig. 3:
Step S610: constructing a first shortest path tree in the network before convergence by taking the node to be converged as a root node;
step S620: initializing a state quantity value of a node to be converged into a first type of state quantity value and initializing a state quantity value of a protection node into a third type of state quantity value, wherein the protection node is a node in a fault link, and the state quantity value comprises a first bit and a second bit;
step S630: selecting all father nodes of the current node on the converged shortest path on the first shortest path tree as a father node set;
step S640: sequentially performing OR operation on the first bit of the father node in the father node set to obtain the first bit of the current node;
step S650: and performing AND operation on the second bits of the father nodes in the father node set in sequence to obtain the second bits of the current node.
In one embodiment of the present invention, the state value is set to (x i ,y i ) Where i denotes the number of the corresponding current node, x is the first bit, y is the second bit, then the first state value is (1, 1), the second state value is (1, 0), the third state value is (0, 0), and according to the set state values, referring to fig. 2, a first shortest path tree in the pre-convergence network using the node to be converged 0 as the root node as shown in fig. 4 is created first, the state value of the node to be converged is initialized to (1, 1), the state value of the protection node 5 is (0, 0), and the nodes are selected because the shortest path to the protection node 5 is completely affected by the failed links 4-5 4 as a father node set, sequentially performing OR operation on the first bit of the father node 0 in the father node set to obtain a first bit 1 of the current node 4, sequentially performing AND operation on the second bit of the father node 0 in the father node set to obtain a second bit 1 of the current node 4, wherein the state magnitude values of the node 8 and the node 1 are also obtained as (1, 1) in the same way, and the state magnitude value obtaining process of the node 9 is as follows: because the parent node is concentrated with the node 8 and the node 5, the first bit is 1|0 and 1, and the second bit is 1&&0 is 0, then the state magnitude of node 9 is (1, 0). When all the state values are obtained, it can be understood that when judging whether the intermediate node satisfies the loop-free condition, the state value of the intermediate node may be judged first, and when the state value is (1, 1), the step after satisfying the loop-free condition in step S300 is directly performed, however, the step of obtaining the state value of each node under the faulty link 4-5 is obtained in this embodiment, and the step of obtaining the state value of the faulty link 0-1 is the same, and is not repeated, however, it is noted that when judging the loop-free condition in the case of multiple faults, the loop-free condition in the case of multiple faulty links of the intermediate node to be judged is satisfied, as in this embodiment, the state value of the node 1 corresponding to the faulty link 4-5 is (1, 1), but the state value of the node 1 corresponding to the faulty link 0-1 is (0, 0), so that the overhead sum after judging that the node 1 converges is less than the sum of the overhead before the convergence, and the overhead sum indicates that the overhead before the convergence is the sum of the overhead of the first node 1 and the overhead of the first node 1 to the latest node 1.
It will be appreciated that in one embodiment of the invention, the sum of post-convergence overheads may be calculated from the post-convergence shortest path tree:
Metric new (K,M)=Metric new (S,M)-Metric new (S,K),
wherein S is a node to be converged, K is a first node, M is an intermediate node, and Metric new (0,4)=Metric new (0,4)-Metric new (0, 0) =1-0=1, and the sum of the overheads before convergence is equal to the sum of the first overheads plus the sum of the second overheads, the sum of the first overheads being the first node to protection in the network before convergenceThe minimum overhead sum of nodes, the second overhead sum being the minimum overhead sum of protecting nodes to intermediate nodes in the pre-convergence network, i.e., the pre-convergence overhead sum is equal to Metric old (K,Y i )+Metric old (Y i M), wherein Y i To protect the node, here, metric old (Y i M) may be derived from the first shortest path tree of the node to be converged:
Metric old (Y i ,M)=Metric old (S,M)-Metric old (S,Y i ),
metric (Metric) old (K,Y i ) Can be protected from node Y i Obtained from the second shortest path tree of (c).
Referring to fig. 5, it is conceivable that, although the costs of node a to node B and node B to node a should be the same in an ideal state, the costs may be asymmetric in an actual network or test scenario, as in fig. 5, the costs of node a to node B are 2, and the costs of node B to node a are 1, it is understood that the time required for calculating the first cost sum by using the shortest path tree in which the node to be converged is constructed as the root node is more than the time required for calculating the first cost sum by using the inverse shortest path tree in which the protection node is constructed as the root node, specifically, referring to fig. 4 and 6, the second shortest path tree which is the inverse shortest path tree generated by using the protection node 5 as the root node, it is required to take out the minimum cost sum of node 8 to node 5, as long as the node 5 is traversed directly to the sub-node 8, and the first shortest path tree generated forward by using the node to be converged is required to take out the cost sum of node 8 to node 5, then the first cost sum of node 8 is required to be traversed to node 8, and the first cost sum is required to be traversed by using the first shortest path tree 8 to be the root node 7, and the first cost sum is further processed by using the first path tree to be traversed to be the node 7, and the first cost sum is required to be traversed by the shortest path is improved, and the processing efficiency is further improved, and the processing step is further improved by referring to be constructed by the method to be improved:
Step S710, constructing a second shortest path tree in the network before convergence by taking the protection node as a root node, and stopping constructing the second shortest path tree after the hop count reaches a preset hop count threshold;
step S720, when the node on the second shortest path tree does not contain the first node, taking the sum of the minimum overheads from the protection node to the node with the hop count equal to the preset hop count threshold value on the second shortest path tree as a third overheads sum, otherwise, taking the sum of the minimum overheads from the protection node to the first node as the third overheads sum;
in step S730, the third overhead sum is taken as the first overhead sum, and the pre-convergence overhead sum is equal to the third overhead sum plus the second overhead sum.
It may be understood that the time for calculating the first overhead sum by using the shortest path tree constructed by the node to be converged as the root node is more than the time for calculating the first overhead sum by using the protection node as the root node, further, in order to improve the processing efficiency of the label processing method, a reasonable hop count threshold may be set, the generation of the second shortest path tree is stopped after the hop count reaches the preset hop count threshold, when the node on the second shortest path tree does not include the first node, the minimum overhead sum of the protection node to the node on the second shortest path tree, whose hop count is equal to the preset hop count threshold, is taken as the third overhead sum, otherwise, the minimum overhead sum of the protection node to the first node is taken as the third overhead sum, and then, because the third overhead sum is always less than or equal to the first overhead sum, and the third overhead sum is the actual value of the first overhead sum, so the equation about the loop-free condition may be enhanced as follows:
Figure BDA0003343507170000101
Wherein, the liquid crystal display device comprises a liquid crystal display device,
Figure BDA0003343507170000102
for representing the third overhead sum, and necessarily satisfying the original loop-free condition in case of satisfying the reinforced loop-free condition, the steps S710 to S730 are performed, so that the efficiency of the tag processing method of the present invention can be improved by reversing the advantages of the spanning tree and the set hop threshold, wherein the purpose of the set hop thresholdFirst, in order to neglect the influence of network expansion to a certain extent, for example, when the number of devices in the original network is 190, the threshold value is selected to be 16 hops, when the generated second shortest path tree does not contain the first node, the third overhead sum is the minimum overhead sum for protecting the node from the second shortest path tree to the node with the hop number of 16, and when the method is applied to the network with the number of devices of 400, the obtained third overhead sum is still the minimum overhead sum for protecting the node from the second shortest path tree to the node with the hop number of 16 because the hop number threshold value is still 16 hops. It should be noted that the present invention is not limited to the numerical range of the threshold value, and those skilled in the art can choose the threshold value according to the actual requirement.
It will be understood by those skilled in the art that the label processing method of the embodiment of the present invention may be applied to a case of a single-path or multiple-path fault, where the fault case may be divided into a link fault and a node fault, and the node fault may be understood as a fault of multiple paths of links connected to the node, and the case of multiple paths of faults has been analyzed previously, so that discussion will not be repeated, and the fault further includes a special case, that is, a link cost change fault, specifically, a link cost change fault may be understood as a link cost change, so as to cause a node in the network to begin to converge. Unlike a link failure, which is that the link cannot transmit a message, and a link cost change failure, which is that the link can also transmit a message, wherein the link cost change failure can be classified into a link cost increase failure and a link cost decrease failure, wherein a tag processing method for the link cost increase failure is the same as a tag processing method for the link failure, except for processing the link cost decrease failure. It is conceivable that the failure of the link cost reduction includes failure of node recovery, link recovery and link cost reduction to node convergence, wherein the failure of the link cost reduction to node convergence refers to that the link is still in communication, the link cost suddenly reduces, and thus the node in the network starts to converge, and the processing method of the label processing method of the embodiment of the present invention for the failure of the link cost reduction, referring to fig. 8, may be:
In step S810, in the case that the link from the parent node of the intermediate node to the intermediate node is a generalized overhead reduction link, the adjacency label of the parent node of the intermediate node to the intermediate node is added to the label set, the generalized overhead reduction link is a link that causes the node in the network to start converging and the link overhead is reduced or newly added to the network.
For example, referring to FIG. 2, if link 4-5 suddenly recovers, step S810 is performed before step S300 is performed in an embodiment of the present invention, and if link 4-5 is a generalized overhead reduction link, then the label set for node 0 to node 5 is {4,4-5}, by directly adding adjacency labels 4-5 to the label set.
Referring to fig. 9, the embodiment of the present invention further provides a processing system 100 of a label processing method, which is applied to a network in a segment routing scenario, where the label processing system includes: a failure recognition and transmission unit 110 for recognizing and transmitting information of node failure and link failure in the network; a computation unit 120, configured to compute a shortest path from the current node to the destination node; a tag processing unit 130 performing the foregoing tag processing method according to the fault recognition and transmission unit and the road calculation unit; a backup unit 140 for backing up information in links and nodes where a network fails; the label switching path processing unit 150 forwards the information in the backup unit 140 according to the label set obtained by the label processing unit 130.
In one embodiment of the present invention, the failure recognition and transmission unit 100 is IGP, the computation unit 120 is SPF, the backup unit 140 is FRR (Fast Reroute), and the label switched path processing unit 150 is LSPM (Label Switching Path Manage, label switched path processing).
Referring to fig. 10, the embodiment of the present invention further provides a processing apparatus of the tag processing method, including at least one processor and a memory for communicatively connecting with the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the tag processing method described above.
Further, referring to fig. 10, the control processor 1001 and the memory 1002 in the tag processing apparatus 1000 may be connected by a bus as an example. Memory 1002 is a non-transitory computer-readable storage medium that may be used to store non-transitory software programs as well as non-transitory computer-executable programs. In addition, the memory 1002 may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk memory, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 1002 may optionally include memory remotely located with respect to the control processor 1001, which may be connected to the optimizing apparatus 1000 of the virtual network via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It will be appreciated by those skilled in the art that the device structure shown in fig. 10 is not limiting of the label processing device 1000 and may include more or fewer components than shown, or certain components may be combined, or a different arrangement of components.
The embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions that are executed by one or more control processors, for example, by one control processor 1001 in fig. 10, which may cause the one or more control processors to perform the method of optimizing the virtual network in the method embodiment described above, for example, to perform the method steps S100 to S500 in fig. 1, the method steps S610 to S650 in fig. 3, the method steps S710 to S730 in fig. 7, and the method step S810 in fig. 8 described above.
The above described apparatus embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiments of the present application have been described in detail, the present application is not limited to the above embodiments, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present application, and these equivalent modifications and substitutions are intended to be included in the scope of the present application as defined in the appended claims.

Claims (11)

1. A label processing method applied to a network in a segment routing scenario, the processing method comprising: when the network fails, determining a node to be converged and a converged shortest path obtained after the node to be converged is re-converged;
starting from the child node of the node to be converged, sequentially setting the node in the shortest path after convergence as an intermediate node, setting the node to be converged as a first node, and judging whether the intermediate node meets a loop-free condition;
when the intermediate node meets the loop-free condition, replacing the node label of the father node of the intermediate node in the label set with the node label of the intermediate node, or replacing the adjacent label from the father node of the intermediate node to the intermediate node in the label set;
when the intermediate node does not meet the loop-free condition, adding an adjacency tag from a parent node of the intermediate node to the tag set, and assigning the parent node of the intermediate node as a first node;
Outputting the adjusted tag set;
the loop-free condition is that the sum of overheads after convergence is smaller than the sum of overheads before convergence, the sum of overheads before convergence is the sum of minimum overheads of the first node reaching the intermediate node through a fault link, and the sum of overheads after convergence is the sum of minimum overheads of the first node reaching the intermediate node.
2. The label processing method of claim 1, wherein the loop-free condition further comprises:
the state magnitude of the node to be converged is the same as the state magnitude of the intermediate node, and the state magnitude represents the influence degree of the current node by the fault link.
3. The tag processing method according to claim 2, wherein the state quantity value is represented by one of a first type of state quantity value, a second type of state quantity value, and a third type of state quantity value;
the first state quantity value is used for expressing that the shortest path from the node to be converged to the current node is not influenced by the fault link;
the second class state value is used for expressing that the shortest path from the node to be converged to the current node is partially influenced by the fault link;
The third class of state values is used for expressing that the shortest path from the node to be converged to the current node is completely influenced by the fault link.
4. A tag processing method according to claim 3, comprising, before determining whether the intermediate node satisfies a loop-free condition:
constructing a first shortest path tree in the network before convergence by taking the node to be converged as a root node;
initializing a state magnitude of a node to be converged to a first type of state magnitude and initializing a state magnitude of a protection node to a third type of state magnitude, wherein the protection node is a node in a fault link, and the state magnitude comprises a first bit and a second bit;
selecting all father nodes of the current node on the converged shortest path on the first shortest path tree as a father node set;
sequentially performing OR operation on the first bit of the father nodes in the father node set to obtain the first bit of the current node;
and performing AND operation on the second bit of the father node in the father node set in sequence to obtain the second bit of the current node.
5. The method of claim 1, wherein,
The sum of the overheads before convergence is equal to the sum of the first overheads plus the sum of the second overheads;
the first overhead sum is a minimum overhead sum of the first node to the protection node in the pre-convergence network, and the second overhead sum is a minimum overhead sum of the protection node to the intermediate node in the pre-convergence network.
6. The tag processing method of claim 5, wherein the first overhead sum is further obtained by:
constructing a second shortest path tree in the network before convergence by taking the protection node as a root node, and stopping constructing the second shortest path tree after the hop count of the second shortest path tree reaches a preset hop count threshold;
when the node on the second shortest path tree does not contain the first node, taking the sum of the minimum overheads from the protection node to the node with the hop count equal to the preset hop count threshold value on the second shortest path tree as a third overheads sum, otherwise, taking the sum of the minimum overheads from the protection node to the first node as the third overheads sum;
and taking the third overhead sum as the first overhead sum, wherein the pre-convergence overhead sum is equal to the third overhead sum plus the second overhead sum.
7. The tag processing method according to claim 1, wherein the network failure scenario includes: the network failure is a link failure or a node failure.
8. The tag processing method according to claim 1, wherein when the failure of the network is a change in overhead of a link in the network, causing a node in the network to start to converge, the processing method further comprises:
in the case where the link from the parent node of the intermediate node to the intermediate node is a generalized overhead reduction link, the adjacency label of the parent node of the intermediate node to the intermediate node is added to the label set, the generalized overhead reduction link being a link that causes nodes in the network to begin to converge and link overhead to be reduced or newly added into the network.
9. A label processing system for use in a network in a segment routing scenario, the label processing system comprising:
the fault identification and transmission unit is used for identifying and transmitting information of node faults and link faults in the network;
the computing unit is used for computing the shortest path from the current node to the destination node;
a tag processing unit that performs the tag processing method according to any one of claims 1 to 8 according to the failure recognition and transmission unit and the road calculation unit;
The backup unit is used for backing up the information in the links and nodes where the network fails;
and the label switching path processing unit forwards the information in the backup unit according to the label set obtained by the label processing unit.
10. A label processing device for use in a network in a segment routing scenario, said processing device comprising at least one processor and a memory for communicative connection with said at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the tag processing method of any one of claims 1 to 8.
11. A computer-readable storage medium storing computer-executable instructions for causing a computer to execute the tag processing method according to any one of claims 1 to 8.
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