CN116090389A - Electric Lu Liang rate estimation method and prediction system based on failure edge sampling - Google Patents
Electric Lu Liang rate estimation method and prediction system based on failure edge sampling Download PDFInfo
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Abstract
The invention discloses an electric Lu Liang rate estimation method and a prediction system based on failure edge sampling. The method for estimating the electric Lu Liang rate based on failure edge sampling comprises the following steps: based on the range of the parameter domain of the circuit, acquiring a successful sample point and a failure sample point which are close to the edge of the failure domain as a positive sample point and a negative sample point respectively; training the machine learning classifier based on the obtained positive sample points and negative sample points, and selecting an optimal machine learning classifier; and carrying out Monte Carlo sampling on a parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of the positive sampling points of the sampling points output by the machine learning classifier, which occupies the total sampling points. The invention greatly reduces unnecessary circuit simulation and further improves the efficiency of yield estimation.
Description
Technical Field
The invention relates to the technical field of yield estimation in a semiconductor integrated circuit, in particular to an electric Lu Liang rate estimation method based on failure edge sampling.
Background
At the level of integrated circuit fabrication processes to nanometers, due to uncertainty factors in the fabrication process such as photolithography, chemical mechanical polishing, and etching, some related circuit parameters such as effective channel length, transistor threshold voltage, etc. may deviate from the nominal value at design time, and such randomness errors caused by process instability cannot be reduced proportionally with the process level, the influence of process floating on the whole circuit becomes more serious, and thus the yield of products is reduced. Meanwhile, the number of transistors in each circuit is increased to reach thousands of millions of scales, and to ensure high yield of the circuit, the failure rate of each transistor is required to be extremely low, and the problem is called an extremely low probability problem. The Monte Carlo method is a general yield estimation method, a large number of sample points are generated in a parameter domain according to probability distribution of parameter variables, then circuit simulation is carried out on each sample point to obtain corresponding performance parameters, failure sample points are judged according to a predetermined performance scale, and finally the failure rate of the circuit can be estimated through a statistical method. However, the Monte Carlo method (Monte Carlo method) requires a very large number of collected samples when dealing with a very small probability problem, that is, the required circuit simulation times are very large, and is not suitable for a scenario where a fast yield rate estimation is required.
One fast yield estimation method that is currently in common use is the monte carlo method based on importance sampling.
The Monte Carlo method based on importance sampling constructs a distribution function of a sampling center in a failure domain, and more failure sample points can be obtained through the constructed proposal distribution, so that enough failure samples can be obtained with fewer sampling times. The key to importance sampling is the construction of the proposed distribution, which is more efficient the better the proposed distribution is constructed. However, in the case of high-dimensional multiple failure domains, it is difficult to obtain a suitable proposal distribution. In addition, importance sampling suffers from the problem of "dimension disasters" in that as the spatial dimension in mathematics increases, the analysis processes the data in the high-dimensional space, various problems encountered due to the increase in volume index, such as in the case of gaussian distributions, sampling from the high-dimensional distribution in real time is subject to many constraints, such as limited computational resources limiting the sampling dimension to orders of magnitude smaller than the system dimension, and the sample space span is also only a small fraction of the entire sample space.
Therefore, how to provide a yield estimation method based on a monte carlo method, which can reduce the simulation calculation amount and improve the estimation efficiency, is a technical problem to be solved.
Disclosure of Invention
In order to solve the technical problem of large calculated amount of the Monte Carlo method in the prior art, the invention provides an electric Lu Liang rate estimation method and a prediction system based on failure edge sampling.
The invention provides an electric Lu Liang rate estimation method based on failure edge sampling, which comprises the following steps:
step 2, training the machine learning classifier based on the obtained positive sample points and negative sample points, and selecting an optimal machine learning classifier;
and 3, carrying out Monte Carlo sampling on a parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of positive sample points of the sampling points output by the machine learning classifier, wherein the number of positive sample points of the sampling points occupies the number of total sampling points.
Further, in the step 1, the positive sample point and the negative sample point are obtained by sampling the edge of the failure domain based on a genetic algorithm.
Further, the step 1 includes:
step 1.1, extracting M samples in a parameter domain of the circuit to serve as a first generation population;
step 1.2, carrying out circuit simulation on samples of the current generation population to obtain corresponding performance parameters, determining negative sample points as male parents of the next generation population evolution according to performance boundaries, and positive sample points as female parents of the next generation population evolution;
step 1.3, if the ratio of the number of negative sample points in all the evolution samples to the number of total sample points exceeds a threshold value or the evolution algebra exceeds a set upper limit, stopping the evolution, outputting all the sample points of each generation of population, otherwise, continuing the next step;
step 1.4, sorting the negative sample points in the current generation population from small to large according to the distance from the failure edge, selecting the first T negative sample points as male parents participating in hybridization, and finding F female parents closest to each male parent in the positive sample points of the current generation population, wherein the F female parents are selected from the positive sample points of the current generation population, and the F female parents are selected from the F female parents
P is the number of negative sample points of the current generation population, and C is the number of filial generations obtained by hybridization each time;
step 1.5, crossing each male parent and each female parent corresponding to the male parent to obtain C filial generations. The child coordinates are represented by formula X c ＝λX f +(1-λ)X m Calculated, wherein X c For child coordinates, X f As the coordinate of male parent, X m As female parent coordinates, lambda is a random probability value between 0 and 1;
step 1.6, the remaining M-TFC number of mutated offspring samples are then extracted in the parameter domain of the circuit and returned to step 1.2.
Further, the step 1.1 and/or the step 1.6 select a Sobol sequence to extract a plurality of samples in a parameter domain of the circuit.
Further, the step 2 includes:
step 2.1, respectively endowing the obtained positive sample points and negative sample points with different labels, and randomly extracting sample points for forming a training set and a testing set from all the sample points according to a certain proportion;
step 2.2, performing grid traversal aiming at variable parameters of different machine learning classifiers;
step 2.3, training a model of the machine learning classifier for each combination in the parameter grid;
and 2.4, comparing classification effects of the different parameter classifiers based on the test set, and outputting an optimal model of the machine learning classifier as a final machine learning classifier.
Further, the machine learning classifier includes at least one of a support vector machine, a random forest, and a lifting tree.
Further, the step 2.3 includes:
step 2.3.1, constructing n_detectors weak classifiers;
step 2.3.2, the parameters of each weak classifier are obtained by learning the deviation through a forward distribution algorithm;
and 2.3.3, learning the weight of each weak classifier by minimizing the result deviation of the integrated classification, and carrying out weighted integration on all the weak classifiers to form a final model of the machine learning classifier.
Further, the step 2.4 employs a machine learning classifier that is optimized based on accuracy and recall and a quantitative score of F1-score.
Further, in the step 3, a quality factor is calculated according to the yield of the circuit obtained by the current calculation, and if the quality factor is greater than or equal to the performance index, the step 3 is continuously executed to calculate the yield of the circuit until the quality factor is less than the performance index.
The invention provides an electric Lu Liang rate prediction system based on failure edge sampling, which adopts the electric Lu Liang rate prediction system based on failure edge sampling to estimate the circuit yield by adopting the estimation method based on the electric Lu Liang rate of failure edge sampling;
the failure edge sampling based electrical Lu Liang rate prediction system comprises:
the sampling module is used for acquiring successful sample points and invalid sample points which are close to the edge of the invalid domain and serve as positive sample points and negative sample points respectively based on the range of the parameter domain of the circuit;
the classifier training module is used for training the machine learning classifier based on the obtained positive sample points and negative sample points and selecting an optimal machine learning classifier;
and the yield prediction module is used for carrying out Monte Carlo sampling on the parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of the positive sampling points of the sampling points output by the machine learning classifier, wherein the number of the positive sampling points occupies the number of the total sampling points.
Compared with the prior art, the invention has the following beneficial effects:
1. the sampling frequency of the method is far less than that of the traditional Monte Carlo method, so that unnecessary circuit simulation is greatly reduced, and the efficiency of yield estimation is further improved;
2. sample points near failure boundaries are obtained through a hybridization operator of a genetic algorithm, and compared with a Monte Carlo method based on importance sampling, the method has stronger applicability under the conditions of high-dimensional parameter space and multiple failure domains;
3. the hybridization operator of the genetic algorithm is used for acquiring points which are closer to the failure boundary, and compared with a non-Monte Carlo method based on boundary search, the method has the advantages that local optimization search calculation is not needed, so that the efficiency is higher;
4. the failure domain boundary surface is simulated through the machine learning classifier, compared with a non-Monte Carlo method based on boundary search, the failure domain boundary surface does not need to be accurately calculated, the situation that simulation times increase exponentially with the increase of dimensions is avoided, and the yield estimation efficiency in sample point classification is improved;
5. compared with other existing methods, the method has the advantages of lower failure rate error, fewer simulation times and higher comprehensive benefit in the parameter space with high dimensionality and multiple failure domains and high yield.
Drawings
The invention is described in detail below with reference to examples and figures, wherein:
FIG. 1 is an overall flow chart of an embodiment of the present invention.
FIG. 2 is a schematic diagram showing the comparison of Sobol sampling and simple random sampling effects;
fig. 3 is a typical XGBoost (eXtreme Gradient Boosting) model training schematic.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Thus, reference throughout this specification to one feature will be used in order to describe one embodiment of the invention, not to imply that each embodiment of the invention must be in the proper motion. Furthermore, it should be noted that the present specification describes a number of features. Although certain features may be combined together to illustrate a possible system design, such features may be used in other combinations not explicitly described. Thus, unless otherwise indicated, the illustrated combinations are not intended to be limiting.
As shown in fig. 1, the failure edge sampling-based electrical Lu Liang rate estimation method of the present invention, in one embodiment, mainly comprises the following three steps.
And step 2, training the machine learning classifier based on the obtained positive sample points and negative sample points, and selecting an optimal machine learning classifier. The step aims to train and learn the machine learning classifier based on the sample points obtained in the earlier stage, so that whether the sample points obtained by sampling later can directly obtain positive sample points or negative sample points through the machine learning classifier, the simulation times are reduced, and the yield estimation efficiency is improved.
And 3, carrying out Monte Carlo sampling on a parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of positive sample points of the sampling points output by the machine learning classifier, wherein the number of positive sample points occupies the number of total sampling points.
The invention can reduce the sampling times under the high-dimensional multi-failure domain parameter space as much as possible on the premise of ensuring the accuracy of the yield estimation result, thereby reducing unnecessary circuit simulation. In one embodiment, the implementation of the present invention can be summarized as finding sampling points near the performance domain failure boundary based on genetic algorithm, and using machine learning classifier technique to determine if the edge samples fail, thereby rapidly estimating yield.
In one embodiment, in step 1, the edge of the failure domain is sampled based on a genetic algorithm to obtain a positive sample point and a negative sample point. At this time, step 1 may be implemented by the following steps.
Step 1.1, M samples are extracted in a parameter domain R of the circuit to be used as a first generation population. The extraction can be performed in a random extraction mode or in other extraction modes. The algebra of the first population n=1.
Step 1.2, performing circuit simulation on a sample of the current generation population to obtain corresponding performance parameters, determining a negative sample point as a male parent of the next generation population evolution according to the performance boundary, and determining a positive sample point as a female parent of the next generation population evolution, wherein whether the sample point is a failure point, which is also called as a negative sample point, is judged by selecting whether a circuit simulation result reaches a certain threshold value or not, and otherwise, the failure point is a positive sample point.
The method comprises the steps of starting cyclic iteration, and performing first iterative operation by taking a primary evolution population as a current generation population to obtain corresponding performance parameters, namely obtaining a corresponding performance domain. The parameter domain refers to a range of values of parameters such as the length, width, etc. of the circuit device. The performance domain refers to a range of values such as voltage, gain, bandwidth. The failure domain edge and the performance boundary are both the same intersection line of the parameter domain and the performance domain.
Step 1.3, if the ratio of the number of negative sample points in all samples to the number of total sample points exceeds a threshold value or the evolution algebra exceeds a set upper limit, stopping the evolution, outputting all sample points of each generation of population at the moment, otherwise, continuing the next step;
step 1.4, sorting the negative sample points in the current generation population from small to large according to the distance from the failure edge, selecting the first T negative sample points as male parents participating in hybridization, and finding F female parents closest to each male parent in the positive sample points of the current generation population, wherein the F female parents are selected from the positive sample points of the current generation population, and the F female parents are selected from the F female parents
P is the number of negative sample points of the current generation population, C is the number of filial generation obtained by each crossing, and F and C are multiplied.
Step 1.5, each male parent and each female parent corresponding to the male parent are hybridized to obtain C filial generations, namely, a pair of parents can obtain C filial generations. The child coordinates are represented by formula X c ＝λX f +(1-λ)X m Calculated, wherein X c For child coordinates, X f As the coordinate of male parent, X m As female parent coordinates, lambda is a random probability value between 0 and 1;
step 1.6, the remaining M-TFC mutant sub-samples are extracted in the parameter domain of the circuit, and after obtaining M sub-samples altogether, the M sub-samples are returned to step 1.2 as samples of the current generation race for the next round of operation.
In one embodiment, the above step 1.1 and/or step 1.6 selects a Sobol sequence to extract a plurality of samples in the parameter domain of the circuit. As shown in fig. 2, sobol sequences have better uniformity than simple random sampling, and can get as many failure points as possible.
In one embodiment, the step 2 may be implemented as follows.
And 2.1, respectively endowing the obtained positive sample points and negative sample points with different labels, and randomly extracting sample points for forming a training set and a testing set from all the sample points according to a certain proportion. If the label of the negative sample point is set to 0 and the label of the positive sample point is set to 1, a total data set is obtained, and the total data set is randomly extracted according to the ratio of the training set to the testing set m to n, so that the testing set and the training set are generated.
Step 2.2, performing grid traversal aiming at variable parameters of different machine learning classifiers. The machine learning classifier used in this step includes, but is not limited to, at least one of a support vector machine, a random forest, and a lift tree. Y=ax+w consists of a decision scale, there are many numbers, from the root node to the child node 5,
taking the XGBoost model of the lifting tree as an example, if the XGBoost model is used as a classifier, main variable parameters include: decision tree depth (max_depth), iterative model learning rate (learning_rate), sub-model, i.e. weak classification decision tree number (n_detectors).
Then when the XGBoost model of the lifting tree is adopted to perform grid traversal, the depth range of the decision tree is assumed to be 1-5, the number of weak classification decision trees is assumed to be 1-100, the iterative model learning rate is 50% -80%, three-dimensional coordinate axes are established by using the three parameters, then the variable parameters of the machine learning classifier can form a corresponding three-dimensional space grid (if two parameters form a plane grid) based on different values, the values of the parameters can have various combinations, each combination needs to be trained by using the training set and the test set of the step 2.1, and therefore, the model of the optimal machine learning classifier can be selected from the combinations in the next step.
Step 2.3, training the model of the machine learning classifier for each parameter combination (i.e. combination of variable parameters of the model) in the parameter grid of the previous step.
Taking the lifting tree as an example, the lifting tree essentially adopts a training model of an addition model (linear combination of basis functions) and a forward distribution algorithm.
As shown in fig. 3, this step 2.3 may be implemented specifically by the following steps.
Step 2.3.1, constructing n_detectors weak classifiers. Taking the XGBoost model of the lifting tree as an example, the weak classifier employed in this step is a decision tree.
Step 2.3.2, the parameters of each weak classifier are obtained by learning the deviation through a forward distribution algorithm; the forward distribution algorithm is that a greedy strategy is adopted to optimize the trees one by one, when the t-th tree is optimized, the previous t-1 tree is known, and only the parameters of the current tree need to be optimized.
And 2.3.3, learning the weight of each weak classifier by minimizing the result deviation of the integrated classification, and carrying out weighted integration on all the weak classifiers to form a final model of the machine learning classifier.
And 2.4, comparing classification effects of the different parameter classifiers based on the test set, and outputting an optimal model of the machine learning classifier as a final machine learning classifier.
In step 2.4, a machine learning classifier is selected that is optimal based on precision and recall and a quantitative score of F1-score. The calculation formula of F1-score is
Where precision is precision and recall is recovery.
In one embodiment, step 3 calculates the quality factor according to the yield of the circuit obtained by the current calculation, and if the quality factor is greater than or equal to the performance index, the step 3 is continuously performed to calculate the yield of the circuit until the quality factor is less than the performance index.
Step 3 may be implemented in the following detailed steps when implemented in a specific manner.
Step 3.1, carrying out one Monte Carlo sampling on a parameter domain of the circuit, and recording the total Monte Carlo sampling frequency as W: =w+l (W initial value is 0) as prediction input of classifier;
step 3.2, counting the number V of samples predicted to be positive among the W classifier input samplesRatio of total number of samples
Recording yield estimate->
Step 3.3, according to the figure of merit
Judging whether the performance index Q reaches the set performance index Q, if rho is more than or equal to Q, not converging, and jumping to the step 3.1 to calculate the next sampling yield; otherwise take->
As the yield estimation result of the present embodiment, the yield calculation flow ends.
In the technical scheme, the sampling of the sample points around the failure domain boundary surface and the training of the classifier are the core of the technical scheme of the invention. The main inventive concept of the invention is that after the initial sample population is generated, the sample points which are closer to the boundary surface of the failure domain are obtained through the hybridization operation of positive and negative sample points of a genetic algorithm, a machine learning classifier which can correctly classify the sample points is learned on the basis of the sample points, and the yield is calculated through the final test. In addition, in order to cover all failure domains, the sampling process of the genetic algorithm also carries out sample point selection through mutation operation.
The invention also protects an electric Lu Liang rate prediction system based on failure edge sampling, and the electric Lu Liang rate prediction system based on failure edge sampling adopts the estimation method of the electric Lu Liang rate based on failure edge sampling in the technical scheme to estimate the circuit yield, namely the prediction system is mainly used for realizing the estimation method of the electric Lu Liang rate.
The electric Lu Liang rate prediction system based on failure edge sampling mainly comprises three modules, a sampling module, a classifier training module and a yield prediction module.
And the sampling module is used for acquiring successful sample points and invalid sample points which are close to the edge of the invalid domain as positive sample points and negative sample points respectively based on the range of the parameter domain of the circuit. In one embodiment, the sampling module is operative to perform steps 1.1 through 1.6 described above.
The classifier training module trains the machine learning classifier based on the obtained positive sample points and negative sample points, and selects an optimal machine learning classifier. In one embodiment, the classifier training module is operative to perform steps 2.1 through 2.4 described above.
And the yield prediction module is used for carrying out Monte Carlo sampling on the parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of the positive sampling points of the sampling points output by the machine learning classifier, wherein the number of the positive sampling points occupies the number of the total sampling points. In one embodiment, the yield prediction module is operative to perform steps 3.1 through 3.3 described above.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (10)
1. An electrical Lu Liang rate estimation method based on failure edge sampling, comprising:
step 1, based on the range of a parameter domain of a circuit, acquiring a successful sample point and a failure sample point which are close to the edge of a failure domain as a positive sample point and a negative sample point respectively;
step 2, training the machine learning classifier based on the obtained positive sample points and negative sample points, and selecting an optimal machine learning classifier;
and 3, carrying out Monte Carlo sampling on a parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of positive sample points of the sampling points output by the machine learning classifier, wherein the number of positive sample points of the sampling points occupies the number of total sampling points.
2. The method for estimating electric Lu Liang rate based on failure edge sampling as recited in claim 1 wherein in said step 1, the positive and negative sample points are obtained by sampling failure domain edges based on a genetic algorithm.
3. The failure edge sampling based electrical Lu Liang rate estimation method of claim 2, wherein step 1 comprises:
step 1.1, extracting M samples in a parameter domain of the circuit to serve as a first generation population;
step 1.2, carrying out circuit simulation on samples of the current generation population to obtain corresponding performance parameters, determining negative sample points as male parents of the next generation population evolution according to performance boundaries, and positive sample points as female parents of the next generation population evolution;
step 1.3, if the ratio of the number of negative sample points in all the evolution samples to the number of total sample points exceeds a threshold value or the evolution algebra exceeds a set upper limit, stopping the evolution, outputting all the sample points of each generation of population, otherwise, continuing the next step;
step 1.4, sorting the negative sample points in the current generation population from small to large according to the distance from the failure edge, selecting the first T negative sample points as male parents participating in hybridization, and finding F female parents closest to each male parent in the positive sample points of the current generation population, wherein the F female parents are selected from the positive sample points of the current generation population, and the F female parents are selected from the F female parents
P is the number of negative sample points of the current generation population, and C is the number of filial generations obtained by hybridization each time;
step 1.5, hybridization is carried out on each male parent and each female parent corresponding to each male parent to obtain C filial generations; the child coordinates are represented by formula X c ＝λX f +(1-λ)X m Calculated, wherein X c For child coordinates, X f As the coordinate of male parent, X m As female parent coordinates, lambda is a random probability value between 0 and 1;
step 1.6, the remaining M-TFC number of mutated offspring samples are then extracted in the parameter domain of the circuit and returned to step 1.2.
4. A method of estimating the electrical Lu Liang rate based on dead edge sampling as claimed in claim 3 wherein said step 1.1 and/or said step 1.6 selects a Sobol sequence to extract a plurality of samples in the parameter domain of the circuit.
5. The method for estimating the electrical Lu Liang rate based on the failure edge sampling as claimed in claim 1, wherein said step 2 comprises:
step 2.1, respectively endowing the obtained positive sample points and negative sample points with different labels, and randomly extracting sample points for forming a training set and a testing set from all the sample points according to a certain proportion;
step 2.2, performing grid traversal aiming at variable parameters of different machine learning classifiers;
step 2.3, training a model of the machine learning classifier for each combination in the parameter grid;
and 2.4, comparing classification effects of the different parameter classifiers based on the test set, and outputting an optimal model of the machine learning classifier as a final machine learning classifier.
6. The method of claim 5, wherein the machine learning classifier comprises at least one of a support vector machine, a random forest, and a lifting tree.
7. The failure edge sampling based electrical Lu Liang rate estimation method of claim 6, wherein said step 2.3 comprises:
step 2.3.1, constructing n_detectors weak classifiers;
step 2.3.2, the parameters of each weak classifier are obtained by learning the deviation through a forward distribution algorithm;
and 2.3.3, learning the weight of each weak classifier by minimizing the result deviation of the integrated classification, and carrying out weighted integration on all the weak classifiers to form a final model of the machine learning classifier.
8. The method of claim 6, wherein the step 2.4 uses a quantization score based on precision and recall and F1-score to select an optimal machine learning classifier.
9. The method of claim 1, wherein in step 3, a quality factor is calculated according to the yield of the circuit currently calculated, and if the quality factor is greater than or equal to the performance index, step 3 is continuously performed to calculate the yield of the circuit until the quality factor is less than the performance index.
10. An electrical Lu Liang rate prediction system based on failure edge sampling, wherein the electrical Lu Liang rate prediction system based on failure edge sampling performs circuit yield estimation by using the electrical Lu Liang rate estimation method based on failure edge sampling as described in any one of claims 1 to 9;
the failure edge sampling based electrical Lu Liang rate prediction system comprises:
the sampling module is used for acquiring successful sample points and invalid sample points which are close to the edge of the invalid domain and serve as positive sample points and negative sample points respectively based on the range of the parameter domain of the circuit;
the classifier training module is used for training the machine learning classifier based on the obtained positive sample points and negative sample points and selecting an optimal machine learning classifier;
and the yield prediction module is used for carrying out Monte Carlo sampling on the parameter domain of the circuit, inputting the obtained sampling points into an optimal machine learning classifier, and obtaining the yield of the circuit according to the number of the positive sampling points of the sampling points output by the machine learning classifier, wherein the number of the positive sampling points occupies the number of the total sampling points.
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| CN116953478A (en) * | 2023-07-24 | 2023-10-27 | 上海超捷芯软科技有限公司 | Ultralow failure rate analysis method and device for integrated circuit and computing equipment |
| CN116953478B (en) * | 2023-07-24 | 2024-04-26 | 上海超捷芯软科技有限公司 | Ultralow failure rate analysis method and device for integrated circuit and computing equipment |
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