CN116088953A - Method for modifying default parameters of circuit and initialization parameter selection circuit - Google Patents

Method for modifying default parameters of circuit and initialization parameter selection circuit Download PDF

Info

Publication number
CN116088953A
CN116088953A CN202310245620.0A CN202310245620A CN116088953A CN 116088953 A CN116088953 A CN 116088953A CN 202310245620 A CN202310245620 A CN 202310245620A CN 116088953 A CN116088953 A CN 116088953A
Authority
CN
China
Prior art keywords
register
chip
default parameters
control logic
selection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310245620.0A
Other languages
Chinese (zh)
Inventor
陈青宇
王红卫
胡明
范瑞玉
薛飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuxi Qiannuode Semiconductor Co ltd
Original Assignee
Wuxi Qiannuode Semiconductor Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuxi Qiannuode Semiconductor Co ltd filed Critical Wuxi Qiannuode Semiconductor Co ltd
Priority to CN202310245620.0A priority Critical patent/CN116088953A/en
Publication of CN116088953A publication Critical patent/CN116088953A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4411Configuring for operating with peripheral devices; Loading of device drivers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30141Implementation provisions of register files, e.g. ports
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)

Abstract

The invention provides a method for modifying default parameters of a circuit and an initialization parameter selection circuit, wherein the method for modifying the default parameters of the circuit comprises the following steps: powering up the chip; judging whether the default parameters in the OTP memory need to be modified; if the default parameters need to be modified, writing the on-demand write parameters into a first register, and simultaneously writing a first control logic signal 1 into a second register; according to a control logic signal, outputting the on-demand write-in parameter output by the first register to the post-stage circuit through a multiplexer; and completing chip enabling according to the externally input enabling signal. According to the method and the device, through setting the OTP memory reading access and the first register reading access at the same time, a user can modify default parameters according to own requirements after the chip is electrified and before the chip is enabled, write-on-demand parameters which can be rewritten for multiple times in the first register are used, and the flexibility of initializing parameter configuration is improved.

Description

Method for modifying default parameters of circuit and initialization parameter selection circuit
Technical Field
The present disclosure relates to the field of modifying initialization parameters, and in particular, to a method for modifying default parameters of a circuit and an initialization parameter selection circuit.
Background
OTP (One Time Programmable ) register, meaning that the register is programmable only once and cannot be modified after programming. The OTP register and FLASH data area are very similar, 1 can be rewritten to 0, but 0 can never be rewritten to 1, for example, a 32-bit OTP register, the resulting value is 0 xFFFFFFFFFF, and if the user writes the value of the OTP register to 0xFFFFFFFE through programming, then the OTP register can not be rewritten to 0 xFFFFFFFFFF any more; of course, the value of the OTP register may also be rewritten to 0xFFFFFFFC or otherwise.
In practical applications or debug, after the chip is powered up and before it is enabled, there is a need to change the default parameters in the OTP register, and it is currently common practice to use an MTP (Multiple-Time Programmable ) register instead of the OTP register, and the MTP register is different from the one-time programmable memory (OTP register), and the MTP register can be reprogrammed and updated Multiple times according to the needs of the user, but the cost is higher than that of the OTP.
Disclosure of Invention
The application provides a method for modifying default parameters of a circuit and an initialization parameter selection circuit, which can solve at least one of the problems that the default parameters in an OTP (one time programmable) register cannot be changed at present, the cost for replacing the multi-time reprogramming of the OTP register by selecting the MTP register is high, and the like.
In one aspect, an embodiment of the present application provides a method for modifying default parameters of an initialization parameter selection circuit, including:
powering up a chip, wherein the chip comprises: initializing a parameter selection circuit and a post-stage circuit;
judging whether a default parameter needs to be modified, wherein the default parameter is stored in an OTP memory;
if the default parameters need to be modified, writing the on-demand write parameters into a first register, and simultaneously writing a first control logic signal 1 into a second register;
according to the first control logic signal 1, outputting the on-demand write-in parameter output by the first register to the post-stage circuit through a multiplexer;
the chip completes initialization according to the on-demand writing parameters; the method comprises the steps of,
and according to the externally input enabling signal, completing chip enabling.
In the method for modifying default parameters of the initialization parameter selection circuit, after judging whether the default parameters need to be modified or not and before enabling the chip, the method for modifying default parameters of the initialization parameter selection circuit further comprises the following steps:
if the default parameters do not need to be modified, not operating the second register or writing a second control logic signal 0 into the second register;
outputting the default parameters output by the OTP memory to a post-stage circuit through the multiplexer according to the second control logic signal 0;
and the chip completes initialization with the default parameters.
In the method for modifying default parameters of the initialization parameter selection circuit, on-demand write parameters are written into a first register through an IO interface, and a first control logic signal 1 is written into a second register.
In the method for modifying default parameters of the initialization parameter selection circuit, a second control logic signal 0 is written into the second register through an IO interface.
In the method for modifying default parameters of the initialization parameter selection circuit, the IO interface is any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface and an RS-232 serial interface.
In another aspect, an embodiment of the present application further provides an initialization parameter selection circuit, including: an OTP memory, a first register, a second register, a multiplexer and an enabling module, wherein,
the OTP memory is used for storing default parameters;
the first register is used for storing write-on-demand parameters;
the second register is used for storing a first control logic signal 1 and/or a second control logic signal 0 for controlling the multiplexer;
the multiplexer is used for receiving the default parameters and the write-on-demand parameters, and outputting the write-on-demand parameters to a post-stage circuit as output signals according to the first control logic signal 1 after the chip is powered on and before the chip is enabled; the method comprises the steps of,
the enabling module is used for receiving an enabling signal input from the outside and finishing chip enabling according to the enabling signal.
Optionally, in the initialization parameter selection circuit, the multiplexer is further configured to output the default parameter as an output signal to a post-stage circuit according to the second control logic signal 0 after the chip is powered up and before the chip is enabled.
Optionally, in the initialization parameter selection circuit, the initialization parameter selection circuit further includes: and the IO interface is used for writing the on-demand write-in parameter into a first register and writing a first control logic signal 1 into a second register.
Optionally, in the initialization parameter selection circuit, the initialization parameter selection circuit further includes: and the IO interface is used for writing a second control logic signal 0 into the second register.
Optionally, in the initialization parameter selection circuit, the IO interface is any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface, and an RS-232 serial interface.
The technical scheme of the application at least comprises the following advantages:
the method for modifying default parameters of the circuit comprises the following steps: powering up the chip; judging whether the default parameters in the OTP memory need to be modified; if the default parameters need to be modified, writing the on-demand write parameters into a first register, and simultaneously writing a first control logic signal 1 into a second register; according to a control logic signal, outputting the on-demand write-in parameter output by the first register to the post-stage circuit through a multiplexer; and completing chip enabling according to the externally input enabling signal. According to the method and the device, the OTP memory reading access and the first register reading access are set at the same time, so that a user can modify the default parameters of the chip according to own requirements after the chip is powered on and before the chip is enabled, the user can select whether to use the default parameters in the OTP memory or the write-on-demand parameters allowing multiple erasing in the first register according to own requirements, the situation that the default parameters in the OTP memory can only be used after the chip is powered on and enabled is avoided, and the flexibility of initializing parameter configuration is improved. In addition, the MTP memory is not required to be selected to replace the OTP memory for multiple reprogramming, so that the cost is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an initialization parameter selection circuit according to an embodiment of the invention;
FIG. 2 is a logic block diagram of a method of modifying default parameters of an initialization parameter selection circuit in accordance with an embodiment of the present invention;
wherein reference numerals are as follows:
11-OTP memory, 12-first register, 13-second register, 14-multiplexer, 15-enable module, 16-IO interface.
Detailed Description
The following description of the embodiments of the present application will be made apparent and complete in conjunction with the accompanying drawings, in which embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
In the description of the present application, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description of the present application and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, or can be communicated inside the two components, or can be connected wirelessly or in a wired way. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
In addition, the technical features described below in the different embodiments of the present application may be combined with each other as long as they do not collide with each other.
The embodiment of the application provides an initialization parameter selection circuit, in this embodiment, the initialization parameter selection circuit is one of circuit structures in a chip, and the chip may further include: and a post-stage circuit.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an initialization parameter selection circuit according to an embodiment of the present invention, the initialization parameter selection circuit includes: OTP memory 11, first register 12, second register 13, multiplexer 14, and enable module 15.
Wherein the OTP memory 11 is used for storing default parameters; the first register 12 is used for storing write-on-demand parameters; the second register 13 is used for storing a first control logic signal '1' and/or a second control logic signal '0' for controlling the multiplexer 14; the multiplexer 14 is configured to receive the default parameter and the write-on-demand parameter, and output the write-on-demand parameter as an output signal to a post-stage circuit according to the first control logic signal '1' after the chip is powered on and before the chip is enabled; the enabling module 15 is configured to receive an externally input enabling signal, and complete chip enabling according to the enabling signal.
Further, the multiplexer 14 is further configured to output the default parameter as an output signal to a post-stage circuit according to the second control logic signal '0' after the chip is powered up and before the chip is enabled.
Preferably, the initialization parameter selection circuit further includes: and an IO interface 16, wherein when the default parameters need to be modified, the on-demand write parameters are written into the first register 12 and the first control logic signal '1' is written into the second register 13 through the IO interface 16.
Further, when the default parameters do not need to be modified, a second control logic signal '0' is written into the second register 13 through the IO interface 16.
In this embodiment, the IO interface 16 may be any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface, and an RS-232 serial interface.
Based on the same inventive concept, the embodiment of the present application further provides a method for modifying default parameters of an initialization parameter selection circuit, referring to fig. 2, fig. 2 is a logic block diagram of the method for modifying default parameters of an initialization parameter selection circuit according to the embodiment of the present invention, where the method for modifying default parameters of an initialization parameter selection circuit includes:
step S1: powering up a chip, wherein the chip comprises: the initialization parameter selection circuit and the subsequent-stage circuit (not shown) shown in fig. 1.
Step S2: it is determined whether a modification of default parameters is required, wherein the default parameters are stored in the OTP memory 11.
Step S3.1: if the default parameters need to be modified, the write-on-demand parameters are written to the first register 12, while the first control logic signal '1' is written to the second register 13. Specifically, the on-demand write parameters are written to the first register and the first control logic signal 1 is written to the second register via the IO interface 16.
In this embodiment, the IO interface 16 is not limited at all, and it is only necessary to ensure that the IO interface 16 includes a communication interface, and in this embodiment, the IO interface 16 may be any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface, and an RS-232 serial interface.
Step S4.1: the write-on-demand parameter output from the first register 12 is output to the post-stage circuit via a multiplexer 14 according to a first control logic signal '1'.
Step S5.1: and the chip completes initialization by the on-demand write-in parameters.
Step S6: and according to the externally input enabling signal, completing chip enabling.
Step S7.1: the chip writes parameters and configures the output as needed in the first register 12.
Further, after determining whether the default parameters need to be modified (step S2), and before enabling the chip (step S6), the method for modifying default parameters of the initializing parameter selection circuit may further include:
step S3.2: if the default parameters do not need to be modified, the second register 13 is not operated or a second control logic signal '0' is written into the second register 13.
Specifically, a second control logic signal '0' is written to the second register via the IO interface 16.
Step S4.2: the default parameters output from the OTP memory 11 are output to a subsequent circuit through the multiplexer 14 according to a second control logic signal '0'.
Step S5.2: and the chip completes initialization with the default parameters.
Preferably, after the chip enabling is completed according to the externally input enabling signal (step S6), the process of not modifying the default parameters may further include:
step S7.2: the chip outputs according to default parameters and configuration within OTP memory 11.
In this embodiment, taking the power management chip as an example, the signal output by the power management chip is used to supply power to the next stage of circuit, the output voltage range is configurable, for example, the output voltage range of 1V-3V, and taking the default output voltage of the OTP memory configuration as an example, the default output voltage of the OTP memory configuration is 1.2V, the conventional chip cannot be modified (i.e. the default output voltage of the OTP memory configuration). If a customer expects that the default output voltage of the chip is 1.8V instead of the default output voltage (1.2V) of the configuration of the OTP memory in the subsequent application or debugging, the power management chip provided in this embodiment of the present application can solve the above problem, after the chip is powered on, the first register 12 is configured to be 1.8V through the IO interface 16, and the second register 12 is set to be 1, and the on-demand write-in parameter (1.8V) in the first register 12 is output through the multiplexer 14, where the default output voltage is 1.8V that the customer expects after the chip is enabled. It should be noted that, in the method for modifying default parameters of the initializing parameter selection circuit provided in the embodiment of the present application, when the default parameters of the initializing parameter selection circuit need to be modified, after each power-on of the chip, the values of the first register 12 and the second register 13 need to be configured, and due to the characteristics of the first register 12 and the second register 13, once the power is turned off, the values of the first register 12 and the second register 13 are cleared; if the default parameters do not need to be modified, the first register 12 and the second register 13 may not be configured after each chip power-up.
In the application, through setting the OTP memory 11 read path and the first register 12 read path in the initialization parameter selection circuit at the same time, after the chip is powered on and before the chip is enabled, a user can modify the default parameters of the chip according to own requirements, and the user can select whether to use the default parameters in the OTP memory 11 or the write-on-demand parameters in the first register 12 according to own requirements, wherein the write-on-demand parameters in the first register 12 allow multiple erasing and writing, so that the situation that only the default parameters in the OTP memory can be used after the chip is powered on and enabled is avoided, and the flexibility of initialization parameter configuration is improved. In addition, the MTP register does not need to be selected to replace the OTP memory to be reprogrammed for a plurality of times, so that the cost is reduced.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While nevertheless, obvious variations or modifications may be made to the embodiments described herein without departing from the scope of the invention.

Claims (10)

1. A method of modifying default parameters of an initialization parameter selection circuit, comprising:
powering up a chip, wherein the chip comprises: initializing a parameter selection circuit and a post-stage circuit;
judging whether a default parameter needs to be modified, wherein the default parameter is stored in an OTP memory;
if the default parameters need to be modified, writing the on-demand write parameters into a first register, and simultaneously writing a first control logic signal 1 into a second register;
according to the first control logic signal 1, outputting the on-demand write-in parameter output by the first register to the post-stage circuit through a multiplexer;
the chip completes initialization according to the on-demand writing parameters; the method comprises the steps of,
and according to the externally input enabling signal, completing chip enabling.
2. The method of claim 1, wherein after determining whether modification of the default parameters is required and before chip enabling, the method of modifying the default parameters of the initialization parameter selection circuit further comprises:
if the default parameters do not need to be modified, not operating the second register or writing a second control logic signal 0 into the second register;
outputting the default parameters output by the OTP memory to a post-stage circuit through the multiplexer according to the second control logic signal 0;
and the chip completes initialization with the default parameters.
3. The method of modifying default parameters of an initialization parameter selection circuit of claim 1, wherein the on-demand write parameter is written to the first register and the first control logic signal 1 is written to the second register via the IO interface.
4. The method of modifying default parameters of an initialization parameter selection circuit of claim 2, wherein a second control logic signal 0 is written to the second register via an IO interface.
5. The method of claim 3 or 4, wherein the IO interface is any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface, and an RS-232 serial interface.
6. An initialization parameter selection circuit, comprising: an OTP memory, a first register, a second register, a multiplexer and an enabling module, wherein,
the OTP memory is used for storing default parameters;
the first register is used for storing write-on-demand parameters;
the second register is used for storing a first control logic signal 1 and/or a second control logic signal 0 for controlling the multiplexer;
the multiplexer is used for receiving the default parameters and the write-on-demand parameters, and outputting the write-on-demand parameters to a post-stage circuit as output signals according to the first control logic signal 1 after the chip is powered on and before the chip is enabled; the method comprises the steps of,
the enabling module is used for receiving an enabling signal input from the outside and finishing chip enabling according to the enabling signal.
7. The initialization parameter selection circuit of claim 6, wherein the multiplexer is further configured to output the default parameter as an output signal to a subsequent circuit according to the second control logic signal 0 after power-up of the chip and before chip enable.
8. The initialization parameter selection circuit of claim 6, wherein the initialization parameter selection circuit further comprises: and the IO interface is used for writing the on-demand write-in parameter into a first register and writing a first control logic signal 1 into a second register.
9. The initialization parameter selection circuit of claim 6, wherein the initialization parameter selection circuit further comprises: and the IO interface is used for writing a second control logic signal 0 into the second register.
10. The initialization parameter selection circuit according to claim 8 or 9, wherein the IO interface is any one or more of an I2C serial bus interface, an I3C serial bus interface, an SPI serial interface, a UART serial interface, and an RS-232 serial interface.
CN202310245620.0A 2023-03-15 2023-03-15 Method for modifying default parameters of circuit and initialization parameter selection circuit Pending CN116088953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310245620.0A CN116088953A (en) 2023-03-15 2023-03-15 Method for modifying default parameters of circuit and initialization parameter selection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310245620.0A CN116088953A (en) 2023-03-15 2023-03-15 Method for modifying default parameters of circuit and initialization parameter selection circuit

Publications (1)

Publication Number Publication Date
CN116088953A true CN116088953A (en) 2023-05-09

Family

ID=86208505

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310245620.0A Pending CN116088953A (en) 2023-03-15 2023-03-15 Method for modifying default parameters of circuit and initialization parameter selection circuit

Country Status (1)

Country Link
CN (1) CN116088953A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1767188A (en) * 2004-10-27 2006-05-03 联咏科技股份有限公司 Device and method for implementing multi-time programming using once programmable element
CN102364430A (en) * 2010-09-17 2012-02-29 杭州士兰微电子股份有限公司 Microcontroller for supporting multi-programming on one time programmable memory and programming method
CN103064654A (en) * 2011-10-19 2013-04-24 庄建祥 Integrated circuit and electronic system and renewable method providing one time programmable (OTP) internal memory configuration
CN111800658A (en) * 2019-04-16 2020-10-20 深圳康佳电子科技有限公司 Chip parameter writing method, television and storage medium

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1767188A (en) * 2004-10-27 2006-05-03 联咏科技股份有限公司 Device and method for implementing multi-time programming using once programmable element
CN102364430A (en) * 2010-09-17 2012-02-29 杭州士兰微电子股份有限公司 Microcontroller for supporting multi-programming on one time programmable memory and programming method
CN103064654A (en) * 2011-10-19 2013-04-24 庄建祥 Integrated circuit and electronic system and renewable method providing one time programmable (OTP) internal memory configuration
CN111800658A (en) * 2019-04-16 2020-10-20 深圳康佳电子科技有限公司 Chip parameter writing method, television and storage medium

Similar Documents

Publication Publication Date Title
KR100375217B1 (en) Microcontroller incorporating an electrically rewritable non-volatile memory
US20060071793A1 (en) RFID tag using hybrid non-volatile memory
US20060248267A1 (en) Flash memory having configurable sector size and flexible protection scheme
US20060123292A1 (en) Method and apparatus for multiplexing an integrated circuit pin
US5812867A (en) Integrated circuit comprising a microprocessor, a memory and internal configurable peripherals
US6430719B1 (en) General port capable of implementing the JTAG protocol
JP2007294039A (en) Nonvolatile semiconductor storage device
KR19990037229A (en) Semiconductor memory device and semiconductor memory system
JP2006178403A (en) Display unit
KR100971406B1 (en) Device and method for configuring a flash memory controller
US7888965B2 (en) Defining a default configuration for configurable circuitry in an integrated circuit
JP3173407B2 (en) Microcomputer with built-in flash EEPROM
CN105785967A (en) Calibration method and calibration system for MCU
US7289382B2 (en) Rewritable fuse memory
CN100477213C (en) Integrated circuit chip programmable and operation method thereof
CN116088953A (en) Method for modifying default parameters of circuit and initialization parameter selection circuit
US5880992A (en) Electrically erasable and programmable read only memory
US8312206B2 (en) Memory module and memory module system
KR20030085046A (en) Independent asynchronous boot block for synchronous non-volatile memory devices
US6366510B2 (en) Electronic memory device
EP0508829B1 (en) IC card
KR20200111330A (en) Anti-fuse otp memory device for reducing degradation in anti-fuse and driving method therefor
JP3154098B2 (en) Refresh circuit for memory device
CN100492537C (en) Increasing/ reducing, chip selection and selectable wirting-in for non-volatile memory
US20240127875A1 (en) Address decoder unit for a memory cell array

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20230509

RJ01 Rejection of invention patent application after publication