CN116088293A - Calculation method and device for integral saturation resistance of PID controller and related equipment - Google Patents
Calculation method and device for integral saturation resistance of PID controller and related equipment Download PDFInfo
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Abstract
The invention discloses a calculation method and device for integral saturation resistance of a PID controller and related equipment. The method comprises the steps of obtaining state parameters of a current vehicle, wherein the state parameters comprise a current vehicle speed and a target vehicle speed; determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed; determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm; an accelerator pedal release signal value and a brake pedal release signal value are determined in combination with vehicle gear and pedal control parameters. The method can determine the opening degree and the acceleration opening degree of the brake pedal of the vehicle in the simulation system, and solves the problem of integral saturation of the PID controller.
Description
Technical Field
The invention relates to the technical field of unmanned aerial vehicle, in particular to a calculation method and device for integral saturation resistance of a PID controller, electronic equipment and a computer storage medium.
Background
In the related art, in the design of a simulation system of an unmanned algorithm, it is important to construct a vehicle dynamics model, and one core difficulty in constructing the dynamics model is to calculate the opening degree of a brake pedal and the opening degree of an acceleration pedal of a vehicle in the simulation system according to acceleration issued by a regulation algorithm, wherein the unmanned PID algorithm in the prior art has an integral saturation problem. How to better realize anti-integral saturation is a problem to be solved.
Disclosure of Invention
The object of the present invention is to solve at least to some extent one of the above-mentioned technical problems.
Therefore, a first object of the present invention is to provide a method for calculating integral saturation resistance of a PID controller, which can determine a brake pedal opening and an acceleration opening of a vehicle in a simulation system, and solve the problem of integral saturation of the PID controller.
In order to achieve the above object, an embodiment of the present invention provides a method for calculating integral saturation resistance of a PID controller, where the method includes: acquiring state parameters of a current vehicle, wherein the state parameters comprise a current vehicle speed and a target vehicle speed; determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed; determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm; and determining an accelerator pedal separation signal value and a brake pedal separation signal value according to the vehicle gear and the pedal control parameter.
According to the calculation method of the PID controller for resisting integral saturation, the state parameters of the current vehicle are obtained, the state parameters comprise the current vehicle speed and the target vehicle speed, then the vehicle speed error value and the vehicle speed error integral value are determined according to the current vehicle speed and the target vehicle speed, the pedal control parameter value is determined according to the vehicle speed error integral value and the parameter algorithm, and the accelerator pedal separation signal value and the brake pedal separation signal value are determined according to the vehicle speed error integral value and the parameter algorithm. According to the method, the accelerator pedal separation signal value and the brake pedal separation signal value are determined, so that the brake pedal opening and the acceleration opening of the vehicle in the simulation system can be determined, and the problem of integral saturation of the PID controller is solved.
According to one embodiment of the present invention, the state parameter includes a simulation step, and the target vehicle speed is calculated according to the target vehicle speed+the acceleration of the current vehicle N-1 times.
According to one embodiment of the present invention, the determining the vehicle speed error value includes: and taking the difference value between the current vehicle speed and the target vehicle speed as the vehicle speed error value.
According to one embodiment of the present invention, the state parameter includes a first control error integral value, wherein the determining the vehicle speed error integral value includes: determining an absolute value of the pedal control parameter value; calculating the vehicle speed error integral value according to the vehicle speed error integral value + (1-absolute value of pedal control parameter value) of N-1 times, wherein N is a positive integer, and is determined by the accuracy of the vehicle speed error integral value.
According to one embodiment of the present invention, wherein the state parameter includes a first control error value, and the determining the pedal control parameter value according to the vehicle speed error integral value and the parameter algorithm includes: and calculating a pedal control parameter value according to the first control error value, the vehicle speed error value and the vehicle speed error integral value.
According to one embodiment of the invention, the vehicle gear is reverse gear, and the pedal control parameter value is greater than zero, the accelerator pedal release signal value is zero, and the brake pedal release signal value is the pedal control parameter value; or the pedal control parameter value is not greater than zero, the accelerator pedal release signal value is the inverse of the pedal control parameter value, and the brake pedal release signal value is zero.
According to one embodiment of the present invention, the vehicle gear is neutral or forward, and the pedal control parameter value is greater than zero, the accelerator pedal release signal value is the pedal control parameter value, and the brake pedal release signal value is zero; or the pedal control parameter value is not greater than zero, the accelerator pedal separation signal value is zero, and the brake pedal separation signal value is the opposite number of the pedal control parameter value.
According to one embodiment of the invention, the vehicle gear is a park gear, the accelerator pedal release signal value is zero, and the brake pedal release signal value is 1.
To achieve the above object, an embodiment of the present invention provides a computing device for anti-integral saturation of a PID controller, the device comprising: the system comprises an acquisition module, a control module and a control module, wherein the acquisition module is used for acquiring state parameters of a current vehicle, and the state parameters comprise a current vehicle speed and a target vehicle speed; the first determining module is used for determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed; the second determining module is used for determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm; and the third determining module is used for determining an accelerator pedal separation signal value and a brake pedal separation signal value by combining the vehicle gear and the pedal control parameter.
To achieve the above object, an electronic device according to an embodiment of a third aspect of the present invention includes: the PID controller anti-integral saturation calculation method is realized by the memory, the processor and the computer program which is stored in the memory and can run on the processor.
To achieve the above object, a fourth embodiment of the present invention provides a computer readable storage medium, where the computer program when executed by a processor implements a method for calculating anti-saturation of integration of a PID controller according to the first embodiment of the present invention.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
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The foregoing and/or additional aspects and advantages of the invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a flow chart of a method of calculating anti-integral saturation of a PID controller according to an embodiment of the invention;
FIG. 2 is a flow chart of a method of calculating anti-integral saturation of a PID controller according to another embodiment of the invention;
FIG. 3 is a schematic diagram of test results of a calculation method of PID controller anti-integral saturation according to an embodiment of the invention;
FIG. 4 is a schematic diagram of test results of a calculation method of PID controller anti-integral saturation according to another embodiment of the invention;
FIG. 5 is a schematic diagram of a PID controller anti-integral saturation computing device according to an embodiment of the invention;
fig. 6 is a schematic structural view of an electronic device according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
In the design of a simulation system of an unmanned algorithm, it is important to construct a vehicle dynamics model, and one core difficulty in the construction of the dynamics model is to calculate the opening degree of a brake pedal and the opening degree of an acceleration pedal of a vehicle in the simulation system according to acceleration issued by a regulation algorithm, wherein the unmanned PID algorithm in the prior art has an integral saturation problem.
The integral saturation is understood as that if the system has deviation in one direction, the output of the PID controller is increased due to continuous accumulation of integral action, so that the mechanical motion of the actuator reaches the limit position, i.e. the device is out of control, if the control amount of the output signal of the controller is continuously increased, the actuator cannot be adjusted according to the signal issued by the controller, at this time, the output control amount exceeds the normal operation range of the mechanical device of the actuator and enters the saturation region (i.e. the actuator stops moving), once the time for entering the saturation region is longer, and in the period for entering the saturation region, the actuator still stays at the limit position and cannot be correspondingly changed in real time, at this time, the simulation system is like out of control, so that the control performance is deteriorated.
Therefore, the invention provides a calculation method and device for integral saturation resistance of a PID controller, electronic equipment and a storage medium.
Specifically, a method, a device, an electronic device and a storage medium for calculating integral saturation resistance of a PID controller according to an embodiment of the present invention are described below with reference to the accompanying drawings.
FIG. 1 is a flow chart of a method of calculating anti-integral saturation of a PID controller according to an embodiment of the invention. It should be noted that, the calculating method of the PID controller anti-integral saturation according to the embodiment of the present invention may be applied to the calculating device of the PID controller anti-integral saturation according to the embodiment of the present invention, where the device may be configured on an electronic device or may be configured in a server. The electronic device may be a PC or a mobile terminal. The embodiment of the present invention is not limited thereto.
As shown in fig. 1, the method for calculating the integral saturation resistance of the PID controller includes:
s110, acquiring state parameters of the current vehicle, wherein the state parameters comprise the current vehicle speed and the target vehicle speed.
In the embodiment of the invention, in the calculation method of the PID controller for resisting integral saturation, the state parameter of the current vehicle can be acquired first. The state parameter may be preset into the memory module.
The state parameters include, but are not limited to, a current vehicle speed, a target vehicle speed, a simulation step size, a first control error value, a first control error integral value and the like.
The method comprises the steps of acquiring the current speed of the vehicle in real time and storing the current speed into a storage module.
And calculating the target vehicle speed according to the simulation step length of the target vehicle speed of N-1 times and the acceleration of the current vehicle.
For example, the simulation step size is 0.05 seconds.
S120, determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed.
In the embodiment of the invention, the current vehicle speed and the target vehicle speed are obtained, the vehicle speed error value can be determined according to the current vehicle speed and the target vehicle speed, and then the vehicle speed error integral value is determined according to the first control error integral value in the vehicle speed error value and the state parameter.
The current vehicle speed and the target vehicle speed are obtained, and the difference value between the current vehicle speed and the target vehicle speed can be used as a vehicle speed error value.
Wherein an absolute value of the pedal control parameter value is determined; calculating a vehicle speed error integral value according to the vehicle speed error integral value + (absolute value of 1-pedal control parameter value) of N-1 times and the first control error integral value, wherein N is a positive integer, and the accuracy of the vehicle speed error integral value is determined. The steady-state error (steady-state error refers to the difference between the expected output and the actual output of the system after the response of the system enters steady state) can be eliminated by calculating the integral value of the vehicle speed error, and the integral saturation problem is also eliminated.
S130, determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm.
In the embodiment of the invention, after calculating the vehicle speed error integral value, the pedal control parameter value can be determined by combining the state parameter including the first control error value and the parameter algorithm.
The pedal control parameter value may be calculated from the first control error value, the vehicle speed error value, and the vehicle speed error integral value.
S140, combining the vehicle gear and the pedal control parameters, determining an accelerator pedal separation signal value and a brake pedal separation signal value.
The vehicle gear comprises a reverse gear, a neutral gear, a forward gear and a parking gear.
In an embodiment of the present invention, different accelerator pedal release signal values and brake pedal release signal values may be determined based on different vehicle gear and pedal control parameters. A specific implementation may be as shown in fig. 2.
As shown in fig. 2, the accelerator pedal separation signal value and the brake pedal separation signal value are determined, and the specific implementation manner is as follows:
s210, determining a gear of the vehicle.
S220, determining that the vehicle gear is reverse gear, the pedal control parameter value is larger than zero, the accelerator pedal separation signal value is zero, and the brake pedal separation signal value is the pedal control parameter value.
In one embodiment of the present invention, when the vehicle gear is determined to be reverse and the pedal control parameter value is not greater than zero, the accelerator pedal release signal value is the opposite of the pedal control parameter value and the brake pedal release signal value is zero.
S230, determining that the vehicle gear is neutral or forward, and the pedal control parameter value is greater than zero, the accelerator pedal release signal value is the pedal control parameter value, and the brake pedal release signal value is zero.
In one embodiment of the present invention, when the vehicle gear is determined to be neutral or forward and the pedal control parameter value is not greater than zero, the accelerator pedal release signal value is zero and the brake pedal release signal value is the opposite of the pedal control parameter value.
S240, determining that the vehicle gear is the parking gear, the accelerator pedal separation signal value is zero, and the brake pedal separation signal value is 1.
In the embodiment of the invention, the vehicle gear is determined to be the parking gear, and then the pedal control parameter is combined to determine the accelerator pedal separation signal value and the brake pedal separation signal value, so that the calculation method of the PID controller for resisting integral saturation is realized, and the method is suitable for high-speed driving simulation scene test and low-speed parking simulation scene.
According to the calculation method of the PID controller for resisting integral saturation, the state parameters of the current vehicle are obtained, the state parameters comprise the current vehicle speed and the target vehicle speed, then the vehicle speed error value and the vehicle speed error integral value are determined according to the current vehicle speed and the target vehicle speed, the pedal control parameter value is determined according to the vehicle speed error integral value and the parameter algorithm, and the accelerator pedal separation signal value and the brake pedal separation signal value are determined according to the vehicle speed error integral value and the parameter algorithm. According to the method, the accelerator pedal separation signal value and the brake pedal separation signal value are determined, so that the brake pedal opening and the acceleration opening of the vehicle in the simulation system can be determined, and the problem of integral saturation of the PID controller is solved.
The calculation method for resisting integral saturation based on the PID controller is shown in figures 3-4, and is the test result of the calculation method for resisting integral saturation of the PID controller at the speed of 20 km/h. The test result is realized on the premise that the driving tracks are the same and the gears are the same. In the actual simulation process, the road surface system is an absolute plane without any texture and noise, the vibration simulation of the power transmission system is omitted, and Gaussian white noise is not introduced into the system observation quantity. The test result of the calculation method of the PID controller for resisting integral saturation comprises test tracking of steering wheel rotation angle and test tracking of acceleration. Wherein "DELTA" represents the actual steering wheel angle and "_represents the target steering wheel angle as shown in FIG. 3; the "Δ" shown in fig. 4 indicates an actual acceleration, and "_indicates a target acceleration. The target steering wheel angle or target acceleration represents the steering wheel angle or acceleration when the PID controller calculates the integral saturation resistance.
Corresponding to the calculation method of integral saturation resistance of the PID controller provided by the above embodiments, an embodiment of the present invention further provides a calculation device of integral saturation resistance of the PID controller, and since the calculation device of integral saturation resistance of the PID controller provided by the embodiment of the present invention corresponds to the calculation method of integral saturation resistance of the PID controller provided by the above embodiments, implementation of the calculation method of integral saturation resistance of the PID controller is also applicable to the calculation device of integral saturation resistance of the PID controller provided by the embodiment, which is not described in detail in the present embodiment. FIG. 5 is a schematic diagram of a PID controller anti-integral saturation computing device according to an embodiment of the invention.
As shown in fig. 5, the calculation device 500 for resisting integral saturation of the PID controller includes: an acquisition module 510, a first determination module 520, a second determination module 530, and a third determination module 540, wherein,
an obtaining module 510, configured to obtain a state parameter of a current vehicle, where the state parameter includes a current vehicle speed and a target vehicle speed;
a first determining module 520, configured to determine a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed;
a second determining module 530, configured to determine a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm;
a third determination module 540 for determining an accelerator pedal release signal value and a brake pedal release signal value in combination with the vehicle gear and the pedal control parameter.
According to the calculation device for the PID controller anti-integral saturation, the state parameters of the current vehicle are obtained, the state parameters comprise the current vehicle speed and the target vehicle speed, then the vehicle speed error value and the vehicle speed error integral value are determined according to the current vehicle speed and the target vehicle speed, the pedal control parameter value is determined according to the vehicle speed error integral value and the parameter algorithm, and the accelerator pedal separation signal value and the brake pedal separation signal value are determined according to the vehicle speed error integral value and the parameter algorithm. Therefore, by determining the accelerator pedal separation signal value and the brake pedal separation signal value, the brake pedal opening and the acceleration opening of the vehicle in the simulation system can be determined, and the problem of integral saturation of the PID controller is solved.
In one embodiment of the present invention, the obtaining module 510 is specifically configured to calculate the target vehicle speed according to the simulation step length of the target vehicle speed+the acceleration of the current vehicle N-1 times, where the state parameter includes a simulation step length.
In one embodiment of the present invention, the first determining module 520 is specifically configured to determine the vehicle speed error value, including: and taking the difference value between the current vehicle speed and the target vehicle speed as the vehicle speed error value.
In one embodiment of the invention, the state parameter comprises a first control error integral value;
calculating the vehicle speed error integral value according to the vehicle speed error integral value + (1-absolute value of pedal control parameter value) of N-1 times, wherein N is a positive integer, and is determined by the accuracy of the vehicle speed error integral value.
In one embodiment of the present invention, the state parameter includes a first control error value, and the second determining module 530 is specifically configured to calculate a pedal control parameter value according to the first control error value, the vehicle speed error value, and the vehicle speed error integral value.
In one embodiment of the present invention, the third determining module 540 is specifically configured to determine that the vehicle gear is reverse gear, the pedal control parameter value is greater than zero, the accelerator pedal release signal value is zero, and the brake pedal release signal value is the pedal control parameter value; or the pedal control parameter value is not greater than zero, the accelerator pedal release signal value is the inverse of the pedal control parameter value, and the brake pedal release signal value is zero.
In yet another embodiment of the present invention, the third determining module 540 is specifically configured to determine that the vehicle gear is neutral or forward, and the pedal control parameter value is greater than zero, the accelerator pedal release signal value is the pedal control parameter value, and the brake pedal release signal value is zero; or the pedal control parameter value is not greater than zero, the accelerator pedal separation signal value is zero, and the brake pedal separation signal value is the opposite number of the pedal control parameter value.
In yet another embodiment of the present invention, the third determining module 540 is specifically configured to determine that the vehicle gear is a park gear, the accelerator pedal release signal value is zero, and the brake pedal release signal value is 1.
Referring now to fig. 6, a schematic diagram of an electronic device 600 (e.g., a terminal device or server of fig. 1) suitable for implementing an embodiment of the present invention is shown. The electronic device in the embodiment of the present invention may include, but is not limited to, a mobile terminal such as a mobile phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a car-mounted terminal (e.g., car navigation terminal), etc., and a stationary terminal such as a digital TV, a desktop computer, etc. The electronic device shown in fig. 6 is only an example and should not be construed as limiting the functionality and scope of use of the embodiments of the invention.
As shown in fig. 6, the electronic device 600 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 601, which may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 602 or a program loaded from a storage means 608 into a Random Access Memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the electronic apparatus 600 are also stored. The processing device 601, the ROM602, and the RAM 603 are connected to each other through a bus 604. An input/output (I/O) interface 605 is also connected to bus 604.
In general, the following devices may be connected to the I/O interface 605: input devices 606 including, for example, a touch screen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, and the like; an output device 607 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage 608 including, for example, magnetic tape, hard disk, etc.; and a communication device 609. The communication means 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. While fig. 6 shows an electronic device 600 having various means, it is to be understood that not all of the illustrated means are required to be implemented or provided. More or fewer devices may be implemented or provided instead.
In particular, according to embodiments of the present invention, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present invention include a computer program product comprising a computer program embodied on a non-transitory computer readable medium, the computer program comprising program code for performing the method shown in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via communication means 609, or from storage means 608, or from ROM 602. The above-described functions defined in the method of the embodiment of the present invention are performed when the computer program is executed by the processing means 601.
The computer readable medium of the present invention may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present invention, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.
In some implementations, the clients, servers may communicate using any currently known or future developed network protocol, such as HTTP (HyperText Transfer Protocol ), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the internet (e.g., the internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed networks.
The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: acquiring state parameters of a current vehicle, wherein the state parameters comprise a current vehicle speed and a target vehicle speed; determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed; determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm; an accelerator pedal release signal value and a brake pedal release signal value are determined in combination with vehicle gear and pedal control parameters.
Alternatively, the computer-readable medium carries one or more programs that, when executed by the electronic device, cause the electronic device to: acquiring state parameters of a current vehicle, wherein the state parameters comprise a current vehicle speed and a target vehicle speed; determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed; determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm; an accelerator pedal release signal value and a brake pedal release signal value are determined in combination with vehicle gear and pedal control parameters.
Computer program code for carrying out operations of the present invention may be written in one or more programming languages, including, but not limited to, an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present invention may be implemented in software or in hardware. The name of the unit does not in any way constitute a limitation of the unit itself, for example the first acquisition unit may also be described as "unit acquiring at least two internet protocol addresses".
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a Complex Programmable Logic Device (CPLD), and the like.
In the context of the present invention, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The above description is only illustrative of the preferred embodiments of the present invention and of the principles of the technology employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in the present invention is not limited to the specific combinations of technical features described above, but also covers other technical features formed by any combination of the technical features described above or their equivalents without departing from the spirit of the disclosure. Such as the above-mentioned features and the technical features disclosed in the present invention (but not limited to) having similar functions are replaced with each other.
Moreover, although operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the invention. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (11)
1. A method for calculating integral saturation resistance of a PID controller, the method comprising:
acquiring state parameters of a current vehicle, wherein the state parameters comprise a current vehicle speed and a target vehicle speed;
determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed;
determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm;
and determining an accelerator pedal separation signal value and a brake pedal separation signal value according to the vehicle gear and the pedal control parameter.
2. The method for calculating the integral saturation resistance of the PID controller according to claim 1, wherein the state parameter includes a simulation step, and the target vehicle speed is calculated according to N-1 times of the target vehicle speed+the acceleration of the current vehicle.
3. The method of claim 1, wherein determining a vehicle speed error value comprises: and taking the difference value between the current vehicle speed and the target vehicle speed as the vehicle speed error value.
4. The method of claim 2, wherein the state parameter further comprises a first control error integral value, and wherein determining the vehicle speed error integral value comprises:
determining an absolute value of the pedal control parameter value;
calculating the vehicle speed error integral value according to the vehicle speed error integral value + (1-absolute value of pedal control parameter value) of N-1 times, wherein N is a positive integer, and is determined by the accuracy of the vehicle speed error integral value.
5. The method of claim 4, wherein the state parameter includes a first control error value, wherein determining a pedal control parameter value based on the vehicle speed error integral value and a parameter algorithm comprises:
and calculating a pedal control parameter value according to the first control error value, the vehicle speed error value and the vehicle speed error integral value.
6. The method of claim 5, wherein the vehicle gear is reverse gear, the pedal control parameter value is greater than zero, the accelerator pedal release signal value is zero, and the brake pedal release signal value is the pedal control parameter value; or the pedal control parameter value is not greater than zero, the accelerator pedal release signal value is the inverse of the pedal control parameter value, and the brake pedal release signal value is zero.
7. The method of claim 5, wherein the vehicle gear is neutral or forward and the pedal control parameter value is greater than zero, the accelerator pedal release signal value is the pedal control parameter value, and the brake pedal release signal value is zero; or the pedal control parameter value is not greater than zero, the accelerator pedal separation signal value is zero, and the brake pedal separation signal value is the opposite number of the pedal control parameter value.
8. The method of claim 5, wherein the vehicle gear is a park gear, the accelerator pedal release signal value is zero, and the brake pedal release signal value is 1.
9. A computing device for anti-integral saturation of a PID controller, the device comprising:
the system comprises an acquisition module, a control module and a control module, wherein the acquisition module is used for acquiring state parameters of a current vehicle, and the state parameters comprise a current vehicle speed and a target vehicle speed;
the first determining module is used for determining a vehicle speed error value and a vehicle speed error integral value according to the current vehicle speed and the target vehicle speed;
the second determining module is used for determining a pedal control parameter value according to the vehicle speed error integral value and a parameter algorithm;
and the third determining module is used for determining an accelerator pedal separation signal value and a brake pedal separation signal value by combining the vehicle gear and the pedal control parameter.
10. An electronic device, comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of calculating the anti-integral saturation of the PID controller of any of claims 1-7.
11. A non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method of calculating the PID controller anti-integral saturation according to any one of claims 1-7.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211687644.3A CN116088293A (en) | 2022-12-27 | 2022-12-27 | Calculation method and device for integral saturation resistance of PID controller and related equipment |
| PCT/CN2023/141996 WO2024140695A1 (en) | 2022-12-27 | 2023-12-26 | Pid controller anti-integral windup calculation method and apparatus, and a related device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211687644.3A CN116088293A (en) | 2022-12-27 | 2022-12-27 | Calculation method and device for integral saturation resistance of PID controller and related equipment |
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| CN116088293A true CN116088293A (en) | 2023-05-09 |
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| CN202211687644.3A Pending CN116088293A (en) | 2022-12-27 | 2022-12-27 | Calculation method and device for integral saturation resistance of PID controller and related equipment |
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| WO (1) | WO2024140695A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024140695A1 (en) * | 2022-12-27 | 2024-07-04 | 合众新能源汽车股份有限公司 | Pid controller anti-integral windup calculation method and apparatus, and a related device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6317637B1 (en) * | 1998-10-22 | 2001-11-13 | National Instruments Corporation | System and method for maintaining output continuity of PID controllers in response to changes in controller parameters |
| KR20170034552A (en) * | 2015-09-21 | 2017-03-29 | 주식회사 브이씨텍 | Speed control apparatus for electric vehicle |
| CN109747651B (en) * | 2018-12-27 | 2021-08-06 | 东软睿驰汽车技术（沈阳）有限公司 | Vehicle control method, device and system |
| CN109747652B (en) * | 2018-12-27 | 2021-02-19 | 东软睿驰汽车技术（沈阳）有限公司 | Vehicle control method, device and system |
| CN114987468A (en) * | 2022-06-09 | 2022-09-02 | 株式会社Iat | Method and device for controlling vehicle target speed, electronic equipment and storage medium |
| CN116088293A (en) * | 2022-12-27 | 2023-05-09 | 合众新能源汽车股份有限公司 | Calculation method and device for integral saturation resistance of PID controller and related equipment |
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2022
- 2022-12-27 CN CN202211687644.3A patent/CN116088293A/en active Pending
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2023
- 2023-12-26 WO PCT/CN2023/141996 patent/WO2024140695A1/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024140695A1 (en) * | 2022-12-27 | 2024-07-04 | 合众新能源汽车股份有限公司 | Pid controller anti-integral windup calculation method and apparatus, and a related device |
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| WO2024140695A1 (en) | 2024-07-04 |
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