CN116076054A - 物理不可克隆函数器件及其操作方法、电子设备 - Google Patents
物理不可克隆函数器件及其操作方法、电子设备 Download PDFInfo
- Publication number
- CN116076054A CN116076054A CN202180002412.7A CN202180002412A CN116076054A CN 116076054 A CN116076054 A CN 116076054A CN 202180002412 A CN202180002412 A CN 202180002412A CN 116076054 A CN116076054 A CN 116076054A
- Authority
- CN
- China
- Prior art keywords
- period
- signal
- nth
- circuit
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 25
- 101100134058 Caenorhabditis elegans nth-1 gene Proteins 0.000 claims abstract description 4
- 230000000630 rising effect Effects 0.000 claims description 14
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000003786 synthesis reaction Methods 0.000 claims description 4
- 230000000737 periodic effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 8
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 7
- 230000000739 chaotic effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010835 comparative analysis Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
- G06F21/725—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits operating on a secure reference time value
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/73—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by creating or determining hardware identification, e.g. serial numbers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
- H04L9/0866—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2151—Time stamp
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Manipulation Of Pulses (AREA)
Abstract
本公开提供了一种物理不可克隆函数器件及其操作方法、电子设备。物理不可克隆函数器件包括:第一信号生成电路,被配置为根据第n个周期的控制信号和第n个周期的输入信号生成第n个周期的第一时钟信号,n为大于或等于2的整数;第二信号生成电路,被配置为根据第n个周期的控制信号和第n个周期的输入信号生成第n个周期的第二时钟信号;输出电路,被配置为根据第n个周期的第一时钟信号和第n个周期的第二时钟信号输出第n个周期的输出信号;和控制电路,被配置为根据参考值对第n个周期的初始控制信号进行处理以得到第n个周期的控制信号,所述参考值包括第n‑1个周期的输出信号的逻辑电平。
Description
PCT国内申请,说明书已公开。
Claims (23)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2021/115755 WO2023028859A1 (zh) | 2021-08-31 | 2021-08-31 | 物理不可克隆函数器件及其操作方法、电子设备 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116076054A true CN116076054A (zh) | 2023-05-05 |
Family
ID=85410728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202180002412.7A Pending CN116076054A (zh) | 2021-08-31 | 2021-08-31 | 物理不可克隆函数器件及其操作方法、电子设备 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20240171411A1 (zh) |
EP (1) | EP4290401A1 (zh) |
CN (1) | CN116076054A (zh) |
WO (1) | WO2023028859A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117010032B (zh) * | 2023-10-07 | 2023-12-15 | 中国人民解放军国防科技大学 | 自动读和清零的sram物理不可克隆函数电路及设备 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110518906B (zh) * | 2019-08-30 | 2023-04-07 | 京东方科技集团股份有限公司 | 信号生成电路及其方法、数字时间转换电路及其方法 |
CN111666595B (zh) * | 2020-07-09 | 2023-08-22 | 中国人民解放军国防科技大学 | 基于延时可配置振荡器的物理不可克隆函数结构 |
CN111966329B (zh) * | 2020-08-18 | 2023-03-21 | 合肥工业大学 | 一种基于物理不可克隆函数puf的真随机数发生器 |
CN113096709B (zh) * | 2021-03-12 | 2022-03-29 | 华中科技大学 | 一种物理不可克隆函数电路及其操作方法 |
-
2021
- 2021-08-31 US US17/788,523 patent/US20240171411A1/en active Pending
- 2021-08-31 EP EP21955421.9A patent/EP4290401A1/en active Pending
- 2021-08-31 WO PCT/CN2021/115755 patent/WO2023028859A1/zh active Application Filing
- 2021-08-31 CN CN202180002412.7A patent/CN116076054A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
US20240171411A1 (en) | 2024-05-23 |
EP4290401A1 (en) | 2023-12-13 |
WO2023028859A1 (zh) | 2023-03-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8738675B2 (en) | Random numbers generation using continuous-time chaos | |
Liu et al. | Delay-introducing method to improve the dynamical degradation of a digital chaotic map | |
JP3696209B2 (ja) | シード生成回路、乱数生成回路、半導体集積回路、icカード及び情報端末機器 | |
Cherkaoui et al. | Design, evaluation, and optimization of physical unclonable functions based on transient effect ring oscillators | |
EP2176739B1 (en) | Method and hardware for generating random numbers using dual oscillator architecture and continuous-time chaos | |
JP2009545769A5 (zh) | ||
CN101957741A (zh) | 一种基于亚阈值特性的真随机数发生器 | |
US20130346459A1 (en) | Method for generating random numbers | |
KR20140110142A (ko) | 난수 발생기 | |
US11487505B2 (en) | Physical unclonable function based true random number generator, method for generating true random numbers, and associated electronic device | |
US7526087B2 (en) | Random number generator | |
CN116076054A (zh) | 物理不可克隆函数器件及其操作方法、电子设备 | |
Meitei et al. | FPGA implantations of TRNG architecture using ADPLL based on FIR filter as a loop filter | |
Vivek et al. | Design and implementation of physical unclonable function in field programmable gate array | |
Bharat Meitei et al. | FPGA implementation of true random number generator architecture using all digital phase-locked loop | |
Shanta et al. | Design of a lightweight reconfigurable prng using three transistor chaotic map | |
CN115632799B (zh) | 一种抗建模可配置双模puf结构及其配置方法 | |
CN114115807A (zh) | 随机数生成器及随机数生成方法 | |
CN117081751A (zh) | 一种高可靠性量化响应仲裁器型puf结构 | |
Ma et al. | A low-cost high-efficiency true random number generator on FPGAs | |
CN108875418A (zh) | Puf特征值的生成方法和具有puf的器件 | |
Deepthi et al. | Hardware stream cipher based on LFSR and modular division circuit | |
WO2021142830A1 (zh) | 随机数生成电路、随机数生成方法和电子设备 | |
Peng et al. | A side-channel attack resistant AES with 500mbps, 1.92 pj/bit PVT variation tolerant true random number generator | |
Peinado et al. | Optimal modes of operation of pseudorandom sequence generators based on DLFSRs |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |