CN116074268A

CN116074268A - Control method of network interface and multi-node server

Info

Publication number: CN116074268A
Application number: CN202211606308.1A
Authority: CN
Inventors: 郭扬清
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2022-12-12
Filing date: 2022-12-12
Publication date: 2023-05-05

Abstract

The embodiment of the application discloses a control method of a network interface and a multi-node server, which are used for controlling the network interface of the multi-node server so as to solve the problem of network loop-back. In the application, the multi-node server may obtain access conditions of each of the M network interfaces, where the access conditions are used to indicate whether the network interfaces access the network cable. When the multi-node server determines that at least 2 network interfaces in the P network interfaces (P is a positive integer less than or equal to M) are connected to the network line based on the connection condition, the multi-node server can select one from the at least 2 network interfaces as a target network interface, open the target network interface, close other network interfaces except the target network interface in the at least 2 network interfaces, and therefore the problem of network loop back between the multi-node server and the switch/router is solved.

Description

Control method of network interface and multi-node server

Technical Field

The present disclosure relates to the field of server technologies, and in particular, to a method for controlling a network interface and a multi-node server.

Background

A multi-node server is a server having a plurality of nodes, which are also called node servers, and the function of one node is equivalent to that of a single node server, so that the multi-node server can be understood as a server in which a plurality of servers are centrally disposed in a space.

Currently, one node of the nodes of the multi-node server is typically designated as a management board, which is used to connect to a network interface to access a network cable, and a user may access a baseboard management controller (baseboard management controller, BMC) of each node of the multi-node server through the management board, that is, the management board may act as a switch of each node of the multi-node server. However, if the node is dedicated to act as a management board, the cost is high and the performance of the node is underutilized.

Disclosure of Invention

The embodiment of the application provides a control method of a network interface and a multi-node server, which are used for controlling the network interface of the multi-node server so as to solve the problem of network loop-back.

The first aspect of the present application provides a control method for a network interface, which is applied to a multi-node server, where the multi-node server includes a switching chip module, at least M nodes, and at least M network interfaces, where the M nodes and the M network interfaces are in one-to-one correspondence, the switching chip module includes N ports, M, N is an integer greater than or equal to 2, and N is greater than M. The M nodes are connected with M ports in N ports in one-to-one correspondence, P ports, which are not connected with the M nodes, in the N ports are connected with P network interfaces in M network interfaces in one-to-one correspondence, the M network interfaces are used for accessing network cables, and P is a positive integer less than or equal to M.

Therefore, after at least one network interface of the P network interfaces is connected with the network cable, the network cable can be connected with the switch/router, M nodes in the multi-node server can send the first data message to the exchange chip module, and the exchange chip module forwards the first data message to the switch/router through the network interface of the P network interfaces, which is connected with the network cable. Or after receiving the second data message, the switch/router forwards the second data message to the exchange chip module through the network interface with the network cable connected to the P network interfaces, and the exchange chip module receives the second data message through the P ports and forwards the second data message to the corresponding node in the M nodes based on the IP address/MAC address of the second data message. And then, the data message of the multi-node server and the switch/router can be forwarded through the exchange chip module, one node in the multi-node server does not need to be specially used as a management board, and the performance of one node is not wasted, so that the cost is reduced.

In addition, the multi-node server may obtain access conditions of each of the M network interfaces, where the access conditions are used to indicate whether the network interfaces access the network cable. When P is greater than or equal to 2, and the multi-node server determines that at least 2 network interfaces of the P network interfaces are connected to the network line based on the connection condition, the multi-node server can select one of the at least 2 network interfaces as a target network interface, open the target network interface, and close other network interfaces except the target network interface of the at least 2 network interfaces, thereby solving the problem of network loop back between the multi-node server and the switch/router.

In some possible implementations, each node in the M nodes obtains an access condition of a corresponding network interface in the M network interfaces, and the master node in the M nodes obtains an access condition of each network interface in the M network interfaces from each node in the M nodes, so that the multi-node server obtains an access condition of each network interface in the M network interfaces.

In some possible implementations, the multi-node service further includes a CPLD chip, where the CPLD chip is connected to each of the M nodes, and each of the M nodes sends an access condition of a corresponding network interface to the CPLD chip, and the master node obtains the access condition of each of the M network interfaces from the CPLD chip, so that the master node may obtain the access condition of each of the M network interfaces.

In some possible implementations, the master node opens the target network interface and closes other network interfaces except the target network interface in at least 2 network interfaces, so that the multi-node server is realized to open the target network interface and close other network interfaces except the target network interface in at least 2 network interfaces, and the problem of network loopback is solved.

In some possible implementations, each of the M network interfaces includes a physical layer chip and a registered jack RJ45 interface, and each of the M nodes is correspondingly connected to one physical layer chip, where the physical layer chip and the RJ45 interface are correspondingly connected. Each node in the M nodes obtains the link state of the corresponding physical layer chip in the M network interfaces, the link state is accessed or not accessed, the link state is used as the access condition, and the access condition of each network interface in the M network interfaces is obtained, so that the multi-node server obtains the access condition of each network interface in the M network interfaces.

A second aspect of the present application provides a multi-node server comprising: the switching chip module comprises N ports, M, N are integers which are more than or equal to 2, and N is more than M;

the M nodes are connected with M ports in the N ports in a one-to-one correspondence manner, P ports, which are not connected with the M nodes, in the N ports are connected with P network interfaces in the M network interfaces in a one-to-one correspondence manner, wherein the M network interfaces are used for accessing network cables, and P is a positive integer less than or equal to M;

The M nodes are used for acquiring the access conditions of the corresponding network interfaces in the M network interfaces, and the access conditions are used for indicating whether the network interfaces are accessed to a network cable or not;

the M nodes are further configured to select one of the at least 2 network interfaces as a target network interface when P is greater than or equal to 2 and it is determined that at least 2 network interfaces of the P network interfaces access a network line based on the access condition;

the M nodes are further configured to open the target network interface and close other network interfaces of the at least 2 network interfaces except the target network interface.

In some possible implementations, each node of the M nodes is configured to obtain an access condition of a corresponding network interface of the M network interfaces; and the master node in the M nodes is used for acquiring the access condition of each network interface in the M network interfaces from each node in the M nodes.

In some possible implementations, the multi-node service further includes a CPLD chip that connects each of the M nodes; each node in the M nodes is used for sending an access condition of a corresponding network interface to the CPLD chip; and the master node is used for acquiring the access condition of each network interface in the M network interfaces from the CPLD chip.

In some possible implementations, the master node is further configured to turn on the target network interface and turn off other network interfaces of the at least 2 network interfaces other than the target network interface.

In some possible implementations, each network interface of the M network interfaces includes a physical layer chip and a registered jack RJ45 interface, each node of the M nodes is correspondingly connected to one physical layer chip, where the physical layer chip and the RJ45 interface are correspondingly connected; and each node in the M nodes is further used for acquiring the link state of the corresponding physical layer chip in the M network interfaces, wherein the link state is accessed or not accessed, and the link state is used as the access condition to acquire the access condition of each network interface in the M network interfaces.

A third aspect of the present application provides a computer readable storage medium having instructions stored therein which, when run on a computer, cause the computer to perform the method of any of the first or second or third aspects described above.

A fourth aspect of the present application provides a computer program product comprising computer-executable instructions stored in a computer-readable storage medium; the at least one processor of the apparatus may read the computer-executable instructions from a computer-readable storage medium, the at least one processor executing the computer-executable instructions causing the apparatus to implement the method provided by the first aspect or any one of the possible implementations of the first aspect.

A fifth aspect of the present application provides a communication device that may include at least one processor, a memory, and a communication interface. At least one processor is coupled with the memory and the communication interface. The memory is for storing instructions, the at least one processor is for executing the instructions, and the communication interface is for communicating with other communication devices under control of the at least one processor. The instructions, when executed by at least one processor, cause the at least one processor to perform the method of the first aspect or any possible implementation of the first aspect.

A sixth aspect of the present application provides a chip system comprising a processor for supporting the implementation of the functions referred to in the first aspect or any one of the possible implementations of the first aspect.

In one possible design, the chip system may further include memory to hold the necessary program instructions and data. The chip system can be composed of chips, and can also comprise chips and other discrete devices.

The technical effects of the second to sixth aspects or any one of the possible implementation manners may be referred to the technical effects of the first aspect or the technical effects of the different possible implementation manners of the first aspect, which are not described herein.

Drawings

FIG. 1 is a schematic diagram of a multi-node server according to an embodiment of the present application;

FIG. 2-1 is a schematic diagram of a composition structure of a multi-node server according to an embodiment of the present application;

FIG. 2-2 is a schematic diagram of another structure of a multi-node server according to an embodiment of the present application;

FIGS. 2-3 are schematic diagrams illustrating another composition structure of a multi-node server according to an embodiment of the present application;

FIGS. 2-4 are schematic diagrams illustrating the structure of a multi-node server connection switch/router according to embodiments of the present application;

FIGS. 2-5 are schematic diagrams illustrating another structure of a multi-node server connection switch/router according to embodiments of the present application;

FIG. 3-1 is a schematic diagram of another composition structure of a multi-node server according to an embodiment of the present application;

FIG. 3-2 is a schematic diagram of another structure of a multi-node server according to an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a multi-node server according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of a communication device according to an embodiment of the present application.

Detailed Description

Embodiments of the present application are described below with reference to the accompanying drawings.

The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances and are merely illustrative of the manner in which the embodiments of the application described herein have been described for objects of the same nature. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

For example, referring to fig. 1, a schematic diagram of a composition structure of a multi-node server 100 is shown, where the multi-node server 100 includes 4 nodes, which are nodes 110-140 respectively.

The multi-node server 100 is a server having a plurality of nodes. Nodes are also referred to as node servers, and a node functions as a single-node server, so that the multi-node server 100 can be understood as a system in which a plurality of servers are centrally disposed in a space.

In an actual application scenario, the multi-node server 100 has high scalability, high availability, and high manageability. High scalability means that nodes can be added or subtracted in a multi-node server as demand and load change. High availability means that by transferring an application on a failed node to a backup node for operation, multi-node server 100 can increase the normal operating time to greater than 99.9%, greatly reducing downtime of multi-node server 100 and applications. High manageability means that a user can remotely manage one multi-node server to achieve an effect similar to a stand-alone system.

With the continuous acceleration of the popularization of new generation information technologies represented by cloud computing, big data, mobile internet, intelligent terminals and internet of things, the problems of occupation and power consumption of data centers become a great difficulty, and when the big data centers are designed, built and operated, the data centers develop towards a high-density mode, and the multi-node server 100 has the characteristics of high scalability, high availability and high manageability, energy conservation, easy maintenance and the like, and has a wider market space.

The servers may vary considerably in configuration or performance and may include at least one central processing unit (central processing units, CPU) (e.g., at least one processor) and memory, at least one storage medium (e.g., at least one mass storage device) storing applications or data. The memory and storage medium may be transitory or persistent. The program stored on the storage medium may include at least one module, and each module may include a series of instruction operations on the server. Still further, the central processor may be configured to communicate with a storage medium and execute a series of instruction operations on the storage medium on a server. The Server may also include at least one power source, at least one wired or wireless network interface, at least one input output interface, and/or at least one operating system, such as Windows Server, mac OS X, unix, linux, freeBSD, netWare, and the like. In some possible implementations, the server may also be a cloud server, which is not limited herein.

A server, also called a server, is a device that provides computing services. Since a server needs to respond to a service request and process the service, and provide a reliable service, in general, the server should have a capability of bearing the service and guaranteeing the service, and the server needs to have a strong processing capability, high stability, high reliability, high security, expandability, and manageability. In the embodiment of the present application, the server may be an x86 server, where the x86 server is also called a complex instruction set (complex instruction set computer, CISC) architecture server, i.e., a so-called personal computer (personal computer, PC) server, which is a server based on a PC architecture using intel or other processor chips compatible with the x86 instruction set and windows operating system.

Therefore, the application provides a multi-node server, which comprises a switching chip module, at least M nodes and at least M network interfaces, wherein the M nodes and the M network interfaces are in one-to-one correspondence, the switching chip module comprises N ports, M, N is an integer greater than or equal to 2, and N is greater than M. The M nodes are connected with M ports in N ports in one-to-one correspondence, P ports, which are not connected with the M nodes, in the N ports are connected with P network interfaces in M network interfaces in one-to-one correspondence, the M network interfaces are used for accessing network cables, and P is a positive integer less than or equal to M.

In some possible implementations, each of the M network interfaces includes a physical layer chip and a Registered Jack (RJ) 45 interface, where each of the M nodes is correspondingly connected to one physical layer chip, and the physical layer chip and the RJ45 interface are correspondingly connected.

Then, after at least one network interface of the P network interfaces is connected to the network cable, the network cable may be connected to the switch/router, and M nodes in the multi-node server may send the first data packet to the switch chip module, where the switch chip module forwards the first data packet to the switch/router through the network interface of the P network interfaces, where the network cable is connected to the network interface. Or after receiving the second data message, the switch/router forwards the second data message to the exchange chip module through the network interface with the network cable connected to the P network interfaces, and the exchange chip module receives the second data message through the P ports and forwards the second data message to the corresponding node in the M nodes based on the IP address/MAC address of the second data message. And then, the data message of the multi-node server and the switch/router can be forwarded through the exchange chip module, one node in the multi-node server does not need to be specially used as a management board, and the performance of one node is not wasted, so that the cost is reduced.

Illustratively, as shown in FIG. 2-1, the multi-node server 200 includes a switch chip module 210, 4 nodes 220, and 4 network interfaces 230. The switch chip module 210 may include 8 ports, where 4 ports are used to connect to 4 nodes 220, and another 4 ports are used to connect to any one of 4 network interfaces 230,4 network interfaces 230 for accessing a network cable.

In some possible implementations, among the other 4 ports of the 8 ports to which the 4 nodes are not connected, there may be P ports connected in one-to-one correspondence with P of the 4 network interfaces, where P may be equal to 1, 2, 3, or 4. For example, if P is equal to 2, 2 ports of the 4 ports are connected with 2 network interfaces of the 4 network interfaces in a one-to-one correspondence; or, P is equal to 3, 3 ports of the 4 ports are connected with 3 network interfaces of the 4 network interfaces in a one-to-one correspondence.

In some possible implementations, each of the 4 network interfaces includes a Physical (PHY) chip and a Registered Jack (RJ) 45 interface, where each of the 4 nodes is correspondingly connected to one physical chip, and the physical chip and the RJ45 interface are correspondingly connected.

In some possible implementations, the switch chip module may include 1 switch chip, or may include 2 switch chips connected, which is not limited herein. In the following, 1 switch chip and 2 switch chips are respectively taken as examples.

In some possible implementations, as shown in fig. 2-2, switch chip module 220 may include 1 switch chip that includes at least 5 interfaces, such as 5 interfaces, 8 interfaces, or 10 interfaces, here illustrated as 8 interfaces, respectively, port00, port01, port02, port03, port10, port11, port12, port13. Among them, node 1 in multi-node server 210 is connected to port00, node 2 is connected to port01, node 3 is connected to port02, and node 4 is connected to port03. And P ports of port10, port11, port12, port13 are connected in one-to-one correspondence with P network interfaces of the 4 network interfaces. For example, if P is equal to 2, then port10 and port13 in the 4 ports are connected in one-to-one correspondence with the network interfaces corresponding to node 1 and node 4 in the 4 network interfaces; or, if P is equal to 3, port10, port11 and port13 in the 4 ports are connected in one-to-one correspondence with the network interfaces corresponding to node 1, node 2 and node 4 in the 4 network interfaces.

Wherein 4 network interfaces are used to access the network lines to connect the switches/routers. The switching chip is used for receiving the first data message from the nodes 1-4 through the ports 00-03 and forwarding the first data message to the switch/router through the network interface of the access network cable. Or the switch/router receives the second data message, sends the second data message to the switch chip through the connected network interface, receives the second data message through the ports 10-13, and forwards the second data message to the corresponding node in the 4 nodes based on the IP address/MAC address of the second data message.

The switch/router is a hardware device connected with two or more user devices, and plays a role of a gateway between the user devices, and the switch/router is a special intelligent network device capable of reading a destination address in a message and deciding how to transmit the message according to the destination address; the switch/router can understand different protocols, such as an ethernet protocol used by a local area network, a transmission control protocol/interconnection protocol (Transmission Control Protocol/Internet Protocol, TCP/IP) protocol used by the internet, etc., so that the switch/router can analyze destination addresses of messages transmitted from various different types of networks, and convert non-TCP/IP addresses into TCP/IP addresses, or vice versa; the messages are then transmitted to the destination address according to the routing algorithm in an optimal transmission path so that the switch/router can connect the non-TCP/IP network to the Internet.

In some possible implementations, the switch chip module 220 may include 2 switch chips connected, namely, switch chip 1 and switch chip 2, where the switch chip 2 connects each node in the multi-node server 210, and the switch chip 1 is used to connect M network interfaces. In some possible implementations, the switch chip 2 and the switch chip 1 may be connected by a reduced gigabit media independent interface (reduced gigabit media independent interface, RGMII) interface, or otherwise connected, without limitation herein.

As illustrated in fig. 2-3, switch chip 1 includes 4 ports, port00, port01, port02, port03, respectively. Switch chip 2 also includes 4 ports, port10, port11, port12, port13, respectively. Wherein port00 in switching chip 2 is connected to node 1, port01 is connected to node 2, port02 is connected to node 3, and port03 is connected to node 4. Each port in the switch chip 1 is connected to a PHY chip, each PHY chip is connected to an RJ45 interface, and the switch/router can access any one or more of the 4 RJ45 interfaces, so that the multi-node server 200 is connected to the network.

The switching chip is used for receiving the first data message from the nodes 1-4 through the ports 00-03 and forwarding the first data message to the switch/router through the network interface of the access network cable. Or the switch/router receives the second data message, sends the second data message to the switch chip through the connected network interface, receives the second data message through the ports 10-13, and forwards the second data message to the corresponding node in the 4 nodes based on the IP address/MAC address of the second data message.

Then, the switch chip 2 may receive the first data packet sent by the nodes 1 to 4, and forward the first data packet to the switch chip 1, where the switch chip 1 forwards the first data packet to the switch/router through a network interface of the access network lines of the 4 network interfaces. The switch chip 1 may also receive the second data packet sent by the switch/router through the network interface of the access network lines in the 4 network interfaces, and forward the second data packet to the switch chip 2, where the switch chip 2 forwards the second data packet to each node in the multi-node server 200 based on the IP address/MAC address in the second data packet.

It can be seen that, since at least one network interface of the 4 network interfaces is connected to the network cable, as shown in fig. 2-4, the network cable can be connected to the switch/router, 4 nodes in the multi-node server 200 can send the first data packet to the switch chip module 210, and the switch chip module 210 forwards the first data packet to the switch/router through the network interface of the 4 network interfaces, which is connected to the network cable. Or after receiving the second data message, the switch/router forwards the second data message to the switch chip module 210 through the network interface with the network cable connected to the 4 network interfaces, and the switch chip module receives the second data message through the P ports and forwards the second data message to the corresponding node in the M nodes based on the IP address/MAC address of the second data message. Then, the data message forwarding between the multi-node server 200 and the switch/router can be realized through the switch chip module 210, and one node in the multi-node server 200 does not need to be specially used as a management board, so that the performance of the one node is not wasted, and the cost is reduced.

In some scenarios, due to user misoperation, the switch/router may be pulled to multiple network wires simultaneously to access the multi-node server 200, and at least 2 network interfaces in the multi-node server 200 may be connected to the switch/router, i.e. the switch chip 1 may be connected to the switch/router through at least 2 ports. For example, as shown in fig. 2-5, the network interfaces corresponding to port10 and port13 in switch chip 1 are respectively connected to a switch/router. If the first data packet is a broadcast packet, the switch/router forwards the first data packet to port13 of the switch chip 1, and the switch chip 1 sends the first data packet to the switch/router again through port10 based on the IP address/MAC address of the first data packet, so that the network loop is formed. The problem of network loopback may cause the repeated forwarding of the first data packet between the multi-node server and the switch/router, so as to form a traffic black hole, occupy the bandwidth resources of the switch/router, affect the forwarding of normal service data, and cause poor user experience.

Therefore, the present application provides a method for controlling network interfaces, where a multi-node server may obtain access conditions of each of M network interfaces, where the access conditions are used to indicate whether the network interfaces access a network cable. When P is greater than or equal to 2, and the multi-node server determines that at least 2 network interfaces of the P network interfaces are connected to the network line based on the connection condition, the multi-node server can select one of the at least 2 network interfaces as a target network interface, open the target network interface, and close other network interfaces except the target network interface of the at least 2 network interfaces, thereby solving the problem of network loop back between the multi-node server and the switch/router.

In some possible implementations, as shown in fig. 3-1, the multi-node service 200 may also include a complex programmable logic device (complex programmable logic device, CPLD) chip 240, the CPLD chip 240 connecting each of the M nodes. The CPLD chip may be coupled via an integrated circuit bus (inter-integrated circuit, IIC) interface M nodes, for example, or by other means, without limitation. The CPLD chip 240 is configured to receive the access conditions of the corresponding network interfaces sent by each of the M nodes 220, and return the access conditions of the corresponding network interfaces of each of the M nodes 220 under the request of the master node.

Referring to fig. 3-2, the control method of the network interface provided in the embodiment of the present application mainly includes the following steps:

301. each node in the M nodes obtains the access condition of the corresponding network interface in the M network interfaces.

In some possible implementations, each of the M network interfaces may include a PHY chip and a registration socket RJ45 interface, where each of the M nodes is correspondingly connected to one physical layer chip, and the physical layer chip and the RJ45 interface are correspondingly connected. In the embodiment of the application, the access condition is used for indicating whether the network interface accesses the network cable. Illustratively, as shown in FIGS. 2-5, the network interfaces to which port10 and port13 in the switch chip module are correspondingly connected each access a network cable, which is connected to a switch/router.

In some possible implementations, each node in the M nodes may obtain a link state of a corresponding physical layer chip in the M network interfaces, where the link state is accessed or not accessed, and the link state is used as an access condition to obtain an access condition of each network interface in the M network interfaces. Illustratively, as shown in FIGS. 2-5, node 1 obtains the link state of the PHY chip connected to port10 in the switch chip module, node 2 obtains the link state of the PHY chip connected to port11 in the switch chip module, node 3 obtains the link state of the PHY chip connected to port12 in the switch chip module, and node 4 obtains the link state of the PHY chip connected to port13 in the switch chip module. The link states acquired by the node 1 and the node 4 are accessed, and the link states acquired by the node 2 and the node 3 are not accessed.

302. Each node in the M nodes sends the access condition of the corresponding network interface to the CPLD chip.

In this embodiment of the present application, after each node in the M nodes obtains the access condition of the corresponding network interface in the M network interfaces, each node may send the access condition of the corresponding network interface to the CPLD chip.

2-5, the access condition sent by the node 1 to the CPLD chip is access, the access condition sent by the node 2 to the CPLD chip is not access, the access condition sent by the node 3 to the CPLD chip is not access, and the access condition sent by the node 4 to the CPLD chip is access, so that the CPLD chip obtains the access condition of the corresponding network interfaces of each node in the nodes 1-4.

303. The master node obtains the access condition of each network interface in the M network interfaces from the CPLD chip.

In some possible implementations, the CPLD chip may determine a master node of the M nodes. For example, the CPLD chip may randomly determine any one of M nodes as a master node, or may determine one node as a master node based on the priority order. For example, if the priority order of the nodes 1 to 4 is node 1, node 2, node 3, node 4, the CPLD chip preferentially determines the node 1 as the master node, if the node 1 is not accessed to the multi-node server, the node 2 is selected as the master node, and so on. For example, as shown in fig. 2-5, nodes 1-4 all access a multi-node server, and the CPLD chip designates node 1 as the master node based on a principle of a preset sequence.

In some possible implementations, after the CPLD chip formulates the master node of the M nodes, the master node may obtain the access condition of each of the M network interfaces from the CPLD chip.

Through the steps 302 to 303, the access condition of each network interface in the M network interfaces is obtained from each node in the M nodes by the master node, and the access condition of each network interface in the M network interfaces is obtained by the multi-node server.

304. When the master node determines that at least 2 network interfaces in the P network interfaces are accessed to the network line based on the access condition, one network interface is selected from the at least 2 network interfaces to serve as a target network interface.

Illustratively, if P is equal to 2, then port10 and port13 in the 4 ports are connected in one-to-one correspondence with the network interfaces corresponding to node 1 and node 4 in the 4 network interfaces; or, if P is equal to 3, port10, port11 and port13 in the 4 ports are connected in one-to-one correspondence with the network interfaces corresponding to node 1, node 2 and node 4 in the 4 network interfaces.

In some possible implementations, when P is greater than or equal to 2, and the master node determines that only 1 network interface of the P network interfaces accesses the network cable based on the access condition, there is no problem of network loopback, and then the master node does not need to close any network interface. For example, if P is equal to 1, port10 in 4 ports is connected to network interfaces corresponding to node 1 in 4 network interfaces in a one-to-one correspondence manner, a broadcast message sent by a node may be forwarded to a switch/router through port10, and since no network interface other than the network interface corresponding to node 1 in P network interfaces is accessed, the switch/router cannot forward the broadcast message to the switch chip module through other network interfaces, and no problem of network loopback exists, and then the master node does not need to close any network interface.

In some possible implementations, if the master node determines that at least 2 network interfaces of the M network interfaces access the network line based on the access condition, then a problem of network looping may occur. For example, if P is equal to 3, port10, port11, and port13 in the 4 ports are connected in one-to-one correspondence with the network interfaces corresponding to node 1, node 2, and node 4 in the 4 network interfaces, where the network interfaces corresponding to node 1 and node 4 all access the network line. Then, when the broadcast message sent by the node 1 is forwarded to the switch/router through the port10 (or the port 13), and since the network interfaces corresponding to the node 1 and the network interfaces corresponding to the node 4 in the P network interfaces are connected with the network cable, the switch/router forwards the broadcast message to the switch chip module through the network interfaces corresponding to the port13, and the switch chip module forwards the broadcast message to the switch/router through the port10, so that the problem of network loopback is formed. The master node may select one of port10 and port13 as the target network interface with which to subsequently transmit the data message.

2-5, the network interfaces corresponding to the node 1 and the node 4 respectively have access to a network cable, and the master node is set as the node 1, where the node 1 may determine one of the network interfaces corresponding to the node 1 and the node 4 respectively as a target network interface, for example, determine that the network interface corresponding to the node 1 is the target network interface, and then all interactions of the data packets of the multi-node server and the switch/router are transmitted through the target network interface.

305. The master node opens the target network interface and closes other network interfaces among the at least 2 network interfaces than the target network interface.

In the embodiment of the application, after the master node determines the target network interface, the target network interface may be opened, and other network interfaces except the target network interface in at least 2 network interfaces may be closed. For example, as shown in fig. 2-5, node 1 (the master node) may open the network interface corresponding to node 1 and close the network interface corresponding to node 4.

It should be noted that, for simplicity of description, the foregoing method embodiments are all expressed as a series of action combinations, but it should be understood by those skilled in the art that the present application is not limited by the order of actions described, as some steps may be performed in other order or simultaneously in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required in the present application.

In order to facilitate better implementation of the above-described aspects of the embodiments of the present application, the following further provides related devices for implementing the above-described aspects.

Referring to fig. 4, a multi-node server 400 provided in an embodiment of the present application may include:

the switching chip module 410, at least M nodes 420 and at least M network interfaces 430, wherein the M nodes 420 and the M network interfaces 430 are in one-to-one correspondence, the switching chip module 410 comprises N ports, M, N are integers greater than or equal to 2, and N is greater than M;

the M nodes 420 are connected with M ports of the N ports in a one-to-one correspondence manner, P ports of the N ports, to which the M nodes 420 are not connected, are connected with P network interfaces of the M network interfaces 430 in a one-to-one correspondence manner, and P is a positive integer less than or equal to M in the M network interfaces 430 for accessing a network cable;

the M nodes 420 are configured to obtain access conditions of corresponding network interfaces in the M network interfaces 430, where the access conditions are used to indicate whether the network interfaces access a network cable;

the M nodes 420 are further configured to select one of the at least 2 network interfaces as a target network interface when P is greater than or equal to 2 and it is determined that at least 2 network interfaces of the P network interfaces 430 access a network line based on the access condition;

the M nodes 420 are further configured to open the target network interface and close other network interfaces of the at least 2 network interfaces except the target network interface.

In some possible implementations, each node in the M nodes 420 is configured to obtain an access condition of a corresponding network interface in the M network interfaces 430; the master node in the M nodes 420 is configured to obtain access conditions of each of the M network interfaces 430 from each of the M nodes 420.

In some possible implementations, the multi-node service 400 further includes a CPLD chip 440, the CPLD chip 440 connecting each of the M nodes 420; each node in the M nodes 420 is configured to send an access condition of a corresponding network interface to the CPLD chip 440; the master node is configured to obtain, from the CPLD chip 440, access conditions of each of the M network interfaces 430.

In some possible implementations, each of the M network interfaces 430 includes a physical layer chip and a registered jack RJ45 interface, and each of the M nodes 420 is correspondingly connected to one physical layer chip, where the physical layer chip and the RJ45 interface are correspondingly connected; each node in the M nodes 420 is further configured to obtain a link state of a corresponding physical layer chip in the M network interfaces 430, where the link state is accessed or not accessed, and the link state is used as the access condition to obtain the access condition of each network interface in the M network interfaces 430.

It should be noted that, because the content of information interaction and execution process between the modules/units of the above-mentioned device is based on the same concept as the method embodiment of the present application, the technical effects brought by the content are the same as the method embodiment of the present application, and specific content can be referred to the description in the method embodiment shown in the foregoing application, which is not repeated here.

The embodiment of the application also provides a computer storage medium, wherein the computer storage medium stores a program, and the program executes part or all of the steps described in the embodiment of the method.

Referring to fig. 5, referring to another communication device provided in the embodiment of the present application, a communication device 500 includes:

a receiver 501, a transmitter 502, a processor 503 and a memory 504. In some embodiments of the present application, the receiver 501, transmitter 502, processor 503, and memory 504 may be connected by a bus or other means, where a bus connection is illustrated in fig. 5.

Memory 504 may include read only memory and random access memory and provides instructions and data to processor 503. A portion of the memory 504 may also include non-volatile random access memory (NVRAM). Memory 504 stores an operating system and operating instructions, executable modules or data structures, or a subset thereof, or an extended set thereof, where the operating instructions may include various operating instructions for performing various operations. The operating system may include various system programs for implementing various underlying services and handling hardware-based tasks.

The processor 503 controls the operation of the communication device 500, the processor 503 may also be referred to as a central processing unit (central processing unit, CPU). In a specific application, the various components of the communications device 500 are coupled together by a bus system, which may include a power bus, a control bus, a status signal bus, and the like, in addition to a data bus. For clarity of illustration, however, the various buses are referred to in the figures as bus systems.

The method disclosed in the embodiments of the present application may be applied to the processor 503 or implemented by the processor 503. The processor 503 may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuitry of hardware in the processor 503 or instructions in the form of software. The processor 503 may be a general purpose processor, a digital signal processor (digital signal processing, DSP), an application specific integrated circuit (application specific integrated circuit, ASIC), a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in hardware, in a decoded processor, or in a combination of hardware and software modules in a decoded processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory 504 and the processor 503 reads the information in the memory 504 and in combination with its hardware performs the steps of the method described above.

The receiver 501 may be configured to receive input digital or character information and generate signal inputs related to related settings and function control, the transmitter 502 may include a display device such as a display screen, and the transmitter 502 may be configured to output digital or character information via an external interface.

In this embodiment, the processor 503 is configured to execute the foregoing method for controlling a network interface.

In another possible design, when multi-node server 400 and communication device 500 are chips, it includes: a processing unit, which may be, for example, a processor, and a communication unit, which may be, for example, an input/output interface, pins or circuitry, etc. The processing unit may execute the computer-executable instructions stored in the storage unit to cause the chip in the terminal to perform the method for transmitting wireless report information according to any one of the above first aspects. Alternatively, the storage unit is a storage unit in the chip, such as a register, a cache, or the like, and the storage unit may also be a storage unit in the terminal located outside the chip, such as a read-only memory (ROM) or other type of static storage device that may store static information and instructions, a random access memory (random access memory, RAM), or the like.

The processor mentioned in any of the above may be a general-purpose central processing unit, a microprocessor, an ASIC, or one or more integrated circuits for controlling the execution of the programs of the above method.

It should be further noted that the above-described apparatus embodiments are merely illustrative, and that the units described as separate units may or may not be physically separate, and that units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in the drawings of the embodiment of the device provided by the application, the connection relation between the modules represents that the modules have communication connection therebetween, and can be specifically implemented as one or more communication buses or signal lines.

From the above description of the embodiments, it will be apparent to those skilled in the art that the present application may be implemented by means of software plus necessary general purpose hardware, or of course may be implemented by dedicated hardware including application specific integrated circuits, dedicated CPUs, dedicated memories, dedicated components and the like. Generally, functions performed by computer programs can be easily implemented by corresponding hardware, and specific hardware structures for implementing the same functions can be varied, such as analog circuits, digital circuits, or dedicated circuits. However, a software program implementation is a preferred embodiment in many cases for the present application. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a readable storage medium, such as a floppy disk, a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk or an optical disk of a computer, etc., including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the method described in the embodiments of the present application.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product.

The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be stored by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy Disk, a hard Disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

Claims

1. The control method of the network interface is characterized by being applied to a multi-node server, wherein the multi-node server comprises a switching chip module, at least M nodes and at least M network interfaces, the M nodes and the M network interfaces are in one-to-one correspondence, the switching chip module comprises N ports, M, N are integers which are more than or equal to 2, and N is more than M;

the M nodes are connected with M ports in the N ports in a one-to-one correspondence manner, P ports, which are not connected with the M nodes, in the N ports are connected with P network interfaces in the M network interfaces in a one-to-one correspondence manner, the M network interfaces are used for accessing network cables, and P is a positive integer less than or equal to M;

the method comprises the following steps:

the multi-node server obtains access conditions of each network interface in the M network interfaces, wherein the access conditions are used for indicating whether the network interfaces access network cables or not;

when P is more than or equal to 2 and the multi-node server determines that at least 2 network interfaces in the P network interfaces access network lines based on the access condition, selecting one from the at least 2 network interfaces as a target network interface;

the multi-node server opens the target network interface and closes other network interfaces of the at least 2 network interfaces than the target network interface.

2. The method of claim 1, wherein the multi-node server obtaining access conditions for each of the M network interfaces comprises:

each node in the M nodes acquires the access condition of a corresponding network interface in the M network interfaces;

and the master node acquires the access condition of each network interface in the M network interfaces from each node in the M nodes, wherein the master node is one of the M nodes.

3. The method of claim 2, wherein the multi-node service further comprises a CPLD chip that connects each of the M nodes, the method further comprising:

each node in the M nodes sends an access condition of a corresponding network interface to the CPLD chip;

and the master node acquires the access condition of each network interface in the M network interfaces from the CPLD chip.

4. A method according to claim 2 or 3, wherein the multi-node server opens the target network interface and closes other network interfaces of the at least 2 network interfaces than the target network interface, comprising:

the master node opens the target network interface and closes other network interfaces of the at least 2 network interfaces than the target network interface.

5. The method according to any one of claims 1-4, wherein each of the M network interfaces includes a physical layer chip and a registered jack RJ45 interface, each of the M nodes being correspondingly connected to one physical layer chip, wherein the physical layer chip and the RJ45 interface are correspondingly connected;

the multi-node server obtaining access conditions of each network interface in the M network interfaces includes:

and each node in the M nodes acquires the link state of the corresponding physical layer chip in the M network interfaces, wherein the link state is accessed or not accessed, and the link state is used as the access condition to acquire the access condition of each network interface in the M network interfaces.

6. A multi-node server for performing the method of any of the preceding claims 1-5.

7. A computer readable storage medium, characterized in that the computer readable storage medium stores a program that causes a computer device to execute the method according to any one of claims 1-5.

8. A communication device comprising at least one processor, a memory, and a communication interface;

The at least one processor is coupled with the memory and the communication interface;

the memory is used for storing instructions, the processor is used for executing the instructions, and the communication interface is used for communicating with other communication devices under the control of the at least one processor;

the instructions, when executed by the at least one processor, cause the at least one processor to perform the method of any of claims 1-5.

9. A chip system comprising a processor and a memory, the memory and the processor being interconnected by a line, the memory having instructions stored therein, the processor being configured to perform the method of any of claims 1-5.