CN116073687A - Broadband inverter power supply with analog control loop - Google Patents
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0012—Control circuits using digital or numerical techniques
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention belongs to the technical field of power conversion circuits, and particularly relates to a broadband inverter power supply with an analog control loop. A broadband inverter power supply with an analog control loop, comprising: the device comprises a hysteresis PID (proportion integration differentiation) operation circuit, a hysteresis operation circuit, an SPWM (sinusoidal pulse width modulation) generation circuit, a PD (potential difference) operation circuit and a voltage sampling circuit, wherein the output end of the hysteresis PID operation circuit is sequentially and electrically connected with the input ends of the hysteresis operation circuit, the SPWM generation circuit and an inverter power supply, the output end of the inverter power supply is electrically connected with the voltage sampling circuit, the voltage sampling circuit is respectively and electrically connected with the input end of the hysteresis PID operation circuit and the PD operation circuit, and the PD operation circuit is electrically connected with the input end of the hysteresis operation circuit. The invention adopts the double-loop control of the capacitor current inner loop and the instantaneous voltage outer loop to specially design the control loop, has the advantages of wide output frequency band and good dynamic response following performance, and can be widely applied to various alternating current power supply systems.
Description
Technical Field
The invention belongs to the technical field of power conversion circuits, and particularly relates to a broadband inverter power supply with an analog control loop.
Background
As ac power applications become wider, so too does the demand for a wider range of output frequencies, and a faster response under different loads is also required. Therefore, it is important to provide an analog control loop of the broadband inverter.
The broadband analog control mode has the advantages of simple method, convenient implementation, low transmission distortion, high reliability and the like. Most of traditional inverter power supplies adopt a single-loop control system, instantaneous voltage is used as a controlled quantity, output voltage is controlled, and when the dynamic characteristics of the inverter power supplies are especially nonlinear loads, output waveforms are not ideal, and particularly, the problems of dynamic characteristics and steady-state precision of the inverter power supplies are difficult to ensure in occasions with high alternating current power supply requirements.
The existing double-loop control system of the inverter power supply introduces an inductive current inner loop on the basis of a voltage outer loop, improves the dynamic performance of the inverter power supply through the inductive current inner loop, has stronger short-circuit resistance capability although being capable of controlling current waveforms, has relatively softer external characteristics, relatively slower dynamic response, can increase system disturbance, is relatively more influenced by load, and reduces the output frequency bandwidth along with load increase, thereby severely limiting the application of the alternating current power supply in a high-frequency range.
Disclosure of Invention
The invention provides a broadband inverter power supply with an analog control loop. The technical scheme adopted by the invention is as follows:
a broadband inverter power supply with an analog control loop, comprising: the device comprises a hysteresis PID (proportion integration differentiation) operation circuit, a hysteresis operation circuit, an SPWM (sinusoidal pulse width modulation) generation circuit, a PD (potential difference) operation circuit and a voltage sampling circuit, wherein the output end of the hysteresis PID operation circuit is sequentially and electrically connected with the input ends of the hysteresis operation circuit, the SPWM generation circuit and an inverter power supply, the output end of the inverter power supply is electrically connected with the voltage sampling circuit, the voltage sampling circuit is respectively and electrically connected with the input end of the hysteresis PID operation circuit and the PD operation circuit, and the PD operation circuit is electrically connected with the input end of the hysteresis operation circuit. The hysteresis operation circuit is used for obtaining an error signal by performing difference on output signals of the hysteresis PID operation circuit and the PD operation circuit, and sending the error signal to the SPWM generation circuit, and the SPWM generation circuit is used for generating an SPWM signal to control the output of the inverter power supply.
Preferably, the hysteresis PID operation circuit consists of resistors R1-R7, capacitors C1-C3 and an operational amplifier OP 1; one end of the resistor R1 is given a signal U sin The input end of the resistor R1 is connected with one end of the capacitor C1 to form a series structure, the other end of the capacitor C1 is connected with the input negative end of the operational amplifier OP1, one end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R2 is connected with the input negative end of the operational amplifier OP 1; one end of the resistor R3 is a voltage feedback signal U f The input end of the resistor R3 is connected with one end of the capacitor C2 to form a series structure, the other end of the capacitor C2 is connected with the input negative end of the operational amplifier OP1, one end of the resistor R4 is connected with one end of the resistor R3, and the other end of the resistor R4 is connected with the input negative end of the operational amplifier OP 1; one end of the resistor R6 is grounded, and the other end of the resistor R6 is connected with the positive end of the same-phase end of the operational amplifier OP 1; one end of a resistor R5 is connected with the negative input end of the operational amplifier OP1, the other end of the resistor R5 is connected with one end of a capacitor C3, the other end of the capacitor C3 is connected with the output end of the operational amplifier OP1, the resistor R5 and the capacitor C3 form a series structure, one end of a resistor R7 is connected with one end of the resistor R5, and the other end of the resistor R7 is connected with the other end of the capacitor C3.
Preferably, assuming that the resistances of the resistors R1, R2, R3, R4 are R1', R2', R3', R4', respectively, the resistance of the resistor R1 is selected to satisfyThe resistance value of the resistor R3 is selected to satisfy +.>。
Preferably, the PD operation circuit consists of resistors R9-R12, a capacitor C4 and an operational amplifier OP 2; one end of a resistor R9 is grounded, the other end of the resistor R9 is connected with the positive input end of the operational amplifier OP2, one end of a resistor R10 is used for inputting a voltage feedback signal Uf, the other end of the resistor R10 is connected with the negative input end of the operational amplifier OP2, one end of a resistor R11 is connected with the negative input end of the operational amplifier OP2, the other end of the resistor R11 is connected with the intersection point of a capacitor C4 and a resistor R12, the other end of the capacitor C4 is grounded, and the other end of the resistor R12 is connected with the output end of the operational amplifier OP 2.
PreferablyThe hysteresis operation circuit consists of resistors R8, R13-R16, a capacitor C5 and an operational amplifier OP 3; one end of the resistor R13 is connected with the output end of the operational amplifier OP2, and the other end of the resistor R13 is connected with the negative phase input end of the operational amplifier OP 3; one end of the resistor R8 is an output error signal U of a hysteresis PID operation circuit Gi The other end of the resistor R8 is connected with the negative phase input end of the operational amplifier OP 3; one end of a resistor R14 is connected with the negative input end of the operational amplifier OP3, the other end of the resistor R14 is connected with one end of a capacitor C5, the other end of the capacitor C5 is connected with the output end of the operational amplifier OP3, the resistor R14 and the capacitor C5 are connected in series, one end of a resistor R15 is connected with one end of the resistor R14, and the other end of the resistor R15 is connected with the output end of the operational amplifier OP 3.
The invention has the beneficial effects that:
the broadband inverter outputs an alternating current signal, and the alternating current signal is divided into two parts after passing through the voltage sampling circuit. Firstly, a feedback output voltage signal is sent to a hysteresis PID operation circuit (namely an instantaneous voltage outer loop), and is differenced with a given signal, and an error signal is sent to the hysteresis operation circuit (namely a capacitance current inner loop); and secondly, differentiating the feedback output voltage signal into a capacitance current signal through a PD operation circuit, sending the capacitance current signal to a hysteresis operation circuit, carrying out difference on output signals of the hysteresis PID operation circuit and the PD operation circuit by the hysteresis operation circuit to obtain an error signal, sending the error signal to an SPWM (sinusoidal pulse width modulation) generating circuit, and generating an SPWM signal by the SPWM generating circuit to control the output of an inverter power supply so as to realize the closed-loop control of the whole inverter power supply. The invention adopts double-loop control of the inner loop of the capacitance current and the outer loop of the instantaneous voltage, and has the advantages of quick dynamic response, hard outer characteristic, high steady-state precision, wide output frequency and the like.
Drawings
Fig. 1 is a control schematic block diagram of an inverter according to an embodiment of the present invention.
FIG. 2 is a schematic diagram of a hysteresis PID operation circuit according to an embodiment of the invention.
Fig. 3 is a schematic diagram of the structures of a PD operation circuit and a hysteresis operation circuit according to an embodiment of the present invention.
FIG. 4 is a schematic diagram of an SPWM generating circuit according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a prior art PID circuit without hysteresis.
FIG. 6 is a graph showing the amplitude-frequency characteristics of two PID calculation circuits according to the embodiment of the invention and the prior art.
Fig. 7 is a schematic diagram of an amplitude-frequency characteristic of a PD operation circuit according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and complete in conjunction with the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the present invention.
Fig. 1 is a control schematic block diagram of an inverter according to an embodiment of the present invention. A broadband inverter power supply with an analog control loop, comprising: a hysteresis PID operation circuit, a hysteresis operation circuit, an SPWM generating circuit, a PD operation circuit and a voltage sampling circuit.
Fig. 2 is a schematic diagram of a hysteretic PID operation circuit according to an embodiment of the present invention. Referring to fig. 1, a hysteresis PID operation circuit is used to realize instantaneous voltage outer loop control, and inputs of the hysteresis PID operation circuit are respectively given voltage signals U sin And a voltage feedback signal U f Output error signal U of hysteresis PID operation circuit Gi The delay circuit is fed as a given amount of the delay circuit. The hysteresis PID operation circuit consists of resistors R1-R7, capacitors C1-C3 and an operational amplifier OP 1. One end of the resistor R1 is given a signal U sin Input, the resistance R1 other end links to each other with electric capacity C1 one end and constitutes the series structure, and the electric capacity C1 other end links to each other with the input negative terminal of OP1 is put to the fortune, and resistance R2 one end links to each other with resistance R1 one end, and the resistance R2 other end links to each other with the input negative terminal of OP1 is put to the fortune, namely: the resistor R1 and the capacitor C1 are connected in series and then connected with the resistor R2 in parallel; one end of the resistor R3 is a voltage feedback signal U f Input, the resistance R3 other end links to each other with electric capacity C2 one end and constitutes the series structure, and the electric capacity C2 other end links to each other with the input negative terminal of OP1 is put to the fortune, and resistance R4 one end links to each other with resistance R3 one end, and the resistance R4 other end links to each other with OP1 input negative terminal is put to the fortune, namely: the resistor R3 and the capacitor C2 are connected in series and then connected with the resistor R4 in parallel; one end of the resistor R6 is grounded, and the other end of the resistor R6 and the positive end of the same-phase end of the operational amplifier OP1Are connected; resistor R5 one end links to each other with the negative input of OP1 is put to the fortune, and the resistor R5 other end links to each other with the one end of electric capacity C3, and the electric capacity C3 other end links to each other with OP1 output is put to the fortune, and series structure is constituteed to resistor R5 and electric capacity C3, and resistor R7 one end links to each other with resistor R5's one end, and the resistor R7 other end links to each other with the electric capacity C3 other end, namely: the resistor R5 and the capacitor C3 are connected in series and then connected in parallel with the resistor R7. OP1 gives a voltage to signal U sin And a voltage feedback signal U f Difference is made, and an error signal U is output Gi . Compared with the traditional PID circuit, the hysteresis PID circuit has the advantages that one pole is added, the low-frequency gain can be restrained, and the overshoot of output voltage caused by the overhigh gain in a low frequency band is avoided.
In the hysteresis PID operation circuit, the resistance of the resistor R1 is selected to satisfy the condition that the resistances of the resistors R1, R2, R3 and R4 are R1', R2', R3 'and R4', respectivelyThe resistance value of the resistor R3 is chosen to be +.>. By adopting the resistance design method, the dynamic response speed of the system is improved, and meanwhile, overshoot distortion of the output voltage in the dynamic change process can be avoided.
As shown in fig. 3, the PD operation circuit and the hysteresis operation circuit according to the embodiment of the present invention are shown in the schematic diagram, wherein 3 is the PD operation circuit and 4 is the hysteresis operation circuit. The PD operation circuit and the hysteresis operation circuit are used for realizing the control of the capacitive current inner loop. With reference to fig. 1, the input signal of the pd operation circuit is a voltage feedback signal U f Output error signal U of hysteresis PID operation circuit Gi And fed into a hysteresis circuit as a given amount of inner loop control.
The PD operation circuit is composed of resistors R9-R12, a capacitor C4 and an operational amplifier OP 2. One end of the resistor R9 is grounded, the other end of the resistor R9 is connected with the positive input end of the operational amplifier OP2, and one end of the resistor R10 is a voltage feedback signal U f The other end of the resistor R10 is connected with the negative input end of the operational amplifier OP2, one end of the resistor R11 is connected with the negative input end of the operational amplifier OP2, and the other end of the resistor R11 is connected with the intersection of the capacitor C4 and the resistor R12The other end of the capacitor C4 is grounded, and the other end of the resistor R12 is connected with the output end of the operational amplifier OP 2. The PD operation circuit outputs a feedback output voltage signal U f Differential into capacitive current signals I C . The PD arithmetic circuit is adopted to divide the voltage into capacitance and current, the external characteristics of the capacitance and the current are hard, the anti-interference performance of the system can be improved, and the system instability caused by over-high gain can be avoided.
The hysteresis operation circuit consists of resistors R8, R13-R16, a capacitor C5 and an operational amplifier OP 3. One end of the resistor R13 is connected with the output end of the operational amplifier OP2, and the other end of the resistor R13 is connected with the negative phase input end of the operational amplifier OP 3; one end of the resistor R8 is an output error signal U of a hysteresis PID operation circuit Gi The other end of the resistor R8 is connected with the negative phase input end of the operational amplifier OP 3; one end of a resistor R14 is connected with the negative input end of the operational amplifier OP3, the other end of the resistor R14 is connected with one end of a capacitor C5, the other end of the capacitor C5 is connected with the output end of the operational amplifier OP3, the resistor R14 and the capacitor C5 are connected in series, one end of the resistor R15 is connected with one end of the resistor R14, and the other end of the resistor R15 is connected with the output end of the operational amplifier OP3, namely: the resistor R14 and the capacitor C5 are connected in series and then connected in parallel with the resistor R15. The hysteresis operation circuit outputs an error signal U of the hysteresis PID operation circuit Gi And capacitive current signal I C Difference is made to obtain an error signal U comp And U is set comp And is fed into the SPWM generating circuit. The hysteresis operation circuit can avoid unstable system caused by overshoot of capacitance current, and is beneficial to improving the reliability of the system.
Fig. 4 is a schematic diagram of an SPWM generating circuit according to an embodiment of the invention. The SPWM generating circuit is composed of comparators COMP 1-COMP 2, schmidt inverters ST 1-ST 4, resistors R17-R20, diodes D1-D2 and capacitors C6-C7. The negative input end of the comparator COMP1 is connected with the triangular wave signal, and the positive end is connected with the inner ring output U Gi The output end is connected with one end of a pull-up resistor R19, and the other end of the pull-up resistor R19 is connected with a power supply VCC; the input end of the Schmidt inverter ST2 is connected with the output of the comparator COMP1, the output end of the Schmidt inverter ST2 is connected with the cathode of the diode D1 and one end of the resistor R17, the anode of the diode D2 is connected with the other end of the resistor R17, namely the resistor R17 is connected with the diode D1 in parallel, one end of the capacitor C6 is grounded, the other end of the capacitor C6 is connected with the anode of the D1 and is accessed into the Schmidt inverter ST3, and the output end of the Schmidt inverter ST3 is connected with the anode of the resistor R17 throughThe drive signals SPWM1 and SPWM2 are generated separately by two-way isolation. The Schmitt inverter ST1 is connected with a triangular wave, the output is connected with the negative end of the comparator COMP2, and the positive end of the comparator COMP2 is connected with the inner ring output U Gi The output end of the power supply VCC is connected with one end of a pull-up resistor R20, and the other end of the pull-up resistor R20 is connected with a power supply VCC; the cathode of the diode D2 is connected with the output of the comparator COMP2 and is connected with one end of the resistor R18, the anode of the diode D2 is connected with the other end of the resistor R18, namely R18 and D2 are connected in parallel, one end of the capacitor C7 is grounded, the other end of the capacitor C7 is connected with the anode of the diode D2 and is used as the input of the Schmitt inverter ST4, the output of the Schmitt inverter respectively generates SPWM3 and SPWM4 through two paths of isolation, and the isolation is carried out by adopting a pulse transformer.
In the embodiment of the invention, the voltage sampling circuit is a differential sampling circuit.
In the embodiment of the invention, the SPWM generating circuit and the voltage sampling circuit are all in the prior art, and a conventional circuit structure is adopted.
The instantaneous voltage outer loop control is a hysteresis PID arithmetic circuit, as shown in fig. 2, the instantaneous voltage outer loop control is divided into two parts, 1 and 2, and assuming that the equivalent impedance of the second part is Z2, the instantaneous voltage outer loop control transfer function is:
wherein:
the transfer function of the PD arithmetic circuit is:
wherein:
in the prior art, as shown in fig. 5, the structure of the common PID operational amplifier circuit is also divided into two parts, namely 5 and 6, and assuming that the equivalent impedance of the second part is Z2, the transfer function of the outer ring is:
wherein:
the "s" in the transfer functions of the formulas (1), (5), and (8) is a frequency domain variable.
According to the comparison of the formula (1) and the formula (8), the hysteresis PID operation of the invention correspondingly shifts the pole of the common PID operation backward from the zero, which is beneficial to keeping the low-frequency gain constant, preventing the gain from being overlarge at the low frequency caused by the abrupt change of the output voltage or the load, and being more beneficial to the following of the output waveform in the dynamic process, and the specific amplitude-frequency characteristic curve is shown in figure 6.
In the embodiment of the invention, the PD operation circuit is adopted to differentiate the feedback voltage to obtain the capacitance current, so that the gain of the pure differentiation circuit before the turning frequency point is prevented from being negative. The amplitude-frequency characteristic curve is drawn according to the transfer function, as shown in fig. 7, and the turning frequency is constant positive gain from 0 to the turning frequency.
In the embodiments of the present invention, technical features that are not described in detail are all existing technologies or conventional technical means, and are not described herein.
Finally, it should be noted that: the above examples are only specific embodiments of the present invention, and are not intended to limit the scope of the present invention. Those skilled in the art will appreciate that: any person skilled in the art may modify or easily conceive of changes to the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features within the technical scope of the present disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.
Claims (5)
1. A broadband inverter power supply with an analog control loop, comprising: the device comprises a hysteresis PID (proportion integration differentiation) operation circuit, a hysteresis operation circuit, an SPWM (sinusoidal pulse width modulation) generation circuit, a PD (potential difference) operation circuit and a voltage sampling circuit, wherein the output end of the hysteresis PID operation circuit is electrically connected with the input ends of the hysteresis operation circuit, the SPWM generation circuit and an inverter power supply in sequence, the output end of the inverter power supply is electrically connected with the voltage sampling circuit, the voltage sampling circuit is respectively electrically connected with the input end of the hysteresis PID operation circuit and the PD operation circuit, and the PD operation circuit is electrically connected with the input end of the hysteresis operation circuit; the hysteresis operation circuit is used for obtaining an error signal by performing difference on output signals of the hysteresis PID operation circuit and the PD operation circuit, and sending the error signal to the SPWM generation circuit, and the SPWM generation circuit is used for generating an SPWM signal to control the output of the inverter power supply.
2. The broadband inverter power supply with the analog control loop according to claim 1, wherein the hysteresis PID operation circuit consists of resistors R1-R7, capacitors C1-C3 and an operational amplifier OP 1; one end of the resistor R1 is given a signal U sin The input end of the resistor R1 is connected with one end of the capacitor C1 to form a series structure, the other end of the capacitor C1 is connected with the input negative end of the operational amplifier OP1, one end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R2 is connected with the input negative end of the operational amplifier OP 1; one end of resistor R3For voltage feedback signal U f The input end of the resistor R3 is connected with one end of the capacitor C2 to form a series structure, the other end of the capacitor C2 is connected with the input negative end of the operational amplifier OP1, one end of the resistor R4 is connected with one end of the resistor R3, and the other end of the resistor R4 is connected with the input negative end of the operational amplifier OP 1; one end of the resistor R6 is grounded, and the other end of the resistor R6 is connected with the positive end of the same-phase end of the operational amplifier OP 1; one end of a resistor R5 is connected with the negative input end of the operational amplifier OP1, the other end of the resistor R5 is connected with one end of a capacitor C3, the other end of the capacitor C3 is connected with the output end of the operational amplifier OP1, the resistor R5 and the capacitor C3 form a series structure, one end of a resistor R7 is connected with one end of the resistor R5, and the other end of the resistor R7 is connected with the other end of the capacitor C3.
3. The broadband inverter power source with analog control loop according to claim 2, wherein the resistance of the resistor R1 is selected to satisfy given resistance values of the resistors R1, R2, R3, R4 are R1', R2', R3', R4', respectivelyThe resistance value of the resistor R3 is selected to satisfy +.>。
4. The broadband inverter power supply with the analog control loop according to claim 1, wherein the PD operation circuit consists of resistors R9-R12, a capacitor C4 and an operational amplifier OP 2; one end of the resistor R9 is grounded, the other end of the resistor R9 is connected with the positive input end of the operational amplifier OP2, and one end of the resistor R10 is a voltage feedback signal U f The input end of the resistor R10 is connected with the negative input end of the operational amplifier OP2, one end of the resistor R11 is connected with the negative input end of the operational amplifier OP2, the other end of the resistor R11 is connected with the intersection point of the capacitor C4 and the resistor R12, the other end of the capacitor C4 is grounded, and the other end of the resistor R12 is connected with the output end of the operational amplifier OP 2.
5. The wideband inverter power supply with analog control loop as claimed in claim 1, wherein said hysteresis circuit is formed byThe resistor R8, the resistor R13-R16, the capacitor C5 and the operational amplifier OP 3; one end of the resistor R13 is connected with the output end of the operational amplifier OP2, and the other end of the resistor R13 is connected with the negative phase input end of the operational amplifier OP 3; one end of the resistor R8 is an output error signal U of a hysteresis PID operation circuit Gi The other end of the resistor R8 is connected with the negative phase input end of the operational amplifier OP 3; one end of a resistor R14 is connected with the negative input end of the operational amplifier OP3, the other end of the resistor R14 is connected with one end of a capacitor C5, the other end of the capacitor C5 is connected with the output end of the operational amplifier OP3, the resistor R14 and the capacitor C5 are connected in series, one end of a resistor R15 is connected with one end of the resistor R14, and the other end of the resistor R15 is connected with the output end of the operational amplifier OP 3.
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