CN116070434A - Method, device and medium for determining electromigration failure time of chip link - Google Patents
Method, device and medium for determining electromigration failure time of chip link Download PDFInfo
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Abstract
The invention discloses a method, a device and a medium for determining electromigration failure time of a chip link. Comprising the following steps: constructing a simulation model of a link to be tested in a chip; electromigration test is carried out on the link to be tested based on a simulation model according to a plurality of preset test conditions, and a failure time calculation formula of the link to be tested is determined according to an electromigration test result, wherein the test conditions comprise test pulse signals and test temperatures; and determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula. The simulation model of the chip link is constructed, and the electromigration test is carried out on the link to be tested based on the simulation model to obtain the calculation formula of the failure time, so that the electromigration failure time of the link to be tested in a specified environment can be obtained by using the determined formula, and a user can reasonably use the chip by taking the determined failure time as a reference.
Description
Technical Field
The embodiment of the invention relates to the technical field of chips, in particular to a method, a device and a medium for determining electromigration failure time of a chip link.
Background
Electromigration is a phenomenon that a metal conductor generates metal migration in a physical space under the action of combined stress of current and temperature. The momentum exchange is carried out between the electrons in motion and the metal lattice of the main body, and metal atoms migrate along the electron flow direction to form holes at original positions and are accumulated in the migration direction to form protrusions. Due to the action of a negative feedback mechanism, the resistance value of a circuit where the cavity is formed is increased, so that the local temperature is further increased, the electromigration phenomenon is aggravated, and finally the open circuit phenomenon is caused, and therefore the electromigration failure time indicates the service life of a chip link.
Under the condition that the practical application environment is known, the electromigration failure time, namely the service life, of the chip link cannot be known, so that reasonable use of the chip link by a user is obviously influenced, and effective defense or improvement measures cannot be executed even when the chip link is about to reach the electromigration failure time, so that the practical application of the chip is influenced.
Disclosure of Invention
The embodiment of the invention provides a method, a device and a medium for determining electromigration failure time of a chip link, which are used for determining the electromigration failure time of the chip link.
In a first aspect, an embodiment of the present invention provides a method for determining electromigration failure time of a chip link, including: constructing a simulation model of a link to be tested in a chip;
electromigration test is carried out on the link to be tested based on the simulation model according to a plurality of preset test conditions, and a failure time calculation formula of the link to be tested is determined according to an electromigration test result, wherein the test conditions comprise test pulse signals and test temperatures;
and determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
In a second aspect, an embodiment of the present invention further provides an electromigration failure time determining apparatus of a chip link, including: the simulation model construction module is used for constructing a simulation model of a link to be tested in the chip;
the calculation formula determining module is used for carrying out electromigration test on the link to be tested based on the simulation model according to a plurality of preset test conditions, and determining a failure time calculation formula of the link to be tested according to an electromigration test result, wherein the test conditions comprise a test pulse signal and a test temperature;
and the electromigration failure time determining module is used for determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
In a third aspect, the present invention further provides a computer device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor implements the method according to the present embodiment when executing the program.
In a first aspect, embodiments of the present invention also provide a storage medium having computer-executable instructions stored thereon, which when executed by a processor, implement a method as described in the present embodiment.
According to the invention, the simulation model of the chip link is constructed, and the electromigration test is carried out on the link to be tested based on the simulation model to obtain the failure time calculation formula, so that the electromigration failure time of the link to be tested in the appointed environment can be obtained by using the determined formula, and a user can reasonably use the chip by taking the determined failure time as a reference.
Drawings
Fig. 1 is a flowchart of a method for determining electromigration failure time of a chip link according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an electromigration test system in accordance with an embodiment of the present invention;
fig. 3 is a flowchart of a method for determining electromigration failure time of a chip link according to a second embodiment of the present invention;
fig. 4 is a schematic structural diagram of an electromigration failure time determination apparatus for a chip link according to a third embodiment of the present invention;
fig. 5 is a schematic structural diagram of a computer device according to a fourth embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
Fig. 1 is a flowchart of a method for determining an electromigration failure time of a chip link according to an embodiment of the present invention, where the embodiment is applicable to a case of determining an electromigration failure time of a chip link, the method may be performed by an apparatus for determining an electromigration failure time of a chip link according to an embodiment of the present invention, and the apparatus may be implemented by software and/or hardware, including:
step S101, constructing a simulation model of a link to be tested in a chip.
Optionally, constructing a simulation model of the link to be tested in the chip includes: acquiring the associated parameters of the link to be tested in the chip, and establishing an initial model of the link to be tested according to the associated parameters, wherein the associated parameters comprise standard resistance of the link to be tested; and obtaining the simulation resistance in the initial model, and calibrating the simulation resistance according to the standard resistance to obtain the simulation model of the link to be tested.
Specifically, in this embodiment, a simulation model of a link to be tested is obtained by simulating the link to be tested in the chip, and when the simulation model is built, the associated parameters of the link to be tested are obtained, where the associated parameters may include information such as a standard resistance of the link to be tested, a circuit diagram of the link to be tested, a component type and a model of the component in the link to be tested, and of course, this embodiment is merely illustrative, and not limited to specific content of the associated parameters. In this embodiment, the link to be tested is simulated according to the associated parameters to construct an initial model of the link to be tested in the chip, and the initial model in this embodiment may be specifically an electric-thermal coupling model and a field-circuit cooperative model.
In addition, in this embodiment, after the initial model of the link to be tested is constructed, the simulation resistance in the initial model is also obtained, and when it is determined that the error between the known standard resistance and the simulation resistance in the initial model is higher than a preset threshold, for example, 0.5%, the simulation resistance in the initial model is calibrated by using the known standard resistance, so as to obtain the simulation model of the link to be tested. In the embodiment, a simulation model with the same parameters and operation principles as those of the link to be tested is obtained through simulation, so that the related operation parameters of the link to be tested can be obtained through the constructed simulation model in the subsequent process. Of course, the present embodiment is merely illustrative, and specific values of the preset threshold are not limited, and may be set according to the accuracy of the simulation.
Step S102, electromigration test is carried out on the link to be tested based on a simulation model according to a plurality of preset test conditions, and a failure time calculation formula of the link to be tested is determined according to the electromigration test result.
Optionally, performing an electromigration test on the link to be tested based on the simulation model according to a preset plurality of groups of test conditions, and determining a failure time calculation formula of the link to be tested according to an electromigration test result, including: inputting each test condition into a simulation model to obtain the corresponding test current density of the simulation model under each test condition; electromigration test is carried out on the link to be tested according to a plurality of preset test conditions, and test failure time corresponding to each test condition is obtained; and determining a failure time calculation formula of the link to be tested according to the preset multiple groups of test conditions, the test current density and the test failure time corresponding to each test condition.
The preset failure time calculation formula in this embodiment is shown in the following formula (1):
wherein MTTF is failure time(s), A ac For a constant preset according to the characteristics of the link to be measured, n is a current density factor, J is a current density (unit is A/cm 2 )，E a For activation energy, K is Boltzmann constant, T is temperature, D is pulse current duty cycleM0, m1, m2 and m3 are fitting parameters related to the current frequency, f is the frequency. The undetermined parameter in the failure time calculation formula is the current density factor n and the activation energy E a And fitting parameters m0, m1, m2 and m3 related to the current frequency.
It should be noted that, since the link to be tested in the present embodiment is mainly applied in an ac scene, the link to be tested is different from the application in a dc scene, the current density can be directly obtained according to the current density calculation formula in the dc scene, and the current is not constant in the ac scene, so that the current density cannot be directly determined by adopting the current density calculation formula. Aiming at the communication scene of the application, the corresponding test current density under each test condition is mainly obtained through a simulation model constructed before.
In one specific implementation, three sets of test conditions may be preset, and in each set of test conditions, a test pulse signal and a test temperature are included: the first set of test conditions comprises a test pulse signal X1 and a test temperature T1; the second set of test conditions comprises a test pulse signal X2 and a test temperature T2; the third set of test conditions includes a test pulse signal X3 and a test temperature T3. In this embodiment, each test condition is input to the simulation model, so as to obtain the test current density corresponding to the simulation model under each test condition, for example, the pulse signal X1 and the test temperature T1 in the first set of test conditions are input to the simulation model, so that the test current density J1 corresponding to the first set of test conditions can be directly obtained by reading the simulation result of the simulation model, and the test current density J2 corresponding to the second set of test conditions and the test current density J3 corresponding to the third set of test conditions can be obtained in the same way. And in the case of pulse signal determination, both the pulse current duty cycle and frequency are also known. From this, it can be derived that only the undetermined parameters remain on the right of the equation in the preset dead time calculation formula: n, E a M0, m1, m2 and m3. If the undetermined parameters are to be determined, the test failure time corresponding to each test condition is required to be obtained.
Optionally, performing electromigration test on the link to be tested according to preset multiple groups of test conditions to obtain test failure time corresponding to each test condition, including: controlling a pulse signal generating device and a power signal amplifying device in the electromigration test system aiming at each test condition to apply pulse signals to the link to be tested so as to enable the perceived pulse signals of the link to be tested to reach the test pulse signals in the test conditions; controlling a heating device in the electromigration test system to heat the link to be tested so that the perceived temperature of the link to be tested reaches the test temperature in the test condition; controlling a timer in the electromigration test system to start timing, and acquiring the current timing duration of the timer when the resistance of the link to be tested is determined to be a designated multiple of a standard resistance through a resistance test module in the electromigration test system; and taking the current timing duration of the timer as the corresponding test failure time of the link to be tested under the test condition.
Specifically, when the test failure time corresponding to each test condition is obtained, the electromigration test system shown in fig. 2 is specifically applied, and the test failure time corresponding to each test condition can be obtained by placing the link to be tested into the electromigration test system and testing the link to be tested. The electromigration test system mainly comprises a pulse signal generating device, a power signal amplifying device, a resistance test module, a heating plate, an insulating heating cavity with a bottom and a heating cavity upper cover plate. The pulse signal generating device can provide an electrical device with rising edges [0, 100ms ], duty ratio ranges of [0, 100% ], bias current ranges of [0, 200mA ], frequency ranges of [0, 10MHz ] and voltage amplitude ranges of [0, 10V ]. The power signal amplifying device can amplify the power of the pulse signal, and is a pulse current-carrying electric device which can provide the pulse current with the space ratio range of [0, 100% ], the bias current range of [0, 500mA ], the frequency range of [0, 10MHz ] and the current amplitude range of [0,2A ]. The structure consisting of the heating plate, the insulating heating cavity with the bottom and the upper cover plate of the heating cavity is a thermal device capable of providing heating with electric insulating property, and in order to improve the accuracy of the heating device, a typical oil bath heating mode is used, the heating temperature range is [0,160 ℃ and the accuracy is 0.1 ℃. The resistance test module can measure the resistance of the tested link with the accuracy of 1 mu ohm. Of course, the operating parameters for each structure in the electromigration test system are merely examples, and are not limited in this embodiment. Other structures may be included in the electromigration test system, such as a data recording device for recording and storing the values of the resistance meter, a timer for recording the time, and electrical connection devices such as connection cables and probe clamps.
For example, for the first set of test condition pulse signals X1 and test temperature T1, after the link to be tested is placed on the heating plate, high-temperature-resistant insulating bath liquid is injected into the heating cavity, the pulse signal generating device is controlled to generate pulses, and the generated pulse signals are applied to the link to be tested after being subjected to power amplification by the power signal amplifying device, so that the sensing pulse signals of the link to be tested reach X1. Meanwhile, the heating plate with the adjustable temperature is preheated, and the bath liquid temperature is monitored, so that the perceived temperature of the link to be measured reaches T1, and the link temperature to be measured has higher consistency when the oil bath heating is adopted. When the perceived temperature of the link to be tested reaches T1, starting timing and measuring the resistance of the link to be tested through a resistance test module, such as a resistance meter, when the measured resistance value of the link to be tested is determined to be a designated multiple of a standard resistance, such as 1.5 times, determining that the link to be tested fails, controlling a timer to stop timing to obtain the current timing duration T1, and taking T1 as the corresponding test failure time of the link to be tested under the first set of test conditions. Of course, in this embodiment, only the test failure time corresponding to the first set of test conditions is taken as an example for explanation, and the manner of obtaining the test failure time corresponding to other test conditions is substantially the same as that, and will not be described in detail in this embodiment. In order to make the initial states of the links to be tested identical under each set of test conditions, test samples corresponding to the links to be tested can be adopted for testing, each test sample has the identical structure, and test samples with different serial numbers are respectively put into an electromigration test system according to each set of test conditions, so that the problem of inaccurate test caused by repeated use of the same link to be tested under different test conditions is avoided.
Optionally, determining a failure time calculation formula of the link to be tested according to preset multiple groups of test conditions, current densities corresponding to the test conditions and test failure times, including: according to preset multiple groups of test conditions, current density corresponding to each test condition and test failure time, calculating undetermined parameters in a preset failure time calculation formula, wherein the undetermined parameters comprise current density factors, activation energy and fitting parameters related to current frequency; and determining a failure time calculation formula of the link to be tested according to the acquired undetermined parameters.
After the test failure time corresponding to the plurality of groups of test conditions is obtained through the test, the value corresponding to the left side in the formula (1) is determined, so that the undetermined parameter in the preset failure time calculation formula can be calculated according to the preset plurality of groups of test conditions, the current density corresponding to each test condition and the test failure time: n, E a In the case of the determination of the respective undetermined parameters, the dead time calculation formula is determined.
Step S103, determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
Optionally, determining the electromigration failure time of the link to be tested in the specified application environment based on the simulation model and the failure time calculation formula includes: inputting a designated application environment into a simulation model to obtain the corresponding actual current density of the simulation model under the designated application environment, wherein the designated application environment comprises an actual pulse signal and an actual temperature; and determining the electromigration failure time of the link to be tested in the appointed application environment according to the actual current density and the failure time calculation formula.
Specifically, in the present embodiment, when the failure time calculation formula has been determined and the link to be tested operates in the specified application environment, after determining the actual current density corresponding to the link to be tested in the specified application environment through the simulation model, the obtained actual current density, the actual pulse signal and the actual temperature are input into the determined failure time calculation formula, so that the electromigration failure time of the link to be tested can be determined. For example, after determining that the electromigration failure time is 120 hours, the user may purchase a spare link of the same model in advance and replace the link before failure, thereby avoiding normal operation of the application to the terminal device supported by the chip.
According to the method, the simulation model of the chip link is built, and the electromigration test is conducted on the link to be tested based on the simulation model to obtain the failure time calculation formula, so that the electromigration failure time of the link to be tested in the specified environment can be obtained by using the determined formula, and a user can use the determined failure time as a reference for reasonably using the chip.
Example two
Fig. 3 is a flowchart of a method for determining electromigration failure time of a chip link according to a second embodiment of the present invention, where the method for determining electromigration failure time of a link to be tested in a specified application environment based on the above embodiment specifically includes:
step S201, constructing a simulation model of a link to be tested in a chip.
Optionally, constructing a simulation model of the link to be tested in the chip includes: acquiring the associated parameters of the link to be tested in the chip, and establishing an initial model of the link to be tested according to the associated parameters, wherein the associated parameters comprise standard resistance of the link to be tested; and obtaining the simulation resistance in the initial model, and calibrating the simulation resistance according to the standard resistance to obtain the simulation model of the link to be tested.
Step S202, performing electromigration test on the link to be tested based on a simulation model according to a plurality of preset test conditions, and determining a failure time calculation formula of the link to be tested according to an electromigration test result.
Optionally, performing an electromigration test on the link to be tested based on the simulation model according to a preset plurality of groups of test conditions, and determining a failure time calculation formula of the link to be tested according to an electromigration test result, including: inputting each test condition into a simulation model to obtain the corresponding test current density of the simulation model under each test condition; electromigration test is carried out on the link to be tested according to a plurality of preset test conditions, and test failure time corresponding to each test condition is obtained; and determining a failure time calculation formula of the link to be tested according to the preset multiple groups of test conditions, the test current density and the test failure time corresponding to each test condition.
Step S203, inputting the appointed application environment into the simulation model, and obtaining the corresponding actual current density of the simulation model under the appointed application environment.
When a link to be tested is put into actual production and operated in a specified application environment, the specified application environment comprises an actual pulse signal and an actual temperature, because in an alternating current application environment, when the electromigration failure time is calculated by adopting a determined failure time calculation formula, the current density in the formula is related to the actual pulse signal, and because the pulse current is not constant in the alternating current scene, the pulse current is required to be applied to a simulation model again, the specified application environment is input into the constructed simulation model for simulation, and the corresponding actual current density J' of the simulation model under the actual pulse signal and the actual temperature is read according to the simulation result. The manner of obtaining the actual current density is substantially the same as the manner of obtaining the test current density when determining the dead time calculation formula, and will not be described in detail in this embodiment.
Step S204, determining the electromigration failure time of the link to be tested in the appointed application environment according to the actual current density and the failure time calculation formula.
Optionally, determining the electromigration failure time of the link to be tested in the specified application environment according to the actual current density and the failure time calculation formula includes: acquiring an actual pulse current duty ratio and an actual frequency according to an actual pulse signal; taking the actual pulse current duty cycle, the actual frequency, the actual temperature and the actual current density as known quantities; and inputting the known quantity into a failure time calculation formula, and determining the electromigration failure time of the link to be tested in the appointed application environment.
Specifically, after determining the actual current density, the actual pulse current duty ratio D ' and the actual frequency f ' are obtained according to the actual pulse signal, the actual temperature T ' and the actual current density J ' of D ', f ' are input into the dead time calculation formula with the determined parameters to be determined in the formula (1), and the electromigration dead time T ' of the link to be tested under the actual pulse signal and the actual temperature can be determined.
According to the method, the simulation model of the chip link is built, and the electromigration test is conducted on the link to be tested based on the simulation model to obtain the failure time calculation formula, so that the electromigration failure time of the link to be tested in the specified environment can be obtained by using the determined formula, and a user can use the determined failure time as a reference for reasonably using the chip.
Example III
Fig. 4 is a schematic structural diagram of an electromigration failure time determination apparatus for a chip link according to a third embodiment of the present invention, where the apparatus may perform the method of the electromigration failure time determination apparatus for a chip link according to the foregoing embodiments. The device can be implemented in a software and/or hardware mode, as shown in fig. 3, the electromigration failure time determining device of the chip link specifically includes: a simulation model construction module 310, a calculation formula determination module 320, and an electromigration failure time determination module 330.
The simulation model construction module 310 is configured to construct a simulation model of a link to be tested in the chip;
the calculation formula determining module 320 is configured to perform an electromigration test on a link to be tested based on a simulation model according to a preset plurality of sets of test conditions, and determine a failure time calculation formula of the link to be tested according to an electromigration test result, where the test conditions include a test pulse signal and a test temperature;
the electromigration failure time determination module 330 is configured to determine an electromigration failure time of the link to be tested in the specified application environment based on the simulation model and the failure time calculation formula.
Optionally, the simulation model construction module is used for acquiring the association parameters of the link to be tested in the chip and establishing an initial model of the link to be tested according to the association parameters, wherein the association parameters comprise standard resistance of the link to be tested;
and obtaining the simulation resistance in the initial model, and calibrating the simulation resistance according to the standard resistance to obtain the simulation model of the link to be tested.
Optionally, the calculation formula determining module includes:
the test current density acquisition sub-module is used for inputting each test condition into the simulation model to acquire the corresponding test current density of the simulation model under each test condition;
the test failure time acquisition submodule is used for carrying out electromigration test on the link to be tested according to a plurality of preset test conditions to obtain test failure time corresponding to each test condition;
the failure time calculation formula determining submodule is used for determining a failure time calculation formula of a link to be tested according to preset multiple groups of test conditions, test current density corresponding to each test condition and test failure time.
Optionally, the test failure time obtaining submodule is used for controlling the pulse signal generating device and the power signal amplifying device in the electromigration test system to apply pulse signals to the link to be tested according to each test condition so as to enable the perceived pulse signals of the link to be tested to reach the test pulse signals in the test condition;
controlling a heating device in the electromigration test system to heat the link to be tested so that the perceived temperature of the link to be tested reaches the test temperature in the test condition;
controlling a timer in the electromigration test system to start timing, and acquiring the current timing duration of the timer when the resistance of the link to be tested is determined to be a designated multiple of a standard resistance through a resistance test module in the electromigration test system;
and taking the current timing duration of the timer as the corresponding test failure time of the link to be tested under the test condition.
Optionally, the failure time calculation formula determining submodule is configured to calculate a parameter to be determined in the preset failure time calculation formula according to preset multiple sets of test conditions, current densities corresponding to the test conditions and test failure times, where the parameter to be determined includes a current density factor, an activation energy and a fitting parameter related to a current frequency;
and determining a failure time calculation formula of the link to be tested according to the acquired undetermined parameters.
Optionally, the electromigration failure time determination module includes:
the actual current density acquisition sub-module is used for inputting the appointed application environment into the simulation model to acquire the actual current density corresponding to the simulation model in the appointed application environment, wherein the appointed application environment comprises an actual pulse signal and an actual temperature;
and the electromigration failure time determination submodule is used for determining the electromigration failure time of the link to be tested in the appointed application environment according to the actual current density and the failure time calculation formula.
Optionally, the electromigration failure time determining submodule is used for acquiring an actual pulse current duty ratio and an actual frequency according to an actual pulse signal;
taking the actual pulse current duty cycle, the actual frequency, the actual temperature and the actual current density as known quantities;
and inputting the known quantity into a failure time calculation formula, and determining the electromigration failure time of the link to be tested in the appointed application environment.
The electromigration failure time determining device of the chip link provided by the embodiment of the invention can execute the electromigration failure time determining method of the chip link provided by any embodiment of the invention, and particularly execute the corresponding functional modules and beneficial effects of the method.
Example IV
Fig. 5 is a schematic structural diagram of a computer device according to a fourth embodiment of the present invention, and as shown in fig. 5, the computer device includes a processor 610, a memory 620, an input device 630 and an output device 640; the number of processors 610 in the computer device may be one or more, one processor 610 being illustrated in fig. 5; the processor 610, memory 620, input devices 630, and output devices 640 in the computer device may be connected by a bus or other means, for example in fig. 5 by a bus connection.
The memory 620 is used as a computer readable storage medium for storing a software program, a computer executable program, and a module, such as a program instruction/module corresponding to a parameter quantization method of a recurrent neural network in an embodiment of the present invention and a program instruction/module corresponding to an inference method in a quantization network in an embodiment of the present invention. The processor 610 executes various functional applications of the computer device and data processing, i.e., implements the electromigration failure time determination method of the chip link described above, by running software programs, instructions and modules stored in the memory 620.
The electromigration failure time determining method of the chip link comprises the following steps:
constructing a simulation model of a link to be tested in a chip;
electromigration test is carried out on the link to be tested based on a simulation model according to a plurality of preset test conditions, and a failure time calculation formula of the link to be tested is determined according to an electromigration test result, wherein the test conditions comprise test pulse signals and test temperatures;
and determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
The input device 630 may be used to receive entered numeric or character information and to generate key signal inputs related to user settings and function control of the computer device. The output device 640 may include a display device such as a display screen.
Example five
The fifth embodiment of the present invention also provides a storage medium containing computer-executable instructions for performing a method of determining electromigration failure time of a chip link when executed by a computer processor.
Of course, the storage medium containing the computer executable instructions provided in the embodiments of the present invention is not limited to the above-described method operations, and may also perform the related operations in the method for determining the electromigration failure time of a chip link provided in any embodiment of the present invention.
From the above description of embodiments, it will be clear to a person skilled in the art that the present invention may be implemented by means of software and necessary general purpose hardware, but of course also by means of hardware, although in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a random access Memory (RandomAccess Memory, RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, etc., and include several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments of the present invention.
It should be noted that, in the embodiment of the electromigration failure time determination apparatus of a chip link, each unit and module included are only divided according to the functional logic, but are not limited to the above-mentioned division, so long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for distinguishing from each other, and are not used to limit the protection scope of the present invention.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (10)
1. The electromigration failure time determining method of the chip link is characterized by comprising the following steps of:
constructing a simulation model of a link to be tested in a chip;
electromigration test is carried out on the link to be tested based on the simulation model according to a plurality of preset test conditions, and a failure time calculation formula of the link to be tested is determined according to an electromigration test result, wherein the test conditions comprise test pulse signals and test temperatures;
and determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
2. The method of claim 1, wherein constructing a simulation model of a link under test in a chip comprises:
acquiring associated parameters of a link to be tested in a chip, and establishing an initial model of the link to be tested according to the associated parameters, wherein the associated parameters comprise standard resistance of the link to be tested;
and acquiring a simulation resistor in the initial model, and calibrating the simulation resistor according to the standard resistor to acquire a simulation model of the link to be tested.
3. The method according to claim 2, wherein the electromigration testing the link under test based on the simulation model according to the preset plurality of sets of testing conditions, and determining the failure time calculation formula of the link under test according to the electromigration test result, includes:
inputting each test condition into the simulation model to obtain the corresponding test current density of the simulation model under each test condition;
electromigration test is carried out on the link to be tested according to a plurality of preset test conditions, and test failure time corresponding to each test condition is obtained;
and determining a failure time calculation formula of the link to be tested according to a plurality of preset test conditions, test current density corresponding to each test condition and the test failure time.
4. The method of claim 3, wherein the electromigration testing the link under test according to the preset plurality of test conditions to obtain a test failure time corresponding to each test condition comprises:
controlling a pulse signal generating device and a power signal amplifying device in an electromigration test system aiming at each test condition to apply pulse signals to the link to be tested so as to enable a perception pulse signal of the link to be tested to reach the test pulse signals in the test conditions;
controlling a heating device in the electromigration test system to heat the link to be tested so as to enable the perceived temperature of the link to be tested to reach the test temperature in the test condition;
controlling a timer in the electromigration test system to start timing, and acquiring the current timing duration of the timer when the resistance of the link to be tested is determined to be a designated multiple of the standard resistance through a resistance test module in the electromigration test system;
and taking the current timing duration of the timer as the corresponding test failure time of the link to be tested under the test condition.
5. The method of claim 3, wherein determining the failure time calculation formula of the link under test according to the preset multiple sets of test conditions, the current densities corresponding to the test conditions, and the test failure times comprises:
calculating undetermined parameters in a preset failure time calculation formula according to preset multiple groups of test conditions, current density corresponding to each test condition and the test failure time, wherein the undetermined parameters comprise current density factors, activation energy and fitting parameters related to current frequency;
and determining a failure time calculation formula of the link to be tested according to the acquired undetermined parameters.
6. The method of claim 1, wherein the determining the electromigration failure time of the link under test in the specified application environment based on the simulation model and the failure time calculation formula comprises:
inputting the appointed application environment into the simulation model, and obtaining the corresponding actual current density of the simulation model under the appointed application environment, wherein the appointed application environment comprises an actual pulse signal and an actual temperature;
and determining the electromigration failure time of the link to be tested in the appointed application environment according to the actual current density and the failure time calculation formula.
7. The method of claim 6, wherein said determining an electromigration failure time of the link under test in the specified application environment based on the actual current density and the failure time calculation formula comprises:
acquiring an actual pulse current duty ratio and an actual frequency according to the actual pulse signal;
taking the actual pulse current duty cycle, actual frequency, actual temperature and the actual current density as known quantities;
and inputting the known quantity into the dead time calculation formula, and determining the electromigration dead time of the link to be tested in the appointed application environment.
8. An electromigration failure time determination apparatus of a chip link, comprising:
the simulation model construction module is used for constructing a simulation model of a link to be tested in the chip;
the calculation formula determining module is used for carrying out electromigration test on the link to be tested based on the simulation model according to a plurality of preset test conditions, and determining a failure time calculation formula of the link to be tested according to an electromigration test result, wherein the test conditions comprise a test pulse signal and a test temperature;
and the electromigration failure time determining module is used for determining the electromigration failure time of the link to be tested in the appointed application environment based on the simulation model and the failure time calculation formula.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of any of claims 1-7 when the program is executed by the processor.
10. A storage medium having stored thereon computer program of instructions, which when executed by a processor, performs the method of any of claims 1-7.
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| CN202310060150.0A CN116070434A (en) | 2023-01-18 | 2023-01-18 | Method, device and medium for determining electromigration failure time of chip link |
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