CN116056307A

CN116056307A - Motherboard architecture and electronic device

Info

Publication number: CN116056307A
Application number: CN202211046870.3A
Authority: CN
Inventors: 陈文龙; 邓旭同
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2022-08-30
Filing date: 2022-08-30
Publication date: 2023-05-02
Anticipated expiration: 2042-08-30
Also published as: CN116056307B

Abstract

The application provides a motherboard architecture, comprising: an upper main board, a heightening board and a lower main board which are sequentially connected through welding spots; welding spots among the main board, the heightening plate and the lower main board are used for transmitting battery electric energy; the upper main board is provided with a first signal receiving and transmitting assembly, the lower main board is provided with a second signal receiving and transmitting assembly, and the first signal receiving and transmitting assembly and the second signal receiving and transmitting assembly realize signal communication between hardware components arranged on the upper main board and the lower main board. It can be seen that: the welding spots are only used for transmitting the electric energy of the battery, so that the number of the welding spots among the main board, the heightening plate and the lower main board can be greatly reduced, the processing technology difficulty of the main board framework is reduced, the processing cost is saved, and the reliability and the production yield of the main board framework are improved. The hardware components on the upper main board and the lower main board are communicated by adopting the first signal receiving and transmitting component and the second signal receiving and transmitting component, so that the problem of signal leakage caused by transmission of welding spots due to high-speed signals transmitted by the hardware components on the upper main board and the hardware components on the lower main board can be avoided.

Description

Motherboard architecture and electronic device

Technical Field

The application relates to the technical field of mainboards, in particular to a mainboard architecture and electronic equipment.

Background

Currently, some electronic devices such as mobile phones employ a sandwich structure on a motherboard. The main board of the mobile phone comprises an upper main board, a heightening board and a lower main board. The heightening plate is arranged between the upper main board and the lower main board and is used for connecting the upper main board and the lower main board. Typically, the upper motherboard, the raised board, and the lower motherboard are connected by a large number of solder joints.

However, the main board of the sandwich structure has the problems of complex processing technology, high cost, low production yield, difficult maintenance, poor reliability and signal leakage caused by discontinuous impedance of high-speed signals because the upper main board, the heightening board and the lower main board are connected through a large number of welding spots.

Disclosure of Invention

The application provides a mainboard architecture and electronic equipment, and aim at solves and has processing technology complicacy, and is with high costs, and the production yield is low, is difficult for maintenance, and the reliability is poor, and high-speed signal leads to the signal leakage problem because of impedance discontinuity.

In order to achieve the above object, the present application provides the following technical solutions:

in a first aspect, the present application provides a motherboard architecture applied to an electronic device, where the electronic device includes a plurality of hardware components, and the motherboard architecture includes: an upper main board, a heightening board and a lower main board which are sequentially connected through welding spots; wherein: the lower main board is provided with part of hardware components in the plurality of hardware components of the electronic equipment, and the lower main board is provided with other part of hardware components in the plurality of hardware components of the electronic equipment; welding spots among the upper main board, the heightening plate and the lower main board are used for transmitting electric energy of a battery of the electronic equipment; the upper main board is provided with a first signal receiving and transmitting assembly, the lower main board is provided with a second signal receiving and transmitting assembly, and the first signal receiving and transmitting assembly and the second signal receiving and transmitting assembly are used for realizing signal communication between a hardware component arranged on the upper main board and a hardware component arranged on the lower main board.

From the above, it can be seen that: welding spots among the upper main board, the heightening plate and the lower main board are only used for transmitting electric energy of a battery of the electronic equipment, so that the number of the welding spots among the main board, the heightening plate and the lower main board can be greatly reduced, the processing technology difficulty of a main board framework is reduced, the processing cost is saved, and the reliability and the production yield of the main board framework are improved. And the hardware components on the upper main board and the lower main board are communicated by adopting the first signal receiving and transmitting assembly and the second signal receiving and transmitting assembly, so that the problem of signal leakage caused by the transmission of welding spots of high-speed signals transmitted by the hardware components on the upper main board and the hardware components on the lower main board can be avoided.

In one possible embodiment, the first signal transceiver component includes: the first signal transceiver is connected with a hardware component arranged on the upper main board; the second signal receiving and transmitting assembly comprises: the second signal transceiver is connected with a hardware component arranged on the lower main board; the first fiber optic transceiver and the second fiber optic transceiver are in signal communication via optical fibers.

In one possible embodiment, the first signal transceiver component includes: the first signal transceiver is connected with a hardware component arranged on the upper main board; the second signal receiving and transmitting assembly comprises: the second signal transceiver is connected with a hardware component arranged on the lower main board; the first wireless transceiver and the second wireless transceiver are in signal communication via an antenna.

In one possible implementation, the hardware component of the upper motherboard is connected to the first signal transceiver through one or more of a GPIO interface, a MIPI interface, or a Dlink interface.

In one possible implementation, the hardware component of the lower motherboard is connected to the second signal transceiver through one or more of a GPIO interface, a MIPI interface, or a Dlink interface.

In one possible embodiment, the first signal transceiver component and the second signal transceiver component are configured to implement signal communication between a hardware component of an upper motherboard and a hardware component of a lower motherboard, and include: the first signal receiving and transmitting assembly is used for receiving signals sent by the hardware components arranged on the upper main board, packaging the signals by utilizing a preset packaging protocol to obtain first packaging data, sending the first packaging data to the second signal receiving and transmitting assembly, and the second signal receiving and transmitting assembly is used for analyzing the first packaging data to obtain signals sent by the hardware components arranged on the upper main board; and the second signal receiving and transmitting assembly is used for receiving signals sent by the hardware components arranged on the lower main board, packaging the signals by utilizing a preset packaging protocol to obtain second packaging data, sending the second packaging data to the first signal receiving and transmitting assembly, and analyzing the second packaging data by the second signal receiving and transmitting assembly to obtain signals sent by the hardware components arranged on the lower main board.

In one possible embodiment, the first signal transceiver component includes: a first signal transceiver and a first fiber optic transceiver connected to each other; the second signal receiving and transmitting assembly comprises: a second signal transceiver and a second fiber optic transceiver connected to each other; wherein: the first signal transceiver is used for receiving signals sent by a hardware component arranged on the upper main board, and packaging the signals by utilizing a preset packaging protocol to obtain first packaging data; the first optical fiber transceiver is used for sending first packaging data to the second optical fiber transceiver, the second optical fiber transceiver is used for sending the first packaging data to the second signal transceiver, and the second signal transceiver is used for analyzing the first packaging data to obtain signals sent by a hardware component arranged on the upper main board; the second signal transceiver is used for receiving signals sent by the hardware component arranged on the lower main board, and packaging the signals by utilizing a preset packaging protocol to obtain second packaging data; the second optical fiber transceiver is used for sending second package data to the first optical fiber transceiver, the first optical fiber transceiver is used for sending the second package data to the first signal transceiver, and the second signal transceiver is used for analyzing the second package data to obtain signals sent by a hardware component arranged on the lower main board.

In one possible embodiment, the first signal transceiver component includes: the first signal transceiver and the first wireless transceiver of interconnect, the second signal transceiver assembly includes: a second signal transceiver and a second wireless transceiver connected to each other; wherein: the first signal transceiver is used for receiving signals sent by a hardware component arranged on the upper main board, and packaging the signals by utilizing a preset packaging protocol to obtain first packaging data; the first wireless transceiver is used for sending first package data to the second wireless transceiver, the second wireless transceiver is used for sending the first package data to the second signal transceiver, and the second signal transceiver is used for analyzing the first package data to obtain signals sent by a hardware component arranged on the upper main board; the second signal transceiver is used for receiving signals sent by the hardware component arranged on the lower main board, and packaging the signals by utilizing a preset packaging protocol to obtain second packaging data; the second wireless transceiver is used for sending second package data to the first wireless transceiver, the first wireless transceiver is used for sending the second package data to the first signal transceiver, and the second signal transceiver is used for analyzing the second package data to obtain signals sent by a hardware component arranged on the lower main board.

In one possible embodiment, the hardware components of the lower motherboard include: a processor of the electronic device.

In a second aspect, the present application provides an electronic device, comprising: a plurality of hardware components, and a motherboard architecture as recited in any of the first aspects.

Drawings

FIG. 1 is an illustration of a sandwich architecture;

fig. 2 is a hardware configuration diagram of an electronic device according to an embodiment of the present application;

fig. 3 is an exhibition diagram of a motherboard architecture of an electronic device according to an embodiment of the present application;

fig. 4 is a signaling diagram of a signal transmission method according to a first embodiment of the present application;

fig. 5 is an exhibition diagram of a motherboard architecture of an electronic device according to a second embodiment of the present application;

fig. 6 is a signaling diagram of a signal transmission method according to a second embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. The terminology used in the following embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include, for example, "one or more" such forms of expression, unless the context clearly indicates to the contrary. It should also be understood that in embodiments of the present application, "one or more" means one, two, or more than two; "and/or", describes an association relationship of the association object, indicating that three relationships may exist; for example, a and/or B may represent: a alone, a and B together, and B alone, wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The plurality of the embodiments of the present application refers to greater than or equal to two. It should be noted that, in the description of the embodiments of the present application, the terms "first," "second," and the like are used for distinguishing between the descriptions and not necessarily for indicating or implying a relative importance, or alternatively, for indicating or implying a sequential order.

Currently, some electronic devices such as mobile phones employ a sandwich structure on a motherboard. Fig. 1 (a) shows a motherboard of a sandwich architecture of a mobile phone. As shown in (a) of fig. 1, the main board of the mobile phone includes an upper main board 101, a raised board 102, and a lower main board 103. The elevating plate 102 is disposed between the upper and lower

main boards

101 and 103 for connecting the upper and lower

main boards

101 and 103. Typically, the upper motherboard 101, the raised plate 102, and the lower motherboard 103 are connected by a large number of solder joints.

Fig. 1 (b) shows a structure in which the raised plate and the lower main board are welded together. In the area indicated by 104 in fig. 1 (b), the lower main board and the raised board are connected with thousands of solder joints.

However, the main board of the sandwich structure has the problems of complex processing technology, high cost, low production yield, difficult maintenance, poor reliability, signal leakage caused by discontinuous impedance of high-speed signals, and the like.

Specifically, the main board is generated by connecting the main board, the heightening board and the lower main board by a large number of welding spots, and the difficulty of main board processing is increased due to the large number of welding spots, so that the processing technology of the main board is complex and the cost is high. And, in case a large number of welding spots deviate, the main board is disqualified, so that the production yield of the main board is low.

Welding spots among the main board, the heightening board and the lower main board are easy to crack when the mobile phone falls, and once the welding spots crack, the use of the mobile phone can be affected, so that the reliability of the mobile phone main board is lower. And if the welding spots among the upper main board, the heightening plate and the lower main board are cracked due to the falling of the mobile phone, the mobile phone main board is damaged and needs to be maintained. However, during the maintenance of the motherboard, it is a relatively difficult task to find out the cracked solder joints from a large number of solder joints, which results in a high complexity of the maintenance of the motherboard.

In the using process of the mobile phone, the hardware component arranged on the upper main board and the hardware component arranged on the lower main board can carry out data communication. For example, the camera disposed on the upper motherboard needs to transmit signals to the processor disposed on the lower motherboard, where the signals are transmitted to the processor disposed on the lower motherboard through the welding points between the upper motherboard and the raised plate and the welding points between the raised plate and the lower motherboard, respectively. However, the impedance of the welding point between the upper main board and the raised board cannot be fixed, and the phenomenon of discontinuous impedance occurs. Under such circumstances, the problem of signal leakage may occur in the high-speed signals transmitted by the hardware components provided on the upper motherboard and the hardware components provided on the lower motherboard.

Based on this, the embodiment of the application provides a novel motherboard architecture. The motherboard architecture provided by the embodiment of the application can be applied to electronic devices such as mobile phones, folding mobile phones, tablet computers, desktop, laptop, notebook computers, ultra-mobile personal computers (UMPC), handheld computers, netbooks, personal digital assistants (Personal Digital Assistant, PDA), wearable electronic devices, smart watches and the like.

The following describes a hardware structure of the electronic device according to the embodiment of the present application, taking a mobile phone as an example. Also, the following hardware components of the electronic device may be disposed on a motherboard of the electronic device. The functions of the various hardware components of the handset are described below as being located on the motherboard.

The electronic device shown in fig. 2 includes: processor 210, external memory interface 220, internal memory 221, universal serial bus (universal serial bus, USB) interface 230, charge management module 240, power management module 241, battery 242, antenna 1, antenna 2, mobile communication module 250, wireless communication module 260, audio module 270, speaker 270A, receiver 270B, microphone 270C, headset interface 270D, sensor module 280, keys 290, motor 291, indicator 292, camera 293, display 294, and subscriber identity module (subscriber identification module, SIM) card interface 295, among others. The sensor module 280 may include, among other things, a pressure sensor 280A, a gyroscope sensor 280B, a barometric sensor 280C, a magnetic sensor 280D, an acceleration sensor 280E, a distance sensor 280F, a proximity light sensor 280G, a fingerprint sensor 280H, a temperature sensor 280J, a touch sensor 280K, an ambient light sensor 280L, a bone conduction sensor 280M, and the like.

In the embodiment of the present application, the processor 210 is generally disposed on the lower motherboard. The internal memory 221, the battery 242, the speaker 270A, the receiver 270B, the microphone 270C, and some or all of the sensors in the sensor module 280, the motor 291, the camera 293, and other hardware components are typically provided on the upper motherboard.

It is to be understood that the configuration illustrated in this embodiment does not constitute a specific limitation on the electronic apparatus. In other embodiments, the electronic device may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Processor 210 may include one or more processing units such as, for example: the processor 210 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

A memory may also be provided in the processor 210 for storing instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory may hold instructions or data that the processor 210 has just used or recycled. If the processor 210 needs to reuse the instruction or data, it may be called directly from the memory. Repeated accesses are avoided and the latency of the processor 210 is reduced, thereby improving the efficiency of the system.

In some embodiments, processor 210 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.

The I2C interface is a bi-directional synchronous serial bus comprising a serial data line (SDA) and a serial clock line (derail clock line, SCL). In some embodiments, the processor 210 may contain multiple sets of I2C buses. The processor 210 may be coupled to the touch sensor 280K, charger, flash, camera 293, etc., respectively, through different I2C bus interfaces. For example: the processor 210 may be coupled to the touch sensor 280K through an I2C interface, so that the processor 210 and the touch sensor 280K communicate through an I2C bus interface to implement a touch function of the electronic device.

The I2S interface may be used for audio communication. In some embodiments, the processor 210 may contain multiple sets of I2S buses. The processor 210 may be coupled to the audio module 270 via an I2S bus to enable communication between the processor 210 and the audio module 270. In some embodiments, the audio module 270 may communicate audio signals to the wireless communication module 260 through the I2S interface to implement a function of answering a call through a bluetooth headset.

PCM interfaces may also be used for audio communication to sample, quantize and encode analog signals. In some embodiments, the audio module 270 and the wireless communication module 260 may be coupled by a PCM bus interface. In some embodiments, the audio module 270 may also transmit audio signals to the wireless communication module 260 through the PCM interface to implement a function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.

The UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the processor 210 with the wireless communication module 260. For example: the processor 210 communicates with a bluetooth module in the wireless communication module 260 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 270 may transmit an audio signal to the wireless communication module 260 through a UART interface, implementing a function of playing music through a bluetooth headset.

The MIPI interface may be used to connect the processor 210 to peripheral devices such as the display 294, the camera 293, and the like. The MIPI interfaces include camera serial interfaces (camera serial interface, CSI), display serial interfaces (display serial interface, DSI), and the like. In some embodiments, processor 210 and camera 293 communicate through a CSI interface to implement a photographing function of the electronic device. The processor 210 and the display 294 communicate via a DSI interface to implement the display functionality of the electronic device.

A Dlink interface may be used to connect the processor 210 and the RF transceiver. In some embodiments, the processor 210 and the RF transceiver communicate over a Dlink interface.

The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 210 with the camera 293, display 294, wireless communication module 260, audio module 270, sensor module 280, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, an MIPI interface, etc.

The USB interface 230 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 230 may be used to connect a charger to charge an electronic device, or may be used to transfer data between the electronic device and a peripheral device. And can also be used for connecting with a headset, and playing audio through the headset. The interface may also be used to connect other electronic devices, such as AR devices, etc.

It should be understood that the connection relationship between the modules illustrated in this embodiment is only illustrative, and does not limit the structure of the electronic device. In other embodiments of the present application, the electronic device may also use different interfacing manners in the foregoing embodiments, or a combination of multiple interfacing manners.

The charge management module 240 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 240 may receive a charging input of a wired charger through the USB interface 230. In some wireless charging embodiments, the charge management module 240 may receive wireless charging input through a wireless charging coil of the electronic device. The charging management module 240 may also provide power to the electronic device through the power management module 241 while charging the battery 242.

The power management module 241 is used for connecting the battery 242, and the charge management module 240 and the processor 210. The power management module 241 receives input from the battery 242 and/or the charge management module 240 and provides power to the processor 210, the internal memory 221, the display 294, the camera 293, the wireless communication module 260, and the like. The power management module 241 may also be configured to monitor battery capacity, battery cycle times, battery health (leakage, impedance), and other parameters. In other embodiments, the charge management module 240 and the power management module 241 may be disposed in the processor 210.

The wireless communication function of the electronic device may be implemented by the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example: the antenna 2 may be multiplexed into a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 250 may provide a solution for wireless communication including 2G/3G/4G/5G, etc. applied on an electronic device. The mobile communication module 250 may include at least one filter, switch, power amplifier, low noise amplifier (low noise amplifier, LNA), etc. The mobile communication module 250 may receive electromagnetic waves from the antenna 1, perform processes such as filtering, amplifying, and the like on the received electromagnetic waves, and transmit the processed electromagnetic waves to the modem processor for demodulation. The mobile communication module 250 can amplify the signal modulated by the modem processor, and convert the signal into electromagnetic waves through the antenna 1 to radiate. In some embodiments, at least some of the functional modules of the mobile communication module 250 may be disposed in the processor 210. In some embodiments, at least some of the functional modules of the mobile communication module 250 may be provided in the same device as at least some of the modules of the processor 210.

The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to speaker 270A, receiver 270B, etc.), or displays images or video through display screen 294. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 250 or other functional module, independent of the processor 210.

The wireless communication module 260 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc. for application on an electronic device. The wireless communication module 260 may be one or more devices that integrate at least one communication processing module. The wireless communication module 260 receives electromagnetic waves via the antenna 2, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 210. The wireless communication module 260 may also receive a signal to be transmitted from the processor 210, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2. In some embodiments, the RF transceiver may be understood as a hardware component that performs the functions of the wireless communication module 260. The RF transceiver may be used to receive electromagnetic waves from the antenna 2, frequency modulate and filter the electromagnetic wave signals, and transmit the processed signals to the processor 210. The RF transceiver may also receive a signal to be transmitted from the processor 210, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2.

In some embodiments, antenna 1 and mobile communication module 250 of the electronic device are coupled, and antenna 2 and wireless communication module 260 are coupled, such that the electronic device may communicate with a network and other devices through wireless communication techniques. Wireless communication techniques may include global system for mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (global positioning system, GPS), a global navigation satellite system (global navigation satellite system, GLONASS), a beidou satellite navigation system (beidou navigation satellite system, BDS), a quasi zenith satellite system (quasi-zenith satellite system, QZSS) and/or a satellite based augmentation system (satellite based augmentation systems, SBAS).

The electronic device implements display functions through the GPU, the display screen 294, and the application processor, etc. The GPU is a microprocessor for image processing, and is connected to the display screen 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 210 may include one or more GPUs that execute program instructions to generate or change display information.

The display 294 is used to display images, videos, and the like. The display 294 includes a display panel. The display panel may employ a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED) or an active-matrix organic light-emitting diode (matrix organic light emitting diode), a flexible light-emitting diode (flex), a mini, a Micro-led, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED), or the like. In some embodiments, the electronic device may include 1 or N displays 294, N being a positive integer greater than 1.

A series of graphical user interfaces (graphical user interface, GUIs) may be displayed on the display 294 of the electronic device, all of which are home screens of the electronic device. Generally, the size of the display 294 of an electronic device is fixed and only limited controls can be displayed in the display 294 of the electronic device. A control is a GUI element that is a software component contained within an application program that controls all data processed by the application program and interactive operations on that data, and a user can interact with the control by direct manipulation (direct manipulation) to read or edit information about the application program. In general, controls may include visual interface elements such as icons, buttons, menus, tabs, text boxes, dialog boxes, status bars, navigation bars, widgets, and the like.

The electronic device may implement shooting functions through an ISP, a camera 293, a video codec, a GPU, a display 294, an application processor, and the like.

The ISP is used to process the data fed back by the camera 293. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing, so that the electrical signal is converted into an image visible to naked eyes. ISP can also optimize the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 293.

The camera 293 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image onto the photosensitive element. The photosensitive element may be a charge coupled device (charge coupled device, CCD) or a Complementary Metal Oxide Semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transferred to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV, or the like format. In some embodiments, the electronic device may include 1 or N cameras 293, N being a positive integer greater than 1.

The digital signal processor is used for processing digital signals, and can process other digital signals besides digital image signals. For example, when the electronic device selects a frequency bin, the digital signal processor is used to fourier transform the frequency bin energy, and so on.

Video codecs are used to compress or decompress digital video. The electronic device may support one or more video codecs. In this way, the electronic device may play or record video in a variety of encoding formats, such as: dynamic picture experts group (moving picture experts group, MPEG) 2, MPEG3, MPEG4, etc.

The NPU is a neural-network (NN) computing processor, and can rapidly process input information by referencing a biological neural network structure, for example, referencing a transmission mode between human brain neurons, and can also continuously perform self-learning. Applications such as intelligent cognition of electronic devices can be realized through the NPU, for example: image recognition, face recognition, speech recognition, text understanding, etc.

The external memory interface 220 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the electronic device. The external memory card communicates with the processor 210 through an external memory interface 220 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.

The internal memory 221 may be used to store computer executable program code that includes instructions. The processor 210 executes various functional applications of the electronic device 200 and data processing by executing instructions stored in the internal memory 221. The internal memory 221 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 200 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 221 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like.

The electronic device may implement audio functions through an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, an ear-headphone interface 270D, an application processor, and the like. Such as music playing, recording, etc.

The audio module 270 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 270 may also be used to encode and decode audio signals. In some embodiments, the audio module 270 may be disposed in the processor 210, or some functional modules of the audio module 270 may be disposed in the processor 210.

Speaker 270A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The electronic device may listen to music, or to hands-free conversations, through speaker 270A.

A receiver 270B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When the electronic device picks up a phone call or voice message, the voice can be picked up by placing the receiver 270B close to the human ear.

Microphone 270C, also referred to as a "microphone" or "microphone," is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can sound near the microphone 270C through the mouth, inputting a sound signal to the microphone 270C. The electronic device may be provided with at least one microphone 270C. In other embodiments, the electronic device may be provided with two microphones 270C, and may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device may also be provided with three, four, or more microphones 270C to enable collection of sound signals, noise reduction, identification of sound sources, directional recording functions, etc.

The earphone interface 270D is for connecting a wired earphone. Earphone interface 270D may be USB interface 230 or a 3.5mm open mobile electronic device platform (open mobile terminal platform, OMTP) standard interface, american cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.

The pressure sensor 280A is used to sense a pressure signal, and may convert the pressure signal into an electrical signal. In some embodiments, pressure sensor 280A may be disposed on display 294. The pressure sensor 280A is of various types, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a capacitive pressure sensor comprising at least two parallel plates with conductive material. When a force is applied to the pressure sensor 280A, the capacitance between the electrodes changes. The electronics determine the strength of the pressure from the change in capacitance. When a touch operation is applied to the display panel 294, the electronic device detects the touch operation intensity from the pressure sensor 280A. The electronic device may also calculate the location of the touch based on the detection signal of the pressure sensor 280A. In some embodiments, touch operations that act on the same touch location, but at different touch operation strengths, may correspond to different operation instructions. For example: and executing an instruction for checking the short message when the touch operation with the touch operation intensity smaller than the first pressure threshold acts on the short message application icon. And executing an instruction for newly creating the short message when the touch operation with the touch operation intensity being greater than or equal to the first pressure threshold acts on the short message application icon.

The gyro sensor 280B may be used to determine a motion gesture of the electronic device. In some embodiments, the angular velocity of the electronic device about three axes (i.e., x, y, and z axes) may be determined by gyroscope sensor 280B. The gyro sensor 280B may be used for photographing anti-shake. For example, when the shutter is pressed, the gyro sensor 280B detects the shake angle of the electronic device, calculates the distance to be compensated by the lens module according to the angle, and makes the lens counteract the shake of the electronic device through the reverse motion, thereby realizing anti-shake. The gyro sensor 280B may also be used for navigating, somatosensory game scenes.

The air pressure sensor 280C is used to measure air pressure. In some embodiments, the electronics calculate altitude from the barometric pressure value measured by barometric pressure sensor 280C, aiding in positioning and navigation.

The magnetic sensor 280D includes a hall sensor. The electronic device may detect the opening and closing of the flip holster using the magnetic sensor 280D. In some embodiments, when the electronic device is a flip machine, the electronic device may detect the opening and closing of the flip according to the magnetic sensor 280D. And then according to the detected opening and closing state of the leather sheath or the opening and closing state of the flip, the characteristics of automatic unlocking of the flip and the like are set.

The acceleration sensor 280E may detect the magnitude of acceleration of the electronic device in various directions (typically three axes). The magnitude and direction of gravity can be detected when the electronic device is stationary. The electronic equipment gesture recognition method can also be used for recognizing the gesture of the electronic equipment, and is applied to horizontal and vertical screen switching, pedometers and other applications.

A distance sensor 280F for measuring distance. The electronic device may measure the distance by infrared or laser. In some embodiments, the scene is photographed and the electronic device can range using the distance sensor 280F to achieve quick focus.

Proximity light sensor 280G may include, for example, a Light Emitting Diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device emits infrared light outwards through the light emitting diode. The electronic device uses a photodiode to detect infrared reflected light from nearby objects. When sufficient reflected light is detected, it may be determined that an object is in the vicinity of the electronic device. When insufficient reflected light is detected, the electronic device may determine that there is no object in the vicinity of the electronic device. The electronic device can detect that the user holds the electronic device close to the ear to talk by using the proximity light sensor 280G, so as to automatically extinguish the screen to achieve the purpose of saving electricity. The proximity light sensor 280G may also be used in holster mode, pocket mode to automatically unlock and lock the screen.

The ambient light sensor 280L is used to sense ambient light level. The electronic device may adaptively adjust the brightness of the display 294 based on the perceived ambient light level. The ambient light sensor 280L may also be used to automatically adjust white balance during photographing. Ambient light sensor 280L may also cooperate with proximity light sensor 280G to detect if the electronic device is in a pocket to prevent false touches.

The fingerprint sensor 280H is used to collect a fingerprint. The electronic equipment can utilize the collected fingerprint characteristics to realize fingerprint unlocking, access the application lock, fingerprint photographing, fingerprint incoming call answering and the like.

The temperature sensor 280J is used to detect temperature. In some embodiments, the electronic device performs a temperature processing strategy using the temperature detected by temperature sensor 280J. For example, when the temperature reported by temperature sensor 280J exceeds a threshold, the electronics perform a reduction in performance of a processor located in the vicinity of temperature sensor 280J in order to reduce power consumption to implement thermal protection. In other embodiments, the electronic device heats the battery 242 when the temperature is below another threshold to avoid low temperatures causing the electronic device to be abnormally shut down. In other embodiments, the electronic device performs boosting of the output voltage of the battery 242 when the temperature is below a further threshold to avoid abnormal shutdown caused by low temperatures.

The touch sensor 280K, also referred to as a "touch device". The touch sensor 280K may be disposed on the display screen 294, and the touch sensor 280K and the display screen 294 form a touch screen, which is also referred to as a "touch screen". The touch sensor 280K is used to detect a touch operation acting on or near it. The touch sensor may communicate the detected touch operation to the application processor to determine the touch event type. Visual output related to touch operations may be provided through the display 294. In other embodiments, the touch sensor 280K may also be disposed on a surface of the electronic device at a different location than the display 294.

Bone conduction sensor 280M may acquire a vibration signal. In some embodiments, bone conduction sensor 280M may acquire a vibration signal of a human vocal tract vibrating bone pieces. The bone conduction sensor 280M may also contact the pulse of the human body to receive the blood pressure pulsation signal. The audio module 270 may analyze the voice signal based on the vibration signal of the vocal cords vibration bone piece obtained by the bone conduction sensor 280M, and implement the voice function. The application processor can analyze heart rate information based on the blood pressure beat signals acquired by the bone conduction sensor 280M, so that a heart rate detection function is realized.

Keys 290 include a power on key, a volume key, etc. The keys 290 may be mechanical keys. Or may be a touch key. The electronic device may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device.

The motor 291 may generate a vibration alert. The motor 291 may be used for incoming call vibration alerting or for touch vibration feedback. For example, touch operations acting on different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 291 may also correspond to different vibration feedback effects by touch operations applied to different areas of the flexible screen 294. Different application scenarios (such as time reminding, receiving information, alarm clock, game, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.

The indicator 292 may be an indicator light, which may be used to indicate a state of charge, a change in power, a message indicating a missed call, a notification, etc.

The SIM card interface 295 is for interfacing with a SIM card. The SIM card may be inserted into the SIM card interface 295 or removed from the SIM card interface 295 to enable contact and separation from the electronic device. The electronic device may support 1 or N SIM card interfaces, N being a positive integer greater than 1.

The electronic device further comprises a main board structure besides the hardware structure of the electronic device described in the above description, and the main board structure is also a sandwich structure and comprises an upper main board, a heightening board and a lower main board. The motherboard architecture provided in the present application is described below through two embodiments respectively.

The hardware configuration of the electronic device described in the above description is specifically described as follows: the number of hardware devices provided on the upper motherboard is plural, and the following embodiments are described by taking the above motherboard with a camera and an RF transceiver as examples for convenience of description.

Example 1

Fig. 3 illustrates a motherboard architecture according to an embodiment of the present application. The motherboard structure is a sandwich structure, and includes an upper motherboard 301, a raised board 302, and a lower motherboard 303. Wherein the upper main board 301, the raised board 302 and the lower main board 303 are connected by solder joints 304. The upper main board 301 is located above the raised board 302, and the lower main board 303 is located below the raised board 302.

The upper motherboard 301 and the lower motherboard 302 are used to set hardware components of the electronic device, respectively, and the hardware components of the electronic device set on the upper motherboard 301 and the lower motherboard 302 may be as described above. Illustratively, fig. 3 shows an upper motherboard 301 provided with hardware components of two electronic devices, a camera and an RF transceiver. The lower motherboard 303 is provided with a processor. And, the upper main board 301 and the lower main board 303 are further provided with a signal transceiver and an optical fiber transceiver, and the signal transceiver is connected with the optical fiber transceiver.

The hardware components provided on the upper motherboard 301 may be connected to the signal transceiver through various types of connection interfaces to receive signals from the signal transceiver and transmit signals to the signal transceiver. Illustratively, the camera shown in fig. 3 is connected to the signal transceiver through the MIPI interface and the GPIO interface, and the RF transceiver is connected to the signal transceiver through the Dlink interface and the GPIO interface.

The processor of the lower motherboard 303 may also be connected to the signal transceiver through various connection interfaces to receive signals from the signal transceiver and transmit signals to the signal transceiver. Illustratively, the processor illustrated in fig. 3 is coupled to the signal transceiver via a GPIO interface, a MIPI interface, and a Dlink interface.

In this embodiment, the welding points between the upper main board 301, the elevating board 302 and the lower main board 303 are used only for transmitting the electric power of the battery of the electronic device. A battery of the electronic device is typically disposed on the upper motherboard 301, and power of the battery may provide power to hardware components disposed on the upper motherboard 301, such as the camera, the RF transceiver, the signal transceiver, and the optical fiber transceiver in fig. 3. And, the battery can also supply power to the processor arranged on the lower main board 303 through the welding points 304 on the upper main board 301, the heightening board 302 and the lower main board 303.

The upper motherboard 301 and the lower motherboard 303 are further provided with optical fiber interfaces, which are connected to optical fibers, so that signals between components provided on the upper motherboard 301 and components provided on the lower motherboard 303 can be transmitted through the optical fibers. The optical fiber transmission signal has the advantages of high bandwidth, long transmission distance, strong interference resistance and the like.

In the motherboard architecture provided in this embodiment, the welding spots between the upper motherboard, the raised board and the lower motherboard are only used for transmitting the electric energy of the battery of the electronic device, so that the number of the welding spots between the motherboard, the raised board and the lower motherboard can be greatly reduced, the processing difficulty of the motherboard architecture is reduced, the processing cost is saved, and the reliability and the production yield of the motherboard architecture are improved. And the hardware components on the upper main board and the lower main board are communicated in an optical fiber communication mode, so that the problem of signal leakage caused by transmission of welding spots of high-speed signals transmitted by the hardware components on the upper main board and the hardware components on the lower main board can be avoided.

Typically, signals sent by the processor on the lower motherboard 303 may be transmitted to the signal transceiver on the lower motherboard 303 through a GPIO interface, MIPI interface, or Dlink interface. After receiving the signal, the signal transceiver on the lower motherboard 303 may perform encapsulation according to an agreed encapsulation protocol to obtain encapsulated data, and send the encapsulated data to the optical fiber transceiver on the lower motherboard 303. After the optical fiber transceiver on the lower motherboard 303 receives the package data, the package data is sent to the optical fiber transceiver on the upper motherboard 301 through the optical fiber, the optical fiber transceiver on the upper motherboard 301 then transmits the package data to the signal transceiver on the upper motherboard 301, the signal transceiver on the upper motherboard 301 analyzes the received package data to obtain analyzed data, and the analyzed data is sent to the hardware component of the upper motherboard 301.

Since the signal transmitted by the processor will generally describe the object to receive the signal, the signal transceiver on the upper motherboard 301 receives the encapsulated data, analyzes the encapsulated data, and also describes the object to receive the data, and based on this, the signal transceiver on the upper motherboard 301 can transmit the analyzed data to the object to be received.

In some embodiments, if the signal sent by the processor is a control signal, the processor sends the control signal to the signal transceiver on the lower motherboard 303 through the GPIO interface. The data analyzed by the signal transceiver of the upper motherboard 301 is also a control signal, and the signal transceiver on the upper motherboard 301 will send the analyzed data to the receiving object through the GPIO interface.

The hardware components such as the camera and the RF transceiver on the upper motherboard 301 may also send signals, and the sent signals may be transmitted to the signal transceiver on the upper motherboard 301 through the GPIO interface, the MIPI interface, or the Dlink interface. After receiving the signal, the signal transceiver on the upper motherboard 301 may perform encapsulation according to an agreed encapsulation protocol to obtain encapsulated data, and send the encapsulated data to the optical fiber transceiver on the upper motherboard 301. After the optical fiber transceiver on the upper motherboard 301 receives the package data, the package data is sent to the optical fiber transceiver on the lower motherboard 303 through the optical fiber, the optical fiber transceiver on the lower motherboard 303 then transmits the package data to the signal transceiver on the lower motherboard 303, the signal transceiver on the lower motherboard 303 analyzes the received package data to obtain analyzed data, and the analyzed data is sent to the processor on the lower motherboard 303.

The interface type of the interface used by the hardware components such as the camera and the RF transceiver on the upper motherboard 301 for transmitting signals to the signal transceiver on the upper motherboard 301 is the same as the interface type used by the signal transceiver on the lower motherboard 303 for transmitting parsed data to the processor on the lower motherboard 303. Illustratively, hardware components such as a camera and an RF transceiver on the upper motherboard 301 send signals to a signal transceiver on the upper motherboard 301 through an MIPI interface; correspondingly, the signal transceiver on the lower motherboard 303 also sends parsed data to the processor on the lower motherboard 303 through the MIPI interface.

The following describes a signal transmission method provided in the embodiment of the present application in detail with reference to the components on the main board frame of the electronic device shown in fig. 3. In the signal transmission method provided in this embodiment, a processor provided in the following motherboard sends a control instruction to control a camera to operate to capture video, the camera captures video in response to the control instruction, and returns video stream data to the processor for introduction. Of course, the processor disposed on the lower motherboard also adopts the signal transmission method provided in this embodiment to send signals to other components disposed on the upper motherboard, and other components disposed on the upper motherboard may also adopt the signal transmission method provided in this embodiment to send signals to the processor disposed on the lower motherboard.

Fig. 4 shows a signaling diagram of a signal transmission method according to an embodiment of the present application. As shown in fig. 4, the signal transmission method includes the steps of:

s401, a processor on the lower main board generates a control signal, and the control signal is used for starting a camera to shoot a video.

For example, a user may instruct an electronic device to open a camera application by touching a particular control on the screen of the electronic device, pressing a particular physical button or combination of buttons, inputting speech, a blank gesture, and the like. After the electronic equipment starts the camera application, the camera of the electronic equipment can be controlled to start shooting video by clicking a start video control on a camera preview interface displayed by the electronic equipment. The processor arranged on the lower main board can respond to the operation of the user and generate a control signal so as to start the camera and shoot the video.

S402, a processor on the lower main board sends a control signal to a signal transceiver on the lower main board through a GPIO interface.

As described in the foregoing in the hardware structure of the electronic device, the GPIO interface of the processor may be used to transmit the control signal, so after the processor generates the control signal, the control signal may be sent to the signal transceiver on the lower motherboard through the GPIO interface.

S403, the signal transceiver on the lower main board packages the control signal according to the agreed package protocol to obtain package data.

The signal transceiver on the lower main board is configured with a packaging protocol and a decoding protocol, the packaging protocol prescribes a rule for packaging various types of signals, the decoding protocol corresponds to the packaging protocol, and the packaging data after the packaging is prescribed is analyzed to obtain a rule of the original data. Based on the above, after the signal transceiver receives the control signal sent by the processor, the packet protocol corresponding to the control signal is searched out from the packet protocols, and the control signal is packaged by adopting the searched packet protocol to obtain the packaged data.

S404, the signal transceiver on the lower main board sends the encapsulation data to the optical fiber transceiver on the lower main board.

The optical Fiber transceiver is an ethernet transmission medium conversion unit that exchanges a short-distance twisted pair electrical signal with a long-distance optical signal, and is also called a Fiber Converter (Fiber Converter), which can perform signal transmission with the optical Fiber transceiver of the upper motherboard through an optical Fiber, so that the signal transceiver of the lower motherboard can send the encapsulated data to the optical Fiber transceiver.

S405, the optical fiber transceiver on the lower main board sends packaging data to the optical fiber transceiver on the upper main board through the optical fiber.

As described above, the optical fiber transceiver on the lower main board and the optical fiber transceiver on the upper main board can communicate through the optical fiber, and thus, the optical fiber transceiver on the lower main board transmits the package data to the optical fiber transceiver on the upper main board through the optical fiber.

S406, the optical fiber transceiver on the upper main board transmits the encapsulation data to the signal transceiver on the upper main board.

The signal transceiver on the upper main board is connected with the optical fiber transceiver on the upper main board, so that after the optical fiber transceiver on the upper main board receives the package data, the package data is sent to the signal transceiver on the upper main board.

S407, the signal transceiver on the upper main board analyzes the package data to obtain analyzed data.

The signal transceiver on the upper main board is also configured with a packet protocol and a decoding protocol, and the signal transceiver adopts the decoding protocol corresponding to the packet protocol to analyze the encapsulated data, so that the analyzed data can be obtained. The parsed data may be understood as a control signal generated by the processor.

S408, the signal transceiver on the upper main board sends a control signal to the camera on the upper main board through the GPIO interface.

The signal transceiver on the upper main board analyzes the package data, and a control signal generated by the processor and used for controlling the camera to start shooting video can be obtained, so that the signal transceiver adopts the GPIO interface to send the control signal to the camera on the upper main board.

It should be noted that, the signal transceiver on the upper motherboard may also use other interfaces to send control signals to the camera on the upper motherboard.

S409, the camera on the upper main board responds to the control signal, and starts to operate to shoot the video, so as to obtain video stream data.

S410, the camera on the upper main board sends video stream data to the signal transceiver on the upper main board through the MIPI interface.

In general, the MIPI interface can transmit data with a large data amount, and thus, the camera MIPI interface of the upper main board transmits video stream data to the signal transceiver on the upper main board. Of course, the camera may also employ other interfaces to send video stream data to the signal transceiver.

S411, the signal transceiver on the upper main board packs the video stream data according to the agreed packing protocol to obtain the packed data.

In the foregoing step S407, the signal transceiver is configured with a packet protocol, and performs packet processing on the video stream data by using the packet protocol to obtain the encapsulated data.

S412, the signal transceiver on the upper main board sends the package data to the optical fiber transceiver on the upper main board.

The optical fiber transceiver on the lower main board can communicate with the optical fiber transceiver on the upper main board through optical fibers, so that after the signal transceiver on the upper main board obtains the package data, the package data is sent to the optical fiber transceiver on the upper main board.

S413, the optical fiber transceiver on the upper main board sends packaging data to the optical fiber transceiver on the lower main board through the optical fiber.

S414, the optical fiber transceiver on the lower main board transmits the packaging data to the signal transceiver on the lower main board.

S415, the signal transceiver on the lower main board analyzes the encapsulation data to obtain video stream data.

After receiving the encapsulated data, the signal transceiver on the lower motherboard analyzes the encapsulated data by adopting a decoding protocol corresponding to a packet protocol adopted by the encapsulated data to obtain video stream data.

S416, the signal transceiver on the lower main board sends video stream data to the processor on the lower main board through the MIPI interface.

In the step S410, the camera on the upper motherboard uses the MIPI interface to send the video stream data to the signal transceiver on the upper motherboard, so that the signal transceiver on the lower motherboard can send the video stream data to the processor on the lower motherboard through the MIPI interface after obtaining the video stream data.

Example two

Fig. 5 illustrates a motherboard architecture according to a second embodiment of the present application. The motherboard structure is also a sandwich structure, and includes an upper motherboard 501, a raised board 502, and a lower motherboard 503. The arrangement of the upper motherboard 501, the raised board 502 and the lower motherboard 503 is the same as that of the foregoing embodiment, and will not be described here again.

In this embodiment, a signal transceiver and a wireless transceiver are further disposed on the upper main board 501 and the lower main board 503, and the signal transceiver and the wireless transceiver are connected.

Antennas are further arranged on the upper main board 501 and the lower main board 503, the antennas on the upper main board 501 are connected with the wireless transceivers on the upper main board 501, and the antennas on the lower main board 503 are connected with the wireless transceivers on the lower main board 503. The wireless transceiver on the upper motherboard 501 and the wireless transceiver on the lower motherboard 503 may transmit signals to each other through an antenna.

Because the distance between the upper motherboard 501 and the lower motherboard 503 is relatively short, the wireless transmission power requirement is very small, and the wireless transceiver on the upper motherboard 501 and the wireless transceiver on the lower motherboard 503 can realize high-bandwidth low-delay transmission of signals.

Specifically, the wireless transceiver on the upper motherboard 501 and the wireless transceiver on the lower motherboard 503 may use wireless communication technologies such as wireless local area network (wireless local area networks, WLAN) (e.g. wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), zigBee (ZigBee), etc. to send signals to or receive signals sent by the other party.

In the motherboard architecture provided in this embodiment, the welding spots between the upper motherboard, the raised board and the lower motherboard are only used for transmitting the electric energy of the battery of the electronic device, so that the number of the welding spots between the motherboard, the raised board and the lower motherboard can be greatly reduced, the processing difficulty of the motherboard architecture is reduced, the processing cost is saved, and the reliability and the production yield of the motherboard architecture are improved. And the hardware components on the upper main board and the lower main board are communicated in a wireless communication mode, so that the problem of signal leakage caused by transmission of welding spots of high-speed signals transmitted by the hardware components on the upper main board and the hardware components on the lower main board can be avoided.

Typically, signals sent by the processor on the lower motherboard 503 may be transmitted to the signal transceiver on the lower motherboard 503 through a GPIO interface, MIPI interface, or Dlink interface. After the signal transceiver on the lower motherboard 503 receives the signal, the signal transceiver may perform encapsulation according to an agreed encapsulation protocol to obtain encapsulated data, and send the encapsulated data to the wireless transceiver on the lower motherboard 503. After the wireless transceiver on the lower motherboard 503 receives the package data, the package data is sent to the wireless transceiver on the upper motherboard 501 through the antenna, the wireless transceiver on the upper motherboard 501 then transmits the package data to the signal transceiver on the upper motherboard 501, the signal transceiver on the upper motherboard 501 parses the received package data to obtain parsed data, and the parsed data is sent to the hardware component of the upper motherboard 501.

Since the signal transmitted by the processor will generally describe the object to receive the signal, the signal transceiver on the upper motherboard 501 receives the encapsulated data, analyzes the encapsulated data, and also describes the object to receive the data.

In some embodiments, if the signal sent by the processor is a control signal, the processor sends the control signal to the signal transceiver on the lower motherboard 503 through the GPIO interface. The data analyzed by the signal transceiver of the upper motherboard 501 is also a control signal, and the signal transceiver on the upper motherboard 501 may send the analyzed data to the receiving object through the GPIO interface.

The hardware components such as the camera and the RF transceiver on the upper motherboard 501 may also send signals, and the sent signals may be transmitted to the signal transceiver on the upper motherboard 501 through the GPIO interface, the MIPI interface, or the Dlink interface. After receiving the signal, the signal transceiver on the upper motherboard 501 may perform encapsulation according to an agreed encapsulation protocol to obtain encapsulated data, and send the encapsulated data to the wireless transceiver on the upper motherboard 501. After the wireless transceiver on the upper motherboard 501 receives the package data, the package data is sent to the wireless transceiver on the lower motherboard 503 through the antenna, the wireless transceiver on the lower motherboard 503 then sends the package data to the signal transceiver on the lower motherboard 503, the signal transceiver on the lower motherboard 503 analyzes the received package data to obtain analyzed data, and the analyzed data is sent to the processor on the lower motherboard 503.

As in the first embodiment, the interface type of the interface used for the signals sent by the hardware components such as the camera and the RF transceiver on the upper motherboard 501 to the signal transceiver on the upper motherboard 501 is the same as the interface type of the interface used for the signal transceiver on the lower motherboard 503 to the processor on the lower motherboard 503.

The following describes a specific description of another signal transmission method provided in the embodiment of the present application in connection with a component on a main board frame of an electronic device shown in fig. 5. In the signal transmission method provided in this embodiment, the processor provided by the motherboard sends a control instruction to control the camera to operate so as to capture video, and the camera captures video in response to the control instruction and returns video stream data to the processor for introduction. Of course, the processor disposed on the lower motherboard also adopts the signal transmission method provided in this embodiment to send signals to other components disposed on the upper motherboard, and other components disposed on the upper motherboard may also adopt the signal transmission method provided in this embodiment to send signals to the processor disposed on the lower motherboard.

Fig. 6 shows a signaling diagram of a signal transmission method according to an embodiment of the present application. As shown in fig. 6, the signal transmission method includes the steps of:

S601, a processor on the lower main board generates a control signal, and the control signal is used for starting a camera to shoot a video.

The specific implementation manner of step S601 can be referred to as step S501 in the first embodiment, and will not be described herein.

S602, a processor on the lower main board sends a control signal to a signal transceiver on the lower main board through a GPIO interface.

The specific implementation manner of step S602 can be referred to step S502 in the first embodiment, and will not be described herein.

S603, the signal transceiver on the lower main board packages the control signal according to a agreed package protocol to obtain package data.

The specific implementation manner of step S603 can be referred to step S503 in the first embodiment, and will not be described herein.

S604, the signal transceiver on the lower main board sends the encapsulation data to the wireless transceiver on the lower main board.

In this embodiment, the signal transceiver on the lower motherboard is connected to the wireless transceiver, so that after the signal transceiver on the lower motherboard obtains the package data, the package data is sent to the wireless transceiver.

S605, the wireless transceiver on the lower main board sends packaging data to the wireless transceiver on the upper main board through the antenna.

The wireless transceiver on the lower motherboard and the wireless transceiver on the upper motherboard communicate via an antenna, and therefore, the wireless transceiver on the lower motherboard transmits the package data to the wireless transceiver on the upper motherboard via the antenna.

S606, the wireless transceiver on the upper main board sends the encapsulation data to the signal transceiver on the upper main board.

S607, the signal transceiver on the upper main board analyzes the encapsulation data to obtain analyzed data.

The specific implementation of step S607 can be referred to as step S507 in the first embodiment, and will not be described herein.

S608, a signal transceiver on the upper main board sends a control signal to a camera on the upper main board through a GPIO interface.

The specific implementation of step S608 can be referred to as step S508 in the first embodiment, and will not be described herein.

S609, the camera on the upper main board responds to the control signal, and starts to operate to shoot video, so that video stream data are obtained.

The specific implementation of step S609 can be referred to step S509 in the first embodiment, and will not be described herein.

S610, the camera on the upper main board sends video stream data to the signal transceiver on the upper main board through the MIPI interface.

The specific implementation of step S610 can be referred to as step S510 in the first embodiment, and will not be described herein.

S611, a signal transceiver on the upper main board packages the video stream data according to a agreed package protocol to obtain package data.

The specific implementation of step S611 can be referred to as step S511 in the first embodiment, and will not be described here again.

S612, the signal transceiver on the upper main board transmits the encapsulation data to the wireless transceiver on the upper main board.

The signal transceiver on the upper main board is connected with the wireless transceiver, so that after the signal transceiver on the upper main board obtains the package data, the package data is sent to the wireless transceiver on the upper main board.

S613, the wireless transceiver on the upper main board sends packaging data to the wireless transceiver on the lower main board through the antenna.

S614, the wireless transceiver on the lower motherboard sends the encapsulated data to the signal transceiver on the lower motherboard.

The signal transceiver on the lower main board is connected with the wireless transceiver, so that after the signal transceiver on the lower main board obtains the package data, the package data is sent to the wireless transceiver on the lower main board.

S615, a signal transceiver on the lower main board analyzes the encapsulation data to obtain video stream data.

The specific implementation of step S615 can be referred to step S515 in the first embodiment, and will not be described here.

S616, the signal transceiver on the lower motherboard sends video stream data to the processor on the lower motherboard through the MIPI interface.

The specific implementation of step S616 can be referred to as step S516 in the first embodiment, and will not be described herein.

Another embodiment of the present application also provides a computer-readable storage medium having instructions stored therein, which when run on a computer or processor, cause the computer or processor to perform one or more steps of any of the methods described above.

The computer readable storage medium may be a non-transitory computer readable storage medium, for example, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.

Another embodiment of the present application also provides a computer program product comprising instructions. The computer program product, when run on a computer or processor, causes the computer or processor to perform one or more steps of any of the methods described above.

Claims

1. A motherboard architecture, characterized by being applied to an electronic device, the electronic device including a plurality of hardware components, the motherboard architecture comprising: an upper main board, a heightening board and a lower main board which are sequentially connected through welding spots; wherein:

The lower main board is used for setting part of the plurality of hardware components of the electronic equipment, and the lower main board is used for setting the other part of the plurality of hardware components of the electronic equipment;

the welding points among the upper main board, the heightening board and the lower main board are used for transmitting electric energy of a battery of the electronic equipment;

the upper main board is provided with a first signal receiving and transmitting assembly, the lower main board is provided with a second signal receiving and transmitting assembly, and the first signal receiving and transmitting assembly and the second signal receiving and transmitting assembly are used for realizing signal communication between a hardware component arranged on the upper main board and a hardware component arranged on the lower main board.

2. The motherboard architecture of claim 1, wherein the first signal transceiver component comprises: the first signal transceiver is connected with the hardware component arranged on the upper main board; the second signal transceiver module includes: the second signal transceiver is connected with the hardware component arranged on the lower main board; the first fiber optic transceiver and the second fiber optic transceiver are in signal communication via optical fibers.

3. The motherboard architecture of claim 1, wherein the first signal transceiver component comprises: the first signal transceiver is connected with the hardware component arranged on the upper main board; the second signal transceiver module includes: the second signal transceiver is connected with the hardware component arranged on the lower main board; the first wireless transceiver and the second wireless transceiver are in signal communication via an antenna.

4. A motherboard architecture according to claim 2 or 3, wherein the hardware component of the upper motherboard is connected to the first signal transceiver via one or more of a GPIO interface, a MIPI interface or a Dlink interface.

5. A motherboard architecture according to claim 2 or 3, wherein the hardware component of the lower motherboard is connected to the second signal transceiver via one or more of a GPIO interface, a MIPI interface or a Dlink interface.

6. The motherboard architecture of any of claims 1 to 5, wherein the first signal transceiver component and the second signal transceiver component are configured to implement signal communication between a hardware component of the upper motherboard and a hardware component of the lower motherboard, comprising:

The first signal receiving and transmitting assembly is used for receiving signals sent by the hardware components arranged on the upper main board, packaging the signals by utilizing a preset packaging protocol to obtain first packaging data, sending the first packaging data to the second signal receiving and transmitting assembly, and the second signal receiving and transmitting assembly is used for analyzing the first packaging data to obtain signals sent by the hardware components arranged on the upper main board;

and the second signal receiving and transmitting assembly is used for receiving signals sent by the hardware components arranged on the lower main board, packaging the signals by utilizing a preset packaging protocol to obtain second packaging data, sending the second packaging data to the first signal receiving and transmitting assembly, and analyzing the second packaging data by the second signal receiving and transmitting assembly to obtain signals sent by the hardware components arranged on the lower main board.

7. The motherboard architecture of claim 6, wherein the first signal transceiver component comprises: a first signal transceiver and a first fiber optic transceiver connected to each other; the second signal transceiver module includes: a second signal transceiver and a second fiber optic transceiver connected to each other; wherein:

The first signal transceiver is configured to receive a signal sent by a hardware component set on the upper motherboard, and package the signal by using a predetermined package protocol to obtain the first package data; the first optical fiber transceiver is used for sending the first packaging data to the second optical fiber transceiver, the second optical fiber transceiver is used for sending the first packaging data to the second signal transceiver, and the second signal transceiver is used for analyzing the first packaging data to obtain signals sent by the hardware component arranged on the upper main board;

the second signal transceiver is configured to receive a signal sent by a hardware component set by the lower motherboard, and package the signal by using a predetermined package protocol to obtain the second package data; the second optical fiber transceiver is used for sending the second package data to the first optical fiber transceiver, the first optical fiber transceiver is used for sending the second package data to the first signal transceiver, and the second signal transceiver is used for analyzing the second package data to obtain signals sent by the hardware component arranged on the lower main board.

8. The motherboard architecture of claim 6, wherein the first signal transceiver component comprises: a first signal transceiver and a first wireless transceiver connected to each other, the second signal transceiver assembly comprising: a second signal transceiver and a second wireless transceiver connected to each other; wherein:

The first signal transceiver is configured to receive a signal sent by a hardware component set on the upper motherboard, and package the signal by using a predetermined package protocol to obtain the first package data; the first wireless transceiver is used for sending the first encapsulation data to the second wireless transceiver, the second wireless transceiver is used for sending the first encapsulation data to the second signal transceiver, and the second signal transceiver is used for analyzing the first encapsulation data to obtain signals sent by the hardware component arranged on the upper main board;

the second signal transceiver is configured to receive a signal sent by a hardware component set by the lower motherboard, and package the signal by using a predetermined package protocol to obtain the second package data; the second wireless transceiver is used for sending the second package data to the first wireless transceiver, the first wireless transceiver is used for sending the second package data to the first signal transceiver, and the second signal transceiver is used for analyzing the second package data to obtain signals sent by the hardware component arranged on the lower main board.

9. The motherboard architecture of any of claims 1 to 8, wherein the hardware components of the lower motherboard arrangement comprise: a processor of the electronic device.

10. An electronic device, comprising: a plurality of hardware components, and a motherboard architecture as claimed in any one of claims 1 to 9.