CN116054606A - MOS voltage stabilizing rectifying circuit - Google Patents

MOS voltage stabilizing rectifying circuit Download PDF

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Publication number
CN116054606A
CN116054606A CN202211672504.9A CN202211672504A CN116054606A CN 116054606 A CN116054606 A CN 116054606A CN 202211672504 A CN202211672504 A CN 202211672504A CN 116054606 A CN116054606 A CN 116054606A
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China
Prior art keywords
mos tube
voltage
circuit
voltage stabilizing
input end
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CN202211672504.9A
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Chinese (zh)
Inventor
伍荣翔
王奕皓
周子敬
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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Priority to CN202211672504.9A priority Critical patent/CN116054606A/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention belongs to the technical field of power electronics and integrated circuits, and particularly provides a MOS voltage stabilizing and rectifying circuit which is used for realizing voltage stabilizing control on output voltage while realizing a rectifying function. The MOS voltage-stabilizing rectification circuit provided by the invention adopts the rectification switch unit formed by connecting two MOS tubes in series, wherein the two MOS tubes are connected with each other through the resistor, the source electrode is connected with the grid electrode, and the two MOS tubes are connected with each other through the resistor to carry out active rectification; the control signal generating circuit is used for generating a control signal according to the alternating current input voltage and the direct current output voltage, and controlling the on/off of the rectifying switch unit, so that the charging time of the energy storage capacitor is controllable, voltage stabilization is realized, and reverse leakage current is reduced. Finally, the invention has the advantages of higher power conversion efficiency, fast control loop response, simple system structure and low process cost.

Description

MOS voltage stabilizing rectifying circuit
Technical Field
The invention belongs to the technical field of power electronics and integrated circuits, and particularly provides a MOS voltage-stabilizing rectifying circuit.
Background
With the development of modern science and technology, more and more electronic products bring convenience to the daily life of people; to enable these electronic devices to function properly, a stable power supply is first required. In many application scenarios, the circuit system uses an ac power source as an input source and converts the ac power source into a stable dc power source required by other components in the system to operate, which requires the system to introduce a structure with an ac-dc conversion function, and this structure is called a rectifying circuit in modern power supply design. The rectification circuit has the function of converting alternating current into direct current voltage for output, and is widely used in the circuit fields of simulation, radio frequency and the like; for example, in the design of an isolated power supply or a wireless power transmission system, alternating current passes energy from a primary winding to a secondary winding through magnetic coupling of a transformer, and the energy obtained by the secondary winding is still in an alternating current form, so that a rectifying circuit is usually connected to the secondary winding to convert alternating current energy into direct current energy, so that direct current voltage is provided for other components.
In order to meet the requirements of different application scenes, the power supply needs to ensure that stable direct current voltage is still provided under unstable input voltage or different loads; therefore, the rectifying circuit is usually designed in a feedback adjustment manner. The structure of the conventional rectifying circuit is shown in fig. 1, and the conventional rectifying circuit comprises a diode connected with an input side and an output side, a voltage stabilizing capacitor connected with two ends of the output side, and a control circuit for performing feedback regulation according to output voltage; the diode is used as a double-end device to realize the rectification function only, and the traditional rectification circuit is difficult to directly control the working state of the diode through an external signal; therefore, the feedback regulation is generally implemented by controlling the ac input voltage of the rectifier circuit according to the output voltage generation control signal. In the existing isolated power supply system and other applications, a schottky diode with higher process requirements is often adopted to improve efficiency, a primary feedback control loop used by the system design is longer, and an additional signal isolation device is needed to be adopted for a feedback path, so that the design difficulty, the process cost and the overall complexity of the system are increased.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides a MOS voltage stabilizing rectifying circuit; the working state of the voltage stabilizing and rectifying circuit is different from the existing rectifying circuit, and the on-off of the rectifying switch unit can be controlled by a control signal produced according to the input alternating voltage and the output direct voltage, so that the voltage stabilizing control of the output voltage is realized while the rectifying function is realized.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a PMOS voltage stabilizing rectifying circuit, comprising: the first voltage stabilizing and rectifying unit is composed of a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a first resistor, a second resistor and a first capacitor, and a first control signal generating circuit; the first MOS tube, the second MOS tube, the fifth MOS tube and the sixth MOS tube are PMOS type, and the third MOS tube and the fourth MOS tube are NMOS type;
in the first voltage stabilizing and rectifying unit, the drain electrode of the first MOS tube and the source stage of the fifth MOS tube are connected with the grid electrode of the sixth MOS tube and serve as the first input end of the voltage stabilizing and rectifying circuit; the drain electrode of the second MOS tube and the grid electrode of the fifth MOS tube are connected with the source electrode of the sixth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the third MOS tube is connected with the substrate, and the source electrode of the fourth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the first MOS tube, the substrate of the second MOS tube, the substrate of the fifth MOS tube, the drain electrode and the substrate of the sixth MOS tube are all connected, the drain electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube, and the grid electrode of the third MOS tube is used as a control end; one end of the first capacitor is connected with a first output end of the voltage-stabilizing rectifying circuit, and the other end of the first capacitor is connected with a second input end of the voltage-stabilizing rectifying circuit; one end of the first resistor is connected with the source electrode of the first MOS tube and the source electrode of the second MOS tube, and the other end of the first resistor is connected with the grid electrode of the first MOS tube, the grid electrode of the second MOS tube and the drain electrode of the fourth MOS tube; one end of the second resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the second resistor is connected with the grid electrode of the fourth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the positive end of a load, the second output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the first MOS tube, the second MOS tube and the first resistor form a rectification switch unit together, and the control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
Further, the first control signal generation circuit includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a sawtooth wave generation circuit and a signal synthesis circuit, wherein the signal synthesis circuit is an OR gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the OR gate, and the OR gate outputs a control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
An NMOS regulated rectifier circuit, comprising: the system comprises a second voltage stabilizing and rectifying unit and a second control signal generating circuit, wherein the second voltage stabilizing and rectifying unit is composed of a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a third resistor, a fourth resistor and a second capacitor, and the seventh MOS tube, the eighth MOS tube, the eleventh MOS tube and the twelfth MOS tube are NMOS type, and the ninth MOS tube and the tenth MOS tube are PMOS type;
in the second voltage stabilizing and rectifying unit, the drain electrode of the seventh MOS tube and the source stage of the eleventh MOS tube are connected with the grid electrode of the twelfth MOS tube and serve as the first input end of the voltage stabilizing and rectifying circuit; the drain electrode of the eighth MOS tube and the grid electrode of the eleventh MOS tube are connected with the source electrode of the twelfth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the ninth MOS tube is connected with the substrate, and the source electrode of the tenth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the seventh MOS tube, the substrate of the eighth MOS tube, the substrate of the eleventh MOS tube and the drain are connected, the substrate of the twelfth MOS tube is connected with the drain, the drain of the ninth MOS tube is connected with the grid of the tenth MOS tube, and the grid of the ninth MOS tube is used as a control end; one end of the second capacitor is connected with the first output end of the voltage-stabilizing rectifying circuit, and the other end of the second capacitor is connected with the second input end of the voltage-stabilizing rectifying circuit; one end of the third resistor is connected with the source electrode of the seventh MOS tube and the source electrode of the eighth MOS tube, and the other end of the third resistor is connected with the grid electrode of the seventh MOS tube, the grid electrode of the eighth MOS tube and the drain electrode of the tenth MOS tube; one end of the fourth resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the fourth resistor is connected with the grid electrode of the tenth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, the second output end of the voltage stabilizing and rectifying circuit is connected with the positive end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the seventh MOS tube, the eighth MOS tube and the third resistor form a rectification switch unit together, and the second control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
Further, the second control signal generating circuit includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a sawtooth wave generation circuit and a signal synthesis circuit, wherein the signal synthesis circuit is composed of an inverter and an AND gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the output of the first comparison unit is input to the AND gate after passing through the inverter, the output of the second comparison unit is directly input to the AND gate, and the AND gate outputs a control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
A two-phase voltage stabilizing rectifying circuit, comprising: the first voltage stabilizing and rectifying unit, the second voltage stabilizing and rectifying unit and the third control signal generating circuit, wherein the third control signal generating circuit generates two paths of control signals: the first control signal and the second control signal respectively control the on and off of the rectifying switch units in the first voltage stabilizing rectifying unit and the second voltage stabilizing rectifying unit.
Further, the third control signal generation circuit includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a third comparison unit, a sawtooth wave generating circuit and a signal synthesizing circuit, wherein the signal synthesizing circuit is composed of an inverter, an AND gate and an OR gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the OR gate, and the OR gate outputs a first control signal; the reverse input end of the third comparison unit is connected with the first input end of the voltage-stabilizing rectification circuit, the forward input end of the third comparison unit is connected with the second output end of the voltage-stabilizing rectification circuit, the output of the first comparison unit and the output of the third comparison unit are respectively input to an AND gate after passing through an inverter, and the AND gate outputs a second control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
Based on the technical scheme, the invention has the beneficial effects that:
the invention provides a MOS voltage-stabilizing rectifying circuit,
the MOS voltage-stabilizing rectification circuit provided by the invention adopts the rectification switch unit formed by connecting two MOS tubes in series, wherein the two MOS tubes are connected with each other through a resistor, the source electrode is connected with the grid electrode, and the two MOS tubes are connected with each other through the resistor for active rectification; the control signal generating circuit is adopted to generate control signals according to the alternating current input voltage and the direct current output voltage, and the on-off of the rectifying switch unit is controlled, so that the charging time of the energy storage capacitor is controllable, the voltage stabilization is realized while the rectifying function is realized, the reverse leakage current of the rectifying switch unit is reduced, and the power conversion efficiency is improved. Finally, the invention has the advantages of higher power conversion efficiency, fast control loop response, simple system structure and low process cost, and the signal isolation device required by the primary side feedback control mode of the traditional transformer is avoided in the systems such as an isolated power supply, a communication power supply and the like, and the requirement of connecting a low dropout linear regulator (LDO) circuit after a rectifying circuit for realizing voltage stabilization is also avoided.
Drawings
Fig. 1 is a schematic diagram of a conventional rectifying circuit.
Fig. 2 is a schematic diagram of a voltage stabilizing rectifying circuit using PMOS as rectifying device according to embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of a control signal generating circuit of a voltage stabilizing rectifying circuit according to embodiment 1 of the present invention.
Fig. 4 is a schematic diagram of a voltage stabilizing rectifying circuit using NMOS as a rectifying device according to embodiment 2 of the present invention.
Fig. 5 is a schematic structural diagram of a bi-phase voltage stabilizing rectifying circuit according to embodiment 3 of the present invention.
Fig. 6 is a schematic diagram of a control signal generating circuit of a bi-phase voltage stabilizing rectifying circuit according to embodiment 3 of the present invention.
Fig. 7 is a schematic structural diagram of an isolated voltage converter based on voltage stabilization of a bi-phase voltage stabilization rectifying circuit according to embodiment 3 of the present invention.
Fig. 8 is a voltage-current waveform diagram of the bi-phase voltage-stabilizing rectification circuit provided in embodiment 3 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantageous effects of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings and examples.
Example 1
The embodiment provides a voltage stabilizing rectifying circuit using PMOS as rectifying device, whose structure is shown in fig. 2, specifically comprising: the first voltage stabilizing and rectifying unit is composed of a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a first resistor, a second resistor and a first capacitor, and a first control signal generating circuit; the first MOS tube, the second MOS tube, the fifth MOS tube and the sixth MOS tube are of PMOS type, and the third MOS tube and the fourth MOS tube are of NMOS type.
Specifically:
in the first voltage stabilizing rectifying unit, the drain electrode of the first MOS tube and the source stage of the fifth MOS tube are connected with the grid electrode of the sixth MOS tube and serve as a first input end of the voltage stabilizing rectifying circuit; the drain electrode of the second MOS tube and the grid electrode of the fifth MOS tube are connected with the source electrode of the sixth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the third MOS tube is connected with the substrate, and the source electrode of the fourth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the first MOS tube, the substrate of the second MOS tube, the substrate of the fifth MOS tube, the drain electrode and the substrate of the sixth MOS tube are all connected, the drain electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube, and the grid electrode of the third MOS tube is used as a control end; one end of the first capacitor is connected with a first output end of the voltage-stabilizing rectifying circuit, and the other end of the first capacitor is connected with a second input end of the voltage-stabilizing rectifying circuit; one end of the first resistor is connected with the source electrode of the first MOS tube and the source electrode of the second MOS tube, and the other end of the first resistor is connected with the grid electrode of the first MOS tube, the grid electrode of the second MOS tube and the drain electrode of the fourth MOS tube; one end of the second resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the second resistor is connected with the grid electrode of the fourth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the positive end of a load, the second output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the first MOS tube, the second MOS tube and the first resistor form a rectification switch unit together, and the control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
The first control signal generating circuit, as shown in fig. 4, specifically includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a sawtooth wave generating circuit and a signal synthesizing circuit; the signal synthesis circuit is an OR gate; the voltage sampling circuit samples the direct current output voltage of the voltage stabilizing rectifying circuit to obtain a sampling voltage proportional to the direct current output voltage of the voltage stabilizing rectifying circuit, the sampling voltage is input to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier is used for generating an error between the reference voltage and the sampling voltage and inputting the error to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end of the second comparison unit is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the signal synthesizing circuit, and the signal synthesizing circuit outputs a control signal; the compensation circuit is connected between the inverting input end and the output end of the error amplifier in a bridging way and used for enhancing the dynamic response capability of the circuit.
In terms of working principle:
when the control signal enables the third MOS tube to be turned off (the control signal is in a low level), the input voltage of the voltage stabilizing and rectifying circuit is connected to the grid electrode of the fourth MOS tube through the second resistor to control the on and off of the fourth MOS tube; when the input voltage is insufficient to enable the fourth MOS tube to be conducted, a current path is not arranged between the grid electrodes and the source electrodes of the first MOS tube and the second MOS tube, so that the grid source voltages of the first MOS tube and the second MOS tube do not meet the MOS tube starting condition, the first MOS tube and the second MOS tube are in an off state at the moment, and no energy is transmitted between the input end and the output end of the voltage stabilizing rectifying circuit; when the input voltage is enough to enable the fourth MOS tube to be conducted, the drain voltage of the fourth MOS tube is pulled down, the first MOS tube is started, a current path is formed from the source electrodes of the first MOS tube and the second MOS tube to the second end of the direct current output voltage through the first resistor, and the grid electrodes and the source electrodes of the first MOS tube and the second MOS tube generate a voltage difference due to the fact that current flows through the first resistor, so that the second MOS tube is in a conducting state, and the input end of the voltage stabilizing rectifying circuit transmits energy to the output end; therefore, when the control signal enables the third MOS tube to be turned off, the working state of the rectifying switch unit is controlled by the input voltage, when the input voltage is larger than the threshold voltage of the fourth MOS tube, the rectifying switch unit is turned on, and when the input voltage is smaller than the threshold voltage of the fourth MOS tube, the rectifying switch unit is turned off.
When the control signal enables the third MOS tube to be conducted (the control signal is in a high level), the gate-source voltage of the fourth MOS tube is reduced due to the fact that the drain-source voltage of the third MOS tube is rapidly reduced, the fourth MOS tube is rapidly turned off, the first MOS tube and the second MOS tube are further turned off, and the input end and the output end of the voltage stabilizing rectifying circuit do not conduct energy transmission.
Further, in the control signal generating circuit, in a first period of the sawtooth wave generating circuit (a period when the sawtooth wave voltage is greater than the error voltage), the control signal (high level) generated by the control signal generating circuit enables the third MOS tube to be conducted, so that the rectifying switch unit is in an off state, and the transmission of energy from input to output is prevented; the time length of the first time period is determined by the direct current output voltage, the smaller the direct current output voltage is, the smaller the time length of the first time period is, the energy transmission from the input to the output is increased, the larger the direct current output voltage is, the larger the time length of the first time period is, the energy transmission from the input to the output is reduced, and therefore the effect of stabilizing the output voltage is achieved. In the implementation of a specific circuit, when the direct current output voltage is reduced, the error voltage is increased, the time that the sawtooth wave voltage at the input end of the first comparison unit is lower than the error voltage in the period of the sawtooth wave generating circuit is prolonged, the time duty ratio of the signal at the output end of the first comparison unit is low level is increased, the working time of the rectifying switch unit is prolonged, the direct current output voltage is gradually increased, and finally the output voltage is stable; generally, the first resistor should obtain a proper value to enable the first MOS transistor and the second MOS transistor to be just conducted, so as to ensure good voltage conversion rate; the second resistor should take a larger value to make the gate-source voltage of the fourth MOS transistor drop to its off. The signal synthesis circuit adopts an OR gate, so that when any one of the first comparison unit or the second comparison unit outputs a high level, the signal synthesis circuit outputs a high level control signal to turn off the rectification switch unit. The second comparison unit is used for comparing the first input end voltage with the first output end voltage after sampling, outputting a low level when the first input end voltage is larger than the first output end voltage, outputting a high level when the first input end voltage is smaller than the first output end voltage, and further switching off the rectification switch unit, so that reverse leakage current loss is avoided when the alternating input voltage is reduced to be smaller than the output voltage but still larger than the on voltage of the fourth MOS tube.
When the rectifying circuit works, the input side of the rectifying MOS tube is alternating voltage, and at the moment, the substrate of the rectifying tube cannot be guaranteed to be always at the highest potential no matter the substrate is connected with the input side or the output side, so that the problems of body effect, substrate leakage current and the like can be generated, and even the circuit failure is caused by latch-up effect, therefore, a dynamic body bias structure formed by a fifth MOS tube and a sixth MOS tube is added into the voltage stabilizing rectifying circuit, so that the substrate of the MOS tube in the rectifying switch unit is always at the highest potential, and the parasitic effect influence is reduced.
Example 2
The present embodiment provides a voltage stabilizing rectifying circuit using NMOS as rectifying device, whose structure is shown in fig. 4, specifically including: the device comprises a second voltage stabilizing and rectifying unit and a second control signal generating circuit, wherein the second voltage stabilizing and rectifying unit is composed of a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a third resistor, a fourth resistor and a second capacitor, and the seventh MOS tube, the eighth MOS tube, the eleventh MOS tube and the twelfth MOS tube are NMOS type, and the ninth MOS tube and the tenth MOS tube are PMOS type.
Specifically:
in the second voltage stabilizing rectifying unit, the drain electrode of the seventh MOS tube and the source stage of the eleventh MOS tube are connected with the grid electrode of the twelfth MOS tube and serve as the first input end of the voltage stabilizing rectifying circuit; the drain electrode of the eighth MOS tube and the grid electrode of the eleventh MOS tube are connected with the source electrode of the twelfth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the ninth MOS tube is connected with the substrate, and the source electrode of the tenth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the seventh MOS tube, the substrate of the eighth MOS tube, the substrate of the eleventh MOS tube and the drain are connected, the substrate of the twelfth MOS tube is connected with the drain, the drain of the ninth MOS tube is connected with the grid of the tenth MOS tube, and the grid of the ninth MOS tube is used as a control end; one end of the second capacitor is connected with the first output end of the voltage-stabilizing rectifying circuit, and the other end of the second capacitor is connected with the second input end of the voltage-stabilizing rectifying circuit; one end of the third resistor is connected with the source electrode of the seventh MOS tube and the source electrode of the eighth MOS tube, and the other end of the third resistor is connected with the grid electrode of the seventh MOS tube, the grid electrode of the eighth MOS tube and the drain electrode of the tenth MOS tube; one end of the fourth resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the fourth resistor is connected with the grid electrode of the tenth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, the second output end of the voltage stabilizing and rectifying circuit is connected with the positive end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the seventh MOS tube, the eighth MOS tube and the third resistor form a rectification switch unit together, and the control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
The second control signal generating circuit differs from the first control signal generating circuit only in that: the signal synthesis circuit is composed of an inverter and an AND gate, wherein the output of the first comparison unit is input to the AND gate after passing through the inverter, the output of the second comparison unit is directly input to the AND gate, and the AND gate outputs a control signal.
It should be noted that: compared with embodiment 1, in this embodiment, since the ninth MOS transistor is PMOS, that is, when the control signal is at the low level, the ninth MOS transistor is turned on, and the ninth MOS transistor is turned off at the high level Shi Dijiu MOS transistor; therefore, by the design of the above-described second control signal generation circuit, the present embodiment has the same operation principle as embodiment 1 except for the signal synthesis circuit. The signal synthesis circuit formed by the inverter and the AND gate enables the signal synthesis circuit to output a low-level control signal to turn off the rectification switch unit when the first comparison unit outputs a high level or the second comparison unit outputs a low level. The second comparing unit is used for comparing the first input end voltage with the first output end voltage after sampling, outputting a high level when the first input end voltage is lower than the first output end voltage, and outputting a low level when the first input end voltage is higher than the first output end voltage, so that the rectifying switch unit is turned off, and reverse leakage current is avoided.
Example 3
The embodiment provides a dual-phase voltage stabilizing rectification circuit, the structure of which is shown as 5, comprising: the first voltage stabilizing rectifying unit in embodiment 1, the second voltage stabilizing rectifying unit in embodiment 2, and the third control signal generating circuit, wherein the third control signal generating circuit generates two paths of control signals: the first control signal and the second control signal respectively control the on and off of the rectifying switch units in the first voltage stabilizing rectifying unit and the second voltage stabilizing rectifying unit.
The third control signal generating circuit, as shown in fig. 6, includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a third comparison unit, a sawtooth wave generating circuit and a signal synthesizing circuit, wherein the signal synthesizing circuit is composed of an inverter, an AND gate and an OR gate; the voltage sampling circuit samples the direct current output voltage of the voltage stabilizing rectifying circuit to obtain a sampling voltage proportional to the direct current output voltage of the voltage stabilizing rectifying circuit, the sampling voltage is input to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier is used for generating an error between the reference voltage and the sampling voltage and inputting the error to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end of the second comparison unit is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the OR gate, and the OR gate outputs a first control signal; the reverse input end of the third comparison unit is connected with the first input end of the voltage-stabilizing rectification circuit, the forward input end of the third comparison unit is connected with the second output end of the voltage-stabilizing rectification circuit, the output of the first comparison unit and the output of the third comparison unit are respectively input to an AND gate after passing through an inverter, and the AND gate outputs a second control signal; the compensation circuit is connected between the inverting input end and the output end of the error amplifier in a bridging way and used for enhancing the dynamic response capability of the circuit.
In this embodiment, the dual-phase voltage-stabilizing rectification circuit is implemented in an isolated power system application, taking an isolated voltage converter as an example, as shown in fig. 7, and the system is composed of a full-bridge inverter circuit, a transformer, a dual-phase voltage-stabilizing rectification circuit and a load; the full-bridge inverter circuit includes: the system comprises a PMOS thirteenth MOS tube (P1), a PMOS fourteenth MOS tube (P2), an NMOS fifteenth MOS tube (N1), an NMOS sixteenth MOS tube (N2) and a driving signal generating circuit, wherein sources of the thirteenth MOS tube and the fourteenth MOS tube are connected with a positive electrode of a direct current power supply voltage of the system, sources of the fifteenth MOS tube and the sixteenth MOS tube are connected with a negative electrode of the direct current power supply voltage of the system, drain electrodes of the thirteenth MOS tube and the fifteenth MOS tube are connected with a first end of a primary winding of a transformer, and drain electrodes of the fifteenth MOS tube and the sixteenth MOS tube are connected with a second end of the primary winding of the transformer; the grid electrodes of the thirteenth MOS tube, the fourteenth MOS tube, the fifteenth MOS tube and the sixteenth MOS tube are connected with control signals from the driving signal generating circuit, the control signals enable the thirteenth MOS tube, the sixteenth MOS tube, the fourteenth MOS tube and the fifteenth MOS tube to be alternately conducted, the voltages at two ends of a primary winding of the transformer are alternately changed between +VDD and-VDD along with time, and alternating voltages induced by a secondary winding are used as input voltages of the voltage stabilizing rectifying circuit.
FIG. 8 shows the voltage-current waveform of the present embodiment, V p Is the voltage between two ends of primary winding of transformer, I DS1 Is the transient current of the first MOS tube, I load To isolate the load current of the voltage converter, V out To isolate the output voltage of the voltage converter, V EA For the output voltage of the error amplifier, V saw For generating the output voltage of the circuit for sawtooth wave, V cmp1 Is the firstThe output end signal of the comparison unit CTRL is a first control voltage accessed to the grid electrode of the third MOS tube; the two-phase voltage stabilizing rectifying circuit is adopted to realize the voltage stabilization of the direct-current output voltage under different load currents, and the feedback control required by the voltage stabilization is only completed in the secondary circuit without adopting an additional signal isolation device.
While the invention has been described in terms of specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the equivalent or similar purpose, unless expressly stated otherwise; all of the features disclosed, or all of the steps in a method or process, except for mutually exclusive features and/or steps, may be combined in any manner.

Claims (6)

1. A PMOS voltage stabilizing rectifying circuit, comprising: the first voltage stabilizing and rectifying unit is composed of a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a first resistor, a second resistor and a first capacitor, and a first control signal generating circuit; the first MOS tube, the second MOS tube, the fifth MOS tube and the sixth MOS tube are PMOS type, and the third MOS tube and the fourth MOS tube are NMOS type;
in the first voltage stabilizing and rectifying unit, the drain electrode of the first MOS tube and the source stage of the fifth MOS tube are connected with the grid electrode of the sixth MOS tube and serve as the first input end of the voltage stabilizing and rectifying circuit; the drain electrode of the second MOS tube and the grid electrode of the fifth MOS tube are connected with the source electrode of the sixth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the third MOS tube is connected with the substrate, and the source electrode of the fourth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the first MOS tube, the substrate of the second MOS tube, the substrate of the fifth MOS tube, the drain electrode and the substrate of the sixth MOS tube are all connected, the drain electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube, and the grid electrode of the third MOS tube is used as a control end; one end of the first capacitor is connected with a first output end of the voltage-stabilizing rectifying circuit, and the other end of the first capacitor is connected with a second input end of the voltage-stabilizing rectifying circuit; one end of the first resistor is connected with the source electrode of the first MOS tube and the source electrode of the second MOS tube, and the other end of the first resistor is connected with the grid electrode of the first MOS tube, the grid electrode of the second MOS tube and the drain electrode of the fourth MOS tube; one end of the second resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the second resistor is connected with the grid electrode of the fourth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the positive end of a load, the second output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the first MOS tube, the second MOS tube and the first resistor form a rectification switch unit together, and the control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
2. The PMOS voltage-stabilizing rectifying circuit according to claim 1, wherein said first control signal generating circuit comprises: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a sawtooth wave generation circuit and a signal synthesis circuit, wherein the signal synthesis circuit is an OR gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the OR gate, and the OR gate outputs a control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
3. An NMOS regulated rectifier circuit, comprising: the system comprises a second voltage stabilizing and rectifying unit and a second control signal generating circuit, wherein the second voltage stabilizing and rectifying unit is composed of a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a third resistor, a fourth resistor and a second capacitor, and the seventh MOS tube, the eighth MOS tube, the eleventh MOS tube and the twelfth MOS tube are NMOS type, and the ninth MOS tube and the tenth MOS tube are PMOS type;
in the second voltage stabilizing and rectifying unit, the drain electrode of the seventh MOS tube and the source stage of the eleventh MOS tube are connected with the grid electrode of the twelfth MOS tube and serve as the first input end of the voltage stabilizing and rectifying circuit; the drain electrode of the eighth MOS tube and the grid electrode of the eleventh MOS tube are connected with the source electrode of the twelfth MOS tube and serve as a first output end of the voltage stabilizing rectifying circuit; the source electrode of the ninth MOS tube is connected with the substrate, and the source electrode of the tenth MOS tube is connected with the substrate and is used as a second output end of the voltage stabilizing rectifying circuit; the substrate of the seventh MOS tube, the substrate of the eighth MOS tube, the substrate of the eleventh MOS tube and the drain are connected, the substrate of the twelfth MOS tube is connected with the drain, the drain of the ninth MOS tube is connected with the grid of the tenth MOS tube, and the grid of the ninth MOS tube is used as a control end; one end of the second capacitor is connected with the first output end of the voltage-stabilizing rectifying circuit, and the other end of the second capacitor is connected with the second input end of the voltage-stabilizing rectifying circuit; one end of the third resistor is connected with the source electrode of the seventh MOS tube and the source electrode of the eighth MOS tube, and the other end of the third resistor is connected with the grid electrode of the seventh MOS tube, the grid electrode of the eighth MOS tube and the drain electrode of the tenth MOS tube; one end of the fourth resistor is connected with the first input end of the voltage stabilizing rectifying circuit, and the other end of the fourth resistor is connected with the grid electrode of the tenth MOS tube; the first input end and the second input end of the voltage stabilizing and rectifying circuit are connected with alternating current input voltage, the first output end of the voltage stabilizing and rectifying circuit is connected with the negative end of the load, the second output end of the voltage stabilizing and rectifying circuit is connected with the positive end of the load, and the second input end of the voltage stabilizing and rectifying circuit is connected with the second output end; the seventh MOS tube, the eighth MOS tube and the third resistor form a rectification switch unit together, and the second control signal generating circuit generates a control signal according to the input voltage and the output voltage of the voltage stabilizing rectification circuit and transmits the control signal to the control end so as to control the on and off of the rectification switch unit.
4. The NMOS regulated rectifier circuit of claim 3, wherein said second control signal generating circuit includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a sawtooth wave generation circuit and a signal synthesis circuit, wherein the signal synthesis circuit is composed of an inverter and an AND gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the output of the first comparison unit is input to the AND gate after passing through the inverter, the output of the second comparison unit is directly input to the AND gate, and the AND gate outputs a control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
5. A two-phase voltage stabilizing rectifying circuit, comprising: the first voltage-stabilizing rectification unit of claim 1, the second voltage-stabilizing rectification unit of claim 2, and a third control signal generation circuit, wherein the third control signal generation circuit generates two paths of control signals: the first control signal and the second control signal respectively control the on and off of the rectifying switch units in the first voltage stabilizing rectifying unit and the second voltage stabilizing rectifying unit.
6. The bi-phase voltage stabilizing rectifier circuit according to claim 5, wherein said third control signal generating circuit includes: the device comprises a voltage sampling circuit, an error amplifier, a compensation circuit, a first comparison unit, a second comparison unit, a third comparison unit, a sawtooth wave generating circuit and a signal synthesizing circuit, wherein the signal synthesizing circuit is composed of an inverter, an AND gate and an OR gate; the voltage sampling circuit samples the output voltage of the voltage stabilizing rectifying circuit and outputs the sampled voltage to the reverse input end of the error amplifier, the forward input end of the error amplifier is connected with the reference voltage, the error amplifier outputs the error voltage to the reverse input end of the first comparison unit, the forward input end of the first comparison unit is connected with the output end of the sawtooth wave generating circuit, the reverse input end of the second comparison unit is connected with the first input end of the voltage stabilizing rectifying circuit, the forward input end is connected with the first output end of the voltage stabilizing rectifying circuit, the outputs of the first comparison unit and the second comparison unit are respectively input to the OR gate, and the OR gate outputs a first control signal; the reverse input end of the third comparison unit is connected with the first input end of the voltage-stabilizing rectification circuit, the forward input end of the third comparison unit is connected with the second output end of the voltage-stabilizing rectification circuit, the output of the first comparison unit and the output of the third comparison unit are respectively input to an AND gate after passing through an inverter, and the AND gate outputs a second control signal; the compensation circuit is connected across the inverting input terminal and the output terminal of the error amplifier.
CN202211672504.9A 2022-12-26 2022-12-26 MOS voltage stabilizing rectifying circuit Pending CN116054606A (en)

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