CN116050334A - AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model - Google Patents
AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model Download PDFInfo
- Publication number
- CN116050334A CN116050334A CN202211682596.9A CN202211682596A CN116050334A CN 116050334 A CN116050334 A CN 116050334A CN 202211682596 A CN202211682596 A CN 202211682596A CN 116050334 A CN116050334 A CN 116050334A
- Authority
- CN
- China
- Prior art keywords
- gate
- algan
- voltage
- channel
- gan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 57
- 238000000034 method Methods 0.000 title claims abstract description 22
- 230000005669 field effect Effects 0.000 title claims abstract description 11
- 238000005457 optimization Methods 0.000 title claims abstract description 11
- 230000003071 parasitic effect Effects 0.000 claims abstract description 8
- 238000000342 Monte Carlo simulation Methods 0.000 claims abstract description 7
- 230000000694 effects Effects 0.000 claims abstract description 3
- 230000010287 polarization Effects 0.000 claims description 38
- 230000005684 electric field Effects 0.000 claims description 35
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 18
- 230000004888 barrier function Effects 0.000 claims description 15
- 230000006870 function Effects 0.000 claims description 11
- 229920006395 saturated elastomer Polymers 0.000 claims description 10
- 239000011159 matrix material Substances 0.000 claims description 6
- 230000007704 transition Effects 0.000 claims description 6
- 239000008186 active pharmaceutical agent Substances 0.000 claims description 3
- 230000008859 change Effects 0.000 claims description 3
- 238000013461 design Methods 0.000 claims description 3
- 238000010606 normalization Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000012360 testing method Methods 0.000 claims description 3
- 230000005428 wave function Effects 0.000 claims description 3
- 238000004088 simulation Methods 0.000 description 6
- 230000007246 mechanism Effects 0.000 description 3
- 230000000704 physical effect Effects 0.000 description 3
- 238000012546 transfer Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/373—Design optimisation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention relates to an AlGaN/GaN heterojunction field effect transistor optimization method based on a physical base compact current-voltage model, and belongs to the technical field of device modeling. The method realizes obtaining the speed field relation of the AlGaN/GaN HFETs based on Monte Carlo simulation, establishes a speed field model depending on gate bias, and is more close to the experimental phenomenon in the real AlGaN/GaN HFETs. By taking reference, the velocity field model parameters are brought into a derived physical-based compact current-voltage model. The method skillfully reserves the direct association relation between the speed field model parameters and the AlGaN/GaN HFET device, and in a compact current-voltage model, all parameters have specific physical significance, and parasitic resistance factors and channel modulation effects are also considered. By means of the scheme, the AlGaN/GaN HFETs can be accurately modeled, and device performance is predicted and optimized.
Description
Technical Field
The invention relates to an AlGaN/GaN heterojunction field effect transistor optimization method based on a physical base compact current-voltage model, and belongs to the technical field of transistor device research.
Background
AlGaN/GaN Heterojunction Field Effect Transistors (HFETs) are important representatives of high frequency devices and power electronics. With the continued development of GaN device technology and circuitry, compact models have been developed to characterize and optimize the device characteristics of AlGaN/GaN HFETs. There are some documents reporting experimental phenomena of the reduction of electron drift velocity in the under-gate region when the gate voltage is more negative after some gate bias of GaN-based HFETs according to the time-delay method. To our knowledge, however, the reported literature of physical base modeling does not accurately describe this AlGaN/GaN HFET velocity field relationship with gate bias (V gs ) And these velocity field relationship models generally contain fitting parameters. The compact current-voltage model is derived mainly from the velocity field relationship model, so that fitting parameters are introduced through the velocity field relationship model. Although the simulation result which is well matched with the experimental output characteristic curve can be obtained by fine tuning the fitting parameters, the method for fine tuning the fitting parameters can enable a plurality of physical parameters to lose physical meaning, and the specific scattering mechanism cannot be clearly obtained to cause the change of AlGaN/GaN HFET speed field relations under different gate biases of different devices. Even if data matching with the experimental values is obtained in this way, it is difficult to optimize the device characteristics according to the scattering mechanism and the mobility model. It is therefore highly desirable and necessary to build a velocity field model that is dependent on the gate voltage and that does not have fitting parameters to accurately describe the physical effects of such gate voltage on the velocity modulation and to derive a compact current-voltage model with parameters of exact physical meaning that can more intuitively yield GaN-based HFETs through mobility models and scattering mechanisms and optimize device performance.
Disclosure of Invention
In order to overcome the defects of the AlGaN/GaN HFET modeling method, the invention provides a speed field relation model which does not contain fitting parameters and a corresponding compact current-voltage model with all parameters containing definite physical meanings, which are used for improving the accuracy of the AlGaN/GaN HFET device model and the feasibility of device characteristic optimization.
The technical scheme of the invention is as follows:
an AlGaN/GaN heterojunction field effect transistor optimization method based on a physical base compact current-voltage model comprises the following steps:
(1) Carrying out current-voltage (I-V) curve test on the AlGaN/GaN HFET device by using a semiconductor parameter analyzer, and obtaining a functional relation of the additional polarization charge and channel bias voltage of the AlGaN/GaN HFET according to the self-consistent iteration theory of the additional polarization charge;
(2) According to poisson's equation, different gate source biases (V gs ) Drain-source bias (V) ds ) Equal to 6V, the under-gate channel region potential distribution, electric field distribution, and two-dimensional electron gas-electron density distribution:
for the channel low field region under the AlGaN/GaN HFET gate, the graded channel approximation is satisfied, the channel potential distribution and the electric field distribution, and the two-dimensional electron gas electron density distribution can be expressed by the following formulas:
Ns(x)＝C i (V gs -V th -V(x)) (3)
wherein ,
V gt ＝V g -v th
I dsat saturated current of A1GaN/GaN HFET, E T Is A1GaN/GaN HFET critical electric field, vg is gate voltage, V th For threshold voltage, R s Is parasitic resistance of the grid source, x is distance from a position point in the channel to the left end of the grid, ns is channel two-dimensional electron gas density, and C i For AlGaN/GaN HFET barrier capacitance, W is the gate width, μ is low field mobility, ε is the barrier dielectric constant, and d is the potentialThe thickness of the barrier layer;
for a channel high field region under the gate, the two-dimensional electron gas electron density distribution can be calculated by a formula (3), and the potential distribution and the electric field distribution can be calculated by the following formula:
where q is the charge amount, n sat Is the two-dimensional electron gas electron density of a channel saturation region, cosh is a hyperbolic cosine function, sinh is a hyperbolic sine function, and L 1 Is the length of the channel one region (low field region);
according to the present invention, preferably, in the step (2), the gate-source bias takes a value of 0V, -1V, -2V, -3V.
(3) Dividing the under-grid area into a plurality of grids according to the idea of finite elements; according to the invention, preferably, in step (3), each of the grids has a length of 30nm < x 2 -x 1 And < 50nm. The two-dimensional electron gas electron density and electric field strength inside each grid are the same, and each grid corresponds to a coordinate (x 1 ，x 2 ) And a polarization charge density ρ 2 We will ρ 2 Setting the reference polarization charge; obtaining the potential V1 at the leftmost end of the channel, the average potential V2 of the channel grid and the potential V3 at the rightmost end of the channel according to the formulas (1), (2), (4) and (5); according to the dependence of the additional polarization charge density and the channel bias voltage, each potential corresponds to one polarization charge density, thereby determining the leftmost polarization charge density rho under the gate 1 The rightmost polarization charge density ρ under the gate 3 And each grid polarization charge density ρ 2 The method comprises the steps of carrying out a first treatment on the surface of the Based on the physical quantities, calculating the additional scattering potential of each grid PCF scattering:
wherein ,εs Epsilon, the relative dielectric constant of the barrier layer 0 Is vacuum dielectric constant, L G Is gate length, L Gs For gate-source spacing, L GD For gate drain spacing, e is the amount of charge, x is the direction of the channel along the gate length, y is the direction of the channel along the gate width, and z is the direction of the channel along the longitudinal extent; ρ 0 The polarized charge density of the gate source region and the gate drain region;
the transition matrix element scattered by PCF of each grid is obtained according to the additional scattering potential:
wherein ,
m is the mass of the electrons,
is Planck constant, E is electron energy, ">
ψ k (z) is the wave function of the electrons, q x ，q y Is the component of q in the x and y directions, A is a normalization constant, (a, b) is the coordinate interval of two-dimensional electron gas in the channel in the x direction, and θ is the scattering angle from the initial state k to the final state k'; i is an imaginary unit;
and obtaining the PCF scattering rate of each grid according to the transition matrix element:
wherein S (q, T) e ) Is a shielding factor;
determining channel potential distribution and channel electric field distribution through formulas (1) - (5), and calculating the speed distribution of different grids according to a Monte Carlo simulation method under the electric field determined by each grid, so as to obtain and establish a speed field relation formula of AlGaN/GaNHFET under different grid source bias;
(4) Extracting parameters of a speed field model under different gate source biases according to the optimized speed field model formula (9) of the AlGaN/GaNHFET and the speed field relation under the different gate source biases of the AlGaN/GaNHFET:
wherein V (E) is the relation of electron velocity and electric field, V sat Is the saturation speed epsilon of AlGaN/GaN HFET under different grid voltages s Is the relative dielectric constant of the barrier layer, and the polarization charge density at the leftmost end under the gate is ρ 1 The rightmost polarization charge density under the gate is ρ 3 E is a horizontal electric field along the channel direction, E t Is the critical electric field; v (V) sat ，ρ 1 ，ρ 3 ，E t Will change continuously with the gate bias; wherein ρ is 1 ，ρ 3 Is determined based on a function of the additional polarization charge associated with the channel bias voltage;
(5) Comparing the AlGaN/GaN HFET speed field relation obtained by Monte Carlo with the AlGaN/GaN HFET speed field relation obtained by a model,
extracting AlGaN/GaNHFET speed parameters, device size parameters, and voltage bias V for different gate source biases ds ，V gs The following equations are taken to obtain the device current in the linear region of the device:
wherein a＝εs +(ρ 3 -ρ 0 )/(ρ 1 -ρ 0 )
λ＝(wε s V sat (1+a)/E t /d)
V gt ＝V g -V th
R n ＝1/(λE t )
B＝(2aR n V ds +2E t LR n +2V gt (R s +R d ))
D＝(R d -R s -2aR n )(R d +R s )(-2V gt V ds +V ds 2 )
V ds Extrinsic drain-source voltage, V gs Is an extrinsic gate source voltage, R d Is the parasitic resistance of the gate and drain, L is the gate length;
extracting AlGaN/GaNHFET speed parameters, device size parameters, and voltage bias V for different gate source biases ds ，V gs The following formula is introduced to obtain the device saturation current:
V GT ＝V G -V th
wherein ex ＝E(x)/E t ；I sat Is a saturated current; e, e 0sat Is that the device reaches saturation state, and the electric field E/E at x=0 t Is a value of (2); v (V) dsat Is a saturation voltage; v (V) G Is the intrinsic gate voltage;
extracting AlGaN/GaN HFET speed parameters of different gate source biases, device size parameters, and voltage bias V ds ，V gs The following equations are taken to obtain the device speed saturation region current:
wherein VGS Is the intrinsic gate source voltage, V DS The intrinsic drain-source voltage, p is an eigenvalue introduced by solving the poisson equation, and is used for describing the influence of the gate voltage on the length of a saturated region and the output conductance in a speed saturated region;
when the obtained current value is well matched with the experimental value, the error is preferably not more than 5%, which belongs to the field of good, and the accuracy and the convergence of the current-voltage model are good, so that the characteristics of the device can be reflected. Writing a current-voltage model (formulas (10) - (12)) into circuit software HSPICE software or ADS software by using verilog A language, constructing GaN HFET with different sizes and different structures in the circuit software, and optimally designing a circuit of the GaN-based HFET with high performance; this is an important basis for GaN-based HFET circuit die.
Our velocity field model (equation (9)) and velocity field model parameters (V) sat ，ρ 1 ，ρ 3 ，E t ) And TCAD software, such as Crossight, sentaurus and Silvaco, can be written to replace the previous GaN speed field model, so that a more accurate device simulation result which is more close to the actual physical effect is realized, and the design of the high-performance GaN-based HFET is facilitated.
The invention has the beneficial effects that:
compared with a conventional speed field model, the method realizes the speed field relation of the AlGaN/GaN HFETs device based on Monte Carlo simulation, establishes a speed field model depending on gate bias, and is more similar to the experimental phenomenon in the real AlGaN/GaN HFETs. By taking reference, the velocity field model parameters are brought into a derived physical-based compact current-voltage model. The method skillfully reserves the direct association relation between the speed field model parameters and the AlGaN/GaN HFET device, and in a compact current-voltage model, all parameters have specific physical significance, and parasitic resistance factors and channel modulation effects are also considered. Our work can achieve accurate modeling of AlGaN/GaN HFETs, predicting and optimizing device performance.
Drawings
FIG. 1 is a flow chart of a compact current-voltage optimization of a device provided by the present invention;
FIG. 2 is a graph of additional polarization charge versus gate bias provided by the present invention;
FIG. 3 is a schematic diagram of polarization charge distribution of the A1GaN/A1N layer provided by the invention;
FIG. 4 is a graph comparing the velocity field relationship of the Monte Carlo simulation provided by the present invention with the velocity field relationship of the velocity field model;
FIG. 5 is a graph comparing the results of the simulated output characteristic curves with the measured output characteristic curves of the compact current-voltage model provided by the invention;
FIG. 6 is a graph comparing the transfer characteristic curve results of the compact current-voltage model simulation provided by the present invention with the measured transfer characteristic curves.
Detailed Description
The invention will now be further illustrated by way of example, but not by way of limitation, with reference to the accompanying drawings.
Example 1:
as described with reference to fig. 1, an AlGaN/GaN heterojunction field effect transistor optimization method based on a physical base compact current-voltage model includes the steps of:
(1) A current-voltage (I-V) curve test was performed on A1GaN/GaN HFET devices using a semiconductor parameter analyzer. The function of the additional polarization charge of the A1GaN/GaN HFET as a function of channel bias is derived by self-consistent iterative theory of the additional polarization charge, as shown in fig. 2.
(2) According to poisson's equation, different gate voltages (V gs ＝0V，V gs ＝-1V，V gs ＝-2VV gs ＝-3V)，V ds =6v, potential distribution under the gate, electric field distribution, and two-dimensional electron gas electron density distribution.
For the channel low field region under the A1GaN/GaN HFET gate, the graded channel approximation is satisfied, the channel potential distribution and the electric field distribution, and the two-dimensional electron gas electron density distribution can be expressed by the following formulas:
Ns(x)＝C i (V gs -V th -V(x)) (3)
wherein ,
V gt ＝V g -V th
I dsat saturated current of A1GaN/GaN HFET, E T Is AlGaN/GaN HFET critical electric field, vg is gate voltage, V th For threshold voltage, R s Is parasitic resistance of the grid source, x is distance from a position point in the channel to the left end of the grid, ns is channel two-dimensional electron gas density, and C i For AlGaN/GaN HFET barrier capacitance, W is the gate width, μ is the low field mobility, ε is the barrier dielectric constant, and d is the barrier thickness;
for a channel high field region under the gate, the two-dimensional electron gas electron density distribution can be calculated by a formula (3), and the potential distribution and the electric field distribution can be calculated by the following formula:
where q is the charge amount, n sat Is the two-dimensional electron gas electron density of a channel saturation region, cosh is a hyperbolic cosine function, sinh is a hyperbolic sine function, and L 1 Is the length of the channel one region (low field region).
(3) In the simulation, we divide the under-grid region into several grids, each grid length 30nm < x 2 -x 1 ＜50nm。
The electron density and the electric field strength inside each grid are the same. Each grid corresponds to a coordinate (x 1 ，x 2 ) And a polarization charge density ρ 2 P is as follows 2 The reference polarization charge is determined, and according to formulas (1), (2), (4) and (5), the potential V1 at the leftmost end of the channel, the average potential V2 of the grid of the channel and the potential V3 at the rightmost end of the channel are obtained; according toFIG. 2 shows the dependence of additional polarization charge on channel bias, each potential corresponding to one polarization charge density, to determine the left-hand polarization charge density ρ under the gate 1 Rightmost polarization charge density ρ under gate 3 And each grid polarization charge density ρ 2 . From this, alGaN/GaN HFET V was calculated ds ＝6V，V gs Polarization charge distribution at algan/AlN interface =0v, as shown in fig. 3. Based on the above physical quantities, the additional scattering potential of PCF scattering for each grid is calculated by the following equation:
wherein ,εs Epsilon, the relative dielectric constant of the barrier layer 0 Is vacuum dielectric constant, L G Is gate length, L GS For gate-source spacing, L GD For gate drain spacing, e is the amount of charge, x is the direction of the channel along the gate length, y is the direction of the channel along the gate width, and z is the direction of the channel along the longitudinal extent; ρ 0 Is the polarized charge density of the gate source region and the gate drain region.
And carrying the calculated additional scattering potential into the following formula to obtain a transition matrix element scattered by each grid PCF:
wherein ,
m is the mass of the electrons,
is Planck constant, E is electron energy, ">
χ k (z) is the wave function of the electrons, q x ，q y Is the component of q in the x and y directions, A is a normalization constant, (a, b) is the coordinate interval of two-dimensional electron gas in the channel in the x direction, and θ is the scattering angle from the initial state k to the final state k'; i is an imaginary unit.
And substituting the calculated transition matrix element into the following formula to obtain the PCF scattering rate of each grid:
wherein S (q, T) e ) Is a shielding factor;
the channel potential distribution, the channel electric field distribution, is determined by the formulas (1) - (5). And under the electric field determined by each grid, calculating the speed distribution of different grids according to a Monte Carlo simulation method, thereby obtaining and establishing a speed field relation formula of the A1GaN/GaNHFET under different grid source bias.
The Monte Carlo simulation is an independently developed program, PCF scattering rates of different grids are required to be input each time, and electric fields of different grids are required to be input each time, and the program simulates irregular movement of electrons in AlGaN/GaNHFET channels; after free flight and random scattering of electrons in a series of alternating electric fields, a steady velocity state is achieved.
(4) Extracting parameters of a velocity field model under different gate bias according to the following velocity field relation between an optimized A1GaN/GaNHFET velocity field model formula (9) and AlGaN/GaNHFET under different gate source bias:
wherein V (E) is the relation of electron velocity and electric field, V sat Is the saturation speed epsilon of AlGaN/GaN HFET under different grid voltages s Is the relative dielectric constant of the barrier layer, and the polarization charge density at the leftmost end under the gate is ρ 1 The rightmost polarization charge density under the gate is ρ 3 E is a horizontal electric field along the channel direction, E t Is the critical electric field. V (V) sat ，ρ 1 ，ρ 3 ，E t Will vary with the gate bias voltage. Wherein ρ is 1 ，ρ 3 Is determined as a function of the additional polarization charge associated with the channel bias.
(5) Comparing the velocity field relationship of AlGaN/GaN HFET obtained by Monte Carlo with the velocity field relationship of AlGaN/GaN HFET obtained by a model, as shown in figure 4;
extracting AlGaN/GaNHFET speed parameters, device size parameters, and voltage bias V for different gate source biases ds ，V gs The following equations are taken to obtain the device current in the linear region of the device:
wherein a＝εs +(ρ 3 -ρ 0 )/(ρ 1 -ρ 0 )
λ＝(wε s v sat (1+a)/E t /d)
V gt ＝V g -V th
R n ＝i/(λE t ）
B＝(2aR n V ds +2E t LR n +2V gt (R s +R d ))
D＝(R d -R s -2aR n )(R d +R s )(-2V gt V ds +V ds 2 )
V ds Extrinsic drain-source voltage, V gs Is an extrinsic gate source voltage, R d Is the parasitic resistance of the gate and drain, L is the gate length;
extracting AlGaN/GaNHFET speed parameters, device size parameters, and voltage bias V for different gate source biases ds ，V gs The following formula is introduced to obtain the device saturation current:
wherein ex ＝E(x)/E t ；I sat Is a saturated current; e, e 0sat Is the value of the electric field E/Et at which the device reaches saturation, x=0; v (V) dsat Is a saturation voltage; v (V) G Is the intrinsic gate voltage; v (V) dsat Is a saturation voltage;
extracting AlGaN/GaNHFET speed parameters, device size parameters, and voltage bias V for different gate source biases ds ，V gs The following equations are taken to obtain the device speed saturation region current:
wherein VGS Is the intrinsic gate source voltage, V DS The intrinsic drain-source voltage, p is an eigenvalue introduced by solving the poisson equation, and is used for describing the influence of the gate voltage on the length of a saturated region and the output conductance in a speed saturated region;
when the error between the obtained current value and the experimental value is not more than 5%, the matching is good, so that the accuracy and the convergence of the current-voltage model are good, and the characteristics of the device can be reflected. Writing a current-voltage model (formulas (10) - (12)) into circuit software HSPICE software or ADS software by using verilog A language, constructing GaN HFET with different sizes and different structures in the circuit software, and optimally designing a circuit of the GaN-based HFET with high performance; this is an important basis for GaN-based HFET circuit die.
Our velocity field model (equation (9)) and velocity field model parameters (V) sat ，ρ 1 ，ρ 3 ，E t ) And TCAD software, such as Crossight, sentaurus and Silvaco, can be written to replace the previous GaN speed field model, so that a more accurate device simulation result which is more close to the actual physical effect is realized, and the design of the high-performance GaN-based HFET is facilitated.
In this example, FIG. 5 and FIG. 6 are current-voltage (I-V) simulations of a compact current-voltage model, compared to experimentally measured A1GaN/GaN HFET current-voltage curves, to verify the accuracy of the compact current-voltage model.
Claims (4)
1. The optimization method of the A1GaN/GaN heterojunction field effect transistor based on the physical base compact current-voltage model is characterized by comprising the following steps:
(1) Performing a current-voltage (I-V) curve test on the AlGaN/GaN HFET device by using a semiconductor parameter analyzer to obtain a functional relationship of the additional polarization charge of the AlGaN/GaN HFET and the channel bias voltage;
(2) Different gate source biases (V) for AlGaN/GaN HFET are calculated gs ) Drain-source bias (V) ds ) Equal to 6V, the under-gate channel region potential distribution, electric field distribution, and two-dimensional electron gas-electron density distribution:
for the channel low field region under the A1GaN/GaNHFET gate, the channel potential distribution and the electric field distribution, and the two-dimensional electron gas electron density distribution can be expressed by the following formulas, respectively:
Ns(x)＝C i (V gs -V th -V(x)) (3)
wherein ,
V gt ＝V g -V th
I dsat saturated current of AlGaN/GaN HFET, E T Is AlGaN/GaN HFET critical electric field, vg is gate voltage, V th For threshold voltage, R s Is a gridSource parasitic resistance, x is the distance from the position point in the channel to the left end of the gate, ns is the channel two-dimensional electron gas density, C i For A1GaN/GaN HFET barrier capacitance, W is the gate width, μ is the low field mobility, ε is the barrier dielectric constant, and d is the barrier thickness;
for a channel high field region under the gate, the two-dimensional electron gas electron density distribution can be calculated by a formula (3), and the potential distribution and the electric field distribution can be calculated by the following formula:
where q is the charge amount, n sat Is the two-dimensional electron gas electron density of a channel saturation region, cosh is a hyperbolic cosine function, sinh is a hyperbolic sine function, and L 1 Is the length of the channel one region (low field region);
(3) Dividing the under-grid area into a plurality of grids; the two-dimensional electron gas electron density and electric field strength inside each grid are the same, and each grid corresponds to a coordinate (x 1 ，x 2 ) And a polarization charge density ρ 2 We will ρ 2 Setting the reference polarization charge; obtaining the potential V1 at the leftmost end of the channel, the average potential V2 of the channel grid and the potential V3 at the rightmost end of the channel according to the formulas (1), (2), (4) and (5); according to the dependence of the additional polarization charge density and the channel bias voltage, each potential corresponds to one polarization charge density, thereby determining the leftmost polarization charge density rho under the gate 1 The rightmost polarization charge density ρ under the gate 3 And each grid polarization charge density ρ 2 The method comprises the steps of carrying out a first treatment on the surface of the Based on the physical quantities, calculating the additional scattering potential of each grid PCF scattering:
wherein ,εs Epsilon, the relative dielectric constant of the barrier layer 0 Is vacuum dielectric constant, L G Is gate length, L GS For gate-source spacing, L GD For gate drain spacing, e is the amount of charge, x is the direction of the channel along the gate length, y is the direction of the channel along the gate width, and z is the direction of the channel along the longitudinal extent; ρ 0 The polarized charge density of the gate source region and the gate drain region;
the transition matrix element scattered by PCF of each grid is obtained according to the additional scattering potential:
wherein ,
m is the mass of the electrons,
is Planck constant, E is electron energy, ">
ψ k (z) is the wave function of the electrons, q x ，q y Is the component of q in the x and y directions, A is a normalization constant, (a, b) is the coordinate interval of two-dimensional electron gas in the channel in the x direction, and θ is the scattering angle from the initial state k to the final state k'; i is an imaginary unit;
and obtaining the PCF scattering rate of each grid according to the transition matrix element:
wherein S (q, T) e ) Is a shielding factor;
determining channel potential distribution and channel electric field distribution through formulas (1) - (5), and calculating the speed distribution of different grids according to a Monte Carlo simulation method under the electric field determined by each grid, so as to obtain and establish a speed field relation formula of AlGaN/GaNHFET under different grid source bias;
(4) Extracting parameters of a speed field model under different gate source biases according to the optimized speed field relation between the speed field model formula (9) of the A1GaN/GaNHFET and the AlGaN/GaNHFET under different gate source biases:
wherein V (E) is the relation of electron velocity and electric field, V sat Is the saturation speed epsilon of AlGaN/GaN HFET under different grid voltages s Is the relative dielectric constant of the barrier layer, and the polarization charge density at the leftmost end under the gate is ρ 1 The rightmost polarization charge density under the gate is ρ 3 E is a horizontal electric field along the channel direction, E t Is the critical electric field; v (V) sat ，ρ 1 ，ρ 3 ，E t Will change continuously with the gate bias; wherein ρ is 1 ，ρ 3 Is determined based on a function of the additional polarization charge associated with the channel bias voltage;
(5) Comparing the AlGaN/GaN HFET speed field relation obtained by Monte Carlo with the AlGaN/GaN HFET speed field relation obtained by a model,
the extracted speed parameters of A1GaN/GaNHFET with different gate source bias, the size parameters of the device, and the voltage bias V ds ，V gs The following equations are taken to obtain the device current in the linear region of the device:
wherein a＝εs +(ρ 3 -ρ 0 )/(ρ 1 -ρ 0 )
λ＝(wε s V sat (1+a)/E t /d)
V gt ＝V g -V th
R n ＝1/(λE t )
B＝(2aR n V ds +2E t LR n +2V gt (R s +R d ))
D＝(R d -R s -2aR n )(R d +R s )(-2V g tV ds +V ds 2 )
V ds Extrinsic drain-source voltage, V gs Is an extrinsic gate source voltage, R d Is the parasitic resistance of the gate and drain, L is the gate length;
the extracted speed parameters of A1GaN/GaNHFET with different gate source bias, the size parameters of the device, and the voltage bias V ds ，V gs The following formula is introduced to obtain the device saturation current:
V GT ＝V G -V th
wherein ex=e (x)/Et; i sat Is a saturated current; e, e 0sat Is the value of the electric field E/Et at which the device reaches saturation, x=0; v (V) dsat Is a saturation voltage; v (V) G Is the intrinsic gate voltage;
extracting AlGaN/GaN HFET speed parameters of different gate source biases, device size parameters, and voltage bias V ds ,V gs The following equations are taken to obtain the device speed saturation region current:
wherein VGS Is the intrinsic gate source voltage, V DS Is an intrinsic drain-source voltage, P is an eigenvalue introduced by solving the Poisson equation to describe the effect of gate voltage on the length of the saturation region and output conductance in the velocity saturation region；
When the obtained current value is well matched with the experimental value, writing a current-voltage model into circuit software HSPICE software or ADS software by using verilog A language, and constructing GaN HFET with different sizes and different structures in the circuit software to optimally design a circuit of the high-performance GaN-based HFET;
writing a speed field model formula (9) and speed field model parameters into TCAD software to replace the previous GaN speed field model, and designing a high-performance GaN-based HFET, wherein the speed field model parameters comprise V sat ,ρ 1 ,ρ 3 ,E t 。
2. The method for optimizing an AlGaN/GaN heterojunction field effect transistor based on a physical base compact current voltage model according to claim 1, wherein in the step (2), the gate source bias takes a value of 0V, -1V, -2V, -3V.
3. The optimization method of AlGaN/GaN heterojunction field effect transistors based on physical-based compact current-voltage model according to claim 1, wherein in step (3), the length of each grid is 30nm<x 2 -x 1 <50nm。
4. The optimization method of the AlGaN/GaN heterojunction field effect transistor based on the physical base compact current-voltage model according to claim 1, wherein in the step (5), the obtained current value is well matched with the experimental value when the error is not more than 5%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211682596.9A CN116050334A (en) | 2022-12-27 | 2022-12-27 | AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211682596.9A CN116050334A (en) | 2022-12-27 | 2022-12-27 | AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116050334A true CN116050334A (en) | 2023-05-02 |
Family
ID=86117436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211682596.9A Pending CN116050334A (en) | 2022-12-27 | 2022-12-27 | AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116050334A (en) |
-
2022
- 2022-12-27 CN CN202211682596.9A patent/CN116050334A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Dasgupta et al. | BSIM compact model of quantum confinement in advanced nanosheet FETs | |
| Xie et al. | Review and critique of analytic models of MOSFET short-channel effects in subthreshold | |
| Lucci et al. | Multisubband Monte Carlo study of transport, quantization, and electron-gas degeneration in ultrathin SOI n-MOSFETs | |
| CN108416167B (en) | Method for establishing multi-physical-field coupling large-signal model of GaN HEMT device | |
| Fasarakis et al. | Compact model of drain current in short-channel triple-gate FinFETs | |
| US20070174030A1 (en) | Methothology for estimating statistical distribution characteristics of product parameters | |
| Kabaoğlu et al. | Statistical MOSFET modeling methodology for cryogenic conditions | |
| CN106446395A (en) | NMOS total-dose irradiation effect analytical modeling method | |
| Babiker et al. | Simple approach to include external resistances in the Monte Carlo simulation of MESFETs and HEMTs | |
| CN117723928A (en) | Method for establishing I-V model and extracting parameters of enhanced GaN HEMT device | |
| Yang et al. | Statistical modelling of small geometry MOSFETs | |
| CN116050334A (en) | AlGaN/GaN heterojunction field effect transistor optimization method based on physical base compact current-voltage model | |
| Wright | Physical and CAD models for the implanted-channel VLSI MOSFET | |
| Yih et al. | A consistent gate and substrate current model for submicron MOSFET's by considering energy transport | |
| Müller et al. | Physical modeling of InP/InGaAs DHBTs with augmented drift-diffusion and Boltzmann transport equation solvers—Part II: Application and results | |
| Reid et al. | Understanding LER-induced statistical variability: A 35,000 sample 3D simulation study | |
| Ma et al. | Comparison of two standard physical models of GaN HEMTs: MVSG and ASM | |
| Iwai et al. | Velocity saturation effect on short-channel MOS transistor capacitance | |
| J. García‐Loureiro et al. | Efficient three‐dimensional parallel simulations of PHEMTs | |
| Maneux et al. | strategies for characterization and parameter extraction of vertical junction-less nanowire FETs dedicated to design technology co-optimization | |
| Amat et al. | Quantum dot location relevance into SET-FET circuits based on FinFET devices | |
| Yoshitomi | Combination of transistors’ compact model and big data for successful smart factory | |
| Kansal et al. | TCAD based modeling of sub-surface leakage in short channel bulk MOSFETs | |
| Kloes | Multiscale simulation: Can compact models be more than a one-way bridge between TCAD and circuit simulation? | |
| Jayadeva et al. | Compact model of short-channel MOSFETs considering quantum mechanical effects |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |