CN116016311A - Method and system for implementing circuit route analysis and series connection verification - Google Patents
Method and system for implementing circuit route analysis and series connection verification Download PDFInfo
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Abstract
The invention discloses a method and a system for realizing circuit route analysis and series connection verification, which belong to the technical field of mobile transmission, and aim at data synchronization among different systems, data required by circuit route system management is generated by analyzing circuit route text description, and the circuit route integrity is verified on the basis; the circuit routing text description is analyzed, a circuit routing table and channel table data are created for each section of channel of the circuit, corresponding network management collected data are respectively matched for different types of channels, the channel routing data are connected in series, whether the circuit routing serial data are complete or not is checked, and circuit serial rate checking is achieved. The invention can effectively solve the problem of low circuit serial rate in the field of mobile transmission, and helps a user to rectify and improve the circuit route serial rate.
Description
Technical Field
The invention relates to the technical field of mobile transmission, in particular to a method and a system for realizing circuit route analysis and series check.
Background
In the field of mobile transmission, different manufacturers, different system circuits and routing management modes are different, the old and old systems have more redundant data, and the circuit serial rate is not high; in addition, the basic data used by different manufacturers and different systems are collected through a unified standard interface based on the same network management data, but the data management rules are different. Therefore, when circuit data are migrated or synchronized among different manufacturers and different systems, the problem that circuit routes cannot be communicated due to different model management is caused.
Disclosure of Invention
The technical task of the invention is to provide a method and a system for realizing circuit route analysis and series connection verification aiming at the defects, and the problem of low circuit series connection rate in the field of mobile transmission can be effectively solved.
The technical scheme adopted for solving the technical problems is as follows:
aiming at data synchronization among different systems, generating data required by circuit routing system management by analyzing circuit routing text description, checking circuit routing integrity on the basis, positioning a problem point of incomplete circuit routing, and helping to promote circuit serial rate;
the circuit routing text description is analyzed, a circuit routing table and channel table data are created for each section of channel of the circuit, corresponding network management collected data are respectively matched for different types of channels, the channel routing data are connected in series, whether the circuit routing serial data are complete or not is checked, and circuit serial rate checking is achieved.
For circuit data generated by own system scheduling, the comprehensive resource management system can present the circuit whole course route based on the circuit route generated in the scheduling process and provide a user-friendly interactive operation interface. The method comprises the steps of analyzing the description of the circuit route text to generate circuit route management data suitable for an integrated resource management system, concatenating the circuit complete route based on the data, and finally checking the circuit route serial rate. The problem of circuit route management data is missing when circuit data among different systems are synchronous is solved, and therefore the practical problem of low circuit serial rate in the field of mobile transmission is solved.
Further, the method comprises the following specific implementation processes:
1) Acquiring a circuit route text description, and analyzing and acquiring the text description of each section of channel;
2) Analyzing and acquiring information of both ends of a source and a sink for text description of each section of channel;
3) Distinguishing channels through network management information at two ends, and collecting data through matching of ports at two ends and time slots for the channels which can be collected; for a non-collectable channel, inserting corresponding channel data;
4) The network management data are collected to connect the channel routes in series;
5) Respectively checking the route integrality of different types of channels;
6) Updating the circuit route integrity checking result to the circuit table and the circuit route table, and clearly prompting the reason of the circuit route incompleteness.
Preferably, the local market and the local network manager generate a network management check result report, so that the user can monitor and improve the serial rate.
Preferably, the text description analysis of each section of channel obtains information of both ends of the source and the destination, including network management, network elements, ports and time slot information.
Preferably, the channels are distinguished through network management information at two ends, and the collectable channels comprise an OTN and an SDH channel; non-collectable channels include PTN, beacon SDH channels.
Further, for the non-collectable channel, corresponding channel data are inserted, and for the PTN channel, the acquired pseudo-wire data are matched through the two-end ports and Vlan information.
Furthermore, the network management data is collected to connect the channel route in series,
the PTN network management pseudo-line is related to tunnel data, tunnel route points and link point information of the tunnel pass are collected through a network manager, OTN network management wave channels and wave channel route points are collected through the network manager, SDH channels and route points of other manufacturers cannot be collected, and route data are connected in series through crossing and topology data collected through the network manager.
The invention also discloses a circuit route analysis series connection checking system, which comprises a circuit route text analysis module and a circuit route integrity checking module,
the circuit route text analysis module acquires and analyzes the circuit route text description and generates data required by circuit route system management;
the checking circuit route integrity module is used for checking the route integrity of the circuit according to the circuit route system management data and forming a checking report based on the user requirement;
the system realizes the circuit route integrity check according to the circuit route analysis and series check method.
The invention also claims a circuit route analysis series connection checking device, which comprises: at least one memory and at least one processor;
the at least one memory for storing a machine readable program;
the at least one processor is configured to invoke the machine-readable program to perform the method described above.
The invention also claims a computer readable medium having stored thereon computer instructions which, when executed by a processor, cause the processor to perform the above-described method.
Compared with the prior art, the method and the system for realizing the circuit route analysis and series connection verification have the following beneficial effects:
according to the method, through analyzing circuit route text description, each section of channel associated with a circuit is identified, network element ports and time slots at two ends of each section of channel are analyzed and matched with collected data, system management data such as circuit route and channel are generated, and network management collected data are associated and connected with the circuit route in series. On the basis, the integrity of the circuit route data is checked, the problem of the circuit route integrity is clearly positioned, and the user is helped to rectify and improve the circuit route serial rate.
Drawings
Fig. 1 is a flow chart of a method for implementing circuit route analysis concatenation check according to an embodiment of the present invention.
Detailed Description
The invention will be further described with reference to the drawings and the specific examples.
The embodiment of the invention provides a method for realizing circuit route analysis and series connection verification, which aims at data synchronization among different systems, generates data required by circuit route system management by analyzing circuit route text description, verifies circuit route integrity on the basis, locates a problem point of incomplete circuit route and helps to promote circuit series connection rate;
the circuit routing text description is analyzed, a circuit routing table and channel table data are created for each section of channel of the circuit, corresponding network management collected data are respectively matched for different types of channels, the channel routing data are connected in series, whether the circuit routing serial data are complete or not is checked, and circuit serial rate checking is achieved.
For circuit data generated by own system scheduling, the comprehensive resource management system can present the circuit whole course route based on the circuit route generated in the scheduling process and provide a user-friendly interactive operation interface. The method comprises the steps of analyzing the description of the circuit route text to generate circuit route management data suitable for an integrated resource management system, concatenating the circuit complete route based on the data, and finally checking the circuit route serial rate. The problem of circuit route management data is missing when circuit data among different systems are synchronous is solved, and therefore the practical problem of low circuit serial rate in the field of mobile transmission is solved.
The method comprises the following specific implementation processes:
1) Acquiring a circuit route text description, and analyzing and acquiring the text description of each section of channel;
2) Analyzing and acquiring information of both ends of a source and a destination for text description of each section of channel, wherein the information comprises network management information, network elements information, ports information and time slot information;
3) Distinguishing PTN/OTN/SDH channels through network management information at two ends, and collecting data through matching of ports at two ends and time slots for the collectable OTNs, SDH channels and the like; inserting corresponding channel data for the non-collectable PTN, the honeycomb SDH channel and the like, and continuously matching the acquired pseudo-wire data through the information of ports at two ends, vlan and the like for the PTN channel;
4) The method comprises the steps of collecting network management data, concatenating channel routing, associating PTN network management pseudo-wires with tunnel data, collecting tunnel routing points and link point information of a tunnel passing through the network management, collecting OTN network management channels and channel routing points through the network management, collecting SDH channels and routing points through the network management, and connecting the route data through intersection and topology data collected by the network management in series, wherein SDH channels and routing points of other manufacturers cannot be collected;
5) Respectively checking the route integrality of different types of channels;
6) Updating the circuit route integrity checking result to the circuit table and the circuit route table, and clearly prompting the reason of the circuit route incompleteness;
7) And generating a network management check result report by the branch city and the branch network management, thereby facilitating the monitoring of users and improving the serial rate.
The embodiment of the invention also provides a circuit route analysis series connection checking system, which comprises a circuit route text analysis module and a circuit route integrity checking module,
the circuit route text analysis module acquires and analyzes the circuit route text description and generates data required by circuit route system management;
the checking circuit route integrity module is used for checking the route integrity of the circuit according to the circuit route system management data and forming a checking report based on the user requirement;
the system realizes the circuit route integrity check according to the circuit route analysis and series check method.
The specific implementation process is as follows:
1) Acquiring a circuit route text description, and analyzing and acquiring the text description of each section of channel;
2) Analyzing and acquiring information of both ends of a source and a destination for text description of each section of channel, wherein the information comprises network management information, network elements information, ports information and time slot information;
3) Distinguishing PTN/OTN/SDH channels through network management information at two ends, and collecting data through matching of ports at two ends and time slots for the collectable OTNs, SDH channels and the like; inserting corresponding channel data for the non-collectable PTN, the honeycomb SDH channel and the like, and continuously matching the acquired pseudo-wire data through the information of ports at two ends, vlan and the like for the PTN channel;
4) The method comprises the steps of collecting network management data, concatenating channel routing, associating PTN network management pseudo-wires with tunnel data, collecting tunnel routing points and link point information of a tunnel passing through the network management, collecting OTN network management channels and channel routing points through the network management, collecting SDH channels and routing points through the network management, and connecting the route data through intersection and topology data collected by the network management in series, wherein SDH channels and routing points of other manufacturers cannot be collected;
5) Respectively checking the route integrality of different types of channels;
6) Updating the circuit route integrity checking result to the circuit table and the circuit route table, and clearly prompting the reason of the circuit route incompleteness;
7) And generating a network management check result report by the branch city and the branch network management, thereby facilitating the monitoring of users and improving the serial rate.
The embodiment of the invention also provides a circuit route analysis and concatenation checking device, which comprises: at least one memory and at least one processor;
the at least one memory for storing a machine readable program;
the at least one processor is configured to invoke the machine-readable program and perform the circuit route analysis concatenation checking method according to the foregoing embodiment.
The embodiment of the invention also provides a computer readable medium, wherein the computer readable medium stores computer instructions, and the computer instructions, when executed by a processor, cause the processor to execute the circuit route analysis concatenation checking method in the embodiment. Specifically, a system or apparatus provided with a storage medium on which a software program code realizing the functions of any of the above embodiments is stored, and a computer (or CPU or MPU) of the system or apparatus may be caused to read out and execute the program code stored in the storage medium.
In this case, the program code itself read from the storage medium may realize the functions of any of the above-described embodiments, and thus the program code and the storage medium storing the program code form part of the present invention.
Examples of the storage medium for providing the program code include a floppy disk, a hard disk, a magneto-optical disk, an optical disk (e.g., CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), a magnetic tape, a nonvolatile memory card, and a ROM. Alternatively, the program code may be downloaded from a server computer by a communication network.
Further, it should be apparent that the functions of any of the above-described embodiments may be implemented not only by executing the program code read out by the computer, but also by causing an operating system or the like operating on the computer to perform part or all of the actual operations based on the instructions of the program code.
Further, it is understood that the program code read out by the storage medium is written into a memory provided in an expansion board inserted into a computer or into a memory provided in an expansion unit connected to the computer, and then a CPU or the like mounted on the expansion board or the expansion unit is caused to perform part and all of actual operations based on instructions of the program code, thereby realizing the functions of any of the above embodiments.
While the invention has been illustrated and described in detail in the drawings and in the preferred embodiments, the invention is not limited to the disclosed embodiments, and it will be appreciated by those skilled in the art that the code audits of the various embodiments described above may be combined to produce further embodiments of the invention, which are also within the scope of the invention.
Claims (10)
1. The method is characterized in that aiming at data synchronization among different systems, data required by circuit routing system management is generated by analyzing circuit routing text description, and circuit routing integrity is checked on the basis;
the circuit routing text description is analyzed, a circuit routing table and channel table data are created for each section of channel of the circuit, corresponding network management collected data are respectively matched for different types of channels, the channel routing data are connected in series, whether the circuit routing serial data are complete or not is checked, and circuit serial rate checking is achieved.
2. The method for implementing circuit route analysis tandem check according to claim 1, wherein the method comprises the following specific implementation processes:
1) Acquiring a circuit route text description, and analyzing and acquiring the text description of each section of channel;
2) Analyzing and acquiring information of both ends of a source and a sink for text description of each section of channel;
3) Distinguishing channels through network management information at two ends, and collecting data through matching of ports at two ends and time slots for the channels which can be collected; for a non-collectable channel, inserting corresponding channel data;
4) The network management data are collected to connect the channel routes in series;
5) Respectively checking the route integrality of different types of channels;
6) Updating the circuit route integrity checking result to the circuit table and the circuit route table, and clearly prompting the reason of the circuit route incompleteness.
3. The method for implementing the circuit route analysis and series connection verification according to claim 2, wherein the branch city and the branch network management generate a network management verification result report, so that the user can monitor and improve the series connection rate.
4. The method for implementing circuit route analysis and concatenation verification according to claim 2, wherein the text description analysis for each channel segment obtains information of both source and destination ends, including network management information, network elements information, ports information and time slots information.
5. A method for implementing circuit route analysis and tandem check according to claim 2 or 3, wherein the channels are distinguished by network management information at two ends, and the collectable channels include OTN and SDH channels; non-collectable channels include PTN, beacon SDH channels.
6. The method according to claim 5, wherein the corresponding channel data is inserted for the non-collectable channel, and the pseudo-wire data collected by the Vlan information matching is continued for the PTN channel through the two ports.
7. The method of claim 6, wherein the step of collecting network management data, concatenating channel routes,
the PTN network management pseudo-line is related to tunnel data, tunnel route points and link point information of the tunnel pass are collected through a network manager, OTN network management wave channels and wave channel route points are collected through the network manager, SDH channels and route points of other manufacturers cannot be collected, and route data are connected in series through crossing and topology data collected through the network manager.
8. A circuit route analysis series connection checking system is characterized by comprising a circuit route text analysis module and a checking circuit route integrity module,
the circuit route text analysis module acquires and analyzes the circuit route text description and generates data required by circuit route system management;
the checking circuit route integrity module is used for checking the route integrity of the circuit according to the circuit route system management data and forming a checking report based on the user requirement;
the system implements circuit route integrity verification according to the circuit route analysis concatenation verification method of any one of claims 1 to 7.
9. A circuit route analysis concatenation checking device, characterized by comprising: at least one memory and at least one processor;
the at least one memory for storing a machine readable program;
said at least one processor for invoking said machine readable program to perform the method of any of claims 1 to 7.
10. A computer readable medium having stored thereon computer instructions which, when executed by a processor, cause the processor to perform the method of any of claims 1 to 7.
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2022
- 2022-12-26 CN CN202211671158.2A patent/CN116016311A/en active Pending
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| EP1871045A1 (en) * | 2006-06-19 | 2007-12-26 | NTT DoCoMo Inc. | Detecting and bypassing misbehaving nodes in distrusted ad hoc networks |
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