CN116010120A - Method and device for sharing data among process data under multiple cores and processing equipment - Google Patents

Method and device for sharing data among process data under multiple cores and processing equipment Download PDF

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CN116010120A
CN116010120A CN202211602598.2A CN202211602598A CN116010120A CN 116010120 A CN116010120 A CN 116010120A CN 202211602598 A CN202211602598 A CN 202211602598A CN 116010120 A CN116010120 A CN 116010120A
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shared
core
data
segment
sharing
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刘声明
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Beijing Abt Networks Co ltd
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Beijing Abt Networks Co ltd
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Abstract

The application provides a method, a device and processing equipment for sharing data among process data under multiple cores, which are used for effectively realizing simultaneous sharing of data segments and heap memory, so that related software programs can be operated more conveniently. The method comprises the following steps: adding description information of a dp shared segment after linking the srdata of the script, wherein the data segment is marked with a start address by the dp shared start and an end address by the dp shared end; after linking the ss section of the script data section, adding description information of the dp_shared section; application programming is described in __ attribute __ for global variables that need to be shared; in the process of compiling codes, the global variable to be shared which is described is put into a dp_shared section when in linkage, and an executable program dplane is compiled; when an executable program dplane runs on a multi-CORE CPU, main functions acquire the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information; and calculating the size of the dp_shared segment according to the starting address and the ending address, finishing mmap mapping, and finishing data sharing among the process data under the multi-core.

Description

Method and device for sharing data among process data under multiple cores and processing equipment
Technical Field
The application relates to the field of software, in particular to a method and a device for sharing data among process data under multiple cores and processing equipment.
Background
In part, the need for inter-core reference program data sharing may be involved during programming operations.
Under the requirement, the sharing of global variables and static variables is realized by adopting a process multithreading mode in the prior art, and the sharing of heap memory is realized by adopting a HuagePage mapping mode.
The sharing of the heap memory can only be realized for multiple processes, but the sharing of the data segment cannot be realized, or the prior art cannot realize the simultaneous sharing of the data segment and the heap memory.
Disclosure of Invention
The application provides a method, a device and processing equipment for sharing data among process data under multiple cores, which are used for effectively realizing simultaneous sharing of data segments and heap memory, so that related software programs can be operated more conveniently.
In a first aspect, the present application provides a method for sharing data between process data under multiple cores, where the method includes:
adding description information of a dp shared segment after linking the srdata of the script, wherein the data segment is marked with a start address by the dp shared start and an end address by the dp shared end;
after linking the ss section of the script data section, adding description information of the dp_shared section;
application programming is described in __ attribute __ for global variables that need to be shared;
in the process of compiling codes, the global variable to be shared which is described is put into a dp_shared section when in linkage, and an executable program dplane is compiled;
when an executable program dplane runs on a multi-CORE CPU, main functions acquire the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information;
and calculating the size of the dp_shared segment according to the starting address and the ending address, finishing mmap mapping, and finishing data sharing among the process data under the multi-core.
With reference to the first aspect of the present application, in a first possible implementation manner of the first aspect of the present application, the method further includes:
the Master CORE process completes the fork of the Slave CORE process of 1-n-1 according to the CPU CORE number, the NUMA node number and the MASK value RUNNIG_CORE_MASK of the allowed running CORE;
the Slave core process completes nucleophilic setting and initialization work of global data related to the Slave core itself;
the Master core and the Slave core synchronously wait for other cores for and finish initialization.
With reference to the first possible implementation manner of the first aspect of the present application, in a second possible implementation manner of the first aspect of the present application, the method further includes:
for abnormal and normal exit of the process of the Slave core process, monitoring and performing abnormal processing on the Master core process, and re-pulling the Slave core process or exiting to release the resources allocated by the Slave;
and for the Master core process to exit, synchronously releasing the resources allocated by all the processes and then exiting.
With reference to the first aspect of the present application, in a third possible implementation manner of the first aspect of the present application, the method further includes:
according to the HuagePage memory information, the management and initialization of the GLOBAL_HEAP, the MEMPOOL and the hardware resources are completed;
the Slave core process completes the binding of resources such as GLOBAL_HEAP, MEMPOOL, interfaces and the like;
the Master core process and the Slave core process complete the distribution and initialization of related data according to the distribution and release functions of the GLOBAL_HEAP package;
after the initialization stage is finished, the Master core process and the Slave core process enter service processing functions, and the allocation and release of the shared HEAP memory are completed according to the allocation release function packaged by the GLOBAL_HEAP.
With reference to the third possible implementation manner of the first aspect of the present application, in a fourth possible implementation manner of the first aspect of the present application, the method further includes:
and after the dp_shared segment mapping is finished, the reading and the modification of the global data value are finished.
In a fifth possible implementation manner of the first aspect of the present application, with reference to the first aspect of the present application, the 64K alignment is maintained by the description information of the. Dp_shared segment added after the. Srdata of the. Dat segment of the linked script.
In a sixth possible implementation manner of the first aspect of the present application, with reference to the first aspect of the present application, the 32M alignment is maintained by the description information of the. Dp_shared segment added after the. Bss segment of the linked script. Data segment.
In a second aspect, the present application provides an apparatus for sharing data between process data under multiple cores, the apparatus including:
the first adding unit is used for adding description information of the dp_shared segment after linking the srdata of the script, wherein the data segment is marked with a start address by the dp_shared_start and an end address by the dp_shared_end;
the second adding unit is used for adding the description information of the dp_shared segment after linking the bypass segment of the script data segment;
a description unit, for the application programming, describing the global variable to be shared by __ attribute __;
the compiling unit is used for placing the global variable to be shared described in the dp_shared section in the process of compiling codes in the process of linking, and compiling an executable program dplane;
the main function acquires the CPU CORE number, the NUMA node number, the MASK value RUNNING_CORE_MASK of the allowed operation CORE and the HuagePage memory information when the executable program dplane operates on the multi-CORE CPU;
and the mapping unit is used for calculating the size of the dp_shared segment according to the starting address and the ending address, finishing mmap mapping and finishing data sharing among the process data under the multi-core.
With reference to the second aspect of the present application, in a first possible implementation manner of the second aspect of the present application, the apparatus further includes a process management unit, configured to:
the Master CORE process completes the fork of the Slave CORE process of 1-n-1 according to the CPU CORE number, the NUMA node number and the MASK value RUNNIG_CORE_MASK of the allowed running CORE;
the Slave core process completes nucleophilic setting and initialization work of global data related to the Slave core itself;
the Master core and the Slave core synchronously wait for other cores for and finish initialization.
With reference to the first possible implementation manner of the second aspect of the present application, in a second possible implementation manner of the second aspect of the present application, the process management unit is further configured to:
for abnormal and normal exit of the process of the Slave core process, monitoring and performing abnormal processing on the Master core process, and re-pulling the Slave core process or exiting to release the resources allocated by the Slave;
and for the Master core process to exit, synchronously releasing the resources allocated by all the processes and then exiting.
With reference to the second aspect of the present application, in a third possible implementation manner of the second aspect of the present application, the apparatus further includes a sharing optimization unit, configured to:
according to the HuagePage memory information, the management and initialization of the GLOBAL_HEAP, the MEMPOOL and the hardware resources are completed;
the Slave core process completes the binding of resources such as GLOBAL_HEAP, MEMPOOL, interfaces and the like;
the Master core process and the Slave core process complete the distribution and initialization of related data according to the distribution and release functions of the GLOBAL_HEAP package;
after the initialization stage is finished, the Master core process and the Slave core process enter service processing functions, and the allocation and release of the shared HEAP memory are completed according to the allocation release function packaged by the GLOBAL_HEAP.
With reference to the third possible implementation manner of the second aspect of the present application, in a fourth possible implementation manner of the second aspect of the present application, the sharing optimization unit is further configured to:
and after the dp_shared segment mapping is finished, the reading and the modification of the global data value are finished.
In a fifth possible implementation manner of the second aspect of the present application, with reference to the second aspect of the present application, 64K alignment is maintained by the description information of the. Dp_shared segment added after the. Srdata of the. Dat segment of the linked script.
In a sixth possible implementation manner of the second aspect of the present application, with reference to the second aspect of the present application, the 32M alignment is maintained by the description information of the dp_shared segment added after linking the ss segment of the script data segment.
In a third aspect, the present application provides a processing device, comprising a processor and a memory, the memory having stored therein a computer program, the processor executing the method provided by the first aspect of the present application or any one of the possible implementations of the first aspect of the present application when calling the computer program in the memory.
In a fourth aspect, the present application provides a computer readable storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the method provided in the first aspect of the present application or any one of the possible implementations of the first aspect of the present application.
From the above, the present application has the following advantages:
aiming at the problem of sharing application program data among multiple COREs, the application adds the description information of the dp_shared segment after the srdata of the script-dat segment is linked, the data segment marks a starting address by using the dp_shared_start and marks an ending address by using the dp_shared_end, and adds the description information of the dp_shared segment after the bypass segment of the script-data segment is linked, and the application program programs the global variables to be shared by using __ attribute __, and in the process of compiling codes, the described global variables to be shared are placed into the dp_shared segment during linking, an executable program dplan is compiled, and when the executable program dplan runs on a multi-CORE CPU, the main function obtains the CPU number, the NUMA segment, the MASK value RUNNING_CORE_MASK and Huagememory information of a CORE to be allowed to run, calculates the size of the dp_shared segment according to the starting address and the ending address, and can be mapped into the related programs to be more convenient and more efficient to run.
More simply, the global variable is shared by linking the script adding segment, so that the purposes of sharing the data segment and the heap memory simultaneously are achieved, the data segment and the heap memory are reflected in programming work, and the code quality and the coding efficiency can be improved.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for sharing data among process data under multiple cores of the present application;
FIG. 2 is a schematic illustration of a scenario of the additive description of the present application;
FIG. 3 is a partial workflow diagram of the process data sharing process under the multi-core of the present application;
FIG. 4 is a partial workflow diagram of a process data sharing process under multiple cores of the present application;
FIG. 5 is a schematic diagram of a device for sharing data among process data under multiple cores according to the present application;
fig. 6 is a schematic view of a structure of the processing apparatus of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those steps or modules that are expressly listed or inherent to such process, method, article, or apparatus. The naming or numbering of the steps in the present application does not mean that the steps in the method flow must be executed according to the time/logic sequence indicated by the naming or numbering, and the execution sequence of the steps in the flow that are named or numbered may be changed according to the technical purpose to be achieved, so long as the same or similar technical effects can be achieved.
The division of the modules in the present application is a logical division, and may be implemented in another manner in practical application, for example, a plurality of modules may be combined or integrated in another system, or some features may be omitted or not implemented, and in addition, coupling or direct coupling or communication connection between the modules that are shown or discussed may be through some interfaces, and indirect coupling or communication connection between the modules may be in an electrical or other similar form, which is not limited in this application. The modules or sub-modules described as separate components may or may not be physically separate, or may be distributed in a plurality of circuit modules, and some or all of the modules may be selected according to actual needs to achieve the purposes of the present application.
Before introducing the method for sharing data among process data under multiple cores provided by the application, the background content related to the application is first introduced.
The method, the device and the computer readable storage medium for sharing the data among the process data under the multi-core can be applied to processing equipment and used for effectively realizing the simultaneous sharing of the data segments and the heap memory, so that related software programs can be operated more conveniently.
In the method for sharing data between process data under multiple cores, the execution main body may be a device for sharing data between process data under multiple cores, or different types of processing Equipment such as a server, a physical host or a User Equipment (UE) integrated with the device for sharing data between process data under multiple cores. The device for sharing the data among the process data under the multiple cores can be realized in a hardware or software mode, the UE can be specifically terminal equipment such as a smart phone, a tablet personal computer, a notebook computer, a desktop computer or a personal digital assistant (Personal Digital Assistant, PDA) and the processing equipment can be arranged in an equipment cluster mode.
It should be understood that, the processing device of the present application is mainly a device running related application programs, and provides corresponding application services by running the related application programs, and in the process of configuring and running the application programs, the method for sharing data between process data under multiple cores provided by the present application can effectively realize sharing data segments and heap memory, so that related software programs can be run more conveniently, and more simple, convenient and efficient application services are promoted.
Next, the method for sharing data between process data under multiple cores provided by the application is introduced.
First, referring to fig. 1, fig. 1 shows a flow diagram of a method for sharing data between multiple cores according to the present application, and the method for sharing data between multiple cores according to the present application may specifically include steps S101 to S106 as follows:
step S101, adding description information of a dp shared segment after linking the srdata of the datasegment of the script, wherein the data segment is marked with a start address by the dp shared start and an end address by the dp shared end;
it can be understood that the method and the device achieve the purpose of sharing the data segment and the heap memory simultaneously by sharing the global variable by adding the segment in the linked script.
Correspondingly, the adding process of adding the description information of the dp_shared segment after the srdata of the datasegment of the link script is referred to herein.
Furthermore, it should be appreciated that regarding programming or programming information related to the present application, which essentially pertains to existing things that may be involved in programming work, the solution core of the present application is to achieve the goal of sharing data segments, heap memory, etc. simultaneously based on how these existing things are applied.
And for the. Dp_shared segment description information added after the. Srdata of the. Dat segment of the link script, in particular applications, may be specifically configured to maintain 64K alignment.
Step S102, adding description information of a dp_shared segment after linking the bypass segment of the script data segment;
in addition to adding the description information of the dp_shared segment after the srdata of the link script 'dat segment, the present application may also involve adding the description information of the dp_shared segment after the bss segment of the link script' data segment.
Wherein, the description information of the dp_shared section added by the two is consistent in terms of essential content.
And for the added dpshared segment description information after the bypass segment of the linked script data segment, similar to the previous one, may be specifically configured to maintain 32M alignment.
Specifically, for the adding process of the above. Dp_shared segment description information, it can also be understood in conjunction with a schematic view of a scenario of the adding description of the present application shown in fig. 2.
Step S103, the application programming is described by __ attribute __ for global variables to be shared;
the application can be described by __ attribute __ for global variables that may need to be shared during the running process of the application, and a foundation is laid for the subsequent data sharing.
Among other things, __ attribute __ can be understood as a compilation attribute that describes a particular identification, error checking, or advanced optimization to a compiler.
Step S104, in the process of compiling codes, the global variable to be shared described is put into a dp_shared section during the link, and an executable program dplane is compiled;
during the running process of the application program, the process of compiling codes can be involved, and at this time, the global variable described by __ attribute __ can be put into the. Dp_shared segment added at the two positions respectively in the link, and an executable program dplane can be compiled.
Step S105, when an executable program dplane runs on the multi-CORE CPU, main functions acquire CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information;
for the compiled executable program dplane, in the RUNNING process on the multi-CORE CPU, the main function can acquire the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information, and a processing basis is provided for mmap mapping.
And step S106, calculating the size of the dp_shared segment according to the starting address and the ending address, and finishing mmap mapping to finish data sharing among the process data under the multi-core.
At this time, the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK and HuagePage memory information of the allowed RUNNING CORE are obtained, and the starting address (marked by dp_shared_start) and the ending address (marked by dp_shared_end) which are configured at the beginning can be combined to calculate the size of dp_shared segment and complete mmap mapping, so that the purpose of the application, namely data sharing among the multiple COREs can be completed.
In summary, for the problem of sharing application program data among multiple COREs, the application adds description information of a dp shared segment after the srdata of a datasegment of a link script on one hand, the data segment marks a starting address with the dp shared segment and marks an ending address with the dp shared segment on the other hand, adds description information of the dp shared segment after the bypass segment of the datasegment of the link script, and the application program programming describes the global variable needing sharing by __ attribute __, and in the process of compiling codes, the described global variable needing sharing is placed in the dp shared segment during the linking, an executable program dplan is compiled, and when the executable program dplan runs on a multi-CORE CPU, the main function obtains the CPU CORE number, NUMA node number, a MASK value RUNNING_CORE_MASK and HuPage information of the CORE allowing the CORE to run at the moment, and the map the size of the multi-CORE data size according to the starting address and the end address, and the related program dplan size can be mapped more conveniently and conveniently run.
More simply, the global variable is shared by linking the script adding segment, so that the purposes of sharing the data segment and the heap memory simultaneously are achieved, the data segment and the heap memory are reflected in programming work, and the code quality and the coding efficiency can be improved.
A detailed description of possible implementations of the embodiment shown in fig. 1 is continued.
It will be appreciated that the present application may also address other problems in the prior art.
Specifically, in the prior art, after a thread model and affinity are bound, if a certain thread is abnormally suspended, the whole process needs to be restarted together, and obviously, the normal operation of an application program is affected, and the work of an application service is affected.
In this regard, the present application may be configured to restart only the abnormal thread by fork and management of the process under the multicore, and the whole process is not required to be restarted.
Specifically, the method of the present application may further include the following:
the Master CORE process completes the fork of the Slave CORE process of 1-n-1 according to the CPU CORE number, the NUMA node number and the MASK value RUNNIG_CORE_MASK of the allowed running CORE;
the Slave core process completes nucleophilic setting and initialization work of global data related to the Slave core itself;
the Master core and the Slave core synchronously wait for other cores for and finish initialization.
In addition, to further improve the robustness of the system, the method of the present application may further include:
for abnormal and normal exit of the process of the Slave core process, monitoring and performing abnormal processing on the Master core process, and re-pulling the Slave core process or exiting to release the resources allocated by the Slave;
and for the Master core process to exit, synchronously releasing the resources allocated by all the processes and then exiting.
It can be seen that the embodiments herein further refine process management from the perspective of freeing resources in the refund link.
In addition, for the prior art, if a multi-process model is programmed with a specific constraint, all global variables are shared by pointers, and then the variables are allocated from the memory mapped by the HuagePage, the application can achieve better sharing effect through the following continuously introduced optimization content, namely the application method can further comprise:
according to the HuagePage memory information, the management and initialization of the GLOBAL_HEAP (which can be managed by using the buddy+slub), the MEMPOOL and the hardware resource are completed;
the Slave core process completes the binding of resources such as GLOBAL_HEAP, MEMPOOL, interfaces and the like;
the Master core process and the Slave core process complete the distribution and initialization of related data according to the distribution and release functions of the GLOBAL_HEAP package;
after the initialization stage is finished, the Master core process and the Slave core process enter service processing functions, and the allocation and release of the shared HEAP memory are completed according to the allocation release function packaged by the GLOBAL_HEAP.
In addition, in this embodiment, the reading and modification of the global data value may also be completed after the completion of the. Dp_shared segment mapping, and the optimization may be continued in detail.
Therefore, under the above arrangement, the sharing of the GLOBAL_HEAP memory and the size management problem positioning of the memory are completed through the HuagePage, so that the method is more convenient and efficient.
In addition, as for the above, it is worth mentioning that the application applies a NUMA architecture, it can be understood that the advantage of multiple processes can be utilized under the NUMA architecture, so as to improve the performance of service processing, and the performance is a multiple of the multithreaded node, so that the problem of pseudo sharing of multiple threads can be prevented.
Specifically, to more intuitively understand the above, it may also be understood with reference to the partial workflow diagrams of the process data sharing process under the multi-core of the present application shown in fig. 3 and fig. 4.
The above is an introduction of the method for sharing data between multi-core process data provided by the present application, and in order to facilitate better implementation of the method for sharing data between multi-core process data provided by the present application, the present application also provides a device for sharing data between multi-core process data from the perspective of a functional module.
Referring to fig. 5, a schematic structural diagram of an inter-process data sharing device under a multi-core of the present application, in this application, an inter-process data sharing device 500 under a multi-core may specifically include the following structures:
a first adding unit 501, configured to add, after linking the srdata of the script, the description information of the dp_shared segment, where the data segment is marked with a start address of the dp_shared_start and an end address of the dp_shared_end;
a second adding unit 502, configured to add the description information of the dp_shared segment after linking the ss segment of the data segment of the script;
a description unit 503, configured to describe the global variable to be shared by application programming with __ attribute __;
the compiling unit 504 is configured to put the global variable to be shared described in the dp_shared segment during the linking process in the process of compiling the code, and compile an executable program dplane;
an obtaining unit 505, configured to obtain, by using a main function, the number of CPU COREs, the number of NUMA nodes, a MASK value running_core_mask of an allowed RUNNING CORE, and HuagePage memory information when an executable program dplane runs on the multi-CORE CPU;
and a mapping unit 506, configured to calculate the size of the dp_shared segment according to the start address and the end address, complete mmap mapping, and complete data sharing among the process data under the multi-core.
In an exemplary implementation, the apparatus further includes a process management unit 507 for:
the Master CORE process completes the fork of the Slave CORE process of 1-n-1 according to the CPU CORE number, the NUMA node number and the MASK value RUNNIG_CORE_MASK of the allowed running CORE;
the Slave core process completes nucleophilic setting and initialization work of global data related to the Slave core itself;
the Master core and the Slave core synchronously wait for other cores for and finish initialization.
In yet another exemplary implementation, the process management unit 507 is further configured to:
for abnormal and normal exit of the process of the Slave core process, monitoring and performing abnormal processing on the Master core process, and re-pulling the Slave core process or exiting to release the resources allocated by the Slave;
and for the Master core process to exit, synchronously releasing the resources allocated by all the processes and then exiting.
In yet another exemplary implementation, the apparatus further includes a sharing optimization unit 508 configured to:
according to the HuagePage memory information, the management and initialization of the GLOBAL_HEAP, the MEMPOOL and the hardware resources are completed;
the Slave core process completes the binding of resources such as GLOBAL_HEAP, MEMPOOL, interfaces and the like;
the Master core process and the Slave core process complete the distribution and initialization of related data according to the distribution and release functions of the GLOBAL_HEAP package;
after the initialization stage is finished, the Master core process and the Slave core process enter service processing functions, and the allocation and release of the shared HEAP memory are completed according to the allocation release function packaged by the GLOBAL_HEAP.
In yet another exemplary implementation, the sharing optimization unit 508 is further configured to:
and after the dp_shared segment mapping is finished, the reading and the modification of the global data value are finished.
In yet another exemplary implementation, the 64K alignment is maintained with the. Dp_shared segment description information added after linking the. Srdata of the. Dat segment of the script.
In yet another exemplary implementation, the added. Dp_shared segment descriptive information after linking the. Bss segment of the script. Data segment maintains 32M alignment.
Referring to fig. 6, fig. 6 shows a schematic structural diagram of the processing device, specifically, the processing device may include a processor 601, a memory 602, and an input/output device 603, where the processor 601 is configured to implement steps of a method for sharing data under multiple cores in the corresponding embodiment of fig. 1 when executing a computer program stored in the memory 602; alternatively, the processor 601 is configured to implement functions of each unit in the corresponding embodiment of fig. 5 when executing a computer program stored in the memory 602, where the memory 602 is configured to store the computer program required for the processor 601 to execute the method for sharing data between process data under multiple cores in the corresponding embodiment of fig. 1.
By way of example, a computer program may be partitioned into one or more modules/units, which are stored in the memory 602 and executed by the processor 601 to complete the present application. One or more of the modules/units may be a series of computer program instruction segments capable of performing particular functions to describe the execution of the computer program in a computer device.
The processing devices may include, but are not limited to, a processor 601, memory 602, and input output devices 603. It will be appreciated by those skilled in the art that the illustrations are merely examples of processing devices and do not constitute a limitation of processing devices, and that more or fewer components than shown may be included, or that certain components may be combined, or that different components may be included, for example, processing devices may also include network access devices, buses, etc., through which processor 601, memory 602, input output device 603, etc. are connected.
The processor 601 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, which is a control center for a processing device, with various interfaces and lines connecting the various parts of the overall device.
The memory 602 may be used to store computer programs and/or modules, and the processor 601 implements various functions of the computer device by running or executing the computer programs and/or modules stored in the memory 602 and invoking data stored in the memory 602. The memory 602 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, application programs required for at least one function, and the like; the storage data area may store data created according to the use of the processing device, or the like. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (FlashCard), at least one disk storage device, flash memory device, or other volatile solid state memory device.
The processor 601 is configured to execute the computer program stored in the memory 602, and may specifically implement the following functions:
adding description information of a dp shared segment after linking the srdata of the script, wherein the data segment is marked with a start address by the dp shared start and an end address by the dp shared end;
after linking the ss section of the script data section, adding description information of the dp_shared section;
application programming is described in __ attribute __ for global variables that need to be shared;
in the process of compiling codes, the global variable to be shared which is described is put into a dp_shared section when in linkage, and an executable program dplane is compiled;
when an executable program dplane runs on a multi-CORE CPU, main functions acquire the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information;
and calculating the size of the dp_shared segment according to the starting address and the ending address, finishing mmap mapping, and finishing data sharing among the process data under the multi-core.
It will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the device for sharing data between process data under multiple cores, the processing device and the corresponding units thereof described above may refer to the description of the method for sharing data between process data under multiple cores in the corresponding embodiment of fig. 1, and are not repeated herein.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the various methods of the above embodiments may be performed by instructions, or by instructions controlling associated hardware, which may be stored in a computer-readable storage medium and loaded and executed by a processor.
For this reason, the present application provides a computer readable storage medium, in which a plurality of instructions capable of being loaded by a processor are stored, so as to execute the steps of the method for sharing data between process data under multiple cores in the corresponding embodiment of fig. 1, and specific operations may refer to the description of the method for sharing data between process data under multiple cores in the corresponding embodiment of fig. 1, which is not repeated herein.
Wherein the computer-readable storage medium may comprise: read Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
Because the instructions stored in the computer readable storage medium may execute the steps of the method for sharing data between multiple cores in the embodiment of fig. 1, the method for sharing data between multiple cores in the embodiment of fig. 1 may achieve the beneficial effects of the method for sharing data between multiple cores in the embodiment of fig. 1, which are described in detail in the foregoing descriptions and are not repeated herein.
The foregoing has described in detail the methods, apparatus, processing devices and computer readable storage medium for sharing data among process data under multiple cores provided by the present application, and specific examples have been applied herein to illustrate the principles and embodiments of the present application, and the above description of the embodiments is only for helping to understand the methods and core ideas of the present application; meanwhile, those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, and the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A method for sharing data among process data under multiple cores, the method comprising:
adding description information of a dp shared segment after linking the srdata of the script, wherein the data segment is marked with a start address by the dp shared start and an end address by the dp shared end;
adding the description information of the dp_shared segment after the bypass segment of the data segment of the link script;
application programming is described in __ attribute __ for global variables that need to be shared;
in the process of compiling codes, the global variable to be shared described is put into the dp_shared section during the link, and an executable program dplane is compiled;
when the executable program dplane runs on the multi-CORE CPU, main functions acquire the CPU CORE number, NUMA node number, MASK value RUNNING_CORE_MASK of the allowed RUNNING CORE and HuagePage memory information;
and calculating the size of the dp_shared segment according to the starting address and the ending address, completing mmap mapping, and completing data sharing among the processes under the multi-core.
2. The method according to claim 1, wherein the method further comprises:
the Master CORE process completes the fork of the Slave CORE process of 1-n-1 according to the CPU CORE number, the NUMA node number and the MASK value RUNNIG_CORE_MASK of the allowed operation CORE;
the Slave core process completes nucleophilic setting and initialization work of global data related to the Slave core itself;
and the Master core and the Slave core synchronously wait for other cores for and finish initialization.
3. The method according to claim 2, wherein the method further comprises:
for abnormal and normal exit of the process of the Slave core process, the Master core process monitors and performs abnormal processing, and the Slave core process is pulled up again, or the resource allocated by the Slave is released after the Master core process exits;
and for the Master core process to exit, synchronously releasing the resources allocated by all the processes and then exiting.
4. The method according to claim 1, wherein the method further comprises:
according to the HuagePage memory information, management and initialization of the GLOBAL_HEAP, the MEMPOOL and hardware resources are completed;
the Slave core process completes the binding of the resources such as the GLOBAL_HEAP, the MEMPOOL, the interface and the like;
the Master core process and the Slave core process complete the distribution and initialization of related data according to the distribution and release functions of the GLOBAL_HEAP package;
after the initialization stage is finished, the Master core process and the Slave core process enter service processing functions, and the allocation of the shared HEAP memory are completed according to the allocation release function packaged by the GLOBAL_HEAP
Releasing.
5. The method according to claim 4, wherein the method further comprises:
and after the dp_shared segment mapping is finished, the reading and the modification of the global data value are finished.
6. The method of claim 1, wherein the. Dp_shared segment description information added after the. Srdata of the. Dat segment of the link script maintains 64K alignment.
7. The method of claim 1, wherein the. Dp_shared segment descriptive information added after the. Bss segment of the link script. Data segment maintains 32M alignment.
8. An apparatus for sharing data among process data under a plurality of cores, the apparatus comprising:
the first adding unit is used for adding description information of the dp_shared segment after linking the srdata of the script, wherein the data segment is marked with a starting address by the dp_shared_start and an ending address by the dp_shared_end;
the second adding unit is used for adding the description information of the dp_shared segment after the bypass segment of the data segment of the link script;
a description unit, for the application programming, describing the global variable to be shared by __ attribute __;
the compiling unit is used for placing the described global variable to be shared into the dp_shared section during the process of compiling codes and compiling an executable program dplane;
the acquiring unit is used for acquiring the CPU CORE number, the NUMA node number, the MASK value RUNNING_CORE_MASK of the allowed operation CORE and the HuagePage memory information by the main function when the executable program dplane runs on the multi-CORE CPU;
and the mapping unit is used for calculating the size of the dp_shared section according to the starting address and the ending address, finishing mmap mapping and finishing data sharing among the process data under the multi-core.
9. A processing device comprising a processor and a memory, the memory having stored therein a computer program, the processor executing the method of any of claims 1 to 7 when invoking the computer program in the memory.
10. A computer readable storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the method of any one of claims 1 to 7.
CN202211602598.2A 2022-12-13 2022-12-13 Method and device for sharing data among process data under multiple cores and processing equipment Pending CN116010120A (en)

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