CN115988913A - Display panel and display device - Google Patents

Abstract

The embodiment of the invention discloses a display panel and a display device, wherein the display panel comprises an optical identification area; a transistor located in the optical recognition area and a light emitting element electrically connected to the transistor; and the light ray adjusting structure is positioned in the optical identification area and is positioned between the transistor and the light-emitting element along the thickness direction of the display panel. Adopt the technical scheme that this embodiment provided, through set up light adjustment structure between transistor and light emitting component, can shelter from the partial light that light emitting component sent in the optical identification district, reduce light and incide to the transistor, guarantee the job stabilization nature of transistor, avoid showing the unbalanced condition in the optical identification district to guarantee the holistic display effect of display panel.

Description

Display panel and display device

Technical Field

The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.

Background

With the development of display technology, full-screen occupies almost a large percentage of the consumer market and is a hot topic in the development direction. Taking a mobile phone as an example, a smart phone is more and more widely used and has more and more functions, and has become a necessary electronic device for people's daily life.

Although the full-screen product has many advantages, with the increase of the screen display area, many problems are brought to the design of the mobile phone, for example, the problem of poor display effect of the optical identification area of the full-screen,

Disclosure of Invention

The embodiment of the invention provides a display panel and a display device, wherein a light ray adjusting structure is arranged between a transistor and a light emitting element in an optical identification area, so that the condition of display imbalance in the optical identification area is avoided, and the integral display effect of the display panel is ensured.

In a first aspect, an embodiment of the present invention provides a display panel, including an optical identification area;

a transistor located in the optical recognition region and a light emitting element electrically connected to the transistor;

and the light ray adjusting structure is positioned in the optical identification area and is positioned between the transistor and the light-emitting element along the thickness direction of the display panel.

In a second aspect, the present invention provides a display device including the display panel of the first aspect.

According to the display panel provided by the embodiment of the invention, the display panel comprises the optical identification area, and the light ray adjusting structure exists in the optical identification area. The light adjustment structure is located in the optical identification area, the thickness direction of the display panel is along, the light adjustment structure is located between the transistor and the light-emitting element, the light adjustment structure is arranged between the transistor and the light-emitting element, partial light emitted by the light-emitting element in the optical identification area can be shielded, light is reduced to be incident to the transistor, the working stability of the transistor is guaranteed, the phenomenon that display is unbalanced in the optical identification area is avoided, and the integral display effect of the display panel is guaranteed.

Drawings

In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 2 is a schematic view of a cross-sectional structure taken along direction AA' in FIG. 1;

fig. 3 is a schematic circuit structure diagram of a driving circuit according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another driving circuit provided in the embodiment of the present invention;

fig. 7 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention;

FIG. 8 is an enlarged schematic view of region B of FIG. 2;

FIG. 9 is another enlarged schematic view of region B of FIG. 2;

FIG. 10 is another enlarged schematic view of region B of FIG. 2;

FIG. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

FIG. 12 is a schematic cross-sectional view taken along the direction CC' of FIG. 1;

fig. 13 is a schematic structural diagram of another driving circuit provided in the embodiment of the present invention;

fig. 14 is a schematic circuit diagram of another driving circuit according to an embodiment of the present invention;

fig. 15 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings, not all of them.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a system, article, or apparatus that comprises a list of elements is not necessarily limited to those steps or elements explicitly listed, but may include other elements not expressly listed or inherent to such product or apparatus.

The conventional display panel comprises an optical identification area, a transistor positioned in the optical identification area and a light-emitting element electrically connected with the transistor, and normal display of the optical identification area is realized by arranging the light-emitting element and the transistor electrically connected with the light-emitting element in the optical identification area, so that the comprehensive display effect of the display panel is realized. However, when the optical recognition area obtains light, a part of light emitted by the light emitting element in the optical recognition area is transmitted to the transistor, and the incidence of the light to the transistor affects the stability of the transistor, for example, the stability of a transfer characteristic curve, and the like, which causes display imbalance in the optical recognition area, and further affects the overall display effect of the display panel.

In order to solve the above problems, an embodiment of the present invention discloses a display panel and a display device, the display panel includes an optical identification area; a transistor located in the optical recognition area and a light emitting element electrically connected to the transistor; and the light ray adjusting structure is positioned in the optical identification area and is positioned between the transistor and the light-emitting element along the thickness direction of the display panel. Adopt the technical scheme that this embodiment provided, through set up light adjustment structure between transistor and light emitting component, can shelter from the partial light of light emitting component reflection in the optical identification district, reduce light and incide to the transistor, guarantee the job stabilization nature of transistor, avoid showing the unbalanced condition in the optical identification district to guarantee the holistic display effect of display panel.

The above is the core idea of the present invention, and the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. All other embodiments, which can be obtained by a person skilled in the art based on the embodiments of the present invention without any creative work, belong to the protection scope of the present invention.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, fig. 2 is a schematic structural diagram of a cross section along an AA' direction in fig. 1, fig. 3 is a schematic circuit structural diagram of a driving circuit according to an embodiment of the present invention, fig. 4 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention, referring to fig. 1 to 4, a display panel 10 according to an embodiment of the present invention is provided, and the display panel 10 includes an optical identification area 100; a transistor 200 located in the optical recognition area 100 and a light emitting element 300 electrically connected to the transistor 200; the light adjusting structure 400 is located in the optical identification area 100, and the light adjusting structure 400 is located between the transistor 200 and the light emitting device 300 along the thickness direction of the display panel 10.

Wherein, display panel 10 includes optical identification district 100, and optical identification district 100 can acquire external light and carry out optical identification based on the light that acquires, for example fingerprint identification or optical imaging, guarantees that display module assembly possesses the optical identification function. Further, referring to fig. 2, the display panel 10 further includes a plurality of light emitting elements 300, and the light emitting elements 300 are driven by a driving circuit (not specifically shown) to emit light, so as to achieve the display effect of the display panel 10. The light emitting element 300 and the driving circuit are also present in the optical recognition area 100, so that the display effect of the display panel 10 can be realized in the optical recognition area 100, and the full-screen display effect of the display panel can be realized.

Specifically, the driving circuit may include at least one transistor 200, and the specific implementation of the driving circuit may be set by a person skilled in the art according to practical situations, and is not limited herein, and the driving circuit includes "7T1C", "2T1C", and the like, where "T" denotes a transistor, and "C" denotes a capacitor. Illustratively, referring to fig. 3 and 4, the transistor 200 includes a first light emission controlling transistor T1, a data writing transistor T2, a driving transistor T3, a threshold compensating transistor T4, an initializing transistor T5, a second light emission controlling transistor T6, and a reset transistor T7. In fig. 3 and 4, a set of driving circuits is taken as an example, the first Scan signal line Scan1 controls the initialization transistor T5 of the driving circuit to be turned on or off, and resets the gate potential of the driving transistor T3 when the initialization transistor T5 is turned on. The second Scan signal line Scan2 controls on and off of the data writing transistor T2 and the threshold compensating transistor T4 of the driving circuit, and writes the data signal on the data signal line Vdata to the gate of the driving transistor T3 and compensates for the threshold voltage of the driving transistor T3 when the data writing transistor T2 and the threshold compensating transistor T4 are turned on. In some alternative driving circuit designs, the Scan signal Scan2 can also be multiplexed to control the on/off of the reset transistor T7 of the driving circuit, and when the reset transistor T7 is turned on, the anode potential of the light emitting element 300 is reset, and at this time, it is not necessary to separately provide a Scan signal line for the reset transistor T7. In other words, the first Scan signal line Scan1 may be understood as a Scan signal line connected to the control terminal of the initialization transistor T5 in the driving circuit, and the second Scan signal line Scan2 may be understood as a Scan signal line connected to the control terminal of the data writing transistor T2, the control terminal of the threshold compensation transistor T4, and the control terminal of the reset transistor T7 in the driving circuit. Generally, at least a first Scan signal line Scan1 and a second Scan signal line Scan2 are connected to each row driver circuit for display. The power supply signal line PVDD is used to supply a power supply voltage to the driving transistor T3, and the voltage on the power supply signal line PVDD may be a positive voltage. The voltage on the common power signal terminal PVEE may be a negative voltage. The reference signal line Vref is used to provide a reset voltage signal, and the voltage on the reference signal line Vref may be a negative voltage. And the reference signal line Vref includes a first reference signal line Vref1 and a second reference signal line Vref2 extending in the row direction and parallel to each other, a reference signal in the first reference signal line Vref1 is written in the initialization transistor T5 to realize initialization of the driving transistor T3, and a reference signal in the second reference signal line Vref2 is written in the reset transistor T7 to realize initialization of the anode of the light emitting element 300. In other alternative embodiments, each transistor 200 in the driving circuit may be an N-type transistor, or a part of the transistor may be a P-type transistor, and a part of the transistor may be an N-type transistor. Different enable levels may be provided according to different types of transistors, the enable levels being levels that enable the transistors to conduct. For example, the enable level is high for an N-type transistor and low for a P-type transistor.

For example, referring to fig. 2, the setting position of one of the transistors 200, i.e., the driving transistor T3, is taken as an example in the figure, and is only used for showing the relative position relationship of the structures in the display panel 10, and all the transistors 200 in the driving circuit are not shown one by one. Furthermore, the driving circuit includes a plurality of stacked insulating layers, metal layers and metal traces, such as the buffer layer 210, the gate insulating layer 220, the active layer 230, the inter-metal insulating layer 240, the gate layer 250, the capacitor plate layer 260, the interlayer insulating layer 270, the source/drain layer 280, the insulating layer 290, and the like. Specifically, the specific implementation of the film layers in the display panel 10 can be set by those skilled in the art according to practical situations, and is not limited specifically.

Further, the display panel 10 according to the embodiment of the invention further includes a light adjusting structure 400, and the light adjusting structure 400 is disposed between the light emitting element 300 and the transistor 200 in the optical identification area 100 along the thickness direction of the display panel 10. The thickness direction of the display panel 10 can be understood as the light-emitting side of the display panel 10 pointing to the non-light-emitting side of the display panel 10; alternatively, the thickness direction of the display panel 10 may be understood as the thickness direction of the substrate in the display panel 10; still alternatively, the thickness direction of the display panel 10 may be understood as a vertical light-emitting direction of an incomplete display area in the display panel 10; still alternatively, the thickness direction of the display panel 10 may be understood as a vertical light emitting direction of a maximum display area in the display panel 10.

It should be noted that, in the embodiment of the present invention, the directions of the thickness of the display panel all refer to the same direction, and the description of the thickness direction of the display panel may be referred to herein without further description.

Specifically, referring to fig. 2 and 4, at the position of the optical identification area 100, the light adjustment structure 400 is disposed between the light emitting device 300 and the transistor 200, taking the driving transistor T3 as an example for illustration, and it should be noted that the light adjustment structure 400 may also be disposed between other transistors 200 and the light emitting device 300, which is not described again. The light adjusting structure 400 may be made of an opaque material, and a transmission path of the light transmitted to the light adjusting structure 400 may be changed to effectively prevent the light of the light emitting device 300 from being transmitted to the transistor 200. The light adjustment structure 400 is arranged to ensure stability of the transistor 200 based on the occurrence of light leakage caused by illumination of the transistor 200, and further influence the display balance of the optical identification area 100.

It should be noted that the light transmitted to the light adjusting structure 400 may be a light directly emitted by the light emitting element 300 and propagating downwards, for example, the anode of the light emitting element 300 is a transparent electrode or a semitransparent electrode; or the light emitted from the light emitting device 300 and propagating upward is reflected to the light adjusting structure 400 by other light reflecting structures, such as a light reflecting structure like a touch electrode. The embodiment of the invention does not limit the emission form of the light transmitted to the light adjustment structure 400, and the light adjustment structure 400 is arranged between the film layer where the light emitting element is located and the film layer where the transistor is located, so that the propagation path of the light incident thereon is adjusted through the light adjustment result 400, the light irradiated to the transistor 200 is reduced or eliminated, the conditions of light leakage current and the like generated by the transistor are avoided, and the stability of the transistor 200 and the display balance of the optical identification area 100 are ensured.

In summary, according to the display panel provided by the embodiment of the invention, the light adjustment structure is arranged between the transistor and the light emitting element, so that part of light emitted by the light emitting element in the optical identification area can be shielded, the incidence of light to the transistor is reduced, the working stability of the transistor is ensured, the condition of unbalanced display in the optical identification area is avoided, and the integral display effect of the display panel is ensured.

With continued reference to fig. 2 and 4, the light adjusting structure 400 at least partially overlaps the transistor 200 along the thickness direction of the display panel 10.

Further, referring to fig. 2 and 4, the light-adjusting structure 400 disposed in the optical identification area 100 at least partially overlaps the transistor 200 and does not extend to other positions of the optical identification area 100. Under the circumstances of guaranteeing transistor 200 steady operation through setting up light regulation structure 400 promptly, still will avoid light regulation structure 400 to shelter from the required light in optical identification district 100 (for example fingerprint identification light or formation of image light), guarantee the luminousness in optical identification district 100 to when guaranteeing the stable display function in optical identification district 100, still guarantee that optical identification district 100 acquires the stability of external light. For example, if the optical identification area 100 is a fingerprint identification area, the light ray adjusting structure 400 is arranged to ensure the display effect of the fingerprint identification area, so as to ensure that the display of the whole display panel 10 is balanced, and meanwhile, to avoid the light ray adjusting structure 400 from shielding the fingerprint identification light ray when obtaining the fingerprint identification light ray, and ensure the fingerprint identification effect of the fingerprint identification area, it should be noted that, here, only the optical identification area 100 is taken as the fingerprint identification area for example, and the specific function of the optical identification area 100 is not specifically limited in the embodiments of the present invention.

Fig. 5 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention, and referring to fig. 3 and 5, the transistor 200 includes an initialization transistor T5 and a threshold compensation transistor T4; the light ray adjustment structure 400 at least partially overlaps the channel of the initialization transistor T5 and/or the threshold compensation transistor T4 in the thickness direction of the display panel 10.

Here, referring to fig. 3 and 5, the second pole of the threshold compensation transistor T4 and the second pole of the initialization transistor T5 intersect at the first node N1, and the first node N1 is electrically connected to the control terminal of the driving transistor T3. Further, along the thickness direction of the display panel 10, the light adjustment structure 400 provided by the embodiment of the present invention is at least partially overlapped with the channel of the initialization transistor T5 and/or the threshold compensation transistor T4, so as to prevent the light emitted by the light emitting element from being incident on the channel of the initialization transistor T5 and/or the threshold compensation transistor T4, prevent the initialization transistor T5 and/or the threshold compensation transistor T4 from generating light leakage current, ensure that the first node N1 and the driving transistor T3 are not affected, further ensure the light emitting driving effect of the driving circuit on the light emitting element 200, and thus achieve display uniformity of the display panel 10. For example, referring to fig. 5, two light adjustment structures 400 are used to block the channels of the initialization transistor T5 and the threshold compensation transistor T4, respectively, so as to ensure the stability of the initialization transistor T5 and the threshold compensation transistor T4. Meanwhile, the light adjustment structure 400 may also only block the channel of the initialization transistor T5 or the threshold compensation transistor T4, which is not limited in this embodiment of the present invention. It should be noted that, the initialization transistor T5 and the threshold compensation transistor T4 mentioned in fig. 3 and fig. 5 are double-gate transistors, and taking one double-gate transistor as an example, the light ray adjustment structure may shield both channels corresponding to two gates, or shield only one channel corresponding to one gate, which is not specifically limited in the embodiment of the present invention.

Fig. 6 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention, and referring to fig. 3 and fig. 6, the transistor 200 includes a driving transistor T3 and a threshold compensation transistor T4, a gate of the driving transistor T3 is electrically connected to a first pole of the threshold compensation transistor T4 through a first node N1; the light ray adjustment structure 400 overlaps at least one of the first node N1 and the light emitting element 300 in a thickness direction of the display panel 10.

As shown in fig. 3 and 6, the gate of the driving transistor T3, i.e., the control terminal of the driving transistor T3, and the first pole of the threshold compensation transistor T4 are electrically connected through a first node N1. Further, along the thickness direction of the display panel 10, the light adjusting structure 400 provided in the embodiment of the present invention overlaps at least one of the first node N1 and the light emitting element 300, and based on the difference between the potentials of the light emitting element 300 and the first node N1, the light adjusting structure 400 can be used as a shielding layer between the light emitting element 300 and the first node N1, so as to prevent the potential of the anode in the light emitting element 300 from interfering with the potential of the first node N1, further prevent the fluctuation of the potential of the first node N1 from affecting the stability of the driving transistor T3, ensure the display stability of the optical identification area 100, and achieve the overall display balance of the display panel 10.

Fig. 7 is a schematic structural diagram of another driving circuit provided in an embodiment of the present invention, and with continued reference to fig. 3, 4 and 7, the transistor 200 includes a driving transistor T3; the display panel 10 further includes a storage capacitor Cst, a first capacitor plate of the storage capacitor Cst being electrically connected to the gate electrode of the driving transistor T3; the light ray adjustment structure 400 and the storage capacitor Cst at least partially overlap along a thickness direction of the display panel 10.

As shown in fig. 3, 4 and 7, the first capacitor plate of the storage capacitor Cst in the transistor 200 is electrically connected to the gate of the driving transistor T3, or the gate of the driving transistor T3 may be multiplexed with the first capacitor plate of the storage capacitor Cst, which is not limited in the embodiment of the present invention. Along the thickness direction of the display panel 10, the light adjustment structure 400 provided by the embodiment of the invention is at least partially overlapped with the storage capacitor Cst, so that the light transmittance of the optical identification area 100 is not affected, and the optical identification area 100 can acquire external light. Meanwhile, based on the larger area of the storage capacitor Cst, the arrangement of the light adjustment structure 400 and the storage capacitor Cst in at least partial overlapping can ensure that the degree of freedom of the arrangement of the light adjustment structure 400 is larger, reduce the requirement of the alignment precision of the light adjustment structure 400 and the storage capacitor Cst, i.e., the area and the formation of the arrangement are more flexible, and the process cost for preparing the light adjustment structure 400 is lower.

Illustratively, fig. 7 includes a plurality of light adjustment structures 400, and along the thickness direction of the display panel 10, there are at least partial overlaps of the light adjustment structures 400 with the channels of the initialization transistor T5 and the threshold compensation transistor T4, respectively, there are at least partial overlaps of the light adjustment structures 400 with the first node N1, and there are at least partial overlaps of the light adjustment structures 400 with the storage capacitor Cst. Fig. 7 illustrates an example of overlapping of a plurality of light adjustment structures 400 and the transistor 200, but the relative arrangement position relationship between the specific light adjustment structures 400 and the transistor 200 is not illustrated.

It should be noted that the display panel provided in the embodiment of the present invention includes a plurality of light emitting elements and a plurality of driving circuits, and the light adjusting structures between different light emitting elements and driving circuits may have the same or different corresponding relationships with the driving circuits. In other words, the light adjustment structures corresponding to different driving circuits, that is, the light adjustment structures disposed on the side of the different driving circuits away from the substrate, may have the same or different corresponding relationship with the driving circuits, or the overlapping relationship of the projection. For example, the light adjustment structures corresponding to different driving circuits can be set differently according to the light emitting colors of the light emitting elements driven by the driving circuits, so that the light emitting effects of different light emitting elements can be adjusted through the differential setting of the light adjustment structures, and the display effect of the display panel is ensured. For another example, the light adjustment structures corresponding to different driving circuits can be set differently according to the light emitting areas of the light emitting elements driven by the driving circuits, so that the light emitting effects of different light emitting elements can be adjusted through the differential setting of the light adjustment structures, and the display effect of the display panel can be ensured. Or, according to other display requirements, the light adjustment structures corresponding to different driving circuits can be differentiated to meet different display requirements, and different display requirements of the display panel can be met.

Fig. 8 is an enlarged schematic view of the area B in fig. 2, and referring to fig. 2 and 8, the display panel 10 further includes a first insulating layer 500 and a second insulating layer 520 located in the optical identification area 100, the light ray adjustment structure 400 is located on a side of the first insulating layer 500 away from the substrate 510, the light ray adjustment structure 400 is in contact with the first insulating layer 500, and the second insulating layer 520 is located on a side of the light ray adjustment structure 400 away from the substrate 510; the refractive index of the second insulating layer 520 is greater than that of the first insulating layer 500.

As shown in fig. 2, the display panel 10 further includes a substrate 510, and the optical identification area 100, the transistor 200, the light emitting element 300, and the like are located on one side of the substrate 510. Further, referring to fig. 2 and fig. 8, the display panel 10 further includes a first insulating layer 500 and a second insulating layer 520, at the optical identification area 100, the light adjustment structure 400 is located on a side of the first insulating layer 500 away from the substrate 510, the light adjustment structure 400 is in contact with the first insulating layer 500, and the second insulating layer 520 is located on a side of the light adjustment structure 400 away from the substrate 510, that is, the second insulating layer 520 is used to cover the light adjustment structure 400.

Specifically, when the light is transmitted to the light adjusting structure 400, the light is reflected (for example, the light a1 in fig. 8) and is not transmitted to the bottom of the light adjusting structure 400. When light is transmitted to the first insulating layer 500 and the second insulating layer 520, the refractive index of the second insulating layer 520 is greater than the refractive index of the first insulating layer 500 due to the difference between the refractive index of the first insulating layer 500 and the refractive index of the second insulating layer 520. The light is originally transmitted to the first insulating layer 500 through the second insulating layer 520, but the total reflection does not affect the transistor 200 through the first insulating layer 500, which is equivalent to the total reflection (for example, the light a2 in fig. 8) occurring when the light is transmitted from the optically dense medium to the optically sparse medium, thereby ensuring the stability of the transistor 200, the display stability of the optical identification region 100, and the overall display balance of the display panel 10. For example, the specific refractive index parameters of the second insulating layer 520 and the first insulating layer 500 are adjusted based on the material, and the embodiment of the invention does not specifically limit the value of the refractive index.

Fig. 9 is another enlarged schematic view of a region B in fig. 2, and fig. 10 is another enlarged schematic view of a region B in fig. 2, and referring to fig. 2, 8 to 10, a light-emitting element 300 includes an anode 310 and a cathode 330 located on a side of the anode 310 away from a substrate 510; along the thickness direction of the display panel 10, the orthographic projection of the cathode 330 on the substrate 510 at least partially overlaps with the orthographic projection of the light adjusting structure 400 on the substrate 510; along a first direction X, the length of the light ray adjustment structure 400 satisfies a preset threshold, and the first direction X is perpendicular to the thickness direction of the display panel 10; and at least a portion of the light is reflected at the surface of the light-regulating structure 400 and the surface of the cathode 330; and/or at least some of the light is reflected at the surface of the light-adjusting structure 400 and the surface of the anode 310. Specifically, referring to fig. 2, 9 and 10, the light emitting element 300 includes an anode 310, a light emitting layer 320 and a cathode 330, wherein the light emitting layer 320 may include a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and the like, and the embodiment of the present invention does not limit specific film layers of the light emitting layer 320. And the light emitting layer 320 is further from the substrate 510 side than the anode 310.

Further, an orthographic projection of the cathode 330 on the substrate 510 at least partially overlaps an orthographic projection of the light adjusting structure 400 on the substrate 510, as shown with reference to fig. 9 and 10. The length of light adjustment structure 400 along first direction X satisfies preset threshold value, and the length of the light adjustment structure 400 who sets up promptly can satisfy the regulation to light, and then guarantees that light can not transmit to transistor department, guarantees the stable working effect of transistor. The preset threshold of the length of the light adjustment structure 400 is not specifically limited in the embodiment of the present invention.

Further, referring to fig. 9, in the case that the orthographic projection of the light adjusting structure 400 on the substrate 510 and the orthographic projection of the anode 310 on the substrate 510 are partially overlapped, the light can be reflected multiple times between the light adjusting structure 400 and the cathode 330 and between the light adjusting structure 400 and the anode 310, so as to prevent the light from being transmitted to the transistor. Referring to fig. 10, the orthographic projection of the light adjusting structure 400 on the substrate 510 only overlaps with the orthographic projection of the cathode 330 on the substrate 510, so that the light can be reflected multiple times between the light adjusting structure 400 and the cathode 330, and the light is prevented from being transmitted to the transistor.

Generally speaking, by adjusting the position relationship between the light adjusting structure 400 and the cathode 330 and the anode 310 along the thickness direction of the display panel 10, light can be transmitted between the cathode 330 and the light adjusting structure 400 many times, similar to forming a microcavity, thereby ensuring the display stability of the optical identification region 100 and realizing the overall display balance of the display panel 10. Meanwhile, the light rays that are continuously and totally reflected between the light ray adjusting structure 400 and the cathode 330 and/or the anode 310 are almost attenuated and dissipated by seven or more reflections, so that the light rays are further ensured not to influence the transistor 200, and the display effect of the display panel 10 is ensured to be balanced.

With continued reference to fig. 2 to 7, the light adjusting structure 400 is electrically connected to the preset-potential signal terminal.

Specifically, the light adjustment structure 400 can be electrically connected to a preset potential signal terminal, so that a fixed potential is transmitted in the light adjustment structure 400, and interference of floating of the potential of the light adjustment structure 400 on other structures is avoided.

Further, in order to prevent the light adjustment structure 400 from sensing other signals when the light adjustment structure 400 is in a floating configuration to affect normal transmission of other signals, the light adjustment structure 400 may be subjected to potential adjustment, for example, the light adjustment structure 400 is electrically connected to a preset potential terminal, so that on one hand, a preset potential signal is transmitted on the light adjustment structure 400, and the potential is not affected by other signals, and interference to other signals is not caused; on the other hand, when the light adjusting structure 400 is electrically connected to the preset potential end, the resistance loss during signal transmission process of the preset signal end routing can be reduced, and the overall signal transmission effect of the display panel 10 is improved.

It should be noted that, in the embodiment of the present invention, the setting position of the preset potential end is not specifically limited, for example, the preset potential end may be a positive voltage signal or a negative voltage signal.

Further, the light emitting elements 300 include a first color light emitting element, a second color light emitting element, and a third color light emitting element; the transistor 200 includes a first transistor connected to the first color light emitting element, a second transistor connected to the second color light emitting element, and a third transistor connected to the third color light emitting element; the light adjustment structure 400 includes a first light adjustment structure disposed between the first color light emitting device and the first transistor along the thickness direction of the display panel 10, a second light adjustment structure disposed between the second color light emitting device and the second transistor, and a third light adjustment structure disposed between the third color light emitting device and the third transistor; the relative position relationship between the first light adjusting structure and the first transistor, the relative position relationship between the second light adjusting structure and the two transistors, and the relative position relationship between the third light adjusting structure and the three transistors are the same.

Here, to ensure the color display effect of the display panel 10, the light emitting elements 300 include a first color light emitting element, a second color light emitting element, and a third color light emitting element, wherein different colors may be a red light emitting element, a green light emitting element, and a blue light emitting element. Further, the transistors 200 connected to the light emitting elements 300 include corresponding transistors 200, and for example, the transistor 200 connected to the first color light emitting element is a first transistor, the transistor 200 connected to the second color light emitting element is a second transistor, and the transistor 200 connected to the third color light emitting element is a third transistor.

Further, the light adjusting structure 400 is disposed between the light emitting device 300 and the transistor 200, and the light adjusting structure 400 can ensure that the transistor 200 does not generate light leakage due to illumination, and the stability of the transistor 200 is ensured, thereby affecting the display balance of the optical identification area 100. Further, the relative positional relationship among the second color light emitting element, the second transistor, and the second light adjustment structure is also identical to the relative positional relationship among the first color light emitting element, the first transistor, and the first light adjustment structure, and the relative positional relationship among the third color light emitting element, the third transistor, and the third light adjustment structure is also identical to the relative positional relationship among the first color light emitting element, the first transistor, and the first light adjustment structure. In the optical identification area 100, the positional relationship between the transistor 200, the light emitting device 300 and the light adjusting structure 400 is the same, and is not affected by the light emitting devices 200 with different colors, so that the normal display of white light in the optical identification area 100 is ensured, and the overall display effect of the display panel 10 is ensured.

Fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention, fig. 12 is a schematic structural diagram of a cross section along a direction CC' in fig. 1, fig. 13 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention, referring to fig. 11 to 13, the display panel 10 further includes a plurality of data lines Vdata, a plurality of connecting traces 110 and a plurality of fan-out traces 120, and the transistor 200 is electrically connected to at least one data line Vdata; the connecting line 120 is connected in series between the data line Vdata and the fan-out line 120; the data line Vdata and the connecting line 110 are located in the display area 100A, and the fan-out line 120 is located in the non-display area 100B; the light adjusting structure 400 is disposed on the same layer as at least a portion of the connecting trace 110.

Referring to fig. 11, the display panel 10 includes a plurality of data lines Vdata and connecting lines 120 in the display area 100A, and a plurality of fan-out lines 120 in the non-display area 100B, where the data lines Vdata are electrically connected to the transistors 200, specifically, the data lines Vdata and the data writing transistors T2. Further, two data lines Vdata may be connected to each driving circuit in the display panel 10, which is not limited in the embodiment of the present invention. Fig. 11 only shows some traces, and the number of the data lines Vdata, the connection traces 120, and the fan-out traces 120 is not specifically limited in the embodiment of the present invention. The data line Vdata and the fan-out wiring 120 are electrically connected through the connection wiring 120, so that normal transmission of data signals is guaranteed. Further, by arranging the connecting wires 120, the area of the non-display area 100B of the display panel 10 can be reduced, that is, the ratio of the display area 100A in the display panel 10 is increased, and the connecting wires 120 are arranged in the display area 100A, thereby effectively ensuring the narrow-frame effect of the display panel 10.

Further, referring to fig. 12 and 13, the light adjustment structure 400 may be disposed on the same layer as at least a portion of the connecting trace 110, so as to reduce the occupied space of the light adjustment structure 400, and facilitate the thin-type display panel 10. Further, the connection trace 110 extending along the direction pointing to the non-display area 100B from the display area 100A and the connection trace 110 perpendicular to the direction pointing to the non-display area 100B from the display area 100A may be disposed on different layers or on the same layer, and the light adjustment structure 400 may be disposed on the same layer as any layer thereof. It should be noted that fig. 12 only shows the relative position relationship between the light ray adjusting structure 400 and the connection trace 110. For example, referring to fig. 13, the connection trace 110 extending along the direction from the display area 100A to the non-display area 100B is disposed on the same layer as the light adjustment structure 400.

As shown in fig. 11, the display panel 10 further includes a dummy trace 111, where the dummy trace 111 and the connection trace 110 are disposed on the same layer and insulated from each other; the connecting trace 110 includes a first trace subsection 110A and a second trace subsection 110B, which extend in intersecting directions, and the first trace subsection 110A and the second trace subsection 110B are electrically connected; the virtual trace 111 includes a first virtual branch 111A and a second virtual branch 111B, which extend in intersecting directions, and the first virtual branch 111A and the second virtual branch 111B are electrically connected; the first trace branch 110A and the first dummy branch 111A extend in the same direction, and the second trace branch 110B and the second dummy branch 111B extend in the same direction.

Referring to fig. 11, the display panel 10 further includes a dummy trace 111, and the dummy trace 111 and the connection trace 110 are disposed on the same layer and are insulated from each other. Referring to fig. 11, based on the relationship that the virtual trace 111 and the connection trace 110 are insulated from each other at the same layer, a gap exists at a position where the virtual trace 111 and the connection trace 110 are relatively close to each other, as shown in a region D in fig. 11, so as to ensure that the virtual trace 111 does not affect normal signal transmission in the display panel 10. By arranging the dummy trace 111, the resistance difference existing in the transmission process of the connection trace 110 can be balanced, and the signal transmission stability of the display panel 10 can be ensured.

Further, can also further compensate the length of connecting line 110 through setting up virtual line 111 of walking, realize connecting through setting up virtual line 111 promptly and walk line 110 and set up the region wiring on the whole balanced, guarantee that different regions walk the density that the line set up balanced, and then avoid setting up the unbalanced light reflectivity who becomes different regions in display panel 10 because of walking the line different, avoid appearing the uneven condition of display panel 10 display effect.

Further, the connection trace 110 includes a first trace subsection 110A and a second trace subsection 110B, and the extending directions of the first trace subsection 110A and the second trace subsection 110B intersect and are electrically connected to each other. Signals transmitted between the fan-out routing 120 and the data line Vdata sequentially pass through the first routing subsection 110A and the second routing subsection 110B. Meanwhile, the virtual trace 111 includes a first virtual branch 111A and a second virtual branch 111B, and the extending directions of the first virtual branch 111A and the second virtual branch 111B intersect and are electrically connected to each other. In order to ensure the regular design of the connection trace 110 and the virtual trace 111 and avoid affecting the display panel 10 from displaying an uneven condition, the extending directions of the first trace branch 110A and the first virtual branch 111A are the same, and the extending directions of the second trace branch 110B and the second virtual branch 111B are the same. For example, referring to fig. 11, the extending direction of the first routing branch 110A and the first virtual branch 111A may be a direction of the display area 100A pointing to the non-display area 100B in the display panel 10, and the extending direction of the second routing branch 110B and the second virtual branch 111B may be a direction perpendicular to the extending direction of the first routing branch 110A, and the extending direction of the routing is not specifically limited in the embodiment of the invention.

Further, the dummy trace 111 is electrically connected to the predetermined potential signal terminal.

Specifically, the virtual trace 111 can be electrically connected to a preset potential signal terminal, so that a fixed potential signal is transmitted in the virtual trace 111, and interference of potential floating of the virtual trace 111 on other structures is avoided.

Further, in order to avoid that other signals are induced to influence normal transmission of other signals when the virtual wire 111 is in a floating arrangement, potential adjustment can be performed on the virtual wire 111, for example, the virtual wire 111 is electrically connected with a preset potential end, so that on one hand, a preset potential signal is transmitted on the virtual wire 111, and the potential is not influenced by other signals and does not cause interference on other signals; on the other hand, when the dummy trace 111 is electrically connected to the end of the preset potential, the resistance loss during signal transmission of the trace providing the preset signal end can be reduced, and the overall signal transmission effect of the display panel 10 can be improved.

Fig. 14 is a schematic circuit diagram of another driving circuit according to an embodiment of the invention, and referring to fig. 14, the predetermined potential signal terminal includes at least one of a positive power signal terminal PVDD, a negative power signal terminal PVEE, an initialization signal terminal Vref, and a reverse bias signal terminal DVH.

Specifically, the types of the preset potential signal terminals electrically connected to the light adjusting structure 400 or the dummy trace 111 are various. Referring to fig. 14, the predetermined potential signal terminal may include a positive power signal terminal PVDD or a negative power signal terminal PVEE; the preset potential signal terminal may also include an initialization signal terminal Vref, i.e., a first reference signal line Vref1 and a second reference signal line Vref2; the preset potential signal terminal may also be a back bias signal terminal DVH, the back bias signal terminal may be a fixed signal, or different fixed signals may be corresponding to different stages in a driving cycle of the pixel circuit, for example, in a data writing stage and a holding stage in a driving cycle, the back bias signal terminal DVH may be two different fixed signals, and a specific setting manner of the back bias signal is not limited in the embodiment of the present invention. The eighth transistor T8 is turned on at the back bias stage of the display panel, and transmits the signal of the back bias signal terminal DVH to the source or the drain of the driving transistor T1, thereby improving the influence caused by transistor hysteresis. Optionally, the back bias signal terminal DVH may be electrically connected to a plurality of pixel circuits, so as to reduce the number of wirings and save the wiring space. Through setting the preset potential signal end to include at least one of the positive power signal end PVDD, the negative power signal end PVEE, the initialization signal end Vref and the reverse bias signal end DVH, on one hand, it is ensured that a fixed potential signal is transmitted in the virtual wiring 111, interference caused by potential floating of the virtual wiring 111 on other structures is avoided, on the other hand, the setting mode of the preset potential signal is matched with the potential signal in the display panel 10, no other preset signal needs to be newly added, and the simple selection mode of the preset potential signal is ensured. Optionally, a plurality of light adjustment structures 400 of the display panel may be electrically connected to each other through a connection line (not shown in the figure), and the connection line may include a portion at least on the same layer as the light adjustment structure 400.

Referring to fig. 4 to 7, the shape of the light ray adjustment structure 400 includes a polygon, and there are at least two light ray adjustment structures 400 having different shapes.

Specifically, referring to fig. 4 to 7, the light adjusting structures 400 blocking the channels of different transistors 200 may have different shapes. Light adjustment structure 400 sets up in the position of difference, and the area that will shelter from the region is different with the shape, then carries out the differentiation setting with light adjustment structure 400's shape, when guaranteeing the stability of transistor 200 work, can also guarantee the higher luminousness in optical identification district 100, guarantees the light identification effect in optical identification district 100. For example, referring to fig. 7, the blocking storage capacitor Csr, the initialization transistor T5, the threshold compensation transistor T4, and the light adjustment structure 400 at the first node N1 have different shapes and sizes. Therefore, the shape and size of the light ray adjusting structure 400 can be adaptively adjusted according to the shape and size to be shielded, which is not specifically limited in the embodiment of the present invention.

Alternatively, considering the manufacturing process of the light ray adjustment structure 400, the shape of the light ray adjustment structure may be a hexagon, such as a regular hexagon, which is matched with the shape of the via hole in the display panel, so as to ensure that the manufacturing process of the light ray adjustment structure is simple.

Based on the same inventive concept, an embodiment of the present invention further provides a display device, fig. 15 is a schematic structural diagram of the display device provided in the embodiment of the present invention, and as shown in fig. 15, the display device 1 includes the display panel 10 described in any of the embodiments above, so that the display device 1 provided in the embodiment of the present invention has the corresponding beneficial effects in the embodiments above, and details are not repeated here. For example, the display device 1 may be an electronic device such as a mobile phone, a computer, a smart wearable device (e.g., a smart watch), and an in-vehicle display device, which is not limited in this embodiment of the present invention.

Optionally, the display device 1 further includes an optical recognition chip 20; the optical recognition chip 20 is disposed to correspond to the optical recognition area 100.

The optical identification chip 20 may be a fingerprint sensor, and the optical identification chip 20 is disposed corresponding to the optical identification area 100, so that the optical identification area 100 serves as a fingerprint identification area, thereby implementing a fingerprint identification function of the display panel 10.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in some detail by the above embodiments, the invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the invention, and the scope of the invention is determined by the scope of the appended claims.

Claims (16)

1. A display panel comprising an optical recognition area;

a transistor located in the optical recognition area and a light emitting element electrically connected to the transistor;

and the light ray adjusting structure is positioned in the optical identification area and is positioned between the transistor and the light-emitting element along the thickness direction of the display panel.

2. The display panel according to claim 1, wherein the light adjusting structure at least partially overlaps the transistor in a thickness direction of the display panel.

3. The display panel according to claim 2, wherein the transistor includes an initialization transistor and a threshold compensation transistor;

the light adjustment structure at least partially overlaps a channel of the initialization transistor and/or a channel of the threshold compensation transistor in a thickness direction of the display panel.

4. The display panel according to claim 2, wherein the transistor includes a driving transistor and a threshold compensation transistor, and a gate of the driving transistor and a first pole of the threshold compensation transistor are electrically connected through a first node;

the light ray adjustment structure overlaps at least one of the first node and the light emitting element in a thickness direction of the display panel.

5. The display panel according to claim 1, wherein the transistor comprises a driving transistor;

the display panel further comprises a storage capacitor, and a first capacitor plate of the storage capacitor is electrically connected with the grid electrode of the driving transistor;

the light ray adjusting structure is at least partially overlapped with the storage capacitor along the thickness direction of the display panel.

6. The display panel according to claim 1, wherein the display panel further comprises a first insulating layer and a second insulating layer in the optical recognition area, the light adjusting structure is located on a side of the first insulating layer away from the substrate, and the light adjusting structure is in contact with the first insulating layer, and the second insulating layer is located on a side of the light adjusting structure away from the substrate;

the refractive index of the second insulating layer is greater than the refractive index of the first insulating layer.

7. The display panel according to claim 6, wherein the light-emitting element comprises an anode and a cathode on a side of the anode away from the substrate;

in the thickness direction of the display panel, the orthographic projection of the cathode on the substrate at least partially overlaps with the orthographic projection of the light ray adjusting structure on the substrate;

along a first direction, the length of the light ray adjusting structure meets a preset threshold value, and the first direction is perpendicular to the thickness direction of the display panel;

and at least part of the light is reflected on the surface of the light adjusting structure and the surface of the cathode; and/or the presence of a gas in the gas,

at least part of the light is reflected at the surface of the light-regulating structure and at the surface of the anode.

8. The display panel according to claim 1, wherein the light adjustment structure is electrically connected to a predetermined potential signal terminal.

9. The display panel according to claim 1, wherein the light-emitting elements include a first color light-emitting element, a second color light-emitting element, and a third color light-emitting element;

the transistors include a first transistor connected to the first color light emitting element, a second transistor connected to the second color light emitting element, and a third transistor connected to the third color light emitting element;

the light adjustment structure comprises a first light adjustment structure arranged between the first color light emitting element and the first transistor along the thickness direction of the display panel, a second light adjustment structure arranged between the second color light emitting element and the second transistor, and a third light adjustment structure arranged between the third color light emitting element and the third transistor;

wherein a relative positional relationship between the first light adjustment structure and the first transistor, a relative positional relationship between the second light adjustment structure and the two transistors, and a relative positional relationship between the third light adjustment structure and the three transistors are the same.

10. The display panel of claim 1, wherein the display panel further comprises a plurality of data lines, a plurality of connection traces, and a plurality of fan-out traces, there being the transistor electrically connected to at least one of the data lines;

the connecting wires are connected in series between the data wires and the fan-out wires; the data lines and the connecting wires are positioned in a display area, and the fan-out wires are positioned in a non-display area;

the light ray adjusting structure and at least part of the connecting routing wire are arranged on the same layer.

11. The display panel according to claim 10, wherein the display panel further comprises dummy traces disposed on the same layer as the connection traces and insulated from each other;

the connecting routing comprises a first routing subsection and a second routing subsection which are intersected in the extending direction, and the first routing subsection is electrically connected with the second routing subsection; the virtual routing comprises a first virtual subsection and a second virtual subsection which extend in intersecting directions, and the first virtual subsection and the second virtual subsection are electrically connected;

the first routing branch and the first virtual branch extend in the same direction, and the second routing branch and the second virtual branch extend in the same direction.

12. The display panel according to claim 11, wherein the dummy trace is electrically connected to a predetermined potential signal terminal.

13. The display panel according to claim 8 or 12, wherein the predetermined potential signal terminal comprises at least one of a positive power supply signal terminal, a negative power supply signal terminal, an initialization signal terminal, and a reverse bias signal terminal.

14. The display panel of claim 1, wherein the shape of the light ray adjustment structures comprises a polygon, and there are at least two of the light ray adjustment structures that are shaped differently.

15. A display device characterized by comprising the display panel according to any one of claims 1 to 14.

16. The display device according to claim 15, wherein the display device further comprises an optical recognition chip;

the optical identification chip is arranged corresponding to the optical identification area.

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