CN115988218B - Virtualized video encoding and decoding system, electronic equipment and storage medium - Google Patents
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Abstract
The present disclosure relates to the field of computers, and discloses a virtualized video coding and decoding system, an electronic device and a storage medium, wherein the system comprises: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2; the virtual machine monitor is used for configuring configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer which is more than or equal to 1 and less than or equal to n; the video encoding and decoding kernel is used for reading configuration information from the ith virtual machine register set and executing the current video encoding and decoding task corresponding to the ith virtual machine based on the configuration information. The embodiment of the disclosure improves the processing performance of the video coding and decoding cores, the video coding and decoding tasks among the virtual machines are not affected, and the data security is effectively improved.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a virtualized video encoding and decoding system, an electronic device, and a storage medium.
Background
Virtualization (Virtualization) is a resource management technology, which abstracts and transforms various physical resources of a computer, such as servers, networks, memories, and storages, and then presents them, so as to break through the unclassifiable barrier between the physical structures, and enable users to apply these resources in a better way than the original configuration. Virtualization is a resource allocation technology from a logical point of view, and is a physical and actual logical abstraction. The general computing model is abstracted into a certain physical resource and a computing element running on the physical resource, and interaction is carried out between the physical resource and the computing element through a defined physical resource interface. The fully virtualized tasks should do nothing beyond it to perceive other tasks and data.
The virtualized video technology is embodied in the way that a plurality of video tasks which do not affect each other are processed simultaneously on the same set of physical resources. As video users, a typical application scenario of the virtualized video technology is that multiple users under the same operating system respectively have their own virtual machines, and the users open different video windows under their own virtual machines to execute the playing tasks of the video windows, where the video tasks among the users of the virtual machines are independent, not perceived and not affected. With the continuous increase of multimedia processing services developed around digitization and networking, the virtualized application of video encoding and decoding is more and more, and the performance of the video encoding and decoding is also more and more required. This is manifested not only in the requirements for data storage, but also in the requirements for many aspects such as access security, processing performance, management capability, and expansion capability for data. Thus, there is a need for a virtualized video codec system.
Disclosure of Invention
The disclosure provides a technical scheme of a virtualized video coding and decoding system, electronic equipment and a storage medium.
According to an aspect of the present disclosure, there is provided a virtualized video codec system including: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2; the virtual machine monitor is configured to configure configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer greater than or equal to 1 and less than or equal to n; the video encoding and decoding kernel is used for reading the configuration information from the ith virtual machine register set and executing the current video encoding and decoding task corresponding to the ith virtual machine based on the configuration information.
In one possible implementation, the system further includes: a storage management module and a storage unit; the configuration information comprises the size of a storage space required for executing the current video coding and decoding task corresponding to the ith virtual machine; the video coding and decoding kernel is used for sending the size of a storage space required for executing the current video coding and decoding task corresponding to the ith virtual machine to the storage management module; the storage management module is configured to allocate a corresponding target storage space for the ith virtual machine in the storage unit based on a storage space size required for executing a current video encoding and decoding task corresponding to the ith virtual machine.
In one possible implementation manner, the video encoding and decoding kernel performs data access based on the target storage space corresponding to the ith virtual machine in the process of executing the current video encoding and decoding task corresponding to the ith virtual machine.
In one possible implementation, the ith virtual machine register set includes an interrupt register; the video coding and decoding kernel is used for sending an interrupt request to the ith virtual machine register set after the current video coding and decoding task corresponding to the ith virtual machine is executed; the ith virtual machine register set is used for generating an interrupt signal corresponding to the ith virtual machine in an interrupt register in the ith virtual machine register set based on the interrupt request; the ith virtual machine register set is configured to send an interrupt signal corresponding to the ith virtual machine to the virtual machine monitor.
In one possible implementation manner, the virtual machine monitor is configured to configure configuration information of a next video encoding and decoding task corresponding to the ith virtual machine register set after receiving an interrupt signal corresponding to the ith virtual machine.
In one possible implementation, the virtual machine monitor has a corresponding configuration interface with each of the virtual machine register sets; the virtual machine monitor is configured to configure configuration information of a current video encoding and decoding task corresponding to each virtual machine to each corresponding virtual machine register set based on a configuration interface corresponding to each virtual machine register set.
In one possible implementation, the virtual machine monitor is configured to allocate n virtual machine identification IDs for the n virtual machines, and to separately maintain each virtual machine ID.
In one possible implementation, the system further includes: the configuration module is used for carrying out one-to-one correspondence on the n virtual machines and the n virtual machine register sets, and respectively configuring interrupt registers in each virtual machine register set.
According to an aspect of the present disclosure, there is provided an electronic apparatus including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to run the system described above.
According to an aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, run the above system.
In an embodiment of the present disclosure, a virtualized video codec system includes: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2; the method comprises the steps that a virtual machine monitor configures configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer which is more than or equal to 1 and less than or equal to n; the video coding and decoding kernel reads configuration information from the ith virtual machine register set, and executes the current video coding and decoding task corresponding to the ith virtual machine based on the configuration information. The configuration isolation among different virtual machines and the decoupling between the configuration process and the video coding and decoding processing can be realized by utilizing the virtual machine register set of hardware, so that the processing performance of a video coding and decoding kernel is improved, the video coding and decoding tasks among the virtual machines are not affected, and the data security is effectively improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the technical aspects of the disclosure.
Fig. 1 shows a schematic diagram of a virtualized video codec system in the related art.
Fig. 2 shows a schematic diagram of virtualized video codec in the related art.
Fig. 3 shows a schematic diagram of a virtualized video codec system according to an embodiment of the disclosure.
Fig. 4 shows a schematic diagram of virtualized video codec according to an embodiment of the disclosure.
Fig. 5 shows a block diagram of an electronic device, according to an embodiment of the disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, C, and may mean including any one or more elements selected from the group consisting of A, B and C.
Furthermore, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
In the related art, the virtualized video technology is mainly implemented by a software configuration mode. The software is configured in such a way that the hardware is guided to run by a Hypervisor, also called a virtual machine monitor (Virtual Machine Monitor, VMM), running within a HOST. Fig. 1 shows a schematic diagram of a virtualized video codec system in the related art. As shown in fig. 1, the flow of the software configuration implementing the virtualized video technology is as follows.
The first step: the virtual machine monitor queries the running conditions of all virtual machines in the current system, including but not limited to the virtual machine identification (Identity Document, ID) of the current processing process, whether the video encoding and decoding tasks are completed, the occupied storage space, and other status information. If it is confirmed that the last Video codec task has been completed by an interrupt completion signal from a Video codec core (Video Subsystem), a virtual machine ID is assigned to the next Video codec task. As shown in fig. 1, the current system includes m virtual machines: virtual machine vm_1 to virtual machine vm_m, where m is a positive integer greater than or equal to 2, virtual machine vm_1 corresponds to video codec task VM1, and virtual machine vm_m corresponds to video codec task VMm.
And a second step of: in order to avoid overlapping of storage spaces, the virtual machine monitor allocates exclusive storage space of the current virtual machine for the current processing process in a storage unit (Memory Subsystem) according to storage spaces occupied by all other virtual machine IDs obtained by inquiry, and adds the virtual machine IDs of the current processing process and the corresponding storage spaces into a management list of the virtual machine monitor for later inquiry use. As shown in fig. 1, the virtual machine vm_1 corresponds to a memory VM1 region (VM 1 region), and the virtual machine vm_m corresponds to a memory VMm region (VMm region). As shown in fig. 1, the memory cell further includes: a Secure region (Secure region) and a virtual machine monitor region (hypervisor region).
And a third step of: the virtual machine monitor issues a series of configuration commands including initialization, dormancy, awakening and the like to the video encoding and decoding kernel, and in the process, the virtual machine ID of the current processing process, the size of the required storage space and other information are notified to the video encoding and decoding kernel in the form of a configuration register.
Fourth step: the virtual machine monitor issues control commands to the video coding and decoding kernel, including but not limited to obtaining video original data or coded code stream corresponding to the video coding and decoding task, pre-analyzing the data or code stream, coding and decoding and other commands, and is used for controlling and inquiring the state of the current virtual machine corresponding to the video coding and decoding kernel.
Fifth step: the video coding and decoding kernel performs corresponding video coding and decoding task operation according to the configuration and the command of the virtual machine monitor, and access and storage of data in the process are limited in the special storage space range configured by the virtual machine monitor for the current virtual machine.
Sixth step: after the video coding and decoding kernel finishes the corresponding video coding and decoding task, the video coding and decoding task corresponding to the current virtual machine of the virtual machine monitor is informed to finish in the form of submitting an interrupt signal.
Seventh step: after receiving the interrupt signal submitted by the video coding and decoding kernel, the virtual machine monitor can restart the next virtualized video coding and decoding task.
The software configuration mode has the advantages that the time required for realizing the virtualization of the video coding and decoding is long, the complexity requirement on a monitor of the virtual machine is high, the configuration process is not decoupled with the video coding and decoding processing of the video coding and decoding kernel, and the performance exertion of the video coding and decoding kernel is affected. First: in order to ensure the specificity of the storage space of the virtual machine process and avoid overlapping of the storage spaces among different virtual machine processes, the virtual machine monitor needs to do a great deal of maintenance, inquiry and scheduling work, and the corresponding workload is larger and larger along with the more virtual machine processes supported. Second,: because only one interrupt signal is arranged between the video coding and decoding kernel and the host, the virtual machine monitor is required to screen and maintain the directed virtual machine process aiming at the interrupt signal, records the reason for completing the virtual machine process, and queries at proper time, so that the virtual machine monitor is overloaded and the response to other interrupt signals in the system is slowed down. Third,: the configuration process of the virtual machine monitor to the video coding and decoding kernel can only be carried out in series with the video coding and decoding processing of the video coding and decoding kernel. Fig. 2 shows a schematic diagram of virtualized video codec in the related art. As shown in fig. 2, the virtual machine monitor configures the virtual machine VM1 (virtual machine monitor VM1, hypervisor VM 1), the video codec kernel performs the current video codec task of the virtual machine VM1 (video codec kernel VM1, video VM 1), after the completion of the execution, the virtual machine monitor configures the virtual machine VM2 (virtual machine monitor VM2, hypervisor VM 2), the video codec kernel performs the current video codec task of the virtual machine VM2 (video codec kernel VM2, video VM 2), and so on until the virtual machine monitor VMm-1, video codec kernel VMm-1, virtual machine monitor VMm, video codec kernel VMm, which are not described in detail. This tandem-dependent serial mode of operation affects the performance of the video codec core. Fourth,: the software configuration mode realizes that the virtualized video coding and decoding is not thorough enough for virtualization, and the storage space, the interrupt signal and the configuration process need to sense the existence of other virtual machines, so that risks exist in terms of data access security.
In order to solve the problem of implementing virtualized video encoding and decoding in a software configuration manner, an embodiment of the present disclosure provides a virtualized video encoding and decoding system implemented in a hardware manner. The virtualized video codec system provided by the present disclosure is described in detail below.
Fig. 3 shows a schematic diagram of a virtualized video codec system according to an embodiment of the disclosure. As shown in fig. 3, the virtualized video codec system includes: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2; the virtual machine monitor is used for configuring configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer which is more than or equal to 1 and less than or equal to n; the video coding and decoding kernel is used for reading the configuration information from the ith virtual machine register set and executing the current video coding and decoding task corresponding to the ith virtual machine based on the configuration information.
The number n of virtual machines can be adjusted according to the actual needs of the system, which is not particularly limited in the present disclosure.
According to the embodiment of the disclosure, the configuration isolation between different virtual machines and the decoupling between the configuration process and the video coding and decoding processing can be realized by utilizing the virtual machine register set of the hardware, so that the processing performance of the video coding and decoding kernel is improved, the video coding and decoding tasks among the virtual machines are not affected, and the data security is effectively improved.
In one possible implementation, a virtual machine monitor is used to assign n virtual machine IDs to n virtual machines, and to maintain each virtual machine ID separately.
For the number n of n virtual machines supported by the system virtualization, the virtual machine monitor allocates n virtual machine IDs, as shown in fig. 3, which are: VM_1 through VM_n. Each virtual machine ID is used to uniquely indicate one virtual machine.
The virtual machine monitor maintains each virtual machine ID separately to enable separate maintenance of each virtual machine.
In one possible implementation, the virtualized video codec system further comprises: the configuration module is used for carrying out one-to-one correspondence on the n virtual machines and the n virtual machine register sets, and respectively configuring interrupt registers in each virtual machine register set.
According to the number n of n virtual machines supported by the system virtualization, setting n virtual machine register sets (Virtual Machine Interface, VM_if) with corresponding numbers, and carrying out one-to-one correspondence on the n virtual machines and the n virtual machine register sets by using a configuration module, so as to prepare for realizing configuration isolation of the n virtual machines by using the n virtual machine register sets subsequently.
Interrupt registers are configured in each virtual machine register set so as to prepare for subsequent interrupt isolation of n virtual machines by using the n virtual machine register sets.
In one possible implementation, the virtual machine monitor has a corresponding configuration interface with each virtual machine register set, respectively; and the virtual machine monitor is used for respectively configuring the configuration information of the current video coding and decoding task corresponding to each virtual machine to each corresponding virtual machine register group based on the configuration interface corresponding to each virtual machine register group.
The virtual machine monitor has a corresponding configuration interface with each virtual machine register group, so the virtual machine monitor can configure the configuration information of the current video encoding and decoding task corresponding to each virtual machine to each corresponding virtual machine register group based on the configuration interface corresponding to each virtual machine register group.
The virtual machine monitor allocates a virtual machine ID for indicating the current processing process, and in the process, other information except the virtual machine indicated by the virtual machine ID does not need to be inquired; and the virtual machine monitor configures configuration information of the current video coding and decoding task corresponding to the virtual machine ID to a corresponding virtual machine register group through a corresponding configuration interface according to the virtual machine ID.
As shown in fig. 3, the virtualized video codec system includes n virtual machines: VM_1 through VM_n. The virtual machine monitor configures configuration information of a current video encoding and decoding task corresponding to the virtual machine VM_1 to the virtual machine register set VM1_if based on a configuration interface corresponding to the virtual machine register set VM1_if; the virtual machine monitor configures configuration information of a current video encoding and decoding task corresponding to the virtual machine VM_2 to the virtual machine register set VM2_if based on a configuration interface corresponding to the virtual machine register set VM2_if; and so on, vm1_if to vmn_if as shown in fig. 3 are not described here.
The configuration information includes a series of configuration commands such as initialization, dormancy, wakeup, etc. and information of the required storage space size, etc., and the specific content of the configuration information is not limited in this disclosure.
The use of the hardware virtual machine register set ensures that all virtual machines are not affected mutually, and configuration isolation is realized. Compared with the software configuration mode, the virtual machine monitor can be liberated from the complicated inquiry scheduling work, and the software configuration consumption time is reduced. Each virtual machine only needs to maintain the configuration information of the virtual machine, and different virtual machines are not perceived mutually, so that more thorough virtualization is achieved.
The video coding and decoding kernel interacts with n virtual machine register sets, can read configuration information from any one virtual machine register set, and executes the current video coding and decoding task of the corresponding virtual machine based on the configuration information.
The virtual machine monitor can configure the virtual machine register set of the virtual machine process which is not started in advance, so that after the video encoding and decoding kernel finishes the previous video encoding and decoding task, the next video encoding and decoding task can be started.
Fig. 4 shows a schematic diagram of virtualized video codec according to an embodiment of the disclosure. As shown in fig. 4, with the virtual machine register set of hardware, the virtual machine monitor can synchronously configure n virtual machines (vm_1 to vm_n) (virtual machine monitor VM1 to virtual machine monitor VMn, hypervisor VM1 to Hypervisor VMn), and the configuration process is decoupled from the video codec processing process of the video codec kernel (video codec kernel VM1 to video codec kernel VMn, video VM1 to video VMn) without following a serial working mode that depends successively, thereby solving the problem of unbalanced configuration and computing power in the video codec process and effectively improving the processing performance of the video codec hard kernel.
In one possible implementation, the virtualized video codec system further comprises: a memory management module (Memory Management Unit, MMU), a memory unit; the configuration information comprises the size of a storage space required by executing the current video coding and decoding task corresponding to the ith virtual machine; the video coding and decoding kernel is used for sending the storage space required by executing the current video coding and decoding task corresponding to the ith virtual machine to the storage management module; and the storage management module is used for distributing a corresponding target storage space for the ith virtual machine in the storage unit based on the storage space size required by executing the current video coding and decoding task corresponding to the ith virtual machine.
The configuration information of the current video coding and decoding task corresponding to the ith virtual machine comprises the storage space size required by executing the current video coding and decoding task corresponding to the ith virtual machine. After the video coding and decoding kernel reads the configuration information of the current video coding and decoding task corresponding to the ith virtual machine from the ith virtual machine register set, the storage space size required by executing the current video coding and decoding task corresponding to the ith virtual machine and included in the configuration information is sent to the storage management module, so that the storage management module allocates a corresponding target storage space for the ith virtual machine in the storage unit.
Compared with the method that the virtual machine monitor consumes time and calculation power to maintain, traverse and inquire the storage space occupied by other virtual machines in a software configuration mode, the storage space superposition among different virtual machines is prevented.
As shown in fig. 3, the memory cell includes: the region (VM 1 region) of the target storage space VM1 corresponding to the 1 st virtual machine vm_1, the region (VM 2 region) of the target storage space VM2 corresponding to the 2 nd virtual machine vm_2, and so on, until the region (VMn region) of the target storage space VMn corresponding to the n-th virtual machine vm_n, which will not be described in detail. As shown in fig. 3, the memory cell further includes: a Secure region (Secure region) and a virtual machine monitor region (hypervisor region).
In one possible implementation manner, the video codec kernel performs data access based on the target storage space corresponding to the ith virtual machine in the process of executing the current video codec task corresponding to the ith virtual machine.
The video coding and decoding kernel executes corresponding video coding and decoding operations based on corresponding configuration instructions in the configuration information read from the ith virtual machine register set, and in the process, data access and storage are only carried out based on a target storage space corresponding to the ith virtual machine, so that spatial overlapping among storage spaces occupied by different virtual machines is avoided.
In one possible implementation, the ith virtual machine register set includes an interrupt register; the video coding and decoding kernel is used for sending an interrupt request to the ith virtual machine register set after the current video coding and decoding task corresponding to the ith virtual machine is executed; the system comprises an ith virtual machine register set, a second virtual machine register set and a third virtual machine register set, wherein the ith virtual machine register set is used for generating an interrupt signal corresponding to the ith virtual machine in an interrupt register in the ith virtual machine register set based on an interrupt request; and the ith virtual machine register group is used for sending an interrupt signal corresponding to the ith virtual machine to the virtual machine monitor.
After the video encoding and decoding kernel finishes executing the current video encoding and decoding task corresponding to the ith virtual machine, an interrupt request is sent to the ith virtual machine register set, so that the ith virtual machine register set generates an interrupt signal corresponding to the ith virtual machine in an interrupt register in the ith virtual machine register set based on the interrupt request, and the ith virtual machine register set sends the interrupt signal corresponding to the ith virtual machine to a virtual machine monitor so as to inform the virtual machine monitor that the current video encoding and decoding task corresponding to the ith virtual machine is completed.
Compared with a mode that only one interrupt signal exists between a virtual machine monitor and a plurality of virtual machines in software configuration, in the embodiment of the disclosure, the interrupt register based on hardware exists between the virtual machine monitor and the virtual machine register group corresponding to each virtual machine, so that interrupt isolation between different virtual machines is realized, maintenance and screening query work of the relation between the interrupt signal and different virtual machines by the virtual machine monitor is released, and calculation power and software processing time are saved.
In one possible implementation manner, the virtual machine monitor is configured to configure configuration information of a next video encoding and decoding task corresponding to the ith virtual machine register set after receiving an interrupt signal corresponding to the ith virtual machine.
After receiving the interrupt signal corresponding to the ith virtual machine, the virtual machine monitor can determine that the current video coding and decoding task corresponding to the ith virtual machine is completed, and at this time, the virtual machine monitor can configure the configuration information of the next video coding and decoding task corresponding to the ith virtual machine register set, namely, start the next round of configuration operation.
In an embodiment of the present disclosure, a virtualized video codec system includes: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2; the method comprises the steps that a virtual machine monitor configures configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer which is more than or equal to 1 and less than or equal to n; the video coding and decoding kernel reads configuration information from the ith virtual machine register set, and executes the current video coding and decoding task corresponding to the ith virtual machine based on the configuration information. The configuration isolation among different virtual machines and the decoupling between the configuration process and the video coding and decoding processing can be realized by utilizing the virtual machine register set of hardware, so that the processing performance of a video coding and decoding kernel is improved, the video coding and decoding tasks among the virtual machines are not affected, and the data security is effectively improved.
It will be appreciated that the above-mentioned method embodiments of the present disclosure may be combined with each other to form a combined embodiment without departing from the principle logic, and are limited to the description of the present disclosure. It will be appreciated by those skilled in the art that in the above-described methods of the embodiments, the particular order of execution of the steps should be determined by their function and possible inherent logic.
In addition, the disclosure further provides an electronic device, a computer readable storage medium, and a program, where the foregoing may be used to implement any one of the virtualized video coding and decoding systems provided in the disclosure, and the corresponding technical schemes and descriptions and corresponding descriptions referring to the system parts are not repeated.
The method has specific technical association with the internal structure of the computer system, and can solve the technical problems of improving the hardware operation efficiency or the execution effect (including reducing the data storage amount, reducing the data transmission amount, improving the hardware processing speed and the like), thereby obtaining the technical effect of improving the internal performance of the computer system which accords with the natural law.
In some embodiments, functions or modules included in an apparatus provided by the embodiments of the present disclosure may be used to perform a method described in the foregoing method embodiments, and specific implementations thereof may refer to descriptions of the foregoing method embodiments, which are not repeated herein for brevity.
The disclosed embodiments also provide a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, operate the above system. The computer readable storage medium may be a volatile or nonvolatile computer readable storage medium.
The embodiment of the disclosure also provides an electronic device, which comprises: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to run the system described above.
Embodiments of the present disclosure also provide a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when executed in a processor of an electronic device, causes the processor in the electronic device to operate the system described above.
The electronic device may be provided as a terminal, server or other form of device.
Fig. 5 shows a block diagram of an electronic device, according to an embodiment of the disclosure. Referring to fig. 5, an electronic device 1900 may be provided as a server or terminal device. Referring to FIG. 5, electronic device 1900 includes a processing component 1922 that further includes one or more processors and memory resources represented by memory 1932 for storing instructions, such as application programs, that can be executed by processing component 1922. The application programs stored in memory 1932 may include one or more modules each corresponding to a set of instructions. Further, processing component 1922 is configured to execute instructions to perform the methods described above.
The electronic device 1900 may also include a power component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an outputAnd an input/output interface 1958. Electronic device 1900 may operate an operating system based on memory 1932, such as the Microsoft Server operating system (Windows Server) TM ) Apple Inc. developed graphical user interface based operating System (Mac OS X TM ) Multi-user multi-process computer operating system (Unix) TM ) Unix-like operating system (Linux) of free and open source code TM ) Unix-like operating system (FreeBSD) with open source code TM ) Or the like.
In an exemplary embodiment, a non-transitory computer readable storage medium is also provided, such as memory 1932, including computer program instructions executable by processing component 1922 of electronic device 1900 to perform the methods described above.
The present disclosure may be a system, method, and/or computer program product. The computer program product may include a computer readable storage medium having computer readable program instructions embodied thereon for causing a processor to implement aspects of the present disclosure.
The computer readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: portable computer disks, hard disks, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static Random Access Memory (SRAM), portable compact disk read-only memory (CD-ROM), digital Versatile Disks (DVD), memory sticks, floppy disks, mechanical coding devices, punch cards or in-groove structures such as punch cards or grooves having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media, as used herein, are not to be construed as transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., optical pulses through fiber optic cables), or electrical signals transmitted through wires.
The computer readable program instructions described herein may be downloaded from a computer readable storage medium to a respective computing/processing device or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium in the respective computing/processing device.
Computer program instructions for performing the operations of the present disclosure can be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, c++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present disclosure are implemented by personalizing electronic circuitry, such as programmable logic circuitry, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information of computer readable program instructions, which can execute the computer readable program instructions.
Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable medium having the instructions stored therein includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The computer program product may be realized in particular by means of hardware, software or a combination thereof. In an alternative embodiment, the computer program product is embodied as a computer storage medium, and in another alternative embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK), or the like.
The foregoing description of various embodiments is intended to highlight differences between the various embodiments, which may be the same or similar to each other by reference, and is not repeated herein for the sake of brevity.
It will be appreciated by those skilled in the art that in the above-described method of the specific embodiments, the written order of steps is not meant to imply a strict order of execution but rather should be construed according to the function and possibly inherent logic of the steps.
If the technical scheme of the application relates to personal information, the product applying the technical scheme of the application clearly informs the personal information processing rule before processing the personal information, and obtains independent consent of the individual. If the technical scheme of the application relates to sensitive personal information, the product applying the technical scheme of the application obtains individual consent before processing the sensitive personal information, and simultaneously meets the requirement of 'explicit consent'. For example, a clear and remarkable mark is set at a personal information acquisition device such as a camera to inform that the personal information acquisition range is entered, personal information is acquired, and if the personal voluntarily enters the acquisition range, the personal information is considered as consent to be acquired; or on the device for processing the personal information, under the condition that obvious identification/information is utilized to inform the personal information processing rule, personal authorization is obtained by popup information or a person is requested to upload personal information and the like; the personal information processing rule may include information such as a personal information processor, a personal information processing purpose, a processing mode, and a type of personal information to be processed.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the improvement of technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (8)
1. A virtualized video codec system comprising: the video encoding and decoding system comprises a virtual machine monitor, n virtual machines, n virtual machine register sets and a video encoding and decoding kernel, wherein the n virtual machines are in one-to-one correspondence with the n virtual machine register sets, and n is a positive integer greater than or equal to 2;
the virtual machine monitor is configured to configure configuration information of a current video coding and decoding task corresponding to an ith virtual machine register set, wherein i is a positive integer greater than or equal to 1 and less than or equal to n;
the video coding and decoding kernel is used for reading the configuration information from the ith virtual machine register set and executing the current video coding and decoding task corresponding to the ith virtual machine based on the configuration information;
the system further comprises: a storage management module and a storage unit; the configuration information comprises the size of a storage space required for executing the current video coding and decoding task corresponding to the ith virtual machine;
the video coding and decoding kernel is used for sending the size of a storage space required for executing the current video coding and decoding task corresponding to the ith virtual machine to the storage management module;
the storage management module is configured to allocate a corresponding target storage space for the ith virtual machine in the storage unit based on a storage space size required for executing a current video encoding and decoding task corresponding to the ith virtual machine.
2. The system of claim 1, wherein the video codec kernel performs data access based on a target storage space corresponding to the ith virtual machine during execution of a current video codec task corresponding to the ith virtual machine.
3. The system according to claim 1 or 2, wherein the ith virtual machine register set includes an interrupt register therein;
the video coding and decoding kernel is used for sending an interrupt request to the ith virtual machine register set after the current video coding and decoding task corresponding to the ith virtual machine is executed;
the ith virtual machine register set is used for generating an interrupt signal corresponding to the ith virtual machine in an interrupt register in the ith virtual machine register set based on the interrupt request;
the ith virtual machine register set is configured to send an interrupt signal corresponding to the ith virtual machine to the virtual machine monitor.
4. The system of claim 3, wherein the virtual machine monitor is configured to configure configuration information of a next video codec task corresponding to the ith virtual machine register set after receiving the interrupt signal corresponding to the ith virtual machine.
5. The system of claim 1, wherein the virtual machine monitor has a corresponding configuration interface with each of the virtual machine register sets, respectively;
the virtual machine monitor is configured to configure configuration information of a current video encoding and decoding task corresponding to each virtual machine to each corresponding virtual machine register set based on a configuration interface corresponding to each virtual machine register set.
6. The system of claim 1, wherein the virtual machine monitor is configured to assign n virtual machine IDs to the n virtual machines and to maintain each virtual machine ID separately.
7. The system of claim 1, wherein the system further comprises:
the configuration module is used for carrying out one-to-one correspondence on the n virtual machines and the n virtual machine register sets, and respectively configuring interrupt registers in each virtual machine register set.
8. An electronic device, comprising: the system of any one of claims 1 to 7.
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| CN116320469B (en) * | 2023-05-16 | 2024-03-01 | 摩尔线程智能科技(北京)有限责任公司 | Virtualized video encoding and decoding system and method, electronic equipment and storage medium |
| CN117176963B (en) * | 2023-11-02 | 2024-01-23 | 摩尔线程智能科技(北京)有限责任公司 | Virtualized video encoding and decoding system and method, electronic equipment and storage medium |
| CN117176964B (en) * | 2023-11-02 | 2024-01-30 | 摩尔线程智能科技(北京)有限责任公司 | Virtualized video encoding and decoding system and method, electronic equipment and storage medium |
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