CN115986030A - Light emitting element, method of manufacturing the same, and display device including the same - Google Patents

Abstract

The invention discloses a light-emitting element, a manufacturing method thereof and a display device comprising the same, wherein the light-emitting element comprises: a first semiconductor pattern, a second semiconductor pattern, a light emitting pattern, a first electrode, and a second electrode. The first semiconductor pattern has a first side, a second side, a third side and a fourth side, wherein the first side is opposite to the second side, the third side is opposite to the fourth side, and the third side and the fourth side are connected with the first side and the second side. The second semiconductor pattern is located on a second side of the first semiconductor pattern, and a length of the second semiconductor pattern is greater than a length of the first semiconductor pattern. The light emitting pattern is located between the first semiconductor pattern and the second semiconductor pattern. The first electrode is located on one side of the second semiconductor pattern far away from the first semiconductor pattern and is electrically connected with the second semiconductor pattern. The second electrodes are located on the third side and the fourth side of the first semiconductor pattern and electrically connected to the first semiconductor pattern.

Description

Light emitting element, method of manufacturing the same, and display device including the same

Technical Field

The present invention relates to a light-emitting element, a method for manufacturing the light-emitting element, and a display device including the light-emitting element.

Background

The Micro light emitting diode (Micro-LED) display device has the advantages of electricity saving, high efficiency, high brightness, quick response time and the like. Generally, the micro light emitting diode can be divided into a horizontal (terrestrial) micro light emitting diode and a Vertical (Vertical) micro light emitting diode according to whether the two electrodes are on the same side or different sides of the light emitting stack, wherein the Vertical micro light emitting diode is expected to become a mainstream structure in the future due to better heat dissipation and light emitting efficiency.

Due to the high height of the vertical micro-led, after a Mass Transfer (Mass Transfer) process is performed on the circuit substrate, a plurality of (at least three) planarization layers are required to fill up the difference in the topographic level, so as to facilitate the bridging of the electrodes. However, the flatness of the multi-layer planarization layer is difficult to control, resulting in poor yield of bridging between the electrodes and affecting the production yield of the display device.

Disclosure of Invention

The invention provides a light emitting element having a structure facilitating electrode bridging.

The present invention provides a method for manufacturing a light emitting element, which can produce a light emitting element having a structure facilitating electrode bridging.

The invention provides a display device with improved production yield.

One embodiment of the present invention provides a light emitting element including: a first semiconductor pattern having a first side, a second side, a third side and a fourth side, wherein the first side is opposite to the second side, the third side is opposite to the fourth side, and the third side and the fourth side connect the first side and the second side; a second semiconductor pattern on a second side of the first semiconductor pattern, the second semiconductor pattern having a length greater than that of the first semiconductor pattern; a light emitting pattern between the first and second semiconductor patterns; the first electrode is positioned on one side of the second semiconductor pattern, which is far away from the first semiconductor pattern, and is electrically connected with the second semiconductor pattern; and a second electrode on the third and fourth sides of the first semiconductor pattern and electrically connected to the first semiconductor pattern.

In an embodiment of the invention, the second electrode surrounds the first semiconductor pattern.

In an embodiment of the invention, the second electrode physically contacts the third side and the fourth side of the first semiconductor pattern.

In an embodiment of the invention, the first electrode includes a high-reflectivity conductive material.

In an embodiment of the invention, a length of the first electrode is 20% to 90% of a length of the second semiconductor pattern.

In an embodiment of the invention, the second electrode is further located on the first side of the first semiconductor pattern.

In an embodiment of the invention, the second electrode has a first opening, and the first opening exposes the first semiconductor pattern.

In an embodiment of the invention, the light emitting device further includes a first transparent conductive pattern between the first electrode and the second semiconductor pattern.

One embodiment of the present invention provides a display device including: a circuit board; and a plurality of the light-emitting elements arranged on the circuit substrate and electrically connected with the circuit substrate.

In an embodiment of the invention, the display device further includes a first pad and a second pad, wherein the first electrode is electrically connected to the first pad, and the second electrode is electrically connected to the second pad through the second transparent conductive layer.

In an embodiment of the invention, the display device further includes a protection layer covering the plurality of light emitting elements and the second transparent conductive layer.

One embodiment of the present invention provides a method of manufacturing a light emitting element, including: forming a first semiconductor layer on the growth substrate, wherein the first side of the first semiconductor layer is close to the growth substrate; forming a light emitting layer on a second side of the first semiconductor layer, wherein the second side is opposite to the first side; forming a second semiconductor layer on the light-emitting layer; forming a first electrode on the second semiconductor layer; removing the growth substrate; patterning the first semiconductor layer, the light emitting layer and the second semiconductor layer to form a first semiconductor pattern, a light emitting pattern and a second semiconductor pattern, respectively, wherein the length of the second semiconductor pattern is greater than that of the first semiconductor pattern; and forming second electrodes on third and fourth sides of the first semiconductor pattern, the third and fourth sides respectively connecting the first and second sides.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes forming a buffer layer on the growth substrate before forming the first semiconductor layer.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes removing the buffer layer after removing the growth substrate.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes forming a first transparent conductive layer on the second semiconductor layer after forming the second semiconductor layer.

In an embodiment of the invention, the method for manufacturing the light emitting element further includes performing an annealing process on the first transparent conductive layer.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes patterning the first transparent conductive layer after patterning the first semiconductor layer, the light emitting layer and the second semiconductor layer to form the first transparent conductive pattern.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes forming a first insulating layer having a second opening on the second semiconductor layer before forming the first electrode, and the first electrode is formed in the second opening.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes forming a second insulating pattern on sidewalls of the light emitting pattern and the second semiconductor pattern before forming the second electrode.

In an embodiment of the invention, the method of manufacturing the light emitting device further includes forming a second electrode on the first side of the first semiconductor pattern, wherein the second electrode does not completely cover the first semiconductor pattern.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1A to fig. 1Ib are a partial cross-sectional view and a partial top view of a flow of steps of a method for manufacturing a light-emitting device 10 according to an embodiment of the invention;

fig. 2 is a schematic cross-sectional view of a light emitting device 20 according to an embodiment of the invention;

FIG. 3 is a schematic cross-sectional view of a light-emitting device 30 according to an embodiment of the invention;

fig. 4 is a partial cross-sectional view of a display device 100 according to an embodiment of the invention.

Description of the symbols

10,20,30,40 light emitting element

100 display device

110 growth substrate

120 buffer layer

130 first semiconductor pattern

130' first semiconductor layer

140 luminous pattern

140' luminescent layer

150 second semiconductor pattern

150' second semiconductor layer

160 transparent conductive pattern

160' transparent conductive layer

170 first insulating pattern

170' first insulating layer

172 second insulating pattern

180,180A,480 first electrode

190,190A,490 second electrode

192 part

Section line A-A

CH semiconductor layer

CL, conductor layer

CS circuit board

DE drain electrode

DW driver circuit layer

GE grid electrode

IL insulating layer

L1, L2, L3, L3A length

LS light emitting laminate

OE, OI, OL, opening

PD1, PD2: pad

PL planar layer

PV protective layer

S1 first side

S2 second side

S3 third side

S4 fourth side

S5, fifth side

S6, sixth side

SB bottom plate

SE source

TC1, TC2 transparent conductive layer

TR active (active) element

WL wiring layer

Detailed Description

In the drawings, the thickness of layers, films, panels, regions, etc. have been exaggerated for clarity. Like reference numerals refer to like elements throughout the specification. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected" to another element, there are no intervening elements present. As used herein, "connected" may refer to physically and/or electrically connected. Further, an "electrical connection" or "coupling" may be the presence of other elements between two elements.

It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first "element," "component," "region," "layer" or "portion" discussed below could be termed a second element, component, region, layer or portion without departing from the teachings herein.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, including "at least one" or mean "and/or", unless the content clearly indicates otherwise. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element, as illustrated. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "lower" can include both an orientation of "lower" and "upper," depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "below" or "beneath" may include both an orientation of above and below.

As used herein, "about," "approximately," or "substantially" includes mean values of the stated value and the specified value within an acceptable range of deviation as determined by one of ordinary skill in the art, taking into account the measurement in question and the particular amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated values, or within ± 30%, ± 20%, ± 10%, ± 5%. Further, as used herein, "about", "approximately", or "substantially" may be selected based on optical properties, etching properties, or other properties to select a more acceptable range of deviation or standard deviation, and not to apply one standard deviation to all properties.

Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Exemplary embodiments are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments. Thus, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region shown or described as flat may generally have rough and/or nonlinear features. Further, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

Fig. 1A to fig. 1Ib are a partial cross-sectional view and a partial top view of a process flow of a method for manufacturing a light emitting device 10 according to an embodiment of the invention. Hereinafter, a method for manufacturing the light-emitting element 10 will be described with reference to fig. 1A to 1 Ib.

First, referring to fig. 1A, a first semiconductor layer 130 'is formed on the growth substrate 110, and a first side S1 of the first semiconductor layer 130' is close to the growth substrate 110. The growth substrate 110 may be a growth substrate for growing an epitaxial material, such as a Sapphire (Sapphire) substrate, but the present invention is not limited thereto.

In some embodiments, the first semiconductor layer 130' is epitaxially grown on the growth substrate 110, and the main material thereof includes gallium nitride (GaN), but the invention is not limited thereto. For example, the first semiconductor layer 130' is an N-type doped semiconductor layer, and the material of the N-type doped semiconductor layer is, for example, N-type gallium nitride (N-GaN) that needs to be formed using an ultra-high temperature process. In other embodiments, the first semiconductor layer 130' may include a group II-VI material (e.g., zinc selenium (ZnSe)) or a group III-V nitride material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)).

In some embodiments, the buffer layer 120 may be formed on the growth substrate 110 before the first semiconductor layer 130 'is formed, and the buffer layer 120 can facilitate stress relief of a subsequently epitaxially grown semiconductor layer and reduce epitaxial dislocation and defects for adjusting material properties of the first semiconductor layer 130', such as a lattice constant, carrier transport efficiency, and the like. For example, the buffer layer 120 may be made of a semiconductor material (e.g., gallium nitride).

Next, referring to fig. 1B, a light emitting layer 140 'is formed on the second side S2 of the first semiconductor layer 130', and the second side S2 is opposite to the first side S1. The light emitting layer 140 'may be epitaxially grown on the first semiconductor layer 130', and the formation temperature of the light emitting layer 140 'is lower than that of the first semiconductor layer 130'. In some embodiments, the light emitting layer 140' may comprise a II-VI material (e.g., zinc selenium (ZnSe)) or a III-V nitride material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)). In some embodiments, the light emitting layer 140' is a multi-layer Quantum Well structure (MQW), for example, and the multi-layer Quantum Well structure may include Multiple layers of indium gallium nitride (InGaN) and Multiple layers of gallium nitride (GaN) stacked alternately, and the light emitting wavelength range of the light emitting layer 140' may be adjusted by designing the ratio of indium or gallium in the light emitting layer 140', but the invention is not limited thereto.

Next, referring to fig. 1C, a second semiconductor layer 150 'is formed on the light emitting layer 140'. In some embodiments, the second semiconductor layer 150 'is epitaxially grown on the light-emitting layer 140', and the main material thereof includes gallium nitride (GaN), but the invention is not limited thereto. For example, the second semiconductor layer 150' is a P-type doped semiconductor layer, the material of the P-type doped semiconductor layer is, for example, P-type gallium nitride (P-GaN), and the forming temperature of the second semiconductor layer 150' is lower than that of the light emitting layer 140 '. In other embodiments, the second semiconductor layer 150' may include a II-VI material (e.g., zinc selenium (ZnSe)) or a III-V nitride material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)).

Next, referring to fig. 1D, in some embodiments, a transparent conductive layer 160' may be formed on the second semiconductor layer 150' after the second semiconductor layer 150' is formed. The transparent conductive layer 160' may be formed using a Physical Vapor Deposition (PVD) fabrication process, such as vacuum Sputtering or Evaporation. The transparent conductive layer 160' may include a transparent conductive material, such as Indium Tin Oxide (ITO), indium Zinc Oxide (IZO), aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, or nano silver, etc., but the invention is not limited thereto.

In some embodiments, the transparent conductive layer 160' may also be subjected to a thermal annealing (thermal annealing) process. In some embodiments, the temperature of the thermal annealing fabrication process is about 150 ℃ to 300 ℃. In some embodiments, the temperature of the thermal annealing process is about 200 ℃ to 250 ℃. In some embodiments, the thermal annealing fabrication process is performed for a time period of about 10 minutes to 60 minutes. In some embodiments, the thermal annealing process is performed for a time period of about 25 minutes to about 35 minutes.

Next, referring to fig. 1E, in some embodiments, a first insulating layer 170' having an opening OI may be formed on the second semiconductor layer 150' and the transparent conductive layer 160 '. Next, the first electrode 180 is formed in the opening OI and on the second semiconductor layer 150' and the transparent conductive layer 160', such that the first electrode 180 can be electrically connected to the second semiconductor layer 150'. The first insulating layer 170' may be formed using a Chemical Vapor Deposition (CVD) fabrication process. The first insulating layer 170' may include a transparent insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or a stack of the above materials, but the present invention is not limited thereto.

In some embodiments, the first electrode 180 may be formed using, for example, a vacuum Sputtering (Sputtering) fabrication process. The material of the first electrode 180 may include a high-reflectivity conductive material, such as a high-reflectivity metal, e.g., aluminum, silver, titanium, or chromium. In certain embodiments, the first electrode 180 may include a stack of multiple layers of metals, such as an aluminum/titanium/tin (Al/Ti/Sn) stack. In some embodiments, the thickness of the first electrode 180 is about 1 μm to 2 μm.

Next, referring to fig. 1F, the growth substrate 110 and the film layer formed on the growth substrate 110 are turned over, and then the growth substrate 110 is removed to expose the buffer layer 120. In some embodiments, the growth substrate 110 may be removed using Laser lift off (Laser peeling) or thermal treatment. In some embodiments, the growth substrate 110 and the film layers formed thereon may be turned over and then placed on a temporary substrate (not shown), in other words, the first electrode 180 after turning over is located on a side close to the temporary substrate, and the growth substrate 110 is located on a side far from the temporary substrate. Next, in some embodiments, after the growth substrate 110 is removed, an etching process may be used to remove the buffer layer 120 to expose the first side S1 of the first semiconductor layer 130'.

Next, referring to fig. 1G, the first semiconductor layer 130', the light emitting layer 140', and the second semiconductor layer 150' are patterned to form the first semiconductor pattern 130, the light emitting pattern 140, and the second semiconductor pattern 150, respectively, and a length L2 of the second semiconductor pattern 150 is greater than a length L1 of the first semiconductor pattern 130.

In some embodiments, the first semiconductor layer 130', the light emitting layer 140' and the second semiconductor layer 150 'may be patterned by an etching process, and the first semiconductor layer 130', the light emitting layer 140 'and the second semiconductor layer 150' are sequentially patterned by using an etchant required for each layer to form the first semiconductor pattern 130, the light emitting pattern 140 and the second semiconductor pattern 150, respectively.

In some embodiments, after patterning the first semiconductor layer 130', the light emitting layer 140' and the second semiconductor layer 150', the transparent conductive layer 160' and the first insulating layer 170' may be continuously patterned by using an etching process and an etchant required for each layer to form the transparent conductive pattern 160 and the first insulating pattern 170.

Next, referring to fig. 1H, a second insulating pattern 172 is formed on sidewalls of the light emitting pattern 140 and the second semiconductor pattern 150. In some embodiments, the second insulating patterns 172 are also formed on sidewalls of the transparent conductive patterns 160 and the first insulating patterns 170, wherein the first semiconductor patterns 130, the light emitting patterns 140, the second semiconductor patterns 150, the transparent conductive patterns 160, the first insulating patterns 170, and the second insulating patterns 172 may constitute the light emitting stack LS. The second insulation pattern 172 may be formed using a chemical vapor deposition fabrication process. The second insulating pattern 172 may include a transparent insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, or a stack of the above materials, but the present invention is not limited thereto.

Next, referring to fig. 1Ia, the second electrode 190 is formed on the third side S3 and the fourth side S4 of the first semiconductor pattern 130, wherein the third side S3 is opposite to the fourth side S4, the third side S3 connects the first side S1 and the second side S2, and the fourth side S4 also connects the first side S1 and the second side S2.

Referring to fig. 1Ia to fig. 1Ib, wherein fig. 1Ia can bebase:Sub>A schematic cross-sectional view taken alongbase:Sub>A section linebase:Sub>A-base:Sub>A' of fig. 1Ib, the light emitting device 10 includes: a first semiconductor pattern 130, a light emitting pattern 140, a second semiconductor pattern 150, a first electrode 180, and a second electrode 190. The first semiconductor pattern 130 has a first side S1, a second side S2, a third side S3 and a fourth side S4, wherein the first side S1 is opposite to the second side S2, the third side S3 is opposite to the fourth side S4, and the third side S3 and the fourth side S4 connect the first side S1 and the second side S2. The second semiconductor pattern 150 is located at the second side S2 of the first semiconductor pattern 130, and a length L2 of the second semiconductor pattern 150 is greater than a length L1 of the first semiconductor pattern 130. The light emitting pattern 140 is positioned between the first and second semiconductor patterns 130 and 150. The first electrode 180 is located on a side of the second semiconductor pattern 150 away from the first semiconductor pattern 130, and the first electrode 180 is electrically connected to the second semiconductor pattern 150. The second electrode 190 is located on the third side S3 and the fourth side S4 of the first semiconductor pattern 130, and the second electrode 190 is electrically connected to the first semiconductor pattern 130. In the light emitting device 10 according to an embodiment of the invention, the second electrode 190 is disposed on the third side S3 and the fourth side S4 of the first semiconductor pattern 130, so that the second electrode 190 can be bridged more easily, thereby increasing the yield of the second electrode 190.

In some embodiments, the second electrode 190 physically contacts the third side S3 and the fourth side S4 of the first semiconductor pattern 130, so that the second electrode 190 is electrically connected to the first semiconductor pattern 130. In some embodiments, the second electrode 190 may be further disposed on a fifth side S5 and a sixth side S6 of the first semiconductor pattern 130, wherein the fifth side S5 is opposite to the sixth side S6, and the fifth side S5 and the sixth side S6 connect the third side S3 and the fourth side S4, so that the second electrode 190 can surround the first semiconductor pattern 130.

In some embodiments, the length L3 of the first electrode 180 is about 30% of the length L2 of the second semiconductor pattern 150, but the present invention is not limited thereto. In other embodiments, the length L3 of the first electrode 180 is 20% to 90% of the length L2 of the second semiconductor pattern 150, and the longer the length L3 of the first electrode 180 is, the longer the light-emitting pattern 140 recovers the reflected light, thereby improving the light utilization rate of the light-emitting device 10.

In some embodiments, the light emitting device 10 further includes a transparent conductive pattern 160, the transparent conductive pattern 160 is located between the first electrode 180 and the second semiconductor pattern 150, and the transparent conductive pattern 160 can improve the current distribution uniformity of the second semiconductor pattern 150, increase the light emitting area of the light emitting device 10, and further facilitate the heat dissipation of the light emitting device 10 and improve the light emitting efficiency of the light emitting device 10.

In some embodiments, the light emitting device 10 further includes a first insulating pattern 170, and the first insulating pattern 170 is disposed on a surface of the transparent conductive pattern 160 away from the second semiconductor pattern 150 to prevent unnecessary electrical connection between the transparent conductive pattern 160 and other conductive film layers. In some embodiments, the first insulating pattern 170 also surrounds the first electrode 180 to prevent unnecessary electrical connection between the first electrode 180 and other conductive film layers.

The light emitting device 10 may further include a second insulating pattern 172, wherein the second insulating pattern 172 is located on sidewalls of the light emitting pattern 140 and the second semiconductor pattern 150 to prevent electrical connection between the light emitting pattern 140 and the second semiconductor pattern 150 and the second electrode 190, and the first semiconductor pattern 130, the light emitting pattern 140, the second semiconductor pattern 150, the transparent conductive pattern 160, the first insulating pattern 170, and the second insulating pattern 172 may form a light emitting stack LS of the light emitting device 10. In other words, the light emitting element 10 may include the first electrode 180, the second electrode 190, and the light emitting stack LS. In some embodiments, the second insulating pattern 172 is also located on the sidewall of the transparent conductive pattern 160 to prevent an unnecessary electrical connection between the transparent conductive pattern 160 and the second electrode 190. In some embodiments, the second insulating pattern 172 is also located on the sidewall of the first insulating pattern 170 to completely cover the sidewalls of the light emitting pattern 140, the second semiconductor pattern 150, and the transparent conductive pattern 160.

In the following, further embodiments of the present invention will be described with reference to fig. 2 to 4, and the reference numbers and related contents of the components of the embodiments of fig. 1Ia to 1Ib are used, wherein the same reference numbers are used to indicate the same or similar components, and the description of the same technical contents is omitted. For the omitted description, reference may be made to the embodiments of fig. 1Ia to 1Ib, which will not be repeated in the following description.

Fig. 2 is a schematic cross-sectional view of a light emitting device 20 according to an embodiment of the invention. The light emitting element 20 includes: the first electrode 180A, the second electrode 190, and the light emitting stack LS includes: a first semiconductor pattern 130, a light emitting pattern 140, a second semiconductor pattern 150, a transparent conductive pattern 160, a first insulating pattern 170, and a second insulating pattern 172.

Compared with the light emitting element 10 shown in fig. 1Ia to 1Ib, the light emitting element 20 shown in fig. 2 is different mainly in that: the length L3A of the first electrode 180A of the light emitting element 20 is greater than the length L3 of the first electrode 180 of the light emitting element 10. For example, the length L3A of the first electrode 180A of the light emitting device 20 is about 80% of the length L2 of the second semiconductor pattern 150, so that the first electrode 180A can reflect more light back to the light emitting pattern 140 for improving the light utilization efficiency of the light emitting device 20.

Fig. 3 is a schematic cross-sectional view of a light emitting device 30 according to an embodiment of the invention. The light emitting element 30 includes: the first electrode 180A, the second electrode 190A, and the light emitting stack LS includes: a first semiconductor pattern 130, a light emitting pattern 140, a second semiconductor pattern 150, a transparent conductive pattern 160, a first insulating pattern 170, and a second insulating pattern 172.

Compared to the light emitting element 20 shown in fig. 2, the light emitting element 30 shown in fig. 3 is different mainly in that: the second electrode 190A of the light emitting element 30 further includes a portion 192 formed at the first side S1 of the first semiconductor pattern 130, and the portion 192 of the second electrode 190A does not completely cover the first semiconductor pattern 130.

For example, the step of fig. 1Ia further includes forming a second electrode 190A on the first side S1 of the first semiconductor pattern 130, and the second electrode 190A further includes a portion 192 on the first side S1 of the first semiconductor pattern 130. In some embodiments, the portion 192 of the second electrode 190A has an opening OE therein, and the opening OE exposes the first semiconductor pattern 130.

Fig. 4 is a partial cross-sectional view of a display device 100 according to an embodiment of the invention. The display device 100 includes: a circuit substrate CS and a plurality of light emitting elements 40. The light emitting element 40 is disposed on and electrically connected to the circuit substrate CS, and the light emitting element 40 may be any one of the light emitting elements 10,20, and 30 described above.

In some embodiments, the circuit substrate CS may include a bottom plate SB and a driving circuit layer DW. The bottom plate SB of the circuit substrate CS may be a transparent substrate or a non-transparent substrate, and the material thereof may be a quartz substrate, a glass substrate, a polymer substrate or other suitable materials, but the invention is not limited thereto. The driving circuit layer DW may include elements or lines required by the display device 100, such as driving elements, switching elements, storage capacitors, power supply lines, driving signal lines, timing signal lines, current compensation lines, detection signal lines, and the like.

In some embodiments, the driving circuit layer DW may be formed on the base plate SB using a thin film deposition fabrication process, a photo mask fabrication process, and an etching fabrication process, and the driving circuit layer DW may include an active element array including a plurality of active elements, such as thin film transistors, arranged in an array.

In some embodiments, the driving circuit layer DW includes a plurality of active elements TR and a wiring layer WL. In other embodiments, the driving circuit layer DW may further include other elements, such as passive elements, as needed.

The active device TR may include a semiconductor layer CH, a gate electrode GE, a source electrode SE, and a drain electrode DE. The region of the semiconductor layer CH overlapping the gate electrode GE may be regarded as a channel region of the active element TR. The gate electrode GE, the source electrode SE, and the drain electrode DE are electrically connected to each other, and the source electrode SE and the drain electrode DE are electrically connected to two ends of the semiconductor layer CH, respectively. The gate GE and the source SE may respectively receive signals from, for example, driving elements. The material of the semiconductor layer CH may include a silicon semiconductor material (e.g., polysilicon, amorphous silicon, etc.), an oxide semiconductor material, and an organic semiconductor material, but the invention is not limited thereto. The gate electrode GE, the source electrode SE and the drain electrode DE may be made of a metal having good conductivity, such as aluminum, molybdenum, titanium, copper, etc.

The wiring layer WL may be located above the plurality of active elements TR. In some embodiments, the wiring layer WL may include a plurality of insulating layers IL and a plurality of wiring layers CL, wherein the plurality of wiring layers CL form a plurality of conductive lines separated by the plurality of insulating layers IL, so that each active element TR can electrically connect, for example, a corresponding light emitting element 40. In this way, the operation of the light emitting element 40 can be controlled by controlling the signal sent to the active element TR.

In some embodiments, the display device 100 may include a plurality of pads PD1 and a plurality of pads PD2, wherein the plurality of pads PD1 may be electrically connected to the corresponding active devices TR, respectively. For example, the pads PD1 and PD2 may be disposed on the wiring layer WL and electrically connected to the drain DE of the active device TR through the corresponding conductive line layer CL or conductive line in the wiring layer WL, respectively.

In some embodiments, the pads PD1 and PD2 may belong to the same film layer or be located on the same plane, and the patterns of the pads PD1 and PD2 are separated from each other. In some embodiments, the pads PD2 may have the same potential and are electrically connected to each other through the corresponding conductive line layer CL or the conductive line in the wiring layer WL.

The light emitting device 40 includes a first electrode 480, a second electrode 490 and a light emitting stack LS, wherein the first electrode 480 is electrically connected to the pad PD1, and the second electrode 490 is electrically connected to the pad PD2. In some embodiments, the first electrode 480 physically contacts the pad PD1.

In some embodiments, the display device 100 further includes a planarization layer PL having an opening OL, the planarization layer PL is disposed on the circuit substrate CS, and the opening OL of the planarization layer PL may expose the pad PD2. The height of the planarization layer PL is smaller than the height of the light emitting element 40, in other words, the height of the planarization layer PL need not be approximately the height of the second electrode 490. In some embodiments, the display device 100 further includes a transparent conductive layer TC1, and the transparent conductive layer TC1 is located on the planarization layer PL and the light emitting element 40. The transparent conductive layer TC1 is electrically connected to the second electrode 490 of the light emitting device 40, and the transparent conductive layer TC1 can be electrically connected to the pad PD2 through the opening OL. In certain embodiments, the transparent conductive layer TC1 physically contacts the second electrode 490. In this way, the second electrode 490 can be electrically connected to the pad PD2 through the transparent conductive layer TC1, and the bridging between the second electrode 490 and the transparent conductive layer TC1 is easier and the yield is high, thereby ensuring that the display device 100 has an improved production yield. In some embodiments, the height of the planarization layer PL is about half of the height of the light emitting device 40, which ensures the electrical connection between the second electrode 490, the transparent conductive layer TC1 and the pad PD2.

In some embodiments, the display device 100 further includes a protection layer PV, which can cover and protect the plurality of light emitting elements 40 and the transparent conductive layer TC1. In some embodiments, the display device 100 further includes a transparent conductive layer TC2, and the transparent conductive layer TC2 may be stacked on the transparent conductive layer TC1 and the protection layer PV to ensure the electrical connection between the second electrode 490 and the pad PD2.

In summary, in the light emitting device of the present invention, the second electrodes are disposed on the third side and the fourth side of the first semiconductor pattern, so that the second electrodes are more easily bridged, thereby increasing the bridging yield of the second electrodes. In addition, the manufacturing method of a light emitting element of the present invention can produce a light emitting element having a structure facilitating electrode bridging. In addition, the display device of the invention comprises the light-emitting element with the structure convenient for electrode bridging, thereby having improved production yield.

Although the present invention has been described in connection with the above embodiments, it is not intended to limit the present invention, and those skilled in the art may make modifications and alterations without departing from the spirit and scope of the present invention, so that the scope of the present invention should be determined by that of the appended claims.

Claims (20)

1. A light emitting element comprising:

a first semiconductor pattern having a first side, a second side, a third side, and a fourth side, wherein the first side is opposite to the second side, the third side is opposite to the fourth side, and the third side and the fourth side each connect the first side and the second side;

a second semiconductor pattern on the second side of the first semiconductor pattern, the second semiconductor pattern having a length greater than that of the first semiconductor pattern;

a light emitting pattern between the first and second semiconductor patterns;

the first electrode is positioned on one side of the second semiconductor pattern far away from the first semiconductor pattern and is electrically connected with the second semiconductor pattern; and

and a second electrode positioned on the third side and the fourth side of the first semiconductor pattern and electrically connected to the first semiconductor pattern.

2. The light-emitting element according to claim 1, wherein the second electrode surrounds the first semiconductor pattern.

3. The light-emitting element according to claim 1, wherein the second electrode physically contacts the third side and the fourth side of the first semiconductor pattern.

4. The light-emitting element according to claim 1, wherein the first electrode comprises a high-reflectance conductive material.

5. The light-emitting element according to claim 1, wherein a length of the first electrode is 20% to 90% of a length of the second semiconductor pattern.

6. The light-emitting element according to claim 1, wherein the second electrode is further located on the first side of the first semiconductor pattern.

7. The light-emitting element according to claim 6, wherein the second electrode has a first opening, and the first opening exposes the first semiconductor pattern.

8. The light-emitting element according to claim 1, further comprising a first transparent conductive pattern between the first electrode and the second semiconductor pattern.

9. A display device, comprising:

a circuit substrate; and

the light-emitting element according to any one of claims 1 to 8, which is provided over the circuit board and electrically connected to the circuit board.

10. The display device according to claim 9, further comprising a first pad and a second pad, wherein the first electrode is electrically connected to the first pad, and the second electrode is electrically connected to the second pad through a second transparent conductive layer.

11. The display device according to claim 9, further comprising a protective layer covering the plurality of light-emitting elements and the second transparent conductive layer.

12. A method of manufacturing a light emitting element, comprising:

forming a first semiconductor layer on a growth substrate, wherein a first side of the first semiconductor layer is close to the growth substrate;

forming a light emitting layer on a second side of the first semiconductor layer, the second side being opposite to the first side;

forming a second semiconductor layer on the light emitting layer;

forming a first electrode on the second semiconductor layer;

removing the growth substrate;

patterning the first semiconductor layer, the light emitting layer and the second semiconductor layer to form a first semiconductor pattern, a light emitting pattern and a second semiconductor pattern, respectively, wherein the length of the second semiconductor pattern is greater than that of the first semiconductor pattern; and

forming second electrodes on third and fourth sides of the first semiconductor pattern, the third and fourth sides respectively connecting the first and second sides.

13. The method of manufacturing a light emitting element according to claim 12, further comprising forming a buffer layer on the growth substrate before forming the first semiconductor layer.

14. The manufacturing method of a light emitting element according to claim 13, further comprising removing the buffer layer after removing the growth substrate.

15. The method according to claim 12, further comprising forming a first transparent conductive layer over the second semiconductor layer after the second semiconductor layer is formed.

16. The method for manufacturing a light-emitting element according to claim 15, further comprising performing an annealing process for the first transparent conductive layer.

17. The method according to claim 15, further comprising patterning the first transparent conductive layer after patterning the first semiconductor layer, the light-emitting layer, and the second semiconductor layer to form a first transparent conductive pattern.

18. The method according to claim 12, further comprising forming a first insulating layer having a second opening over the second semiconductor layer before forming the first electrode, wherein the first electrode is formed in the second opening.

19. The method according to claim 12, further comprising forming a second insulating pattern on sidewalls of the light-emitting pattern and the second semiconductor pattern before forming the second electrode.

20. The method according to claim 12, further comprising forming the second electrode on the first side of the first semiconductor pattern, wherein the second electrode does not completely cover the first semiconductor pattern.

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