CN115982073A - Device and method for adapting TpyeC to single USB3.0 - Google Patents

Device and method for adapting TpyeC to single USB3.0 Download PDF

Info

Publication number
CN115982073A
CN115982073A CN202310257270.XA CN202310257270A CN115982073A CN 115982073 A CN115982073 A CN 115982073A CN 202310257270 A CN202310257270 A CN 202310257270A CN 115982073 A CN115982073 A CN 115982073A
Authority
CN
China
Prior art keywords
switching
tpye
unit
link
branch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310257270.XA
Other languages
Chinese (zh)
Inventor
杜浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sichuan Huakun Zhenyu Intelligent Technology Co ltd
Original Assignee
Sichuan Huakun Zhenyu Intelligent Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sichuan Huakun Zhenyu Intelligent Technology Co ltd filed Critical Sichuan Huakun Zhenyu Intelligent Technology Co ltd
Priority to CN202310257270.XA priority Critical patent/CN115982073A/en
Publication of CN115982073A publication Critical patent/CN115982073A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Information Transfer Systems (AREA)

Abstract

The invention provides a device and a method for adapting TpyeC to a single USB3.0, and relates to the technical field of computer application. The single USB3.0 link on the PC mainboard can support Type-C forward and reverse plugging through the mutual cooperation of the Tpye-C interface unit, the A/B face overturning switching unit and the SOC system level chip unit; therefore, the number of the USB3.0Type-A interfaces of the whole computer is not reduced due to TpyeC adaptation, the product expandability is improved, and the use by a user is facilitated; in addition, the A/B face overturning switching unit adopts the passing switching control end and carries out synchronous control, and when in control, only the first switching unit and the second switching unit are required to be switched to the A side/B side simultaneously, so that the connection establishment of the corresponding switching branch can be realized through the high level/low level of the single-channel interface, and the control effects of simple structure, safety and stability are considered.

Description

Device and method for adapting TpyeC to single USB3.0
Technical Field
The invention relates to the technical field of computer hardware, in particular to a device and a method for enabling TpyeC to be adaptive to a single USB 3.0.
Background
With the progress of science and technology and the development of the era, equipment interfaces are also changed continuously; wherein, type-C is the USB interface form that the mainstream adopted down at present, its full name: USB Type-C, its core characteristic can be summarized with "fast, strong, little" three words. Compared with the traditional interfaces of the previous generations, the Type-C can support functions of charging, data transmission, image transmission and the like while being more advanced, and really realizes powerful use of 'one port with multiple purposes'. USB Type-C has a volume smaller than that of both Type-A and Type-B, and can be applied to the interface Type of PC (master device) and external equipment (slave device, such as a mobile phone).
The PC mainboard is usually provided with an inherent USB3.0 link to adapt to the USB Type-C, and in order to adapt to the Tpye-C plug and support positive and negative plugging, the prior art usually uses two USB3.0 links to adapt to the USB Type-C; however, the number of USB3.0 links on the PC motherboard is limited, which provides more excellent communication effect than USB2.0 links; if the USB Type-C adaptation is performed through two USB3.0 links, the number of USB3.0Type-A interfaces of the whole machine can be reduced.
Therefore, in order to reconcile the contradiction between USB Type-C adaptation and USB3.0Type-a number, it is necessary to provide a device and method for adapting TpyeC to a single USB3.0 to solve the above technical problem.
Disclosure of Invention
In order to solve one of the above technical problems, the present invention provides an apparatus for adapting tpye to a single USB3.0, which uses a PC device as a master device and is used for tpye adaptation of the PC device, comprising: the system comprises a Tpye-C plug unit, a Tpye-C interface unit, an A/B face overturning and switching unit and an SOC system-on-chip unit; wherein the Tpye-C plug unit is connected between the master device and the slave device in vitro; the Tpye-C interface unit, the A/B surface overturning switching unit and the SOC system-level chip unit are arranged on a mainboard of the main equipment along with the main equipment;
the Tpye-C interface unit comprises: the A-side interface and the B-side interface are respectively connected with the A/B-side turnover switching unit through independent USB3.0 channels, and the Tpye-C interface unit is connected with the SOC system-on-chip unit through a USB2.0 link; the A/B face overturning and switching unit comprises: the system comprises an A-side access end, a B-side access end, a link connecting end and a switching control end; the A surface access end is connected with the USB3.0 channel of the A surface interface, and the B surface access end is connected with the USB3.0 channel of the B surface interface; the link connection end is connected with the SOC system level chip unit through a USB3.0 link, and the switching control end is controlled by the SOC system level chip unit.
As a further solution, the Tpye-C plug unit is a two-sided plug comprising: a double-sided Tpye-C plug, a Tpye-C wiring harness and a slave device plug; the double-sided Tpye-C plug is divided into an A side and a B side according to the plugging direction, can be plugged in the Tpye-C interface unit and is electrically connected with the Tpye-C interface unit through a Pin line connecting point in the plug; one end of the Tpye-C wire harness is connected with the Pin wire connection point, and the other end of the Tpye-C wire harness is connected with the slave equipment plug; the slave device plug is electrically connected with the slave device.
As a further solution, a Tpye-C interface unit comprises: a Tpye-C interface and a Tpye-C interface circuit; the Tpye-C interface is connected with the Tpye-C plug and inputs the electric signal to the Tpye-C interface circuit; the Tpye-C interface circuit inputs the electric signals to the corresponding access end through the A-side interface or the B-side interface.
As a further solution, the a-plane access terminal comprises: b0+, B0-, B1+ and B1-; the B face access end comprises: c0+, C0-, C1+ and C1-; the link connection end includes: a0+, A0-, A1+ and A1-.
As a further solution, the A/B face overturning and switching unit selects the channel by a high-speed channel selector; the high-speed channel selector includes: the system comprises a first switching unit, a second switching unit and a double-switching control terminal SEL; the first switching unit includes: the system comprises a first A-plane switching branch, a first B-plane switching branch and a first link branch; the second switching unit includes: a second A-plane switching branch, a second B-plane switching branch and a second link branch;
wherein the first A-plane switching branch is connected with B0+ and B0-; the first B-plane switching branch is connected with C0+ and C0-; the first link branch is connected with A0+ and A0-; the second switching unit is connected with B1+ and B1-: the second A-plane switching branch is connected with the C1+ and the C1-; the second link branch is connected with A1+ and A1-; the double-switching control end SEL is connected with the switching control end, the first A-surface switching branch and the second A-surface switching branch are arranged on the A side, the first B-surface switching branch and the second A-surface switching branch are arranged on the B side, and the first switching unit and the second switching unit are synchronously switched.
A method of adapting TpyeC to a single USB3.0, for use in an apparatus for adapting TpyeC to a single USB3.0 as described in any one of the above solutions, and performing the corresponding steps by an SOC system-on-chip unit; when the Tpye-C plug unit is inserted into the Tpye-C interface unit and the electrical connection is established, the inserting direction of the Tpye-C plug unit is determined by the following steps:
step A1: reading the Tpye-C plug unit through a USB2.0 link to obtain the level state of each Pin line connection point of the double-sided Tpye-C plug;
step A2: monitoring the level state of the Pin20, and detecting the plugging state;
if Pin20 is low, it is determined that no device is plugged in, and the plugging state is defined as: no Device;
if the Pin20 is at a high level, judging that equipment is inserted, and performing the next step;
step A3: monitoring the level state of Pin8, and detecting the direction state;
if Pin8 is low, it is determined that A plane is inserted, and the direction state is defined as: CC1 plug;
if Pin8 is high, it is determined that B-plane insertion is performed, and the directional state is defined as: CC2 plug;
step A4: judging whether to switch the USB3.0 channel according to the plugging state;
if the plugging state is defined as: no Device, no switching of USB3.0 channel;
otherwise, switching the USB3.0 channel;
step A5: judging a USB3.0 channel switching strategy according to the direction state;
if the orientation state is defined as: CC1 plug, then implement A face insert switch strategy;
if the orientation state is defined as: CC2 plug, then execute B face insert switch strategy;
step A6: and repeatedly executing the step A1 to the step A5 until the master device and the slave device complete connection establishment or the master device stops service.
As a further solution, the USB3.0 channel switching between the a-plane access and the B-plane access is performed by:
step B1: detecting an executed USB3.0 channel switching strategy;
the A-plane insertion switching strategy comprises the following steps:
step B2.1: sending a switching instruction of a switching side A to a switching control end;
step B2.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side A at the same time; the first link branch and the first A-plane switching branch are connected; the second link branch and the second A-plane switching branch are connected;
step B2.3: switching the USB3.0 link to a USB3.0 channel of the A-side access end; wherein A0+ is connected with B0 +; a0-is connected with B0-; a1+ is connected with B1 +; a1-is connected with B1-; obtaining an A-side USB3.0 link;
b plane insertion switching strategy:
step B3.1: sending a switching instruction of a switching side B to a switching control end;
step B3.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side B at the same time; the first link branch and the first B-plane switching branch are connected; the second link branch and the second B-plane switching branch are connected;
step B3.3: switching the USB3.0 link to a USB3.0 channel of the B-side access end; wherein A0+ is connected with C0 +; a0-is linked to C0-; a1+ is connected with C1 +; a1-is linked to C1-; obtaining a USB3.0 link on the B surface;
and step B4: and after the link is established, the master device and the slave device carry out communication session through the A-plane USB3.0 link/the B-plane USB3.0 link.
Compared with the related art, the device and the method for adapting the TpyeC to the single USB3.0 have the following beneficial effects:
the invention realizes that the forward and reverse plugging of Type-C can be supported by a single USB3.0 link on a PC mainboard through the mutual cooperation of the Tpye-C interface unit, the A/B face overturning switching unit and the SOC system level chip unit; therefore, the number of the USB3.0Type-A interfaces of the whole computer is not reduced due to the adaptation of TpyeC, the product expandability is improved, and the use by a user is more convenient;
in addition, the A/B face overturning switching unit adopts the passing switching control end and carries out synchronous control, and when in control, only the first switching unit and the second switching unit are required to be switched to the A side/B side simultaneously, so that the connection establishment of the corresponding switching branch can be realized through the high level/low level of the single-channel interface, and the control effects of simple structure, safety and stability are considered.
Drawings
FIG. 1 is a schematic diagram of a preferred structure of a device for adapting TpyeC to a single USB3.0 according to an embodiment of the present invention;
fig. 2 is a schematic structural view of an a/B-side flip switch unit according to an embodiment of the present invention;
FIG. 3 is a diagram of a judgment logic table provided in an embodiment of the present invention;
fig. 4 is a diagram of a wiring logic table according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and the embodiments.
As shown in fig. 1, the apparatus for adapting TpyeC to a single USB3.0 provided by this embodiment uses a PC device as a host device, and is used for TpyeC adaptation of the PC device, and includes: the system comprises a Tpye-C plug unit, a Tpye-C interface unit, an A/B face turnover switching unit and an SOC system-on-chip unit; wherein the Tpye-C plug unit is connected between the master device and the slave device in vitro; the Tpye-C interface unit, the A/B surface overturning switching unit and the SOC system level chip unit are arranged on a mainboard of the main equipment along with the main equipment;
the Tpye-C interface unit includes: the A-side interface and the B-side interface are respectively connected with the A/B-side turnover switching unit through independent USB3.0 channels, and the Tpye-C interface unit is connected with the SOC system-on-chip unit through a USB2.0 link; the A/B face overturning and switching unit comprises: the system comprises an A-side access end, a B-side access end, a link connecting end and a switching control end; the A surface access end is connected with the USB3.0 channel of the A surface interface, and the B surface access end is connected with the USB3.0 channel of the B surface interface; the link connection end is connected with the SOC system level chip unit through a USB3.0 link, and the switching control end is controlled by the SOC system level chip unit.
It should be noted that: the invention realizes that the single USB3.0 link on the PC mainboard can support Type-C positive and negative insertion through the mutual cooperation of the Tpye-C interface unit, the A/B face turnover switching unit and the SOC system level chip unit; therefore, the whole USB3.0Type-A interface is guaranteed not to be reduced in quantity due to the TpyeC adaptation, product expandability is improved, and the use by a user is facilitated.
As a further solution, the Tpye-C plug unit is a double-sided plug comprising: a double-sided Tpye-C plug, a Tpye-C wiring harness and a slave device plug; the double-sided Tpye-C plug is divided into an A side and a B side according to the plugging direction, can be plugged in the Tpye-C interface unit and is electrically connected with the Tpye-C interface unit through a Pin line connecting point in the plug; one end of the Tpye-C wire harness is connected with the Pin line connection point, and the other end of the Tpye-C wire harness is connected with the slave equipment plug; the slave device plug is electrically connected with the slave device.
It should be noted that: the slave device plug can be various USB plugs, and the double-sided Tpye-C plug detects the direction of the plug-in interface through the Pin20 and the Pin 8.
As a further solution, a Tpye-C interface unit comprises: a Tpye-C interface and a Tpye-C interface circuit; the Tpye-C interface is connected with the Tpye-C plug and inputs the electric signal to the Tpye-C interface circuit; the Tpye-C interface circuit inputs the electric signals to the corresponding access end through the A-side interface or the B-side interface.
As a further solution, the a-plane access terminal comprises: b0+, B0-, B1+ and B1-; the B face access end comprises: c0+, C0-, C1+ and C1-; the link connection end includes: a0+, A0-, A1+, and A1-.
As a further solution, the A/B face overturning and switching unit selects the channel by a high-speed channel selector; the high-speed channel selector includes: the switching device comprises a first switching unit, a second switching unit and a double-switching control terminal SEL; the first switching unit includes: the system comprises a first A-plane switching branch, a first B-plane switching branch and a first link branch; the second switching unit includes: a second A-plane switching branch, a second B-plane switching branch and a second link branch;
wherein the first A-plane switching branch is connected with B0+ and B0-; the first B-plane switching branch is connected with C0+ and C0-; the first link branch is connected with A0+ and A0-; the second switching unit is connected with B1+ and B1-: the second A-plane switching branch is connected with the C1+ and the C1-; the second link branch is connected with A1+ and A1-; the double-switching control end SEL is connected with the switching control end, the first A-surface switching branch and the second A-surface switching branch are arranged on the A side, the first B-surface switching branch and the second A-surface switching branch are arranged on the B side, and the first switching unit and the second switching unit are synchronously switched.
It should be noted that: as shown in fig. 2, the a/B-side flip switch unit can be implemented by an ASM1543 or TI HD3SS3212 chip.
A method of adapting TpyeC to a single USB3.0, for use in an apparatus for adapting TpyeC to a single USB3.0 as described in any one of the above solutions, and performing the corresponding steps by an SOC system-on-chip unit; when the Tpye-C plug unit is inserted into the Tpye-C interface unit and the electrical connection is established, the inserting direction of the Tpye-C plug unit is determined by the following steps:
step A1: reading the Tpye-C plug unit through a USB2.0 link to obtain the level state of each Pin line connection point of the double-sided Tpye-C plug;
step A2: monitoring the level state of the Pin20, and detecting the plugging state;
if Pin20 is low level, it is determined that no device is plugged in, and the plugging state is defined as: no Device;
if the Pin20 is at a high level, judging that equipment is inserted, and carrying out the next step;
step A3: monitoring the level state of Pin8, and detecting the direction state;
if Pin8 is low, it is determined that A plane is inserted, and the direction state is defined as: CC1 plug;
if Pin8 is high, it is determined that B-plane insertion is performed, and the directional state is defined as: CC2 plug;
step A4: judging whether to switch the USB3.0 channel according to the plugging state;
if the plugging state is defined as: no Device, no switching of USB3.0 channel;
otherwise, switching the USB3.0 channel;
step A5: judging a USB3.0 channel switching strategy according to the direction state;
if the orientation state is defined as: CC1 plug, then implement A face insert switch strategy;
if the orientation state is defined as: CC2 plug, then execute B-plane insertion switching strategy;
step A6: and repeatedly executing the steps A1 to A5 until the master device and the slave device complete connection establishment or the master device stops service.
It should be noted that: in a specific embodiment, when the double-sided Type-C interface is inserted or the Type-C interface is A-sided, the Pin8 of the Tpye-C interface is low; when the B surface of the TYPE-C interface is inserted or the TYPE-C interface is not inserted, the Pin8 of the Tpye-C interface is at a high level; therefore, the judgment of the insertion a plane, the insertion B plane and the non-insertion can be performed by the level states of Pin20 and Pin8, and the judgment logic table thereof is shown in fig. 3.
As a further solution, the switching of USB3.0 channels between the a-plane access and the B-plane access is performed by:
step B1: detecting an executed USB3.0 channel switching strategy;
the A plane inserts the switching strategy:
step B2.1: sending a switching instruction of a switching side A to a switching control end;
step B2.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side A at the same time; the first link branch and the first A-plane switching branch are connected; the second link branch and the second A-plane switching branch are connected;
step B2.3: switching the USB3.0 link to a USB3.0 channel of the A-surface access end; wherein A0+ is connected with B0 +; a0-is linked to B0-; a1+ is connected with B1 +; a1-is connected with B1-; obtaining an A-side USB3.0 link;
b-plane insertion switching strategy:
step B3.1: sending a switching instruction of a switching side B to a switching control end;
step B3.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side B at the same time; the first link branch and the first B-plane switching branch are connected; the second link branch and the second B-plane switching branch are connected;
step B3.3: switching the USB3.0 link to a USB3.0 channel of the B-side access end; wherein A0+ is connected with C0 +; a0-is linked to C0-; a1+ is connected with C1 +; a1-is linked to C1-; obtaining a USB3.0 link on the B surface;
and step B4: and the link establishment is completed, and the master device and the slave device carry out communication session through the A-plane USB3.0 link/the B-plane USB3.0 link.
It should be noted that: in a specific embodiment, when the double-sided Type-C interface is inserted or the Type-C interface is A-sided, the Pin8 of the Tpye-C interface is low; the pin is connected to the selection channel of the high-speed selector, strobes the A0 a B0 channel and the A1 a B1, and the user Tpye-C device normally recognizes. When the B surface of the TYPE-C interface is inserted or the TYPE-C interface is not inserted, the Pin8 of the Tpye-C interface is at a high level; this pin is connected to the selection channel of the high speed selector, gating the A0 a C0 channel and the A1 a C1, the user Tpye-C device normally recognizes; the specific connection logic table is shown in fig. 4, wherein the first switching unit and the second switching unit are switched to the a side/B side simultaneously, so that the connection establishment of the corresponding switching branch can be realized through the high level/low level of the single channel interface.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (7)

1. An apparatus for adapting TpyeC to a single USB3.0, wherein a PC device is used as a master device and for TpyeC adaptation of the PC device, comprising: the system comprises a Tpye-C plug unit, a Tpye-C interface unit, an A/B face overturning and switching unit and an SOC system-on-chip unit; wherein the Tpye-C plug unit is connected between the master device and the slave device in vitro;
the Tpye-C interface unit, the A/B surface overturning switching unit and the SOC system level chip unit are arranged on a mainboard of the main equipment along with the main equipment;
the Tpye-C interface unit includes: the A-side interface and the B-side interface are respectively connected with the A/B-side turnover switching unit through independent USB3.0 channels, and the Tpye-C interface unit is connected with the SOC system-on-chip unit through a USB2.0 link; the A/B face overturning and switching unit comprises: the system comprises an A-side access end, a B-side access end, a link connecting end and a switching control end; the A surface access end is connected with the USB3.0 channel of the A surface interface, and the B surface access end is connected with the USB3.0 channel of the B surface interface; the link connection end is connected with the SOC system level chip unit through a USB3.0 link, and the switching control end is controlled by the SOC system level chip unit.
2. An apparatus for adapting Tpye to a single USB3.0 as claimed in claim 1, wherein the Tpye-C plug element is a two-sided plug comprising: a double-sided Tpye-C plug, a Tpye-C wiring harness and a slave device plug; the double-sided Tpye-C plug is divided into an A side and a B side according to the plugging direction, can be plugged in the Tpye-C interface unit and is electrically connected with the Tpye-C interface unit through a Pin line connecting point in the plug; one end of the Tpye-C wire harness is connected with the Pin wire connection point, and the other end of the Tpye-C wire harness is connected with the slave equipment plug; the slave device plug is electrically connected with the slave device.
3. An apparatus for adapting Tpye to a single USB3.0 as claimed in claim 1, wherein the Tpye-C interface unit comprises: a Tpye-C interface and a Tpye-C interface circuit; the Tpye-C interface is connected with the Tpye-C plug and inputs the electric signal to the Tpye-C interface circuit; the Tpye-C interface circuit inputs the electric signals to the corresponding access end through the A-side interface or the B-side interface.
4. The apparatus of claim 1, wherein the a-plane access comprises: b0+, B0-, B1+ and B1-; the B face access end comprises: c0+, C0-, C1+, and C1-; the link connection end includes: a0+, A0-, A1+ and A1-.
5. The apparatus of claim 4, wherein the A/B-plane flip switch unit performs channel selection with a high speed channel selector; the high-speed channel selector includes: the system comprises a first switching unit, a second switching unit and a double-switching control terminal SEL; the first switching unit includes: the system comprises a first A-plane switching branch, a first B-plane switching branch and a first link branch; the second switching unit includes: a second A-plane switching branch, a second B-plane switching branch and a second link branch;
wherein the first A-plane switching branch is connected with B0+ and B0-; the first B-plane switching branch is connected with C0+ and C0-; the first link branch is connected with A0+ and A0-; the second switching unit is connected with B1+ and B1-: the second A-plane switching branch is connected with the C1+ and the C1-; the second link branch is connected with A1+ and A1-; the double-switching control end SEL is connected with the switching control end, the first A-surface switching branch and the second A-surface switching branch are arranged on the A side, the first B-surface switching branch and the second A-surface switching branch are arranged on the B side, and the first switching unit and the second switching unit are synchronously switched.
6. A method of adapting TpyeC to a single USB3.0, characterized in that it is applied in an apparatus for adapting TpyeC to a single USB3.0 as claimed in any one of claims 1 to 5, and the corresponding steps are performed by an SOC system-on-chip unit; when the Tpye-C plug unit is inserted into the Tpye-C interface unit and the electrical connection is established, the inserting direction of the Tpye-C plug unit is determined by the following steps:
step A1: reading the Tpye-C plug unit through a USB2.0 link to obtain the level state of each Pin line connection point of the double-sided Tpye-C plug;
step A2: monitoring the level state of the Pin20, and detecting the plugging state;
if Pin20 is low, it is determined that no device is plugged in, and the plugging state is defined as: no Device;
if the Pin20 is at a high level, judging that equipment is inserted, and carrying out the next step;
step A3: monitoring the level state of Pin8, and detecting the direction state;
if Pin8 is low, it is determined that A plane is inserted, and the direction state is defined as: CC1 plug;
if Pin8 is high, it is determined that B-plane insertion is performed, and the directional state is defined as: CC2 plug;
step A4: judging whether to switch the USB3.0 channel according to the plugging state;
if the plugging state is defined as: no Device, no USB3.0 channel switching is performed;
otherwise, switching the USB3.0 channel;
step A5: judging a USB3.0 channel switching strategy according to the direction state;
if the orientation state is defined as: CC1 plug, then execute A plane insert switch strategy;
if the orientation state is defined as: CC2 plug, then execute B-plane insertion switching strategy;
step A6: and repeatedly executing the steps A1 to A5 until the master device and the slave device complete connection establishment or the master device stops service.
7. A method of adapting TpyeC to a single USB3.0 as claimed in claim 6 wherein switching of USB3.0 channels between A-plane and B-plane access is performed by:
step B1: detecting an executed USB3.0 channel switching strategy;
the A plane inserts the switching strategy:
step B2.1: sending a switching instruction of a switching side A to a switching control end;
step B2.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side A at the same time; the first link branch and the first A-plane switching branch are connected; the second link branch and the second A-plane switching branch are connected;
step B2.3: switching the USB3.0 link to a USB3.0 channel of the A-surface access end; wherein A0+ is connected with B0 +; a0-is linked to B0-; a1+ is connected with B1 +; a1-is connected with B1-; obtaining an A-side USB3.0 link;
b-plane insertion switching strategy:
step B3.1: sending a switching instruction of a switching side B to a switching control end;
step B3.2: the double-switching control terminal SEL switches the first switching unit and the second switching unit to the side B at the same time; the first link branch and the first B-plane switching branch are connected; the second link branch and the second B-plane switching branch are connected;
step B3.3: switching the USB3.0 link to a USB3.0 channel of the B-side access end; wherein A0+ is connected with C0 +; a0-is linked to C0-; a1+ is connected with C1 +; a1-is linked to C1-; obtaining a USB3.0 link on the B surface;
and step B4: and after the link is established, the master device and the slave device carry out communication session through the A-plane USB3.0 link/the B-plane USB3.0 link.
CN202310257270.XA 2023-03-17 2023-03-17 Device and method for adapting TpyeC to single USB3.0 Pending CN115982073A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310257270.XA CN115982073A (en) 2023-03-17 2023-03-17 Device and method for adapting TpyeC to single USB3.0

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310257270.XA CN115982073A (en) 2023-03-17 2023-03-17 Device and method for adapting TpyeC to single USB3.0

Publications (1)

Publication Number Publication Date
CN115982073A true CN115982073A (en) 2023-04-18

Family

ID=85958205

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310257270.XA Pending CN115982073A (en) 2023-03-17 2023-03-17 Device and method for adapting TpyeC to single USB3.0

Country Status (1)

Country Link
CN (1) CN115982073A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109062751A (en) * 2018-09-14 2018-12-21 电子科技大学中山学院 USB Type-C interface rapid test system and method
CN209514602U (en) * 2019-04-17 2019-10-18 深圳市星禾宏泰自动化设备有限公司 A kind of front and back sides USB Type-C automatic switching interface circuit
CN212063611U (en) * 2020-03-05 2020-12-01 深圳微步信息股份有限公司 Double-interface power supply switching circuit and terminal equipment
CN216437353U (en) * 2021-11-12 2022-05-03 蒙奇数字技术(深圳)有限公司 Detection control circuit based on TYPE-C signal upset
CN216930173U (en) * 2022-03-04 2022-07-08 无锡市新龙鹏电子科技有限公司 Display control circuit and display device based on TypeC blind plugging
CN217880302U (en) * 2022-08-02 2022-11-22 宁波麦度智联科技股份有限公司 TYPE-C interface circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109062751A (en) * 2018-09-14 2018-12-21 电子科技大学中山学院 USB Type-C interface rapid test system and method
CN209514602U (en) * 2019-04-17 2019-10-18 深圳市星禾宏泰自动化设备有限公司 A kind of front and back sides USB Type-C automatic switching interface circuit
CN212063611U (en) * 2020-03-05 2020-12-01 深圳微步信息股份有限公司 Double-interface power supply switching circuit and terminal equipment
CN216437353U (en) * 2021-11-12 2022-05-03 蒙奇数字技术(深圳)有限公司 Detection control circuit based on TYPE-C signal upset
CN216930173U (en) * 2022-03-04 2022-07-08 无锡市新龙鹏电子科技有限公司 Display control circuit and display device based on TypeC blind plugging
CN217880302U (en) * 2022-08-02 2022-11-22 宁波麦度智联科技股份有限公司 TYPE-C interface circuit

Similar Documents

Publication Publication Date Title
AU2012101757B4 (en) Adapter for electronic devices
WO2019015681A1 (en) Terminal device and control method therefor
CN104347977B (en) Kato and equipment
CN202134745U (en) Multifunctional USB OTG data line
CN107643994B (en) Terminal, terminal peripheral, signal sending and receiving method and data transmission system
CN107943730A (en) A kind of system for supporting NVMe agreement PCIE signals
CN108369567A (en) Increased data flow in universal serial bus (USB) cable
CN108963673B (en) Data line and data transmission system capable of being set based on OTG function charge and discharge
CN111064243A (en) Mobile power supply and method for supplying power to peripheral equipment
CN105893305A (en) Intelligent mobile terminal USB TYPE-C interface system
CN203520391U (en) Data transmission multiplexing device
CN107622031B (en) Dual type-c interface device based on intel kabyak platform
CN107480084A (en) Type C mobile terminals charge and data transmission method, device and storage medium
CN109407574A (en) Output-controlling device and its method may be selected in a kind of multibus
CN115982073A (en) Device and method for adapting TpyeC to single USB3.0
CN104460857A (en) Peripheral component interconnect-express card and method and device for using same
CN105141714A (en) First mobile equipment, external equipment and second mobile equipment
CN210324187U (en) USB device
CN210691253U (en) Mobile power supply and communication system
CN212809197U (en) Multifunctional docking station supporting multi-USB-C switching
CN115237841A (en) Electronic equipment, quick charging method, device, system and readable storage medium
CN114281745A (en) Docking station capable of switching connection of multiple uplink hosts
CN112069109B (en) Extension adapter plate, adapter device and adapter method
CN101094464A (en) Device and method for handset to manage files in U disk
CN209895334U (en) Electronic equipment and memory card

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20230418