CN115981114B - Method for determining lithography limit stress and method for improving lithography process quality - Google Patents
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Abstract
The invention provides a method for determining photoetching limit stress and a method for improving photoetching process quality, and belongs to the technical field of semiconductor manufacturing. The method for determining the photoetching limit stress comprises the following steps: determining a test pattern; providing a plurality of wafers on which pre-lithography processes have been performed; measuring the stress value from the center to the edge of each wafer; forming a test pattern at a minimum stress value position and a maximum stress value position; measuring focus values of test pattern positions on each wafer; corresponding the focusing value with the corresponding stress value; and finding out a critical focus value exceeding the lithography process window, taking the wafer with the critical focus value as a target wafer, and taking the difference value between the maximum stress value and the minimum stress value on the target wafer as the limit stress of the lithography process. In the method for improving the quality of the photoetching process, whether the stress of the wafer exceeds the limit stress of the photoetching process is judged before photoetching, so that the quality is controlled before photoetching, the quality of photoetching is improved, and the yield of photoetching is improved.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a method for determining photoetching limit stress and a method for improving photoetching process quality.
Background
The semiconductor Integrated Circuit (IC) industry has experienced a rapid growth. Technological advances in IC materials, design and manufacturing tools have resulted in multiple generations of ICs, where each generation of ICs has smaller and more complex circuitry than the previous generation of ICs. In the course of these advances, manufacturing methods, tools, and materials have all struggled to achieve the desire for smaller component sizes. Photolithography is one of the most important process steps in the IC processing and manufacturing industry.
In the photoetching process, a layer of photoresist is coated on a wafer (also called a silicon wafer), a light source is provided by an exposure device (Exposure Equipment), the light source irradiates the wafer through a mask plate or a photo mask (commonly called mask) with a circuit pattern, and the pattern on the mask plate is transferred into the photoresist layer by utilizing the photosensitive property of the photoresist material to form a photoresist pattern; then, with the photoresist pattern as a mask layer, a subsequent etching or ion implantation process is performed on the wafer.
As wafer size increases and thickness decreases, stresses during wafer processing can create significant warpage on larger and thinner wafers. For example, when a wafer is thinned after bonding, the degree of warpage due to bonding thinning stress becomes more and more pronounced when the thickness is thinned to 25 μm or less. When the wafer is warped, the focusing effect on the lithography of the wafer edge is great, the alignment difficulty of the subsequent lithography machine is increased, even the alignment occurs, and the accuracy of the pattern size (CD) is further affected, so that the performance of the device is changed.
Disclosure of Invention
Aiming at least one defect in the prior art, the application provides a method for determining the limit stress of lithography and a method for improving the quality of the lithography process, which are used for researching the influence of stress on focusing in the lithography process and determining the limit stress influencing the lithography process, thereby being beneficial to improving the quality of the lithography process.
In one aspect, the present application provides a method for determining a lithographic ultimate stress, comprising the steps of:
determining the most sensitive pattern of the photoetching process and a photoetching process window thereof, and taking the most sensitive pattern as a test pattern;
providing a plurality of wafers on which pre-lithography processes have been performed;
measuring stress values from the center to the edge of each wafer, and determining a minimum stress value position and a maximum stress value position;
forming a test pattern at a minimum stress value position and a maximum stress value position;
measuring focus values of test pattern positions on each wafer;
corresponding the focusing value with the corresponding stress value;
finding out the critical focus value exceeding the lithography process window, taking the wafer with the critical focus value as the target wafer, and taking the difference between the maximum stress value and the minimum stress value on the target wafer as the limit stress of the lithography process
。
In some embodiments of the present application, in determining the pattern that is most sensitive to the lithographic process, the pattern with the smallest lithographic process window is selected as the most sensitive pattern.
In some embodiments of the present application, the step of forming the test pattern at the minimum stress value location and the maximum stress value location specifically includes:
forming a photoresist layer on the surface of each wafer;
providing a mask plate, and forming a test pattern on the mask plate;
and placing the mask plate in exposure equipment, respectively executing exposure process at the minimum stress position and the maximum stress position of each wafer, and transferring the test pattern into the photoresist layer on the surface of each wafer.
In some embodiments of the present application, the minimum stress value position is a center position of the wafer and the maximum stress value position is an edge position of the wafer.
In some embodiments of the present application, a plurality of wafers that have been subjected to pre-lithography processes are provided as actual products that are processed in a production line to prior to a lithography process.
In some embodiments of the present application, stress of the wafer is measured using a stress measuring machine, and a focus value is measured using an optical linewidth measuring machine.
Another aspect of the present application provides a method of improving the quality of a lithographic process, comprising the steps of:
performing a pre-lithography process on the wafer;
measuring the stress value from the center to the edge of the wafer and the difference between the maximum stress and the minimum stress before performing the photolithography process
；
Determining stress differences
Whether or not the ultimate stress of any of the above schemes is exceeded>
；
If it is
Performing a photolithography process on the wafer;
if it is
The photolithography process is suspended and the pre-photolithography process is optimized to reduce the stress difference +.>
To the point of
And executing the photoetching process.
In some embodiments of the present application, during the pre-lithography process performed on the wafer, the center-to-edge stress values of the wafer after each process is completed are measured and recorded.
In some embodiments of the present application, when
When the stress value is from high to low after the completion of each process, the processes are optimized in turn until +.>
。
In some embodiments of the present application, the pre-lithography process includes one or more of film, planarization, and thinning.
Compared with the prior art, the invention has the advantages and positive effects that:
(1) According to the method for determining the lithography limit stress, provided by at least one embodiment of the application, the limit stress influencing the lithography process is determined by researching the influence of the stress of the wafer on the subsequent lithography aggregation value, so that the quality of the wafer is strictly controlled before the lithography process is executed, and the problem that the wafer is scrapped due to the fact that lithography cannot be smoothly performed due to warpage or an ideal pattern cannot be obtained after lithography is fundamentally avoided.
(2) The method for improving the quality of the photoetching process provided by at least one embodiment of the application can judge whether the warping degree generated by the accumulation of the wafer stress can meet the requirement of a photoetching process window in advance in the production and processing process by means of the determined limit stress, and can monitor and find unqualified products, so that the pre-process is improved and optimized in time, a large number of unqualified products are prevented from being scrapped after photoetching, the quality of the photoetching process is improved, the yield is improved, and unnecessary cost is reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a schematic view of a wafer undergoing thinning during processing and then buckling;
FIG. 2 is a schematic diagram of forming test patterns at the center and edge positions of a wafer according to an embodiment of the present invention;
FIG. 3 is a flow chart of a method for determining lithographic ultimate stress provided by an embodiment of the present invention;
FIG. 4 is a flowchart illustrating a method for improving the quality of a photolithography process according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It is apparent that the drawings in the following description are only some examples or embodiments of the present application, and it is possible for those of ordinary skill in the art to apply the present application to other similar situations according to these drawings without inventive effort. Moreover, it should be appreciated that while such a development effort might be complex and lengthy, it would nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and thus should not be construed as having the benefit of this disclosure.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is to be expressly and implicitly understood by those of ordinary skill in the art that the embodiments described herein can be combined with other embodiments without conflict.
It is to be understood that, although the figures may show a particular order of method steps, the order of the steps may differ from what is depicted. Furthermore, two or more steps may be performed simultaneously or partially simultaneously. Such variations will depend on the software and hardware selected and the designer's choice. All such variations are within the scope of the present disclosure.
In the description of the present application, it is understood that patterning a wafer includes the case of patterning a photoresist layer on the wafer surface.
The semiconductor manufacturing process is a process of forming a completed integrated circuit by depositing a thin film on a die wafer, photolithography, etching, ion implantation, planarization, and the like. Among them, the photolithography process is a key process for forming a circuit pattern of an integrated circuit on a photoresist, and can be used to define etching and ion implantation regions. It follows that the quality of the photolithographic process, which is the basis for the patterning process such as subsequent etching, will affect the quality and yield of the final semiconductor integrated circuit.
In the photolithography process, a circuit pattern on a mask plate is transferred into a Photoresist layer (Photoresist) on a wafer by an exposure apparatus to form a Photoresist layer pattern. The most accurate pattern dimensions can be obtained when the photoresist layer is at the optimal focus position of the exposure apparatus, with the other parameters of the exposure apparatus unchanged. However, if the wafer surface warps, the best focus position is deviated so as to affect the accuracy of the pattern size.
For example, as shown in fig. 1, after bonding a wafer to a wafer, a thinning process is performed on the wafer, and when the wafer is thinned to less than 25 μm, stress accumulation of bonding thinning causes the wafer to warp, and the edge of the wafer is tilted to make the surface of the wafer uneven. At present, the quantitative correspondence between the stress causing the wafer to warp and the influence degree of the stress on the focus value in the subsequent photoetching process is not studied, so that the influence of the stress on the pattern precision after photoetching cannot be quantified, and the improvement of the photoetching process quality is further influenced.
The method for determining the lithography limit stress comprises the steps of determining the limit stress influencing the lithography process by researching the influence of the stress of the wafer on the subsequent lithography aggregation value, so that the quality of the wafer is strictly controlled before the lithography process is executed, and the problem that the wafer is scrapped due to the fact that the lithography cannot be smoothly carried out due to warping or an ideal pattern cannot be obtained after the lithography is fundamentally avoided, thereby improving the quality of the lithography process, improving the yield and reducing unnecessary cost.
The method for determining the lithography limit stress provided by the embodiment of the application, as shown in fig. 3, comprises the following steps:
s101: determining the most sensitive pattern of the photoetching process and a photoetching process window thereof, and taking the most sensitive pattern as a test pattern;
s102: providing a plurality of wafers on which pre-lithography processes have been performed;
s103: measuring the stress value from the center to the edge of each wafer;
s104: forming a test pattern on each wafer at a minimum stress value position and a maximum stress value position;
s105: measuring focus values of test pattern positions on each wafer;
s106: the focus value of each wafer is corresponding to the corresponding stress value;
s107: finding out the critical focus value beyond the lithography process window, taking the wafer with the critical focus value as the target wafer, and taking the difference between the maximum stress value and the minimum stress value on the target wafer as the limit stress of the lithography process to be determined in the application
。
The difference between the maximum stress and the minimum stress can reflect the warpage degree of the whole wafer, and the warpage degree has a great influence on focusing in the subsequent photolithography process. Therefore, in the method, the maximum stress value position and the minimum stress value position are selected as research objects, and the influence of stress on subsequent focusing is quantified, so that whether the photoetching process can be successfully performed can be judged before photoetching. The critical focus value referred to herein refers to the focus value just beyond the lithography process window.
Each step in the determination method of the lithography limit stress in the present application will be described in detail below.
In performing step S101 to determine the pattern most sensitive to the photolithography process, in particular, a wafer or a plurality of wafers are provided, which may be actual products or test products, the pattern being a pattern specified in the standard specification of the products, such as a dense pattern, a semi-dense pattern and an isolated pattern formed on the wafer. Specifically, a photoresist layer is formed on the surface of the wafer, a pattern is formed on the mask plate, and the mask plate is exposed by using an exposure device in a lithography system, so that the pattern on the mask plate is transferred into the photoresist layer. The photolithography process window of each pattern is determined, and the determination method is a conventional technical means for those skilled in the art, and will not be described in detail herein.
In some embodiments, the pattern with the smallest photolithography process window is selected as the pattern that is most sensitive to the photolithography process. It will be appreciated that in all patterns, a small lithography process window means that the effect of stress on its lithography process is more strongly reflected. And (3) selecting a pattern with a small photoetching process window as a test pattern to study the influence of stress on photoetching focusing, and when the stress of a wafer can meet the photoetching requirement of the pattern with the smallest photoetching process window, other patterns with larger photoetching process windows can necessarily meet the corresponding photoetching requirement during photoetching.
The wafers provided in step S102 that have been subjected to the pre-lithography process may be subjected to subsequent testing using actual products processed in the production line to the pre-lithography process, so that the wafer stresses that are subsequently investigated are more consistent with the actual production line conditions.
According to the method and the device, the stress distribution before wafer photoetching and the focusing value of the photoetching process are studied, the relation between the stress distribution before wafer photoetching and the focusing value of the photoetching process are corresponding, so that the influence of the stress on photoetching is quantified, and the influence of the stress on the quality of photoetching can be evaluated.
In step S103, the stress values from the center to the edge of each wafer are measured, and the distribution of the stress on the wafer surface can be obtained for subsequent study. For example, in some embodiments, one or more test lines may be taken in a radial direction of the wafer, a plurality of test locations may be taken on the test lines, stress values of the plurality of test locations may be measured prior to performing photolithography, and during this process, a maximum stress value, a minimum stress value, and their corresponding locations may be determined. In some embodiments, a stress measurement tool may be used to measure the stress of the wafer.
In step S104, test patterns are formed on the minimum stress value position and the maximum stress value position on each wafer by means of a photolithography process. Specifically: firstly, forming photoresist layers on the surfaces of wafers, wherein the wafers are processed through a pre-photoetching process and corresponding stress accumulation is generated; subsequently, a mask plate is provided, and a test pattern is formed on the mask plate, wherein the test pattern is the most sensitive pattern, for example, in some embodiments, an isolated pattern; and placing the mask plate in exposure equipment, respectively executing exposure process at the minimum stress position and the maximum stress position of the wafer, and transferring the test pattern into the photoresist layer on the surface of each wafer.
Subsequently, step S105 is performed to measure the focus value of the test pattern position on each wafer, so as to obtain the distribution of the focus value on the wafer surface. After the focus value of the test pattern position on the wafer is obtained, it can be correlated with the stress value of the corresponding position. In some embodiments, the focus value may be measured using an optical line width measurement device (SCD).
Executing step S107, finding out the critical focus value exceeding the lithography process window from the focus values of the wafers, when the focus value is larger than the critical focus value, the wafer with the critical focus value is the target wafer, the warp degree of the target wafer is the critical warp degree of the wafer which cannot be successfully subjected to lithography, and the difference between the maximum stress value and the minimum stress value is the limit stress of the lithography process
。
Generally, during the processing of a wafer, the stress applied to the center of the wafer is minimal, and the wafer is not substantially deformed, while the edge of the wafer is the most stressed location, and the stress is accumulated during the processing in the preamble, so that the wafer is deformed by buckling. Thus, in some embodiments, wafer center and wafer edge locations may be directly targeted for investigation.
According to the above embodiment, in step S103, stress values of the center and the edge of each wafer are measured, and a stress value difference between the center and the edge of the wafer is obtained, where the stress value difference may reflect the degree of warpage of the wafer, and the degree of warpage may affect the focus value of the subsequent photolithography process.
In step S104, an exposure process is performed at the center and edge positions of each wafer, respectively, so that corresponding test patterns (as shown in fig. 2) are formed at the center and edge of the wafer for subsequent measurement.
In step S105, focus values of the center and the edge of each wafer are measured. After the stress values and the focusing values of the center and the edge of the wafer are obtained, the stress values and the focusing values of the center position of the wafer are corresponding, and the stress values and the focusing values of the edge position of the wafer are also corresponding. That is, the minimum stress, maximum stress and stress differences of the entire wafer, and the differences of the minimum focus value, the maximum focus value and the focus value corresponding thereto are obtained.
Since the maximum warpage occurs at the edge position of the wafer, the critical focus value may be considered as the focus value at the edge position of the wafer, and the target wafer with the critical focus value is found through the critical focus value, and the stress value difference between the center and the edge position of the target wafer may reflect the critical warpage degree, and the stress value difference is regarded as the limit stress in the present application
. In the subsequent processing, when the stress value difference between the center and the edge of the wafer is greater than or equal to +.>
If so, it is determined that the photolithography process cannot be performed smoothly.
It will be appreciated that, since the wafer has symmetry, the stress and warpage at each location of the edge can be considered the same, and therefore, in the determination of the above limiting stress, it is sufficient to take only one location at the edge to form a test pattern, and measure the stress value and focus value corresponding to that edge location.
A second aspect of the present application provides a method of improving the quality of a lithographic process, as shown in fig. 4, comprising the steps of:
s201: performing a pre-lithography process on the wafer;
s202: measuring the stress value from the center to the edge of the wafer and the difference between the maximum stress and the minimum stress before performing the photolithography process
；
S203: judgingDifference in break stress
Whether the limit stress determined in the above embodiment is exceeded>
；
S204: if it is
Performing a photolithography process on the wafer;
s205: if it is
The photolithography process needs to be suspended, and the pre-photolithography process is optimized to reduce the stress difference +.>
To->
And executing the photoetching process.
The ultimate stress determined by means of the above examples
During the production process, it can be determined in advance whether the degree of warpage due to wafer stress accumulation can meet the requirements of the photolithography process window. If the requirements are met, the subsequent photoetching process can be directly carried out; if the requirements are not met, the photoetching process is tentatively set, the photoetching pre-working procedure is required to be optimized, and after the focus value and the process window required by the photoetching are reached, the photoetching process is carried out, and unqualified products can be monitored and found, so that the pre-working procedure is improved and optimized in time, and a large number of unqualified products are prevented from being scrapped after the photoetching, and the low yield and the high cost are caused.
In some embodiments, during the pre-lithography process performed on the wafer, the center-to-edge stress values of the wafer after each process is completed are measured and recorded, so that the contribution of each process to the stress values can be determined.
When light is performedDiscovery before etching process
In this case, the subsequent photolithography process cannot be performed smoothly, and the pre-photolithography process needs to be optimized first. In the optimization process, the optimization of the working procedures can be considered in sequence from the big to the small according to the contribution degree of the working procedures to the stress value until the stress value is enabled to be +.>
The requirements of the photoetching process can be met more effectively and rapidly. Firstly, the process with the largest contribution degree (namely, the largest stress value) is optimized, and when the process is optimized and meets the process requirement of photoetching, the photoetching process can be smoothly executed without adjusting other processes.
In some embodiments, the pre-lithography process includes one or a combination of two or more of thin film, planarization, thinning.
Finally, it should be noted that: in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
The above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same; while the invention has been described in detail with reference to the preferred embodiments, those skilled in the art will appreciate that: modifications may be made to the specific embodiments of the present invention or equivalents may be substituted for part of the technical features thereof; without departing from the spirit of the invention, it is intended to cover the scope of the invention as claimed.
Claims (9)
1. A method of determining a lithographic ultimate stress comprising the steps of:
determining the most sensitive pattern of the photoetching process and a photoetching process window thereof, and taking the most sensitive pattern as a test pattern;
providing a plurality of wafers on which pre-lithography processes including one or more of thin film, planarization, and thinning have been performed;
measuring stress values from the center to the edge of each wafer, and determining a minimum stress value position and a maximum stress value position;
forming the test pattern at the minimum stress value position and the maximum stress value position;
measuring focus values of the test pattern positions on each wafer;
corresponding the focusing value with the corresponding stress value;
finding a critical focus value exceeding a lithography process window, taking a wafer with the critical focus value as a target wafer, and taking the difference between the maximum stress value and the minimum stress value on the target wafer as the limit stress of the lithography process
。
2. The method of claim 1, wherein in determining the pattern that is most sensitive to the lithography process, the pattern with the smallest lithography process window is selected as the most sensitive pattern.
3. The method of determining a lithographic limit stress according to claim 1, wherein the step of forming the test pattern at the minimum stress value location and the maximum stress value location comprises:
forming a photoresist layer on the surface of each wafer;
providing a mask plate, and forming the test pattern on the mask plate;
and placing the mask plate in exposure equipment, respectively executing exposure process at the minimum stress position and the maximum stress position of each wafer, and transferring the test pattern into the photoresist layer on the surface of each wafer.
4. A method of determining a lithographic limit stress according to claim 3, wherein the minimum stress value position is a center position of the wafer and the maximum stress value position is an edge position of the wafer.
5. The method of claim 1, wherein the plurality of wafers for which pre-lithography process has been performed are provided as actual products in the production line before processing to the lithography process.
6. The method of claim 1, wherein the stress of the wafer is measured using a stress measuring machine and the focus value is measured using an optical linewidth measuring machine.
7. A method of improving the quality of a lithographic process, comprising the steps of:
performing a pre-lithography process on the wafer, the pre-lithography process including one or more of a thin film, a planarization, and a thinning process;
measuring the stress value from the center to the edge of the wafer and the difference between the maximum stress and the minimum stress before performing the photolithography process
；
Determining stress differences
Whether or not the ultimate stress as claimed in any of claims 1-6 is exceeded>
；
If it is
Executing a photoetching process on the wafer;
if it is
The photolithography process is suspended and the photolithography is performedThe pre-process is optimized to reduce the stress difference +.>
To the point of
And executing the photoetching process.
8. The method of claim 7, wherein the center-to-edge stress values of the wafer after each process is completed are measured and recorded during a pre-lithography process performed on the wafer.
9. The method of improving photolithographic process quality of claim 8 wherein, when
When the stress value is from high to low after the completion of each process, the processes are optimized in turn until +.>
。/>
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| JPH0684764A (en) * | 1992-08-31 | 1994-03-25 | Toshiba Corp | Manufacture of x-ray mask and instrument for measuring stress of x-ray mask |
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| JP4853685B2 (en) * | 2009-03-31 | 2012-01-11 | 信越化学工業株式会社 | Inspection method and pass / fail judgment method for photomask blank or manufacturing intermediate thereof |
| WO2013080252A1 (en) * | 2011-11-29 | 2013-06-06 | パナソニック株式会社 | Method for forming crystalline thin film, and method for manufacturing thin film transistor |
| JP5944873B2 (en) * | 2013-09-20 | 2016-07-05 | 新日鉄住金マテリアルズ株式会社 | Method for evaluating internal stress of silicon carbide single crystal wafer and method for predicting warpage of silicon carbide single crystal wafer |
| WO2017172158A1 (en) * | 2016-03-29 | 2017-10-05 | Applied Materials, Inc. | Integrated metrology and process system for semiconductor substrate local stress and overlay correction |
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