CN115967675A

CN115967675A - Method for establishing and searching NDN routing table based on bloom filter

Info

Publication number: CN115967675A
Application number: CN202211539357.8A
Authority: CN
Inventors: 卜祥元; 卢江天; 李彤; 刁文澜; 王啸天; 徐焜
Original assignee: Beijing Institute of Technology BIT
Current assignee: Beijing Institute of Technology BIT
Priority date: 2022-12-02
Filing date: 2022-12-02
Publication date: 2023-04-14

Abstract

The invention discloses a method for establishing and searching an NDN routing table based on a bloom filter, belonging to the field of routing of computer networks. The implementation method of the invention comprises the following steps: by utilizing the data structure of the bloom filter, the longer NDN name is converted into a hash value with a fixed length to be stored, so that the requirement of a storage space is reduced; the advantages of the FPGA on parallel computation are fully utilized, a bloom filter structure suitable for parallel computation is designed, a plurality of hash functions are used for computation at the same time, and each level of search results matched with the longest prefix are output through data flow, so that the speed and the throughput of searching a routing table are increased; aiming at hash conflicts possibly existing in the bloom filter, a second layer of filter is designed, and the NDN names with the hash conflicts are filtered, so that the possibility of the conflicts is reduced to the minimum, and the reliability of the routing table lookup is improved. The invention greatly improves the searching efficiency and the forwarding efficiency and the throughput of the interest packet through the Hash pipeline structure.

Description

Method for establishing and searching NDN routing table based on bloom filter

Technical Field

The invention relates to a method for establishing and searching an NDN routing table based on a bloom filter, belonging to the field of routing of computer networks.

Background

Compared with an end-to-end IP network communication mode, a Named Data Networking (NDN) takes Data content as a center, a content name is used as an addressing mode, a routing table is established based on the content name for communication, and the relation between the Data content and the position is decoupled. The NDN Forwarding routing table is established by that a content producer informs a router in a network of the name of data content held by the node, and the router establishes a content name routing entry in a Forwarding Information Base (FIB) according to the data content name and an interface for receiving notification Information, so as to provide a Forwarding basis for subsequent data content requests. The basic structure of the FIB routing entry is a mapping between the NDN name and the network port number, which represents the association between the NDN name in the interest packet and the forwarding direction of the interest packet.

The transmission mechanism of the NDN network is that data communication is carried out in a mode that a user sends an interest packet to drive a content producer to reply a data packet, and the interest packet and the data packet both contain a content name to identify data content which the user needs to obtain. When the router forwards the interest packet from the user, firstly, a routing entry corresponding to the name in the FIB is inquired, and the most appropriate interface is selected from a plurality of forwarding interfaces under the entry to forward the data request. An interface into which an Interest packet flows is called a downstream interface by the NDN, an interface out of which the Interest packet flows is called an upstream interface by the NDN, a Pending Interest Table PIT (Pending Interest Table) of the NDN node records the content name of the Interest packet forwarded by the current node and the corresponding downstream interface thereof, and the received data packet is ensured to return to the initiation position of the Interest packet request according to the original route;

the name naming mode of the NDN is to divide the content name into a plurality of fields, and carry out longest prefix matching according to the name field in FIB retrieval: for example, for an interest package with a name "/ab/cd", the matching item for "/ab/cd" is retrieved first, and if not, the "/ab" is retrieved continuously.

An FPGA (Field Programmable Gate Array) is a product of further development based on Programmable devices such as PAL (Programmable Array logic) and GAL (general Array logic). The circuit is a semi-custom circuit in the field of Application Specific Integrated Circuits (ASICs), not only solves the defects of custom circuits, but also overcomes the defect that the number of gate circuits of the original programmable device is limited.

Bloom filters (Bloom filters) were proposed by Bloom in 1970. We can view it as a data structure consisting of two parts, a binary vector (or bit array) and a series of random mapping functions (hash functions). It takes less space and is more efficient than List, map, set, etc. data structures, but has the disadvantage that the results it returns are probabilistic rather than very accurate. The more elements that are theoretically added to the set, the greater the probability of false positives. In addition, data stored in the bloom filter is not easily deleted. The bloom filter has low space occupation and less memory access times, and can fully optimize the search speed and the space requirement.

At present, the query algorithm of the FIB table mainly includes software represented by a CPU and hardware represented by an FPGA. For the FIB table realized by the CPU, the FIB table is mostly searched by using a bloom filter algorithm modified from an IP address search algorithm, and the FPGA search algorithm is mostly transplanted by using the CPU search algorithm. The above algorithm has the following disadvantages:

(1) In terms of algorithm design, the minimum unit of the longest prefix match is a bit IP address, the name length of the NDN is not fixed and the minimum unit of the longest prefix match is a name field, compared to the IP address having a length of 32 bits or 4 bytes. Most of the current query algorithms are improved by routing lookup algorithms of TCP/IP, and the algorithms have a plurality of redundant operations. For example, the original IP address is 4 bytes, 32 values need to be queried in the worst case for the longest prefix match, and the ratio of the name length of NDN to the number of needed queries is much larger than that of the IP address, so that the performance bottleneck is changed from difficulty in querying more matching items in a short time to difficulty in completing comparison of longer names in a short time.

(2) In equipment selection, a CPU (central processing unit) search algorithm is generally a serial search algorithm with more steps, and the migration of the algorithms to an FPGA (field programmable gate array) has an insignificant effect on reducing the number of steps and a weak acceleration effect. For example, a bloom filter algorithm implemented on a general CPU needs to access a memory for multiple times, which may become a performance bottleneck restricting the increase of the search speed on an FPGA, but may not become a bottleneck on the CPU because of a difference in memory structures used by the CPU and the FPGA. If the CPU algorithm is simply transplanted, the performance cannot be optimal.

The above disadvantages are mainly caused by the fact that the existing search algorithm is not designed for NDN route search and FPGA search at the beginning of design, but is improved and transplanted from a software algorithm for IP address search, the algorithm is difficult to achieve a high search speed due to a large number of steps, and the requirement of a storage space is difficult to be reduced to a low enough value due to the difference between a software storage unit and a hardware storage unit.

Disclosure of Invention

Aiming at the technical problems that the 'speed is not fast enough' and the 'storage space occupation is too much' in a Forwarding Information Base FIB (Forwarding Information Base) table lookup algorithm of a Named Data network NDN (Named Data Networking), the invention mainly aims to provide a method for establishing and looking up an NDN routing table based on a bloom filter, and a longer NDN name is converted into a hash value with a fixed length for storage by utilizing a Data structure of the bloom filter, so that the requirement of the storage space is reduced; the advantages of the FPGA on parallel computation are fully utilized, a bloom filter structure suitable for parallel computation is designed, a plurality of hash functions are used for computation at the same time, and each level of search results matched with the longest prefix are output through data flow, so that the search speed and throughput of a routing table are increased; aiming at hash conflicts possibly existing in the bloom filter, a second layer filter is designed, and NDN names with the hash conflicts are filtered, so that the possibility of the conflicts is reduced to the lowest, and the reliability of the routing table lookup is improved.

In order to achieve the purpose, the technical scheme of the invention is as follows:

the invention discloses an NDN routing table establishing and searching method based on bloom filters, which comprises the steps of establishing storage formats of two bloom filters, wherein each bloom filter comprises a plurality of hash tables, and the depth of the first bloom filter is greater than that of the second bloom filter; converting the NDN name into a plurality of fixed-length hash values with the length shorter than that of the NDN name through a plurality of hash functions, and storing the converted fixed-length hash values into each hash table in a first bloom filter; calculating NDN names with hash conflicts in the bloom filters, converting the NDN names with the hash conflicts in the first bloom filter into a plurality of other hash values through other hash functions, storing the converted hash values into hash tables in the second bloom filter, and then sending the two bloom filters to the FPGA to be stored in a Block RAM on the FPGA chip; when an interest packet of a user is received, calculating a hash value of an NDN name in the interest packet sent by the user to obtain a plurality of hash value result data streams meeting the longest prefix matching requirement, and improving the searching efficiency through parallel calculation of a plurality of hash functions; inputting the hash value result data stream into a Block RAM as a read address to obtain two groups of read data streams which respectively correspond to the outputs of the two bloom filters; judging whether hash collision exists in the first group of search result data flow, if hash collision does not exist, adopting the first group of search results as a matching result, if hash collision exists, adopting the second group of search results as a matching result, constructing a matching result data flow by the matching result, and filtering the hash collision through a second bloom filter, so that the hash collision probability is reduced, and the forwarding reliability of the interest packet is improved; according to the matching result data flow, the forwarding network port of the interest packet is obtained under the longest prefix matching principle, the interest packet is forwarded, the searching efficiency is greatly improved through a Hash pipeline structure, and the forwarding efficiency and the throughput of the interest packet are improved.

The invention discloses a method for establishing and searching an NDN routing table based on a bloom filter, which comprises the following steps:

step 1, two bloom filter storage formats are constructed, each bloom filter comprises a plurality of hash tables, and the depth of the first bloom filter is larger than that of the second bloom filter. Each hash table corresponds to different hash functions, and query can be simultaneously carried out on the FPGA so as to meet the requirement of parallel computation;

step 1.1: generating a first two-dimensional array with a width of n and a depth of

The data bit width is m, the initial data is 0, and the data bit width is marked as a first bloom filter A;

wherein n is the number of used hash functions, and m is determined by the number of ten-gigabit Ethernet interfaces on the FPGA;

the network port is an interface of a gigabit Ethernet optical fiber connected to the FPGA;

wherein, d ₁ An exponential coefficient for the depth of the first bloom filter a;

step 1.2: generating a second two-dimensional array having a width of n and a depth of

The data bit width is m, the initial data is 0, and the data is marked as a second bloom filter B;

the depth of the first bloom filter a is larger than that of the second bloom filter B;

in order to avoid that excessive hash functions consume excessive FPGA on-chip computing resources, preferably, the number n of the hash functions is not more than 4;

to balance the storage space consumption on the FPGA chip and the reliability of the search result, d is preferred ₁ Is between 17 and 20, d ₂ Is taken as value of d ₁ -3～d ₁ -2.

Step 2, converting the NDN name in the FIB into a plurality of hash values with fixed lengths shorter than the length of the NDN name through a plurality of hash functions, and storing the converted hash values with the fixed lengths into each hash table in a first bloom filter A, so that the NDN name with uncertain length is converted into a numerical value in an array with fixed size, and the requirement of a storage space is reduced;

step 2.1: segmenting the NDN name in the FIB table according to the longest prefix matching requirement;

the longest prefix match refers to that in the NDN, if one NDN name matches a plurality of query results, the most definite query result, namely the query result with the largest number of NDN name paragraphs, is taken as a matching item;

step 2.2: calculating a hash value of each segment of NDN name segmented in the step 2.1 through n hash functions;

the hash function refers to mapping from non-fixed-length input to fixed-length output;

in order to ensure that the hash value result is uniformly distributed and simultaneously reduce the FPGA on-chip operation resources consumed by the hash function as much as possible, the selection of the hash function is preferably as shown in formula (1):

in the formula (1), name is NDN name input, and 16 bits are input to the function each time; ^ is an XOR operator; % is division remainder operator; h (x) is a 32-bit hash value, and H takes the last d bits; v is a constant, and a plurality of different Hash functions are obtained by selecting a plurality of different V;

step 2.3: inputting the hash value of each segment NDN name calculated in step 2.2 into the hash function through another hash function, outputting the total hash value of the NDN names, and respectively recording the total hash value as H ₁ 、H ₂ 、……、H _n ；

Step 2.4: if the port number of the routing table corresponding to the current NDN name is w, reading the array A in the step 1.2, and enabling A [ k-1 ]][H _k ]The w-th bit of (1) is rewritten into all integers of 1, k traversal 1-n, so that the n converted hash values are stored in n hash tables in a first bloom filter, the NDN name with uncertain length is converted into a numerical value in an array with fixed size, and the requirement of a storage space is reduced;

the port number of the routing table is a destination port for sending the interest packet after receiving the interest packet corresponding to the NDN name;

wherein, A [ x ] [ y ] represents a two-dimensional array A, namely the number in the first bloom filter A, and the number is positioned in the x-th row and the y-th column of A;

step 2.5: if the FIB table has other NDN names, the step 2.1 is skipped, otherwise, if all the NDN names in the FIB table are processed, the step 3 is continued.

Step 3, aiming at the first bloom filter constructed in the step 2, calculating the NDN name with the hash collision, converting the NDN name with the hash collision in the first bloom filter A into a plurality of other hash values through other hash functions, and storing the converted hash values into each hash table in the second bloom filter B;

the hash conflict is that two or more NDN names have the same hash value, so that the query result is uncertain;

step 3.1: calculating the hash value of the NDN name according to the hash function in step 2.2, specifically comprising the following substeps:

step 3.1A: respectively calculating the hash value of each segment of NDN name through the hash function in the step 2.2;

step 3.1B: inputting the hash value of each segment of NDN name calculated in the step 4.3A into the hash function through the hash function in the step 2.3, outputting a total hash value of the NDN names, and marking as H ₁ 、H ₂ 、……、H _n ；

Step 3.2: for the first bloom Filter A, all A [ k-1 ]][H _k ]K traverses all integers from 1 to n, bitwise AND operation is carried out, and if the calculated result exceeds one bit which is 1, the current NDN name is judged to have Hash collision;

the bitwise and operation is a logic operation, is represented by a symbol "&", is used for operating each input bit, if all the input xth bits are 1, the xth bit is output to be 1, otherwise, the xth bit is 0;

the step 3.2 is used for determining the NDN name range of the hash collision;

in bloom Filter A, the NDN name in each FIB table is raisedHippergo, it is required that n hash values of the NDN name store another port number, that is, there are n other NDN names, have a common port number different from the port number of the current NDN name, and the probability p of hash collision ₁ As shown in equation (2):

in the formula (2), len is the number of NDN names in the FIB table;

step 3.3: selecting another n hash functions different from the step 2.2, if the current NDN name judges that hash collision occurs in the step 3.2, calculating a hash value of the generated NDN name, otherwise, not calculating, and specifically comprising the following substeps:

step 3.3A: respectively calculating the hash value of each segment of NDN name through a new hash function;

step 3.3B: inputting the hash value of each segment of NDN name calculated in the step 4.3A into the hash function through the hash function in the step 2.3, outputting a total hash value of the NDN names, and marking as H _n+1 、H _n+2 、……、H _2*n ；

Step 3.4: if the port number of the routing table corresponding to the current NDN name is w, for the second bloom filter B, B [ k-1 ]][H _n+k ]The w-th bit of (a) is rewritten as all integers of 1, k traversal 1-n;

step 3.5: if the FIB table has other NDN names, jumping to step 3.1, otherwise, if all the entries in the FIB table are processed, continuing to step 4;

in bloom filter B, hash collision occurs to the NDN name in each FIB table, and it is necessary that n hash values of the NDN name store another port number, that is, there are n other NDN names, and have a common port number different from the port number of the current NDN name, and the probability p of hash collision occurs ₂ As shown in equation (3):

step 4, sending the first bloom filter A constructed in the step 2 and the second bloom filter B constructed in the step 3 to the FPGA and storing the two filters into a Block RAM on an FPGA chip;

step 4.1: generating two groups of Block RAMs, each group is n, the first group has depth of

A second group of depth->

The data bit width is the number m of the router network ports, and the initial data is 0;

the Block RAM is a random access memory on an FPGA chip and is a main storage unit on the FPGA chip; the depth of the Block RAM represents the number of internal storage data, and the bit width represents the number of bits contained in each data; the Block RAM has 3 inputs and 1 output, the inputs are write address, write data and read address, and the output is read data;

step 4.2: transmitting the data generated by CPU to FPGA, and A0]、A[1]…A[n-1]Storing the data into a first group of Block RAMs, and writing data into A [ k-1 ] when the write address of the kth Block RAM of the first group is j][j]K over all integers from 1 to n, j over

All of the integers of (1); b0]、B[1]…B[n-1]Storing the data into a second group of Block RAMs, and writing data into B [ k-1 ] when the write address is i for the kth Block RAM of the second group][i]K over all integers from 1 to n, i over

All of the integers of (a).

Step 5, the user sends an interest packet, the hash value of the NDN name in the interest packet sent by the user is calculated, a plurality of hash value result data streams meeting the longest prefix matching requirement are obtained, and the searching efficiency is improved through parallel calculation of a plurality of hash functions;

step 5.1: extracting an NDN name part of an interest package in a user;

step 5.2: segmenting the NDN name of the interest packet according to the longest prefix matching requirement, then converting the NDN name into data flow, and outputting one segment of the NDN name in each clock cycle;

the clock is a signal which is continuously jumped between 0 and 1 according to a fixed frequency in the digital circuit and is used for driving the digital circuit module to run;

step 5.3: calculating 2 x n hash values of each segment of the NDN name through the 2 x n hash functions selected in the step 2.2 and the step 3.3, inputting 16 bits to the hash value calculation module in each clock cycle, and obtaining the hash value of the single segment of the NDN name after all the NDN names are input;

the hash calculation module is a part of the circuit and is used for converting data input with 16 bit width and multiple clock cycles into hash value output;

step 5.4: and (3) sending the data stream of the single segment NDN name hash value calculated in the step (5.3) to another hash calculation module through the hash function selected in the step (2.3), outputting the hash values of the 1 st to k th segments in the kth clock cycle for the NDN name of the p segment, and traversing all integers from 1 to p by k, thereby obtaining the total hash value data stream meeting the longest prefix matching requirement.

Step 6, inputting the hash value result data stream in the step 5 into a Block RAM as a read address, outputting m-bit read data corresponding to n input read addresses in two groups, wherein the m-bit read data correspond to n input read addresses in each group and correspond to the output of bloom filters A and B respectively, and constructing a search result data stream by the Block RAM read data;

step 6.1: inputting the total hash value data stream into two groups of Block RAMs as a read address;

the reading address is one of the inputs of the Block RAM, and after the reading address is input, the Block RAM can output the data stored in the corresponding address;

step 6.2: obtaining read data output of a Block RAM, obtaining a corresponding search result for each data in the hash value data stream, obtaining 2 groups of search result data streams with n bit widths of m in each group, and respectively corresponding to a bloom filter A and a bloom filter B;

step 7, judging whether hash collision exists in the first group of search result data flow in the step 6, if no hash rush-in exists, adopting the first group of search result as a matching result, if the hash collision exists, adopting the second group of search result as the matching result, constructing a matching result data flow by the matching result, and filtering the hash collision through a second bloom filter, so that the probability of the hash collision is reduced, and the reliability of forwarding the interest packet is improved;

step 7.1: performing bitwise AND operation on the two groups of search result data streams obtained in the step 6 respectively to obtain two operation results with the bit width of m corresponding to the bloom filters A and B;

step 7.2: and judging whether 2 or more bits of the operation result of the bloom filter A are 1, if so, representing that hash collision exists, selecting the operation result of the bloom filter B as output, otherwise, if not, representing that collision does not occur, selecting the operation result of the bloom filter A as output, and constructing query result data flow by the output.

And 8, according to the matching result data flow in the step 7, obtaining a forwarding network port of the interest packet under the longest prefix matching principle, forwarding the interest packet, and greatly improving the searching efficiency and the forwarding efficiency and the throughput of the interest packet through a Hash pipeline structure.

Step 8.1: setting an initial value of a matching result to be 0, according to a longest prefix matching principle, if the output of the query result data stream in the step 7.2 is not 0, representing matching, replacing the matching result with the current query result to indicate that more accurate matching occurs, otherwise, not modifying the matching result, and outputting forwarding gateway information of the interest packet with m bit width after the query of all NDN name paragraphs is completed;

step 8.2: and if the kth bit is 1 in the interest packet forwarding network port information obtained in the step 8.1, sending the interest packet to the kth network port, wherein k traverses all integers from 1 to m, and if a plurality of bits are 1, forwarding the interest packet to a plurality of network ports at the same time.

Has the advantages that:

1. compared with the prior art that the bloom filter method based on the CPU is used for searching through serial operation, the method for establishing the NDN routing table based on the bloom filter disclosed by the invention fully utilizes the parallel computing capability of the FPGA to simultaneously complete the steps which need to be sequentially carried out on a plurality of CPUs in the same clock cycle, thereby achieving higher searching throughput.

2. Compared with the prior bloom filter method based on a CPU, which takes a computer memory as a main storage unit and needs to read memory data for multiple times for operation, the invention discloses a bloom filter based NDN routing table establishing and searching method, which reads a Block RAM on an FPGA chip in parallel, can obtain a query result only by reading a memory of one clock period, can obtain the search result in a shorter time, and reduces the route searching delay.

3. Compared with the hash collision problem in the prior bloom filter method, the NDN routing table establishing lookup method based on the bloom filter disclosed by the invention filters the collision situation through second-layer lookup, and improves the reliability of the lookup result by replacing the lower collision rate than the prior method with lower storage space cost;

4. compared with the prior bloom filter method based on the CPU, the method for establishing and searching the NDN routing table based on the bloom filter further optimizes the routing searching speed, improves the searching throughput, reduces the occurrence probability of the hash collision and realizes efficient, quick and reliable routing table searching by constructing the bloom filter framework suitable for parallel computation and filtering the hash collision.

Drawings

Fig. 1 is a flowchart of the establishing and searching operations in the method for establishing and searching a bloom filter-based NDN routing table according to the present invention.

Fig. 2 is a heat map of the hash function corresponding to the formula (1) in the method for establishing and searching the NDN routing table based on the bloom filter of the present invention, which shows the distribution of the hash function over all values.

Fig. 3 is a timing chart of searching after receiving an interest packet in the method for establishing a NDN routing table based on a bloom filter according to the present invention.

Detailed Description

The present invention will be described in detail with reference to the accompanying drawings and embodiments, and the technical problems and advantages solved by the technical solutions of the present invention will be discussed at the same time. It should be noted that the described embodiments are intended to facilitate the understanding of the present invention and do not limit the present invention in any way.

Example 1

In this embodiment, based on the NDN network, a user sends an interest packet request to compute a task, and a router queries a forwarding location of the interest packet according to the FIB table and forwards the interest packet. As shown in fig. 1, the method for establishing and searching the NDN routing table based on the bloom filter of the present invention is specifically implemented as follows:

step I, two bloom filter storage formats are constructed, each bloom filter comprises a plurality of hash tables, and the depth of the first bloom filter is larger than that of the second bloom filter. Each hash table corresponds to different hash functions, and can be simultaneously inquired on the FPGA so as to meet the requirement of parallel computation, and the method specifically comprises the following substeps:

step I.1 generating a first two-dimensional array with a width of 2 and a depth of 2

The data bit width is 4, the initial data is 0, and the data is marked as a first bloom filter A;

step I.2 generating a first two-dimensional array with a width of n and a depth of n

The data bit width is 4, the initial data is 0, and the data is marked as a second bloom filter B;

step II, converting the NDN name in the FIB into a plurality of hash values with fixed length shorter than the NDN name length through a plurality of hash functions, and storing the converted hash values with fixed length into each hash table in the first bloom filter A, which specifically comprises the following substeps:

step II.1, the NDN name in the FIB table is segmented according to the longest prefix matching requirement, the first bar obtains ab, the second bar obtains ab, cde and fghi, and the third bar obtains jk and lmn;

step II.2, calculating the hash value of each segment of NDN name segmented in the step 2.1 through 2 hash functions;

the hash function used is:

wherein, name is name input, 16 bits are input to the function each time, H (x) is a hash value of 32 bits, H takes the last d bits, d is 19 in step II.2, and d is 17 in step III.3;

wherein, different hash functions can be obtained by selecting different initial values V.

Step ii.3, inputting the hash value of each segment name calculated in step ii.2 into the hash function through another hash function (selecting another V value), and outputting a total hash value of the names, assuming that the calculation result is shown in table 1;

table 1 FIB table in the example

Name (R)	Routing port number	H ₁	H ₂	H ₃	H ₄
						/ab	3	123	234	/	/
/ab/cde/fghi	2	123	345	456	567
						/jk/lmn	3	234	345	/	/

Step II.4 when the current name is/ab, H ₁ ＝123，H ₂ =234, net gape number 3, compare A [0][123]Rewriting from 0 to 0100, and A [1]][234]Rewritten from 0 to 0100;

when the current name is/ab/cde/fghi, H ₁ ＝123，H ₂ =345, net gape number 2, compare A [0][123]Rewriting from 0100 to 0110, A [1]][345]Rewrite from 0 to 0010;

when the current name is/jk/lmn, H ₁ ＝234，H ₂ =345, net mouth number 3, compare A [0][234]Rewriting from 0 to 0100, and A [1]][345]Rewriting from 0010 to 0110;

step II.5, if the FIB table has other names, jumping to step II.1, otherwise, if all the entries in the FIB table are processed, continuing to step III;

step III, aiming at the first bloom filter constructed in the step 2, calculating the NDN name with the hash collision, converting the NDN name with the hash collision in the first bloom filter A into a plurality of other hash values through other hash functions, and storing the converted hash values into each hash table in the second bloom filter B, which specifically comprises the following substeps:

step III.1, according to the hash function in the step II.2, calculating the hash value of the name, and still obtaining H ₁ And H ₂ ；

Step III.2, when the current name is/ab, bitwise AND operation is carried out on A [0] [123] and A [1] [234] to obtain the result of 0110&0100=0100, only one bit is 1, and no hash collision exists;

when the current name is/ab/cde/fghi, bitwise AND operation is carried out on A [0] [123] and A [1] [345] to obtain a result of 0110&0110=0110, more than one bit is 1, and hash collision exists;

when the current name is/jk, bitwise AND operation is carried out on A [0] [234] and A [1] [345] to obtain the result of 0100&0110=0100, only one bit is 1, and no hash collision exists;

step III.3, another n hash functions different from the step 2.2 are selected, and H is calculated for the hash conflicts/ab/cde/fghi ₃ And H ₄ The other two names are not calculated;

step III.4 when the current name is/ab/cde/fghi, H ₃ ＝456，H ₄ =567, net gape number is 2, compare B [0][456]Rewrite from 0 to 0010, and rewrite B [1]][567]Rewrite from 0 to 0010;

step III.5, if the FIB table has other names, jumping to step III.1, otherwise, if all the entries in the FIB table are processed, continuing to step IV;

step IV, sending the first bloom filter A constructed in the step II and the second bloom filter B constructed in the step III to the FPGA and storing the first bloom filter A and the second bloom filter B into a Block RAM on an FPGA slice, and specifically comprises the following substeps:

step IV.1 two groups of Block RAMs are generated, each group is 2, the depth of the first group is 2 ¹⁹ The second group has a depth of 2 ¹⁷ The bit width is 4 router network ports, and the initial data is 0;

step IV.2, sending the data generated by the software to the FPGA by means of AXI-DMA or PCI-E, etc., sending A0 and A1 to the first group of Block RAM, and sending B0 and B1 to the second group of Block RAM;

at this point, the establishment of the routing table is completed, the above work is completed by the CPU, and the work of the step 5 and the later work is completed by the FPGA;

step V, the user sends an interest packet with the name/ab/cde/fghi, the hash value of the NDN name in the interest packet sent by the user is calculated, and a plurality of hash value result data streams meeting the longest prefix matching requirement are obtained, and the method specifically comprises the following substeps:

v.1, segmenting the name into ab, cde and fghi, then converting the name into data stream, and outputting a section of name in each clock cycle, wherein the name is the name signal in the graph 1;

v.2, splitting each section of name into 16-bit data streams to obtain name1, name2 and name3, inputting the data streams into a hash calculation module, and obtaining hash value data streams of a single section of name after all the names are input, wherein the hash value data streams are two signals of h1 (namex) and h2 (namex) in the graph 1;

step V.3, calculating a total hash value by taking h1 (namex) and h2 (namex) as input, wherein the total hash value is a h1 (name) signal and a h2 (name) signal in the graph 1, yellow in the signals is a search result of ab, orange is a search result of ab/cde, and blue is a search result of ab/cde/fghi;

step VI, inputting the hash value result data stream in the step V into a Block RAM as a read address, outputting 4-bit read data corresponding to 2 input read addresses in two groups, each group corresponding to the outputs of the bloom filters A and B, and constructing a search result data stream by the Block RAM read data, which specifically comprises the following substeps:

step VI.1, inputting the total hash value data streams h1 (name) and h2 (name) into two groups of Block RAMs as read addresses;

step VI.2, reading the output of the Block RAM, and obtaining four signals of RAM _ dout11, RAM _ dout12, RAM _ dout21 and RAM _ dout22 in the figure 1;

step VII, judging whether the first group of search result data flows in the step VI have Hash conflicts, if no Hash rush-in exists, adopting the first group of search results as matching results, if Hash conflicts exist, adopting the second group of search results as matching results, and constructing matching result data flows according to the matching results, which specifically comprises the following substeps:

VII.1, performing bitwise AND on ram _ dout11 and ram _ dout12, if the result is 0 or 1 bit is 1, determining that no hash collision exists, and outputting the bitwise AND result, otherwise, outputting the bitwise AND result of ram _ dout21 and ram _ dout22, and outputting the result as a total _ dout signal in the graph 1;

when the name is/ab (yellow in figure 1), 0110&0100=0100, no hash collision exists, and the output total _ dout is 0100;

when the name is/ab/cde (orange in figure 1), 0&0=0, no hash collision exists, and the output total _ dout is 0;

when the name is/ab/cde/fghi (blue in fig. 1), 0110&0110=0110, and hash collision exists, the output total _ dout is 0010&0010=0010;

step VII.2, setting the initial value of the matching result to be 0, if the total _ dout signal is 0, not modifying the output, if the total _ dout signal is not 0, covering a result which represents that a more accurate longest prefix matching result appears, and the output signal is the wan signal in the figure 1;

step VIII, forwarding the interest packet according to the wan signal of the matching result, wherein the actual matching result is 0010, the second bit is 1, and the others are 0, namely the interest packet needs to be sent to the number 2 network port;

and ending the establishing and searching method of the NDN routing table based on the bloom filter.

The application of the method for establishing and searching the NDN routing table based on the bloom filter disclosed by the embodiment in the aspect of routing search can significantly improve the searching speed, reduce the storage space requirement and reduce the occurrence of conflicts.

In this embodiment, the routing table is calculated, then the FPGA is used to calculate a plurality of hash functions in parallel, and many calculation steps are completed at the same time, so that the longest prefix matching result is obtained. The names of the hash conflicts are specially stored by utilizing the second layer of bloom filter, and the probability of occurrence of the hash conflicts is greatly reduced under the condition that the requirement of a storage space is not remarkably improved, so that the reliability of the search result is greatly improved, and the method is particularly suitable for scenes with high search speed requirements.

The above detailed description is intended to illustrate the objects, aspects and advantages of the present invention, and it should be understood that the above detailed description is only exemplary of the present invention and is not intended to limit the scope of the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A method for establishing and searching an NDN routing table based on a bloom filter is characterized by comprising the following steps: comprises the following steps of (a) carrying out,

step 1, constructing storage formats of two bloom filters, wherein each bloom filter comprises a plurality of hash tables, and the depth of the first bloom filter is greater than that of the second bloom filter; each hash table corresponds to different hash functions, and query can be simultaneously carried out on the FPGA so as to meet the requirement of parallel computation;

step 2, converting the NDN name in the FIB into a plurality of hash values with fixed length shorter than the length of the NDN name through a plurality of hash functions, and storing the converted hash values with fixed length into each hash table in a first bloom filter A, so that the NDN name with uncertain length is converted into a numerical value in an array with fixed size, and the requirement of a storage space is reduced;

and 8, according to the matching result data flow in the step 7, obtaining a forwarding network port of the interest packet under the longest prefix matching principle, forwarding the interest packet, greatly improving the searching efficiency through a Hash pipeline structure, and improving the forwarding efficiency and the throughput of the interest packet.

2. The method of claim 1, wherein the NDN routing table lookup based on the bloom filter comprises: the implementation method of the step 1 is that,

wherein d is ₁ An exponential coefficient for the depth of the first bloom filter a;

the first bloom filter a has a greater depth than the second bloom filter B.

3. The method of claim 2, wherein the NDN routing table lookup based on the bloom filter comprises: the step 2 is realized by the method that,

step 2.1: segmenting the NDN name in the FIB table of the forwarding information base according to the requirement of longest prefix matching;

the longest prefix matching refers to that in the NDN, if one NDN name matches multiple query results, the most clear query result, namely the query result with the largest number of NDN name paragraphs, is taken as a matching item;

the hash function refers to mapping from an input with a fixed length to an output with a fixed length;

in the formula (1), name is NDN name input, and 16 bits are input to a function each time; ^ is an XOR operator; % is the remainder operator of division; h (x) is a 32-bit hash value, and H takes the last d bits; v is a constant, and a plurality of different Hash functions are obtained by selecting a plurality of different V;

the port number of the routing table is a destination port for sending an interest packet after receiving the interest packet corresponding to the NDN name;

4. The method of claim 3, wherein the NDN routing table lookup based on the bloom filter comprises: the step 3 is realized by the method that,

step 3.1: calculating the hash value of the NDN name according to the hash function in step 2.2, which specifically comprises the following substeps:

step 3.1B: inputting the hash value of each segment NDN name calculated in the step 4.3A into the hash function through the hash function in the step 2.3, outputting the total hash value as the NDN name, and recording the total hash value as H ₁ 、H ₂ 、……、H _n ；

Step 3.2: for the first bloom Filter A, for all A [ k-1 ]][H _k ]K traverses all integers from 1 to n, bitwise AND operation is carried out, and if the calculation result exceeds one bit to be 1, the current NDN name is judged to have hash collision;

the bitwise and operation is a logic operation, and is represented by a symbol "&", each input bit is operated, if all the input xth bits are 1, the xth bit is output as 1, otherwise, the xth bit is 0;

the step 3.2 is used for determining the NDN name range of the hash collision;

in bloom filter A, hash collision occurs to NDN name in each FIB table, and it is required that n hash values of the NDN name store another port number, that is, n other NDN names exist, have a common port number different from the port number of the current NDN name, and have probability p of hash collision ₁ As shown in equation (2):

in the formula (2), len is the number of NDN names in an FIB table;

step 3.3: selecting another n hash functions different from the step 2.2, if the current NDN name is judged to have a hash collision in the step 3.2, calculating a hash value of the generated NDN name, otherwise, not calculating, specifically comprising the following substeps:

5. the method of claim 4 for a bloom filter based NDN routing table lookup, wherein: the implementation method of the step 4 is that,

A second group of depth->

the Block RAM is a random access memory on the FPGA chip and is a main storage unit on the FPGA chip; the depth of the Block RAM represents the number of internal storage data, and the bit width represents the number of bits contained in each data; the Block RAM has 3 inputs and 1 output, the inputs are write address, write data and read address, and the output is read data;

and 4.2: transmitting the data generated by CPU to FPGA, and A0]、A[1]…A[n-1]Storing the data into a first group of Block RAMs, and writing data into A [ k-1 ] when the write address of the kth Block RAM of the first group is j][j]K over all integers from 1 to n, j over

All of the integers of (1); b0]、B[1]…B[n-1]Storing the data into a second group of Block RAMs, and writing data into B [ k-1 ] when the write address is i for the kth Block RAM of the second group][i]K over all integers from 1 to n, i over->

All of the integers of (1).

6. The method of claim 5 for a bloom filter based NDN routing table lookup, wherein: the step 5 is realized by the method that,

step 5.1: extracting an NDN name part of an interest package in a user;

the clock is a signal which continuously jumps between 0 and 1 according to a fixed frequency in the digital circuit and is used for driving the operation of the digital circuit module;

step 5.3: calculating 2 × n hash values of each segment of the NDN name through the 2 × n hash functions selected in the step 2.2 and the step 3.3, inputting 16 bits to the hash value calculation module in each clock cycle, and obtaining the hash value of the single segment of the NDN name after all the NDN names are input;

7. The method of claim 6 for a bloom filter based NDN routing table lookup, wherein: the step 6 is realized by the method that,

step 6.2: and obtaining read data output of the Block RAM, wherein each data in the hash value data stream can obtain a corresponding search result to obtain 2 groups of search result data streams with n bit widths of m in each group, and the search result data streams respectively correspond to the bloom filters A and B.

8. The method of claim 7, wherein the NDN routing table lookup based on the bloom filter comprises: the step 7 is realized by the method that,

step 7.1: performing bitwise AND operation on the two groups of search result data streams obtained in the step 6 respectively to obtain two operation results with the bit width of m, which correspond to the bloom filters A and B;

step 7.2: judging whether 2 or more bits of the operation result of the bloom filter A are 1, if so, representing that hash collision exists, selecting the operation result of the bloom filter B as output, otherwise, if not, representing that collision does not occur, selecting the operation result of the bloom filter A as output, and constructing query result data flow by the output.

9. The method of claim 8, wherein the NDN routing table lookup based on the bloom filter comprises: the step 8 is realized by a method that comprises the following steps,

step 8.1: setting the initial value of the matching result to be 0, according to the longest prefix matching principle, if the output of the query result data stream in the step 7.2 is not 0, representing matching, replacing the matching result with the current query result to indicate that more accurate matching occurs, otherwise, not modifying the matching result, and outputting forwarding gateway information of the m-bit-wide interest packet after the query of all NDN name paragraphs is completed;

10. The method of claim 9 for a bloom filter based NDN routing table lookup, wherein: in order to avoid excessive consumption of computing resources on the FPGA chip by excessive hash functions, the number n of the hash functions is not more than 4;

to balance the storage space consumption on the FPGA chip and the reliability of the search result, d ₁ Is between 17 and 20, d ₂ Is taken as value of d ₁ -3～d ₁ -2.