CN115967358A - Audio power amplifier and electronic equipment - Google Patents

Audio power amplifier and electronic equipment Download PDF

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Publication number
CN115967358A
CN115967358A CN202310071409.1A CN202310071409A CN115967358A CN 115967358 A CN115967358 A CN 115967358A CN 202310071409 A CN202310071409 A CN 202310071409A CN 115967358 A CN115967358 A CN 115967358A
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power amplifier
submodule
module
sub
voltage
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刘康奇
汤宇
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Shanghai Awinic Technology Co Ltd
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Shanghai Awinic Technology Co Ltd
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Abstract

The application discloses an audio power amplifier, wherein a common-mode voltage submodule is used for providing a first voltage for a power amplifier loop submodule, and the first voltage is a voltage related to an output level voltage of the power amplifier loop submodule in a first working mode; the current source submodule is used for providing a first current for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in the second working mode, and the first current is not provided for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in the first working mode. Therefore, under the second working mode, the common-mode voltage submodule provides larger voltage for the power amplifier loop submodule, the common-mode voltage margin of the power amplifier loop submodule is improved, the first voltage is not switched along with the switching of the working modes, the noise of the output end can be reduced, and the user experience is improved. And the current source submodule inputs a first current to the power amplifier loop submodule, so that the stability and normal work of the loop are ensured. The application also discloses an electronic device.

Description

Audio power amplifier and electronic equipment
Technical Field
The application relates to the technical field of audio power amplifiers, in particular to an audio power amplifier and electronic equipment.
Background
For an audio power amplifier, such as a clamds amplifier, in a typical clamds loop, the common mode voltage (or may also be referred to as a common mode reference voltage, or a common mode level, etc.) VCOM1 of the first stage integrator A1 in the clamds loop is typically set to, for example, vx/2, vx being the output stage level voltage (or may also be referred to as an output stage supply voltage, etc.) corresponding to the first stage integrator A1. For example, for a multiple supply rail clamds loop, when the output stage of the multiple supply rail clamds loop is operating in a High Voltage (HV) mode, VCOM1 needs to be set to VH/2 (VH represents the output stage level Voltage in the HV mode), and when the output stage of the clamds loop is operating in a low Voltage (LowVoltage, LV), VCOM1 needs to be set to VL/2 (VL represents the output stage level Voltage in the LV mode).
That is, in the multiple supply rail clamds loop, VCOM1 needs to be switched with switching of the operation mode of the output stage of the multiple supply rail clamds loop. In this case, if there is mismatch inside the loop, it will cause noise (e.g., POP sound) to the output, affecting the user experience. In addition, when the output stage of the multi-rail CLASSD loop operates in the LV mode, the voltage margin of VCOM1 is low because the voltage of VCOM1 is LV/2, and LV/2 is low.
Disclosure of Invention
The application provides an audio power amplifier and electronic equipment, which can improve the voltage margin of the audio power amplifier and reduce the noise of an output end, thereby improving the user experience.
To solve the above technical problem, in a first aspect, an embodiment of the present application provides an audio power amplifier, including: the power amplifier comprises a first module and a second module, wherein the first module comprises a current source submodule, the second module comprises a power amplifier loop submodule and a common-mode voltage submodule, the common-mode voltage submodule is used for providing a first voltage for the power amplifier loop submodule, and the first voltage is a voltage related to an output level voltage of the power amplifier loop submodule in a first working mode; the current source submodule is used for providing a first current for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in a second working mode, the first current is not provided for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in a first working mode, and the second working mode is a working mode that the output level voltage is smaller than the output level voltage under the first working mode.
In this implementation manner, since the first voltage provided by the common-mode voltage submodule to the power amplifier loop submodule is a voltage related to an output level voltage of the power amplifier loop submodule in the first working mode, even if the power amplifier loop submodule is in the second working mode, the common-mode voltage submodule can also provide a larger voltage to the power amplifier loop submodule, so that a voltage margin of the common-mode voltage corresponding to the power amplifier loop submodule can be effectively improved, that is, the voltage margin of the common-mode voltage corresponding to the power amplifier loop submodule is wider. And the first voltage is not switched along with the switching of the working mode, so that the noise of the output end can be reduced, and the user experience is improved. And in a second working mode, the current source submodule inputs a first current to the power amplifier loop submodule to perform current compensation, so that the stability of the loop can be ensured, and the normal work of the loop can be ensured.
In a possible implementation of the first aspect, the common-mode voltage submodule provides a first voltage to a second input terminal of the power amplifier loop submodule, and the second input terminal of the power amplifier loop submodule is a positive-phase input terminal (i.e., a VCOM1 terminal) of a first-stage integrator included in the power amplifier loop submodule. Therefore, the audio power amplifier provided by the present implementation may effectively increase the voltage margin of VCOM1, i.e., the voltage margin of VCOM1 is wider.
In a possible implementation of the first aspect, the first voltage is one n times of an output stage level voltage of the power amplifier loop sub-module in the first operating mode.
In one possible implementation of the above first aspect, n is 2 or 3. Of course, n may be set to other values as desired.
In a possible implementation of the first aspect, the second module further includes a feedback sub-module, and the first current generated by the current source sub-module is determined according to the output stage level voltage in the first operating mode, the output stage level voltage in the second operating mode, and a resistance value of a feedback resistor corresponding to the feedback sub-module.
In a possible implementation of the first aspect, the current source submodule includes a first resistor, and the current source submodule is configured to be connected to the first voltage supply terminal and the second voltage supply terminal, and the first current is determined according to a voltage of the first voltage supply terminal, a voltage of the second voltage supply terminal, and a resistance value of the first resistor.
Therefore, the current source submodule can provide current for the power amplifier loop submodule to perform current compensation, so that the loop normally works.
In a possible implementation of the first aspect, the second module further includes a feedback submodule, and the current source submodule includes a first resistor, and a resistance value of the first resistor is related to a resistance value of a feedback resistor corresponding to the feedback submodule.
In a possible implementation of the first aspect, if the first voltage is one half of the output level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a fifth resistor, the fifth resistor is used as a feedback resistor, and a resistance value of the first resistor is twice a resistance value of the fifth resistor; if the first voltage is one third of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a sixth resistor and a seventh resistor, the resistance value of the seventh resistor is twice that of the sixth resistor, and the sixth resistor and the seventh resistor are used as feedback resistors.
In a possible implementation of the first aspect, if the first voltage is one half of the output stage level voltage of the power amplifier loop sub-module in the first working mode, the current magnitude (i.e., the first current) Isource = (VH-VL)/(2 × RFB) generated by the current source sub-module, where VH is the output stage level voltage in the first working mode, VL is the output stage level voltage in the second working mode, and RFB is a resistance value of the fifth resistor, or the first current Isource = (DVDD-VBAT)/(2 × RFB), where DVDD is a voltage of a first voltage supply terminal connected to the current source sub-module, and VBAT is a voltage of a second voltage supply terminal connected to the current source sub-module.
In one possible implementation of the first aspect, the first operating mode is a high-pressure mode, and the second operating mode is a low-pressure mode.
In a possible implementation of the first aspect, the first module further includes a switch submodule, an output end of the current source submodule is connected to a first end of the switch submodule, a second end of the switch submodule is connected to a first input end of the power amplifier loop submodule, the switch submodule is configured to be in a conducting state when the power amplifier loop submodule is in the second working mode, so as to input a first current generated by the current source submodule to the power amplifier loop submodule, and the switch submodule is in a non-conducting state when the power amplifier loop submodule is in the first working mode, an output end of the common mode voltage submodule is connected to a second input end of the power amplifier loop submodule, and a voltage of an output end of the common mode voltage submodule is a first voltage.
In a possible implementation of the first aspect, the switch submodule enables the state of the switch to switch the conducting state through the working mode of the power amplifier loop submodule. That is, if the working mode of the power amplifier loop sub-module is the first working mode, the state of the working mode enable switch of the power amplifier loop sub-module is the first working mode state, and the switch sub-module is not conducted (i.e., is in a non-conducting state). If the working mode of the power amplifier loop submodule is the second working mode, the state of the working mode enabling switch of the power amplifier loop submodule is the second working mode state, and the switch submodule is conducted (namely is in a conducting state).
In a possible implementation of the first aspect, the switch submodule includes a first switch, a first end of the first switch is used as a first end of the switch submodule, and a second end of the first switch is used as a second end of the switch submodule.
In one possible implementation of the first aspect, the current source submodule includes an operational amplifier unit, a resistor unit, and a field effect transistor unit, wherein the operational amplifier unit includes an operational amplifier, the resistor unit includes a first resistor, a second resistor, a third resistor, and a fourth resistor, the field effect transistors include a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor, and a seventh field effect transistor, an inverting input terminal of the operational amplifier is connected to the first voltage supply terminal, a non-inverting input terminal of the operational amplifier is connected to a first terminal of the first resistor and a drain of the sixth field effect transistor, a second terminal of the first resistor is connected to a first terminal of the second resistor, a first terminal of the third resistor, and a first terminal of the fourth resistor, and is connected to the second voltage supply terminal, a second terminal of the second resistor is connected to a source of the third field effect transistor, the second end of the third resistor is connected with the source electrode of the fourth field effect tube, the second end of the fourth resistor is connected with the source electrode of the fifth field effect tube, the grid electrode of the third field effect tube, the grid electrode of the fourth field effect tube and the grid electrode of the fifth field effect tube are connected, the drain electrode of the third field effect tube is respectively connected with the grid electrode of the third field effect tube and the drain electrode of the seventh field effect tube, the drain electrode of the fourth field effect tube is used as the second output end of the current source submodule, the drain electrode of the fifth field effect tube is used as the first output end of the current source submodule, the output end of the operational amplifier is connected with the grid electrode of the first field effect tube, the grid electrode of the first field effect tube is connected with the grid electrode of the second field effect tube, the source electrode of the first field effect tube is connected with the source electrode of the second field effect tube and grounded, the drain electrode of the first field effect tube is connected with the source electrode of the sixth field effect tube, the drain electrode of the second field effect transistor is connected with the source electrode of the seventh field effect transistor, and the grid electrode of the sixth field effect transistor is connected with the grid electrode of the seventh field effect transistor.
Therefore, current can be conveniently provided for the power amplifier loop submodule, and the loop can work normally.
In a possible implementation of the first aspect, the second module further includes a feedback sub-module, a first end of the feedback sub-module is connected to a first input end of the power amplifier loop sub-module, and a second end of the feedback sub-module is connected to an output end of the power amplifier loop sub-module.
In a possible implementation of the first aspect, if the first voltage is one half of an output level voltage of the power amplifier loop sub-module in the first operating mode, the feedback sub-module includes a fifth resistor, a first end of the fifth resistor is used as a first end of the feedback sub-module, and a second end of the fifth resistor is used as a second end of the feedback sub-module; if the first voltage is one third of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a sixth resistor and a seventh resistor, the first end of the sixth resistor is used as the first end of the feedback submodule, the second end of the sixth resistor is used as the second end of the feedback submodule, the first end of the seventh resistor is connected with the first end of the sixth resistor, and the second end of the seventh resistor is grounded.
In a possible implementation of the first aspect, the power amplifier loop sub-module includes a first integrator, a second integrator, a comparator, a first capacitor, a second capacitor, an eighth resistor, a driving unit, an eighth fet, a ninth fet, a tenth fet, and a second switch, where the first integrator is a first-stage integrator of the power amplifier loop sub-module, an inverting input terminal of the first integrator is used as a first input terminal of the corresponding power amplifier loop sub-module, a non-inverting input terminal of the first integrator is used as a second input terminal of the corresponding power amplifier loop sub-module, a first end of the first capacitor is connected to the inverting input terminal of the first integrator, a second end of the first capacitor is connected to an output terminal of the first integrator and the inverting input terminal of the comparator, a first end of the eighth resistor is connected to an output terminal of the first integrator, a second end of the eighth resistor is connected to a first end of the second capacitor and the inverting input terminal of the second integrator, the second end of the second capacitor is connected with the non-inverting input end of the comparator and the output end of the second integrator, the output end of the second integrator is connected with the non-inverting input end of the comparator, the non-inverting input end of the second integrator serves as the third input end of the power amplifier loop submodule and is used for being connected with the common-mode voltage submodule corresponding to the second integrator, the output end of the comparator is connected with the first end of the driving unit, the second end of the driving unit is connected with the grid electrode of the eighth field-effect tube, the third end of the driving unit is connected with the grid electrode of the ninth field-effect tube, the source electrode of the eighth field-effect tube is connected with the corresponding first working mode power supply end, the grid electrode of the eighth field-effect tube is connected with the grid electrode of the tenth field-effect tube, the drain electrode of the eighth field-effect tube is connected with the drain electrode of the ninth field-effect tube and is connected with the first end of the second switch and the corresponding voltage output end, the source electrode of the ninth field effect transistor is grounded, the source electrode of the tenth field effect transistor is connected with the corresponding second working mode power supply end, the drain electrode of the tenth field effect transistor is connected with the second end of the second switch, and the voltage output end is used for being connected with the loudspeaker.
In a possible implementation of the first aspect, the second module further includes a digital-to-analog conversion sub-module, an input end of the digital-to-analog conversion sub-module is used as a signal input end for receiving the pulse signal, and an output end of the digital-to-analog conversion sub-module is connected to the first input end of the power amplifier loop sub-module.
In a possible implementation of the first aspect, the digital-to-analog conversion sub-modules respectively include a first current source, a second current source, a third switch, and a fourth switch, where an input end of the first current source is connected to the third voltage supply end, an output end of the first current source is connected to a first end of the third switch, a second end of the third switch is connected to a first end of the fourth switch, a second end of the fourth switch is connected to an input end of the second current source, an output end of the second current source is grounded, and a connection end of the second end of the third switch and the first end of the fourth switch serves as an output end of the corresponding digital-to-analog conversion sub-module.
In a possible implementation of the first aspect, the audio power amplifier includes two second modules, one of the second modules includes a first digital-to-analog conversion sub-module, a first power amplifier loop sub-module, a first common-mode voltage sub-module and a first feedback sub-module, and the other second module includes a second digital-to-analog conversion sub-module, a second power amplifier loop sub-module, a second common-mode voltage sub-module and a second feedback sub-module, the switch sub-module includes a first switch sub-module and a second switch sub-module, and the current source sub-module includes a first output end and a second output end, wherein the output end of the first digital-to-analog conversion sub-module is connected to the first input end of the first power amplifier loop sub-module, the output end of the first common-mode voltage sub-module is connected to the second input end of the first power amplifier loop sub-module, the first end of the first feedback sub-module is connected to the first input end of the first power amplifier loop sub-module; the output end of the second digital-to-analog conversion submodule is connected with the first input end of the second power amplifier loop submodule, the output end of the second common-mode voltage submodule is connected with the second input end of the second power amplifier loop submodule, the first end of the second feedback submodule is connected with the first input end of the second power amplifier loop submodule, and the second end of the second feedback submodule is connected with the output end of the second power amplifier loop submodule; the first output end of the current source submodule is connected with the first end of the first switch submodule, the second end of the first switch submodule is connected with the first input end of the first power amplifier loop submodule, the first switch submodule is used for being in a conducting state under the condition that the first power amplifier loop submodule is in the second working mode so as to input a first current generated by the current source submodule into the first power amplifier loop submodule, and the first switch submodule is in a non-conducting state under the condition that the first power amplifier loop submodule is in the first working mode; the second output end of the current source submodule is connected with the first end of the second switch submodule, the second end of the second switch submodule is connected with the first input end of the second power amplifier loop submodule, the second switch submodule is used for being in a conducting state under the condition that the second power amplifier loop submodule is in the second working mode so as to input the first current generated by the current source submodule into the second power amplifier loop submodule, and the second switch submodule is in a non-conducting state under the condition that the second power amplifier loop submodule is in the first working mode.
In a second aspect, an embodiment of the present application provides an electronic device, which includes the foregoing audio power amplifier.
In a possible implementation of the second aspect, the electronic device may further include other components, which may be arranged as desired.
The electronic device provided by the present application includes the audio power amplifier provided in the first aspect and/or any one of the possible implementation manners of the first aspect, so that the beneficial effects (or advantages) of the audio power amplifier provided by the first aspect can also be achieved.
Drawings
In order to more clearly explain the technical solution of the present application, the drawings used in the description of the embodiments will be briefly introduced below.
Fig. 1A and 1B are schematic diagrams illustrating some configurations of an audio power amplifier provided herein, according to some embodiments of the present disclosure;
fig. 2 is a schematic diagram illustrating another audio power amplifier provided by the present application, according to some embodiments of the present application;
3A-3F are some schematic structural diagrams illustrating another audio power amplifier provided by the present application, according to some embodiments of the present application;
fig. 4 is a waveform diagram illustrating charging and discharging of a capacitor C1 in a multiple supply rail clamds loop, according to some embodiments of the present application;
fig. 5 is a schematic diagram illustrating a structure of another audio power amplifier provided by the present application, according to some embodiments of the present application;
fig. 6 is a schematic diagram illustrating a structure of an electronic device provided by the present application, according to some embodiments of the present application.
Detailed Description
The technical solution of the present application will be described in further detail with reference to the accompanying drawings.
Implementations of the present application provide an audio power amplifier, such as a multiple supply rail clamds loop audio power amplifier. As shown in fig. 1A, the audio power amplifier includes a power amplifier loop submodule and a common mode voltage submodule, wherein an output terminal of the common mode voltage submodule is connected to an input terminal of the power amplifier loop submodule, and is configured to provide a voltage to the power amplifier loop submodule.
Further, as shown in fig. 1B, the power amplifier loop submodule includes an integrator A1 (i.e., the first stage integrator A1), a power supply terminal VH terminal corresponding to the HV mode, a power supply terminal VL terminal corresponding to the LV mode, and other components such as a capacitor and a resistor. The non-inverting input terminal (i.e. VCOM1 terminal, "+ terminal") of the integrator A1 is used as an input terminal of the power amplifier loop submodule and is connected to the common-mode voltage submodule.
As described above, in the multiple supply rail clamds loop, when the output stage of the multiple supply rail clamds loop operates in the HV mode, VCOM1 needs to be set to HV/2 at the same time because the HV supply voltage is high, and when the output stage of the clamds loop operates in the LV mode, VCOM1 needs to be set to LV/2 at the same time because the LV supply voltage is low. In the multi-rail crampd loop, when the output stage of the multi-rail crampd loop operates in the LV mode, because the difference between the LV supply voltage and the HV supply voltage is large, and usually, for example, VCOM1= Vx/2, it is necessary to switch VCOM1 when the output stage of the multi-rail crampd loop enters or exits, or when the output stage of the multi-rail crampd loop switches the operation mode. In this case, if there is mismatch inside the loop, noise such as POP noise is caused to the output. In addition, since VL/2 is low, it poses a challenge to the voltage margin of the input stage of the CLASSD loop input IDAC (i.e., current digital-to-analog converter) and integrator A1, and there is also a problem that the voltage margin of VCOM1 is low.
In view of this, the present implementations provide an audio power amplifier whose voltage at the non-inverting input (i.e., VCOM 1) of integrator A1 (i.e., the first stage integrator) is set to a voltage (as an example of a first voltage) related to the output stage level voltage (i.e., VH) in the HV mode (as an example of a first operation mode), for example, to VH/2. That is, the common mode voltage sub-module corresponding to the integrator A1 is used to provide a voltage related to the output stage level voltage (i.e., VH) in the HV mode to the integrator A1. VCOM1 is constant at VH/2 in both HV mode and LV mode (as an example of the second operation mode). Therefore, the common-mode voltage VCOM1 of the integrator A1 can be kept at VH/2 before and after the mode switching of the multi-power-rail CLASSD loop.
Thus, on the one hand, the voltage margin can be made wider when the LV output stage of the multi-supply-rail clamds loop operates in the LV mode due to the larger VH/2. On the other hand, in the process of switching the output stage mode of the multi-supply-rail CLASSD loop, the VCOM1 voltage does not need to be switched, namely, the voltage of the VCOM1 end does not change along with the switching of the HV mode and the LV mode, so that POP noise and other noises brought by the process of switching the output stage mode of the multi-supply-rail CLASSD loop can be effectively reduced.
In this implementation manner, the structure of the common mode voltage sub-module may be set as required, and may include, for example, electronic devices such as a resistor and a capacitor, so as to achieve the purpose that the voltage output by the common mode voltage sub-module is VH/2.
However, if only VCOM1 is set to VH/2, the multi-supply-rail clamds loop itself cannot be stably established, and the loop cannot normally operate. Based on this, as shown in fig. 2, the audio power amplifier provided by the implementation manner of the present application further includes a current source submodule. The current source submodule is used for providing an Isource current (as an example of a first current) for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in the LV mode, and the Isource current is not provided for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in the HV mode.
Therefore, isource current can be provided for the multiple power supply rail CLASSD loop through the current source submodule, current compensation is carried out, the stability of the multiple power supply rail CLASSD loop can be guaranteed, and the normal work of the multiple power supply rail CLASSD loop can be guaranteed.
In summary, the audio power amplifier provided by the present application can enable the VCOM1 voltage of the integrator A1 to be still maintained as VH/2 in the LV mode of the output stage of the multiple power rail clamd loop, so that the common mode level VCOM1 of the integrator A1 can be maintained as VH/2 before and after the output stage mode of the multiple power rail clamd loop is switched. On one hand, when the output stage of the multiple supply rail clamds loop is in the LV mode (i.e. when the output stage of the multiple supply rail clamds loop is in the LV output stage mode), the voltage margin of the VCOM1 point can be made wider, i.e. the design voltage margin of the VCOM1 point is effectively improved. On the other hand, in the process of switching the output stage mode of the multiple power supply rail CLASSD loop (namely, in the process of switching the HV mode to the LV mode), VCOM1 voltage does not need to be switched, so that POP noise and other noises caused in the process of switching the output stage mode of the multiple power supply rail CLASSD loop can be effectively reduced, better tone quality can be provided, and user experience is improved. On the other hand, isource current can be provided for the multiple power supply rail CLASSD loop through the current source submodule, so that the stability of the multiple power supply rail CLASSD loop can be ensured, and the multiple power supply rail CLASSD loop can work normally.
Further, in an implementation manner of the present application, as shown in fig. 3A, the audio power amplifier provided by the present application includes a first digital-to-analog conversion sub-module 110, a first power amplifier loop sub-module 120, a first common-mode voltage sub-module 130, and a first feedback sub-module 140, and further includes a second digital-to-analog conversion sub-module 210, a second power amplifier loop sub-module 220, a second common-mode voltage sub-module 230, and a second feedback sub-module 240.
Wherein, the input terminals of the first digital-to-analog conversion sub-module 110 and the second digital-to-analog conversion sub-module 210 are respectively used as signal input terminals for receiving the pulse signal PWM IN The first digital-to-analog conversion submodule 110 and the second digital-to-analog conversion submodule 210 are configured to convert the received digital signal into a corresponding analog signal, and input the analog signal to a corresponding power amplifier loop submodule. Pulse signal PWM IN The generation process and the structure related to the generation of the Pulse Width Modulation (PWM) signal generated by a digital module (e.g. PWM) can be referred to the prior art, and the present application implements PWM on the Pulse signal IN The generation process of (a) and the structure related to the generation thereof are not explained.
The output end of the first digital-to-analog conversion sub-module 110 is connected to the first input end of the first power amplifier loop sub-module 120, the output end of the first power amplifier loop sub-module 120 is connected to the speaker S as the voltage output end, the output end of the first common mode voltage sub-module 130 is connected to the second input end of the first power amplifier loop sub-module 120, the first end of the first feedback sub-module 140 is connected to the first input end of the first power amplifier loop sub-module 120, and the second end of the first feedback sub-module 140 is connected to the output end of the first power amplifier loop sub-module 120.
The output end of the second digital-to-analog conversion sub-module 210 is connected to the first input end of the second power amplifier loop sub-module 220, the output end of the second power amplifier loop sub-module 220 is connected to the speaker as another voltage output end, the output end of the second common mode voltage sub-module 230 is connected to the second input end of the second power amplifier loop sub-module 220, the first end of the second feedback sub-module 240 is connected to the first input end of the second power amplifier loop sub-module 220, and the second end of the second feedback sub-module 240 is connected to the output end of the second power amplifier loop sub-module 220.
Further, as shown in fig. 3B, the first digital-to-analog conversion sub-module 110 and the second digital-to-analog conversion sub-module 210 respectively include a current source I PWM (as an example of a first current source), a current source I PWM (as an example of the second current source), a switch K3 (as an example of the third switch), and a switch K4 (as an example of the fourth switch). Wherein, the current source I PWM Is connected to a third voltage supply terminal (e.g. a power supply voltage terminal DVDD), a current source I PWM Is connected with a first end (i.e. input end) of a switch K3, a second end (i.e. output end) of the switch K3 is connected with a first end (i.e. input end) of a switch K4, and a second end (i.e. output end) of the switch K4 is connected with a current source I PWM Is connected to a current source I PWM The output end of the switch K3 is grounded, and the connection end of the second end of the switch K3 and the first end of the switch K4 serves as the output end of the corresponding digital-to-analog conversion submodule and is used for being connected with the first input end of the corresponding power amplifier loop submodule. In addition, the control ends of the switch K3 and the switch K4 are used as the input ends of the corresponding digital-to-analog conversion sub-modules for receiving the pulse signal PWM IN 。
The first power amplifier loop sub-module 120 and the second power amplifier loop sub-module 220 respectively include an integrator A1 (i.e., a first stage integrator as an example of a first integrator), an integrator A2 (i.e., a second stage integrator as an example of a second integrator), a comparator COMP, a capacitor C1 (as an example of a first capacitor), a capacitor C2 (as an example of a second capacitor), a resistor R2 (as an example of an eighth resistor), a driving unit D, a field effect transistor M8 (as an example of an eighth field effect transistor), a field effect transistor M9 (as an example of a ninth field effect transistor), a field effect transistor M10 (as an example of a tenth field effect transistor), and a switch K5 (as an example of a second switch).
The inverting input end (i.e., the first input end, "-" end) of the integrator A1 serves as the first input end of the corresponding power amplifier loop submodule, and is used for being connected with the output end of the corresponding digital-to-analog conversion submodule. The non-inverting input terminal (i.e. the second input terminal, "+" terminal, or VCOM1 terminal) of the integrator A1 is used as the second input terminal of the corresponding power amplifier loop submodule, and is used for being connected with the output terminal of the corresponding common mode voltage submodule.
A first end of the capacitor C1 is connected to the inverting input terminal of the integrator A1, a second output end of the capacitor C1 is connected to the output terminal of the integrator A1 and the inverting input terminal (i.e., the first input terminal, "-" terminal) of the comparator COMP, and the capacitor C1 can generate I correspondingly c1 The current, and correspondingly the voltage, is VC1.
A first terminal of the resistor R2 is connected to the output terminal of the integrator A1, a second terminal of the resistor R2 is connected to a first terminal of the capacitor C2 and an inverting input terminal (i.e., a first input terminal, "-" terminal) of the integrator A2, and a second terminal of the capacitor C2 is connected to a non-inverting input terminal (i.e., a second input terminal, "+" terminal) of the comparator COMP and an output terminal of the integrator A2.
The output end of the integrator A2 is connected to the non-inverting input end (i.e. the second input end, "+" end) of the comparator COMP, and the non-inverting input end (i.e. the second input end, "+" end, or VCOM2 end) of the integrator A2 is used as the third input end of the corresponding power amplifier loop submodule for connecting with the common mode voltage submodule corresponding to the integrator A2.
The output end of the comparator COMP is connected with the first end of the driving unit D, the second end of the driving unit D is connected with the gate of the field-effect transistor M8, and the third end of the driving unit D is connected with the gate of the field-effect transistor M9. The structure of the driving unit may be set as desired.
The source of the fet M8 is connected to the corresponding first operating mode power supply terminal (i.e., the high Voltage (VH) terminal), the gate of the fet M8 is connected to the gate of the fet M10, the drain of the fet M8 is connected to the drain of the fet M9, and is connected to the first terminal of the switch K5 and the corresponding output stage voltage output terminal (e.g., the first terminal of the switch K5 included in the first power amplifier loop submodule 120 is connected to the V terminal) OP The output terminal is connected, and the first terminal of the switch K5 included in the second power amplifier loop sub-module 220 is connected with V O The output end is connected), the output stage voltage output end is used for being connected with the loudspeaker S and outputting an output signal for driving the loudspeaker S. The source electrode of the field effect transistor M9 is grounded, and the source electrode of the field effect transistor M10 and the corresponding second working modeThe power supply terminal (i.e., the low Voltage (VL) terminal) is connected, and the drain of the fet M10 is connected to the second terminal of the switch K5. The field effect transistor M8 and the field effect transistor M10 are P-type field effect transistors, and the field effect transistor M9 is an N-type field effect transistor.
The structures of the first common mode voltage sub-module 130 and the second common mode voltage sub-module 230 may be set as required to provide corresponding common mode voltages to the corresponding power amplifier loop sub-modules.
First feedback submodule 140 and second feedback submodule 240 each include a resistor R FB (as an example of a fifth resistor), resistor R FB Is connected with the inverting input end of the integrator A1 as the first end of the corresponding feedback submodule, and the resistor R FB The second terminal of the feedback sub-module is used as the second terminal of the corresponding feedback sub-module and is connected with the corresponding voltage output terminal. And, a resistor R in the first feedback submodule 140 FB The connection between the first end of the first sub-module 120 and the inverting input end of the integrator A1 in the first power amplifier loop sub-module 120 may be referred to as a clamd loop integrator input node INT _ P, and the resistor R in the second feedback sub-module 240 FB The junction of the first end of (a) and the inverting input end of the integrator A1 in the second power amplifier loop sub-module 220 may be referred to as a clamds loop integrator input node INT _ N. Also, the feedback current in the first feedback sub-module 140 and the second feedback sub-module 240 is I FB 。
In this implementation, two PWM signals (e.g., PWMA, PWMB) output from the digital block are converted into a PWM current I by, for example, a 1-bit current type digital-to-analog converter (i.e., IDAC) PWM And injecting the power amplifier into a PWM loop comprising a power amplifier loop submodule. In addition, the feedback loop is a 2-order loop, the loop gain in a low frequency range can be increased through 2-order integration, and compared with a 1-order integrator, the feedback loop can provide better Harmonic Distortion (THD) and Power Supply Rejection Ratio (PSRR). Meanwhile, the resistor R2 and the capacitor C2 are introduced into a compensation zero point, so that the stability of the loop can be ensured.
In the audio power amplifier provided in this implementation manner, the non-inverting input terminal (i.e. the VCOM1 terminal) of the integrator A1 included in the first power amplifier loop submodule 120 is connected to the first common mode voltage submodule 130, and the non-inverting input terminal (i.e. the VCOM1 terminal) of the integrator A1 included in the second power amplifier loop submodule 220 is connected to the second common mode voltage submodule 230.
In this implementation, the voltage at the non-inverting input terminal (i.e., the VCOM1 terminal) of the integrator A1 is set to VH/2 as described above. That is, VCOM1 is constant at VH/2 in both HV and LV modes (i.e., both). Therefore, the common-mode voltage VCOM1 of the integrator A1 can be kept at VH/2 before and after the mode switching of the multi-power-rail CLASSD loop.
Thus, on one hand, when the LV output stage of the multi-supply-rail clamds loop works in the LV mode, the voltage margin is wider. On the other hand, in the process of switching the output stage mode of the multi-supply rail CLASSD loop, the VCOM1 voltage does not need to be switched, namely the voltage of the VCOM1 end does not change along with the switching of the HV mode and the LV mode, thereby effectively reducing noises such as POP noise and the like brought by the process of switching the output stage mode of the multi-supply rail CLASSD loop.
In this implementation manner, the structures of the first common mode voltage sub-module 130 and the second common mode voltage sub-module 230 may be set as required, for example, the structures may include electronic devices such as resistors and capacitors, so as to achieve the purpose that the voltage output by the first common mode voltage sub-module 130 and the second common mode voltage sub-module 230 is VH/2.
However, if only VCOM1 is set to VH/2, the multi-supply-rail clamds loop itself cannot be stably established, and the loop cannot normally operate. The audio power amplifier provided by the present implementation further includes a current source sub-module 310 (which may also be referred to as an ISOURCE circuit), a first switch sub-module 320, and a second switch sub-module 330, as shown in fig. 3C.
The current source sub-module 310 serves as a current source ISOURCE, and is configured to access to an original loop through the first switch sub-module 320 and the second switch sub-module 330 when the LV output stage of the multiple-supply-rail clamds loop operates in the LV mode, and provide ISOURCE current to the first power amplifier loop sub-module 120 and the second power amplifier loop sub-module 220 in the loop.
Furthermore, a first output terminal of the current source sub-module 310 is connected to a first terminal of the first switch sub-module 320, a second terminal of the first switch sub-module 320 is connected to a first input terminal of the first power amplifier loop sub-module 120, the first switch sub-module 320 is configured to be in a conducting state when the first power amplifier loop sub-module 120 is in the LV mode, so as to input the Isource current generated by the current source sub-module 310 to the first power amplifier loop sub-module 120, and the first switch sub-module 320 is in a non-conducting state when the first power amplifier loop sub-module 120 is in the HV mode.
A second output terminal of the current source sub-module 310 is connected to a first terminal of the second switch sub-module 330, a second terminal of the second switch sub-module 330 is connected to a first input terminal of the second power amplifier loop sub-module 220, the second switch sub-module 330 is configured to be in a conducting state when the second power amplifier loop sub-module 220 is in the LV mode, so as to input the Isource current generated by the current source sub-module 310 to the second power amplifier loop sub-module 220, and the second switch sub-module 330 is in a non-conducting state when the second power amplifier loop sub-module 220 is in the HV mode.
Further, as shown in fig. 3D, the current source submodule 310 includes an operational amplifier unit, a resistance unit, and a field effect transistor unit. Wherein the operational amplifier unit includes an operational amplifier OP1, the resistance unit includes a resistance R1 (as an example of a first resistance), a resistance R3 (as an example of a second resistance), a resistance R4 (as an example of a third resistance), and a resistance R5 (as an example of a fourth resistance), and the field effect transistors include a field effect transistor M1 (as an example of a first field effect transistor), a field effect transistor M2 (as an example of a second field effect transistor), a field effect transistor M3 (as an example of a third field effect transistor), a field effect transistor M4 (as an example of a fourth field effect transistor), a field effect transistor M5 (as an example of a fifth field effect transistor), a field effect transistor MC1 (as an example of a sixth field effect transistor), and a field effect transistor MC2 (as an example of a seventh field effect transistor).
An inverting input terminal (i.e., a first input terminal, "-" terminal) of the operational amplifier OP1 is connected to a voltage supply terminal DVDD (i.e., a power supply voltage supply terminal, which may also be referred to as VDD, as an example of the first voltage supply terminal), a non-inverting input terminal (i.e., a second input terminal, "+" terminal) of the operational amplifier OP1 is connected to a first terminal of the resistor R1 and a drain of the field effect transistor MC1, and a second terminal of the resistor R1 is connected to a first terminal of the resistor R3, a first terminal of the resistor R4, and a first terminal of the resistor R5, and is connected to a voltage supply terminal VBAT (i.e., a power supply input terminal, as an example of the second voltage supply terminal). The second end of the resistor R3 is connected with the source electrode of the field-effect tube M3, the second end of the resistor R4 is connected with the source electrode of the field-effect tube M4, and the second end of the resistor R5 is connected with the source electrode of the field-effect tube M5. The grid of the field effect transistor M3, the grid of the field effect transistor M4 and the grid of the field effect transistor M5 are connected. The drain of the field effect transistor M3 is connected to the gate of the field effect transistor M3 and the drain of the field effect transistor MC2, the drain of the field effect transistor M4 is used as the second output terminal (i.e., isource _ N) of the current source sub-module 310, and the drain of the field effect transistor M5 is used as the first output terminal (i.e., isource _ P) of the current source sub-module 310. The output end of the operational amplifier OP1 is connected with the grid of the field effect transistor M1, the grid of the field effect transistor M1 is connected with the grid of the field effect transistor M2, the source electrode of the field effect transistor M1 is connected with the source electrode of the field effect transistor M2 and grounded, the drain electrode of the field effect transistor M1 is connected with the source electrode of the field effect transistor MC1, the drain electrode of the field effect transistor M2 is connected with the source electrode of the field effect transistor MC2, and the grid of the field effect transistor MC1 is connected with the grid of the field effect transistor MC 2.
The field effect transistor M1, the field effect transistor M2, the field effect transistor MC1 and the field effect transistor MC2 can be N-type field effect transistors, and the field effect transistor M3, the field effect transistor M4 and the field effect transistor M5 can be P-type field effect transistors.
The resistance value of the resistor R1 is related to the resistance value of the corresponding feedback resistor of the first feedback submodule 140 or the second feedback submodule 240. For example, the resistance value of the resistor R1 is the resistor R included in the first feedback submodule 140 or the second feedback submodule 240 FB R1=2 × RFB.
In this implementation, the current source submodule 310 serves as a current source ISOURCE, and the magnitude of the output current (i.e. the magnitude of ISOURCE current) can be determined according to the output stage level voltage VH in the HV mode and the output stage level voltage VL in the LV mode, or according to the output stage level voltage VH in the HV mode, the output stage level voltage VL in the LV mode, and the resistance value (of the resistor R1) (VH)I.e. 2 x rfb) or resistor R FB Is determined (i.e., RFB). For example, the current magnitude ISOURCE = (VH-VL)/(2 × rfb) of the current source ISOURCE. That is, in this implementation, in the multiple supply rail clamds exemplary loop, the current source sub-module 310 is introduced to supply a current with a magnitude of (VH-VL)/(2 × rfb) to the first power amplifier loop sub-module 120 and the second power amplifier loop sub-module 220. Wherein, RFB (Remote Frame Buffer) is a resistance value of the feedback resistor corresponding to the feedback submodule.
Further, as shown in fig. 3E, the first switch submodule 320 includes a switch K1 (as one example of a first switch), and the second switch submodule 330 includes a switch K2 (as another example of a first switch). A first terminal (i.e., an input terminal) of the switch K1 serves as a first terminal of the first switch submodule 320 and is configured to be connected to a first output terminal (i.e., isource _ P) of the current source submodule 310, and a second terminal (i.e., an output terminal) of the switch K1 serves as a second terminal of the first switch submodule 320 and is configured to be connected to an inverting input terminal of the integrator A1 in the first power amplifier loop submodule 120. A first terminal (i.e., an input terminal) of the switch K2 serves as a first terminal of the second switch submodule 330, and is configured to be connected to a second output terminal (i.e., isource _ N) of the current source submodule 310, and a second terminal (i.e., an output terminal) of the switch K2 serves as a second terminal of the second switch submodule 330, and is configured to be connected to an inverting input terminal of the integrator A1 in the second power amplifier loop submodule 220.
In this implementation, the on (i.e., closed) and off (i.e., open) of the switches K1 and K2 may be controlled by the operating mode enable switch of the output stage of the multiple power rail clamd loop, i.e., the on state is switched according to the state of the operating mode enable switch. For example, when the output stage of the multiple power supply rail clamds loop is in the HV mode, the state of the operating mode enabling switch is the HV mode state, and the switch K1 and the switch K2 are not turned on (i.e., opened), and when the output stage of the multiple power supply rail clamds loop is switched to the LV mode, the state of the operating mode enabling switch is the LV mode state, and the switch K1 and the switch K2 are turned on (i.e., closed), so as to connect the current source submodule 310 into the subsequent loop.
Further, the structure of the audio power amplifier provided by this implementation is as shown in fig. 3F, where the principle of the current source sub-module 310 is that the voltage of the node 1 at the lower end of the resistor R1 is DVDD clamped by the operational amplifier OP1, so as to generate a bias of a current reference Isource, and a current mirror composed of other resistors and a field effect transistor, for example, current mirrors R3/M3, R4/M4, and R5/M5, generates two current sources Isource: isource _ N and Isource _ P, where Isource = (VH-VL)/(2 × rfb), isource _ N is connected to the clamds loop integrator input node INT _ N, and Isource _ P is connected to the clamds loop integrator input node INT _ P. That is, after introducing the ISOURCE circuit (i.e., the current source sub-module 310), when the output stage of the multiple-supply-rail clamds loop is switched to the LV mode, the VCOM1 common-mode voltage of the integrator A1 is kept at HV/2, and in order to ensure the stability of the loop, the loop can be stabilized by opening the ISOURCE circuit (i.e., switching the ISOURCE into the original loop) and injecting the corresponding current into the loop for the whole period of the LV mode.
The audio power amplifier provided by the implementation mode is a multiple power supply rail CLASSD audio power amplifier, and the voltage of a VCOM1 end is constantly set to be VH/2 in an HV mode and an LV mode. In the LV mode, the current source submodule 310 is connected to the original loop through the switch K1 and the switch K2, and supplies a current to the loop. Thus, in the LV mode of the output stage of the multiple power rail clamds loop, the VCOM1 voltage of the first-stage integrator (i.e., the integrator A1) can still be maintained at VH/2, so that the common-mode level VCOM1 of the first-stage integrator (i.e., the integrator A1) can be maintained at VH/2 before and after the output stage mode of the multiple power rail clamds loop is switched. On one hand, when the output stage of the multiple supply rail clamds loop is in the LV mode (i.e. when the output stage of the multiple supply rail clamds loop is in the LV output stage mode), the voltage margin of the VCOM1 point can be made wider, i.e. the design voltage margin of the VCOM1 point is effectively improved. On the other hand, in the process of switching the output stage mode of the multiple power supply rail CLASSD loop (namely, in the process of switching the HV mode to the LV mode), VCOM1 voltage does not need to be switched, so that POP noise and other noises caused in the process of switching the output stage mode of the multiple power supply rail CLASSD loop can be effectively reduced, better tone quality can be provided, and user experience is improved. On the other hand, the current can be increased to the multiple supply rail clamds loop through the current source sub-module 310, so that the stability of the multiple supply rail clamds loop can be ensured, and the multiple supply rail clamds loop can be ensured to work normally.
The CLASSD loop provided by the implementation mode is a loop with a current source Isource, and the stability of the loop is analyzed.
Taking the capacitor C1 corresponding to the integrator A1 in the first power amplifier loop sub-module 120 as an example, the charging and discharging of the capacitor C1 in one cycle are divided into 4 stages:
stage 1: IC1_ T1 (i.e., it 1) = IPWM + Isoource + (VD-1/2 VBAT)/RFB
And 2, stage: IC1_ T2 (i.e., it 2) = IPWM + Isoource-1/2 VBAT/RFB
And 3, stage: IC1_ T3 (i.e. It 3) = -IPWM + Isoource-1/2 VBAT/RFB
And 4, stage: IC1_ T4 (i.e., it 4) = -IPWM + Isoource + (VD-1/2 VBAT)/RFB
Wherein, IC1_ T1 is the current of the capacitor C1 in the 1 st stage, IC1_ T2 is the current of the capacitor C1 in the 2 nd stage, IC1_ T3 is the current of the capacitor C1 in the 3 rd stage, IC1_ T4 is the current of the capacitor C1 in the 4 th stage, and IC1 is the aforementioned I1 c1 IPWM is the output current of the aforementioned digital module (i.e. PWM), i.e. I PWM . VD refers to the output stage level voltage, which may be VH or VL as described above, or may also be referred to as Vp, which may be understood to be a given supply voltage.
Due to the charge-discharge balance of the whole cycle, then:
IC1_T1*t1+IC1_T2*t2＝-IC1_T3*t3-IC1_T4*t4
wherein t1, t2, t3, t4 are the time at each stage, respectively.
This gives:
(IPWM+Isource)*(t1+t2)-(IPWM-Isource)*(t3+t4)＝-1/2*VBAT/RFB*(t1+t2+t3+t4)+VD/RFB*(t1+t4)
where T1+ T2= DIN T, T3+ T4= (1-DIN) × T, T1+ T4= DOUT × T, T2+ T3= (1-DOUT) × T, DIN is the duty cycle of PWM, DOUT is the duty cycle of Vop output from the positive terminal of the multiple power rail clamds loop, T is the period of PWM and Vop, RFB may also be referred to as R FB . Will be provided withThe representation is substituted into the formula, and the arrangement can be obtained:
d _ out (i.e., DOUT) = (VBAT/(2 RFB) -Isource). Times.RFB/VD- (IPWM. Times.RFB)/VD (2 DIN-1)
Then, as shown in figure 4,
d _ out (i.e., DOUT) = (VBAT/(2 RFB) -Isource) = (VBAT/(2 RFB)/VD- (IPWM) · RFB)/VD (2 DIN-1) Isource = (VBAT-VD)/R _ source, R _ source =2RFB, and the substitution is finished as follows:
Vout＝Von-Vop＝2*IPWM*RFB*(2*DIN-1)
the gain of the clamds loop is constant at 2 ipwm rfb, where R _ source refers to the resistance R1 in the current source sub-module 310.
In this implementation, when the output level of the output level mode of the multiple power supply rail clamds loop is switched to the HV mode, the Isource current needs to be turned off, which is the same as the normal clamds working mode. In a multiple power rail crampd loop, when the output stage of the crampd loop operates in LV mode, since the difference between the LV supply voltage and the HV supply voltage is large, the common mode level of the integrator A1 is usually set to VCOM1= Vx/2, which causes to switch VCOM1 when the output stage of the multiple power rail crampd loop enters or exits, and if there is mismatch inside the loop, POP sound may be caused to the output terminal. Therefore, when the output stage of the CLASSD loop is operating in the LV mode, the Isource current needs to be turned on.
In another implementation manner of the present application, the current source submodule 310 is configured to be connected to a voltage supply terminal DVDD and a voltage supply terminal VBAT, and the Isource current is determined according to a voltage of the voltage supply terminal DVDD, a voltage of the voltage supply terminal VBAT, and a resistance value of the resistor R1.
For example, VH may be VBAT and VL may be DVDD in the calculation formula of the Isource current, and therefore, the magnitude of the Isource current may be Isource = (VBAT-DVDD)/2 × rfb.
Of course, in other implementation manners of the present application, the magnitude of Isource current may also be calculated by other formulas according to VH, VL, and RFB, or by other formulas according to VBAT, DVDD, and RFB, or may be calculated by other parameters, which may be set as needed.
Further, in another implementation of the present application, VCOM1 may also be constantly set to VH/3. Correspondingly, as shown in fig. 5, compared to the audio power amplifier shown in fig. 3F, in this implementation, the audio power amplifier includes a first feedback submodule 140 and a second feedback submodule 240, which respectively include a resistor R6 (as an example of a sixth resistor) and a resistor R7 (as an example of a seventh resistor), where a first end of the resistor R6 serves as a first end of the corresponding feedback submodule, a second end of the resistor R6 serves as a second end of the corresponding feedback submodule, the first end of the resistor R7 is connected to the first end of the resistor R6, and the second end of the resistor R7 is grounded. The resistance value of the resistor R6 is RD, and the resistance value of the resistor R7 is twice the resistance value of the resistor R6, that is, 2 × RD.
Further, in the present implementation, the resistance value of the resistor R1 is determined according to the resistance value of the resistor R6 and the resistance value of the resistor R7. And, the calculation formula of Isource current can also be determined according to VH, VL and the feedback resistance in the feedback loop (i.e., the resistance value of the resistor R6 and the resistance value of the resistor R7).
In other implementations of the present application, VCOM1 may also be set to a voltage value related to VH other than VH/2 and VH/3, and Isource current may also be set to other current values, which may be set as required.
The aforementioned first switch submodule 320 and the second switch submodule 330 are used as an example of the switch submodule included in the audio power amplifier provided in the implementation manner of the present application, and the current source submodule 310 is used as an example of the current source submodule 310 included in the audio power amplifier provided in the implementation manner of the present application. In other implementations of the present application, the structures, numbers, connection relationships, and the like of the current source sub-modules 310 and the switch sub-modules included in the audio power amplifier may also be set to other structures, numbers, connection relationships, and the like as needed.
The first digital-to-analog conversion sub-module 110, the first power amplifier loop sub-module 120, the first common-mode voltage sub-module 130, and the first feedback sub-module 140 are used as an example of a second module included in the audio power amplifier provided in the implementation manner of the present application, and the second digital-to-analog conversion sub-module 210, the second power amplifier loop sub-module 220, the second common-mode voltage sub-module 230, and the second feedback sub-module 240 are used as an example of another second module included in the audio power amplifier provided in the implementation manner of the present application. In other implementations of the present application, the structure, number, connection relationship, and the like of the second module included in the audio power amplifier may also be set to other structures, numbers, connection relationships, and the like as needed.
Each of the foregoing components is taken as an example of a type of a corresponding device, and in other implementations, other devices of the same type may be selected as needed.
In other implementations of the present application, the first operation mode and the second operation mode may be other operation modes, and the output stage level voltage in the second operation mode is smaller than the output stage level voltage in the first operation mode.
In other implementations of the present application, the audio power amplifier may also be other audio power amplifiers, such as a bridge clamds loop audio power amplifier, in addition to the aforementioned multiple supply rail clamds loop audio power amplifier.
The present application further provides an electronic device, as shown in fig. 6, including the aforementioned audio power amplifier. Of course, the electronic device may also include other components.
The electronic device may be, for example, a mobile phone, a tablet computer, a notebook computer, a palm top computer, a Mobile Internet Device (MID), a wearable device (including, for example, a smart watch, a smart band, a pedometer, etc.), a personal digital assistant, a portable media player, a navigation device, an in-vehicle device, a video game device, a set top box, a virtual reality and/or augmented reality device, an internet of things device, an industrial control device, a streaming media client device, an electronic book, a reading device, a POS machine, and other devices with audio playing function.
It should be noted that the terms "first," "second," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying any relative importance.
It should be noted that in the accompanying drawings, some structural or methodical features may be shown in a particular arrangement and/or order. However, it is to be understood that such specific arrangement and/or ordering may not be required. Rather, in some implementations, the features may be arranged in a manner and/or order different from that shown in the illustrative figures. Additionally, the inclusion of structural or methodical features in a particular figure is not meant to imply that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.
While the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing is a more detailed description of the present application, and the present application is not intended to be limited to these details. Various changes in form and detail, including simple deductions or substitutions, may be made by those skilled in the art without departing from the spirit and scope of the present application.

Claims (20)

1. An audio power amplifier, comprising: a first module comprising a current source sub-module and a second module comprising a power amplifier loop sub-module and a common mode voltage sub-module, wherein,
the common-mode voltage submodule is used for providing a first voltage for the power amplifier loop submodule, and the first voltage is a voltage related to an output level voltage of the power amplifier loop submodule in a first working mode;
the current source submodule is used for providing a first current for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in a second working mode, the first current is not provided for the power amplifier loop submodule under the condition that the power amplifier loop submodule is in the first working mode, and the second working mode is a working mode that the output level voltage is smaller than the output level voltage under the first working mode.
2. The audio power amplifier of claim 1, wherein the first voltage is one n times the output stage level voltage of the power amplifier loop sub-module in the first operating mode.
3. The audio power amplifier of claim 2, wherein n is 2 or 3.
4. The audio power amplifier according to any one of claims 1 to 3, wherein the second module further comprises a feedback sub-module, and the first current is determined according to the output stage level voltage in the first operation mode, the output stage level voltage in the second operation mode, and a resistance value of a feedback resistor corresponding to the feedback sub-module.
5. The audio power amplifier according to any of claims 1-3, wherein the current source submodule comprises a first resistor, and the current source submodule is configured to be connected to a first voltage supply terminal and a second voltage supply terminal, and the first current is determined according to a voltage of the first voltage supply terminal, a voltage of the second voltage supply terminal, and a resistance value of the first resistor.
6. The audio power amplifier of any of claims 1-5, wherein the second module further comprises a feedback sub-module, and wherein the current source sub-module comprises a first resistor, and wherein a resistance value of the first resistor is related to a resistance value of a corresponding feedback resistor of the feedback sub-module.
7. The audio power amplifier of claim 6,
if the first voltage is one half of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a fifth resistor, the fifth resistor is used as the feedback resistor, and the resistance value of the first resistor is twice as large as that of the fifth resistor;
if the first voltage is one third of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a sixth resistor and a seventh resistor, the resistance value of the seventh resistor is twice that of the sixth resistor, and the sixth resistor and the seventh resistor are used as the feedback resistor.
8. The audio power amplifier of claim 7, wherein the first current Isource = (VH-VL)/(2-RFB) if the first voltage is one half of an output stage level voltage of the power amplifier loop sub-module in the first operation mode, wherein VH is the output stage level voltage in the first operation mode, VL is the output stage level voltage in the second operation mode, and RFB is a resistance value of the fifth resistor, or the first current Isource = (DVDD-VBAT)/(2-RFB), wherein DVDD is a voltage of a first voltage supply terminal connected to the current source sub-module, and VBAT is a voltage of a second voltage supply terminal connected to the current source sub-module.
9. The audio power amplifier of any of claims 1-8, wherein the first operating mode is a high voltage mode and the second operating mode is a low voltage mode.
10. The audio power amplifier according to any one of claims 1 to 9, wherein the first module further includes a switch submodule, an output terminal of the current source submodule is connected to a first terminal of the switch submodule, a second terminal of the switch submodule is connected to a first input terminal of the power amplifier loop submodule, the switch submodule is configured to be in a conducting state when the power amplifier loop submodule is in the second operating mode, so as to input the first current generated by the current source submodule to the power amplifier loop submodule, and the switch submodule is in a non-conducting state when the power amplifier loop submodule is in the first operating mode, an output terminal of the common mode voltage submodule is connected to a second input terminal of the power amplifier loop submodule, and a voltage of the output terminal of the common mode voltage submodule is the first voltage.
11. The audio power amplifier of claim 10, wherein the switch sub-module switches the on state by the state of an active mode enable switch of the power amplifier loop sub-module.
12. The audio power amplifier of claim 10 or 11, wherein the switch submodule comprises a first switch, a first terminal of the first switch being a first terminal of the switch submodule, and a second terminal of the first switch being a second terminal of the switch submodule.
13. The audio power amplifier according to any one of claims 1-12, wherein the current source submodule comprises an operational amplifier unit, a resistor unit and a field effect transistor unit, wherein the operational amplifier unit comprises an operational amplifier, the resistor unit comprises a first resistor, a second resistor, a third resistor and a fourth resistor, the field effect transistor comprises a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor and a seventh field effect transistor, an inverting input terminal of the operational amplifier is connected to a first voltage supply terminal, a non-inverting input terminal of the operational amplifier is connected to a first terminal of the first resistor and a drain of the sixth field effect transistor, a second terminal of the first resistor is connected to a first terminal of the second resistor, a first terminal of the third resistor and a first terminal of the fourth resistor, and is connected with a second voltage supply end, a second end of the second resistor is connected with a source electrode of the third field effect transistor, a second end of the third resistor is connected with a source electrode of the fourth field effect transistor, a second end of the fourth resistor is connected with a source electrode of the fifth field effect transistor, a grid electrode of the third field effect transistor, a grid electrode of the fourth field effect transistor and a grid electrode of the fifth field effect transistor are connected, a drain electrode of the third field effect transistor is respectively connected with a grid electrode of the third field effect transistor and a drain electrode of the seventh field effect transistor, a drain electrode of the fourth field effect transistor is used as a second output end of the current source submodule, a drain electrode of the fifth field effect transistor is used as a first output end of the current source submodule, and an output end of the operational amplifier is connected with a grid electrode of the first field effect transistor, the grid electrode of the first field effect tube is connected with the grid electrode of the second field effect tube, the source electrode of the first field effect tube is connected with the source electrode of the second field effect tube and grounded, the drain electrode of the first field effect tube is connected with the source electrode of the sixth field effect tube, the drain electrode of the second field effect tube is connected with the source electrode of the seventh field effect tube, and the grid electrode of the sixth field effect tube is connected with the grid electrode of the seventh field effect tube.
14. The audio power amplifier according to any of claims 1-13, wherein the second module further comprises a feedback sub-module, a first end of the feedback sub-module is connected to a first input of the power amplifier loop sub-module, and a second end of the feedback sub-module is connected to an output of the power amplifier loop sub-module.
15. The audio power amplifier of claim 14,
if the first voltage is one half of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a fifth resistor, the first end of the fifth resistor is used as the first end of the feedback submodule, and the second end of the fifth resistor is used as the second end of the feedback submodule;
if the first voltage is one third of the output level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule comprises a sixth resistor and a seventh resistor, a first end of the sixth resistor is used as a first end of the feedback submodule, a second end of the sixth resistor is used as a second end of the feedback submodule, a first end of the seventh resistor is connected with the first end of the sixth resistor, and the second end of the seventh resistor is grounded.
16. The audio power amplifier according to any one of claims 1 to 15, wherein the power amplifier loop sub-module comprises a first integrator, a second integrator, a comparator, a first capacitor, a second capacitor, an eighth resistor, a driving unit, an eighth fet, a ninth fet, a tenth fet, and a second switch, wherein the first integrator is a first-stage integrator of the power amplifier loop sub-module, an inverting input terminal of the first integrator serves as a first input terminal of the power amplifier loop sub-module, a non-inverting input terminal of the first integrator serves as a second input terminal of the power amplifier loop sub-module, a first terminal of the first capacitor is connected to an inverting input terminal of the first integrator, a second terminal of the first capacitor is connected to an output terminal of the first integrator and an inverting input terminal of the comparator, a first terminal of the eighth resistor is connected to an output terminal of the first integrator, a second terminal of the eighth resistor is connected to a first terminal of the second capacitor and an inverting input terminal of the second integrator, a second terminal of the second capacitor and a non-inverting input terminal of the comparator are connected to an inverting input terminal of the second integrator, a common-phase input terminal of the second integrator is connected to a gate driving unit, and a gate input terminal of the second integrator is connected to a gate driving unit, a gate of the second integrator, a common-phase input terminal of the power amplifier loop sub-integrator is connected to a gate driving unit, the source electrode of the eighth field effect transistor is connected with the corresponding first working mode power supply end, the grid electrode of the eighth field effect transistor is connected with the grid electrode of the tenth field effect transistor, the drain electrode of the eighth field effect transistor is connected with the drain electrode of the ninth field effect transistor, and is connected with the first end of the second switch and the corresponding voltage output end, the source electrode of the ninth field effect transistor is grounded, the source electrode of the tenth field effect transistor is connected with the corresponding second working mode power supply end, the drain electrode of the tenth field effect transistor is connected with the second end of the second switch, and the voltage output end is used for connecting a loudspeaker.
17. The audio power amplifier according to any one of claims 1 to 16, wherein the second module further comprises a digital-to-analog conversion sub-module, an input end of the digital-to-analog conversion sub-module is used as a signal input end for receiving a pulse signal, and an output end of the digital-to-analog conversion sub-module is connected to the first input end of the power amplifier loop sub-module.
18. The audio power amplifier of claim 17, wherein the digital-to-analog conversion submodule comprises a first current source, a second current source, a third switch and a fourth switch, wherein an input terminal of the first current source is connected to a third voltage supply terminal, an output terminal of the first current source is connected to a first terminal of the third switch, a second terminal of the third switch is connected to a first terminal of the fourth switch, a second terminal of the fourth switch is connected to an input terminal of the second current source, an output terminal of the second current source is grounded, and a connection terminal of the second terminal of the third switch and the first terminal of the fourth switch serves as an output terminal of the corresponding digital-to-analog conversion submodule.
19. The audio power amplifier according to any of claims 1-18, wherein the audio power amplifier comprises two of the second modules, one of the second modules comprises a first digital-to-analog conversion sub-module, a first power amplifier loop sub-module, a first common-mode voltage sub-module and a first feedback sub-module, the other of the second modules comprises a second digital-to-analog conversion sub-module, a second power amplifier loop sub-module, a second common-mode voltage sub-module and a second feedback sub-module, the first module further comprises a switch sub-module, the switch sub-module comprises a first switch sub-module and a second switch sub-module, the current source sub-module comprises a first output terminal and a second output terminal, wherein,
the output end of the first digital-to-analog conversion sub-module is connected with the first input end of the first power amplifier loop sub-module, the output end of the first common-mode voltage sub-module is connected with the second input end of the first power amplifier loop sub-module, the first end of the first feedback sub-module is connected with the first input end of the first power amplifier loop sub-module, and the second end of the first feedback sub-module is connected with the output end of the first power amplifier loop sub-module;
the output end of the second digital-to-analog conversion sub-module is connected with the first input end of the second power amplifier loop sub-module, the output end of the second common-mode voltage sub-module is connected with the second input end of the second power amplifier loop sub-module, the first end of the second feedback sub-module is connected with the first input end of the second power amplifier loop sub-module, and the second end of the second feedback sub-module is connected with the output end of the second power amplifier loop sub-module;
a first output end of the current source submodule is connected with a first end of the first switch submodule, a second end of the first switch submodule is connected with a first input end of the first power amplifier loop submodule, the first switch submodule is used for being in a conducting state under the condition that the first power amplifier loop submodule is in the second working mode so as to input the first current generated by the current source submodule into the first power amplifier loop submodule, and the first switch submodule is in a non-conducting state under the condition that the first power amplifier loop submodule is in the first working mode;
the second output end of the current source submodule is connected with the first end of the second switch submodule, the second end of the second switch submodule is connected with the first input end of the second power amplifier loop submodule, the second switch submodule is used for being in a conducting state under the condition that the second power amplifier loop submodule is in the second working mode so as to input the first current generated by the current source submodule into the second power amplifier loop submodule, and the second switch submodule is in a non-conducting state under the condition that the second power amplifier loop submodule is in the first working mode.
20. An electronic device comprising an audio power amplifier according to any of claims 1-19.
CN202310071409.1A 2023-01-13 2023-01-13 Audio power amplifier and electronic equipment Pending CN115967358A (en)

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