CN115963916A

CN115963916A - Power consumption control method and device for GPU, electronic equipment and storage medium

Info

Publication number: CN115963916A
Application number: CN202310214167.7A
Authority: CN
Inventors: 请求不公布姓名
Original assignee: Moore Threads Technology Co Ltd
Current assignee: Moore Threads Technology Co Ltd
Priority date: 2023-03-08
Filing date: 2023-03-08
Publication date: 2023-04-14

Abstract

The present disclosure relates to the field of electrical digital data processing technologies, and in particular, to a power consumption control method and apparatus for a GPU, an electronic device, and a storage medium. The method comprises the following steps: in response to a GPU entering a power consumption control state, adjusting an operating frequency of the GPU through at least a first frequency adjustment stage, wherein the first frequency adjustment stage includes at least two frequency adjustment sub-stages, a down-conversion speed of a preceding frequency adjustment sub-stage of the at least two frequency adjustment sub-stages being greater than a down-conversion speed of a following frequency adjustment sub-stage, the down-conversion speed representing a speed at which the operating frequency of the GPU is reduced.

Description

Power consumption control method and device for GPU, electronic equipment and storage medium

Technical Field

The present disclosure relates to the field of electrical digital data processing technologies, and in particular, to a power consumption control method for a GPU, a power consumption control device for a GPU, an electronic device, and a storage medium.

Background

A GPU (Graphics Processing Unit) is a high-performance, high-power consumption image processor. In the operation process of the GPU, the power consumption of the GPU is ensured to be in a safe and reasonable range, otherwise, the risk of damaging a chip and reducing the performance exists.

Disclosure of Invention

The disclosure provides a power consumption control technical scheme for a GPU.

According to an aspect of the present disclosure, there is provided a power consumption control method for a GPU, including:

in response to a GPU entering a power consumption control state, adjusting an operating frequency of the GPU through at least a first frequency adjustment stage, wherein the first frequency adjustment stage includes at least two frequency adjustment sub-stages, a down-conversion speed of a preceding frequency adjustment sub-stage of the at least two frequency adjustment sub-stages being greater than a down-conversion speed of a following frequency adjustment sub-stage, the down-conversion speed representing a speed at which the operating frequency of the GPU is reduced.

In a possible implementation manner, the adjusting the operating frequency of the GPU through at least the first frequency adjustment stage includes:

and in a first frequency adjusting sub-stage in the first frequency adjusting stage, reducing the working frequency of the GPU at a first preset frequency reduction speed corresponding to the first frequency adjusting sub-stage until no interruption is detected in the latest control period.

In a possible implementation manner, the adjusting the operating frequency of the GPU through at least the first frequency adjustment stage further includes:

and in response to the continuous number of the control cycles without detecting the interruption reaching a first preset value corresponding to the first frequency adjustment sub-phase, ending the first frequency adjustment sub-phase, wherein the first preset value is greater than 1.

for a non-first frequency adjustment sub-phase in the first frequency adjustment phase, adjusting the working frequency of the GPU to be the working frequency when the interruption is detected for the last time before the frequency adjustment sub-phase;

in response to no interruption being detected, increasing the working frequency of the GPU at a first preset frequency increasing speed corresponding to the frequency adjusting sub-phase until interruption is detected;

and reducing the working frequency of the GPU at a second preset frequency reduction speed corresponding to the frequency adjusting sub-stage until a preset ending condition corresponding to the frequency adjusting sub-stage is met.

In a possible implementation manner, the preset end condition corresponding to the non-first frequency adjustment sub-stage is:

no interruption is detected in the latest control cycle.

In one possible implementation, the method further includes:

in response to detecting an interrupt, controlling the GPU to enter the power consumption control state without the GPU being in the power consumption control state.

In one possible implementation, the method further includes:

triggering the interrupt in response to detecting at least a specified pin pull-down.

In one possible implementation, the triggering the interrupt in response to detecting at least a specified pin pull-down includes:

in response to detecting that the designated pin is pulled low and that an interrupt has not been triggered in the current control cycle, the interrupt is triggered.

In a possible implementation manner, the designated pin is controlled by a preset device, the preset device includes a filter circuit formed by a resistor and a capacitor, and the sizes of the resistor and the capacitor are determined according to a control cycle of the GPU.

In one possible implementation, the method includes:

and after the first frequency adjusting phase is finished, in response to the fact that the continuous number of the control cycles without interruption is detected to reach a second preset value, adjusting the working frequency of the GPU through a second frequency adjusting phase, wherein the second frequency adjusting phase raises the working frequency of the GPU at a second preset raising speed in the control cycles with the preset number, and the second preset value is larger than 1.

In one possible implementation, the method further includes:

and in response to no interrupt being detected in the preset number of control cycles, controlling the GPU to exit the power consumption control state, and adjusting the working frequency of the GPU to be a preset maximum working frequency.

In one possible implementation, the method further includes:

in response to detecting an interrupt in the second frequency adjustment phase, ending the second frequency adjustment phase, and adjusting the operating frequency of the GPU through a third frequency adjustment phase, wherein in the third frequency adjustment phase, the operating frequency of the GPU is reduced by a preset frequency, and in response to detecting an interrupt in a control cycle after reducing the operating frequency of the GPU by the preset frequency, the operating frequency of the GPU is reduced at a third preset downconversion speed until no interrupt is detected in a latest control cycle.

According to an aspect of the present disclosure, there is provided a power consumption control apparatus for a GPU, including:

a first adjusting module, configured to adjust an operating frequency of the GPU at least through a first frequency adjustment stage in response to the GPU entering a power consumption control state, where the first frequency adjustment stage includes at least two frequency adjustment sub-stages, a frequency reduction speed of a previous frequency adjustment sub-stage of the at least two frequency adjustment sub-stages is greater than a frequency reduction speed of a subsequent frequency adjustment sub-stage, and the frequency reduction speed represents a speed of reducing the operating frequency of the GPU.

In one possible implementation manner, the first adjusting module is configured to:

in response to the fact that the interruption is not detected, increasing the working frequency of the GPU at a first preset frequency increasing speed corresponding to the frequency adjusting sub-phase until the interruption is detected;

and reducing the working frequency of the GPU at a second preset frequency reduction speed corresponding to the frequency adjustment sub-phase until a preset ending condition corresponding to the frequency adjustment sub-phase is met.

no interruption is detected in the latest control cycle.

In one possible implementation, the apparatus further includes:

a first control module to control the GPU to enter the power consumption control state in response to detecting an interrupt when the GPU is not in the power consumption control state.

In one possible implementation, the apparatus further includes:

a triggering module to trigger the interrupt in response to at least detecting a specified pin pull-down.

In one possible implementation, the triggering module is configured to:

In a possible implementation manner, the designated pin is controlled by a preset device, the preset device includes a filter circuit formed by a resistor and a capacitor, and the sizes of the resistor and the capacitor are determined according to a control period of the GPU.

In one possible implementation, the apparatus includes:

and a second adjusting module, configured to adjust the operating frequency of the GPU through a second frequency adjusting phase after the first frequency adjusting phase is ended, in response to that the continuous number of the control cycles in which the interruption is not detected reaches a second preset value, where the second frequency adjusting phase increases the operating frequency of the GPU at a second preset increasing speed in a preset number of control cycles, and the second preset value is greater than 1.

In one possible implementation, the apparatus further includes:

and the second control module is used for controlling the GPU to exit the power consumption control state and adjusting the working frequency of the GPU to be a preset maximum working frequency in response to that no interruption is detected in the preset number of control cycles.

In one possible implementation, the apparatus further includes:

and the third adjusting module is used for responding to the detection of the interruption in the second frequency adjusting phase, ending the second frequency adjusting phase and adjusting the working frequency of the GPU through a third frequency adjusting phase, wherein in the third frequency adjusting phase, the working frequency of the GPU is reduced by a preset frequency, and responding to the detection of the interruption in a control period after the working frequency of the GPU is reduced by the preset frequency, the working frequency of the GPU is reduced at a third preset frequency reduction speed until the interruption is not detected in the latest control period.

According to an aspect of the present disclosure, there is provided an electronic device including: one or more processors; a memory for storing executable instructions; wherein the one or more processors are configured to invoke the memory-stored executable instructions to perform the above-described method.

According to an aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the above-described method.

According to an aspect of the disclosure, there is provided a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when run in an electronic device, a processor in the electronic device performs the above method.

In the embodiment of the disclosure, the operating frequency of the GPU is adjusted at least through a first frequency adjustment stage by responding to the GPU entering a power consumption control state, wherein the first frequency adjustment stage includes at least two frequency adjustment sub-stages, a frequency reduction speed of a previous frequency adjustment sub-stage of the at least two frequency adjustment sub-stages is greater than a frequency reduction speed of a subsequent frequency adjustment sub-stage, and the frequency reduction speed represents a speed of reducing the operating frequency of the GPU, so that the GPU can quickly respond at an initial stage of power consumption control, quickly reduce the power consumption of the GPU, reduce the damage of too high power consumption to a chip, gradually improve the precision of power consumption control, and reach higher control precision at a later stage of power consumption control, thereby improving the safety and performance of the GPU.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure.

Fig. 1 shows a flowchart of a power consumption control method for a GPU according to an embodiment of the present disclosure.

Fig. 2 shows a block diagram of a power consumption control apparatus for a GPU provided by an embodiment of the present disclosure.

Fig. 3 shows a block diagram of an electronic device 1900 provided by an embodiment of the disclosure.

Detailed Description

Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

The term "and/or" herein is merely an association relationship describing an associated object, and means that there may be three relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of a, B, and C, and may mean including any one or more elements selected from the group consisting of a, B, and C.

Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.

In the related art, when power consumption control is performed on the GPU, speed and accuracy are difficult to meet requirements.

The embodiment of the disclosure provides a power consumption control method for a GPU, which adjusts the working frequency of the GPU at least through a first frequency adjusting stage by responding to the GPU entering a power consumption control state, wherein the first frequency adjusting stage comprises at least two frequency adjusting sub-stages, the frequency reduction speed of the prior frequency adjusting sub-stage in the at least two frequency adjusting sub-stages is greater than that of the subsequent frequency adjusting sub-stage, and the frequency reduction speed represents the speed of reducing the working frequency of the GPU, so that the method can quickly respond in the initial stage of power consumption control, quickly reduce the power consumption of the GPU, reduce the damage of overhigh power consumption to a chip, gradually improve the precision of power consumption control, and reach higher control precision in the later stage of power consumption control, thereby improving the safety and performance of the GPU.

The following describes a power consumption control method for a GPU according to an embodiment of the present disclosure in detail with reference to the accompanying drawings.

Fig. 1 shows a flowchart of a power consumption control method for a GPU according to an embodiment of the present disclosure. In one possible implementation manner, the execution subject of the power consumption control method for the GPU (Graphics Processing Unit) may be a power consumption control apparatus for the GPU, for example, the power consumption control method for the GPU may be executed by a terminal device or a server or other electronic devices. The terminal device may be a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a Personal Digital Assistant (PDA), a handheld device, a computing device, a vehicle-mounted device, or a wearable device. In some possible implementations, the power consumption control method for the GPU may be implemented by a processor calling computer readable instructions stored in a memory. As shown in fig. 1, the power consumption control method for the GPU includes step S11.

In step S11, in response to the GPU entering the power consumption control state, adjusting the operating frequency of the GPU at least through a first frequency adjustment phase, wherein the first frequency adjustment phase includes at least two frequency adjustment sub-phases, a frequency reduction speed of a previous frequency adjustment sub-phase of the at least two frequency adjustment sub-phases is greater than a frequency reduction speed of a subsequent frequency adjustment sub-phase, and the frequency reduction speed represents a speed of reducing the operating frequency of the GPU.

In an embodiment of the present disclosure, the power consumption control state may represent a state in which power consumption control of the GPU is required. In an embodiment of the disclosure, after the GPU enters the power consumption control state, the operating frequency of the GPU is adjusted by at least a first frequency adjustment phase, and in the first frequency adjustment phase, the operating frequency of the GPU is adjusted by at least two frequency adjustment sub-phases. For example, after a GPU enters a power consumption control state, the operating frequency of the GPU may be adjusted through one or more frequency adjustment stages, and in a first frequency adjustment stage, the operating frequency of the GPU may be adjusted through a plurality of frequency adjustment sub-stages. The frequency adjustment phase may represent a phase of adjusting the operating frequency of the GPU, and the frequency adjustment sub-phase may represent a sub-phase of adjusting the operating frequency of the GPU in the first frequency adjustment phase. The frequency reduction speed of a preceding one of the at least two frequency adjustment sub-stages is greater than the frequency reduction speed of a following frequency adjustment sub-stage, i.e. in each frequency adjustment sub-stage the frequency reduction speed is gradually decreased.

In a possible implementation, for a non-first one of the at least two frequency adjustment sub-stages, the frequency reduction speed of the frequency adjustment sub-stage may be a first preset proportion of the frequency reduction speed of a last one of the frequency adjustment sub-stages. For example, the first predetermined ratio may be 80%, 50%, etc., and is not limited herein.

For example, the operating frequency of the GPU may be adjusted in a first frequency adjustment phase through 7 frequency adjustment sub-phases in response to the GPU entering a power consumption control state. Wherein the first frequency adjustment sub-phase (i.e. the first frequency adjustment sub-phase) has a down-conversion speed of 200 MHz/control period, i.e. each control period is reduced by 200MHz, the second frequency adjustment sub-phase has a down-conversion speed of 100 MHz/control period, the third frequency adjustment sub-phase has a down-conversion speed of 50 MHz/control period, the fourth frequency adjustment sub-phase has a down-conversion speed of 25 MHz/control period, the fifth frequency adjustment sub-phase has a down-conversion speed of 12 MHz/control period, the sixth frequency adjustment sub-phase has a down-conversion speed of 6 MHz/control period, and the seventh frequency adjustment sub-phase has a down-conversion speed of 3 MHz/control period.

As another example, the operating frequency of the GPU may be adjusted by 17 frequency adjustment sub-stages in a first frequency adjustment stage in response to the GPU entering a power consumption control state. The frequency reduction speed of the first frequency adjustment sub-stage is 200 MHz/control period, the frequency reduction speed of the second frequency adjustment sub-stage is 160 MHz/control period, the frequency reduction speed of the third frequency adjustment sub-stage is 128 MHz/control period, the frequency reduction speed of the fourth frequency adjustment sub-stage is 102 MHz/control period, the frequency reduction speed of the fifth frequency adjustment sub-stage is 81 MHz/control period, the frequency reduction speed of the sixth frequency adjustment sub-stage is 64 MHz/control period, the frequency reduction speed of the seventh frequency adjustment sub-stage is 51 MHz/control period, the frequency reduction speed of the eighth frequency adjustment sub-stage is 40 MHz/control period, the frequency reduction speed of the ninth frequency adjustment sub-stage is 32 MHz/control period, the frequency reduction speed of the tenth frequency adjustment sub-stage is 25 MHz/control period, the frequency reduction speed of the eleventh frequency adjustment sub-stage is 20 MHz/control period, the frequency adjustment sub-stage is 16 MHz/control period, the frequency adjustment sub-stage is 12 MHz/control period, the frequency adjustment sub-stage is 10 MHz/control period, the frequency adjustment sub-stage is seventeenth frequency adjustment sub-stage is 8 MHz/control period.

In one possible implementation, the down-conversion speed of the last of the at least two frequency adjustment sub-stages is less than or equal to a preset down-conversion speed threshold. For example, the predetermined down-conversion speed threshold is 5 MHz/control period, 10 MHz/control period, 3 MHz/control period, etc., and is not limited herein. The frequency reduction speed of the last frequency adjustment sub-stage is smaller than or equal to the preset frequency reduction speed threshold value, so that the control precision of the power consumption control later stage of the GPU can be improved, and the performance of the GPU is improved.

In one possible implementation, the method further includes: in response to detecting an interrupt, controlling the GPU to enter the power consumption control state if the GPU is not in the power consumption control state.

In this implementation, in the event that an interrupt is detected, it may be determined that the power consumption of the GPU is high, e.g., exceeds a preset power consumption threshold.

In this implementation, in a case where the GPU is not in the power consumption control state, in response to detecting an interrupt, the GPU is controlled to enter the power consumption control state, so that the GPU is controlled to enter the power consumption control state based on the interrupt manner, thereby performing power consumption control on the GPU.

In this implementation, the interrupt may be triggered based on a level trigger manner or a skip edge trigger manner, etc.

As an example of this implementation, the method further comprises: triggering the interrupt in response to detecting at least a specified pin pull-down.

In this example, only a single GPIO (General Purpose Input Output) pin is required to trigger the interrupt, and a power consumption acquisition device or a multi-path acquisition of the power consumption of the GPU is not required, thereby effectively reducing the system cost.

In one example, the triggering the interrupt in response to detecting at least a specified pin pull-down includes: in response to detecting that the designated pin is pulled low and that an interrupt has not been triggered in the current control cycle, the interrupt is triggered.

In this example, only one interrupt is triggered in a single control cycle. For example, in any control cycle, the interrupt may be turned off in response to detecting the interrupt, and the interrupt may be turned back on at the beginning of the next control cycle.

In this example, by triggering the interrupt in response to detecting that the designated pin is pulled low and that the interrupt has not been triggered in the current control cycle, not only can the problem of an interrupt storm be solved, but also minor fluctuations in power consumption over a threshold can be recorded, thereby enabling improved stability and accuracy of power consumption control.

In another example, the triggering the interrupt in response to detecting at least a specified pin pull-down includes: triggering the interrupt in response to detecting a specified pin pull-down.

In one example, the designated pin is controlled by a preset device, the preset device includes a filter circuit formed by a resistor and a capacitor, and the sizes of the resistor and the capacitor are determined according to a control period of the GPU.

In this example, the preset device may represent a device that is preset to control a designated pin. In one example, the preset device may employ GS5105. Of course, those skilled in the art can flexibly select the preset device according to the actual application scenario requirement and/or personal preference, which is not limited herein.

In this example, the preset device may be used to detect the input voltage of the GPU without harvesting power consumption of the GPU.

In one example, the preset device may control the designated pin to pull low in response to the voltage output by the filter circuit being greater than a preset voltage threshold. The preset device can compare the voltage output by the filter circuit with a preset voltage threshold value through a comparator. When the voltage output by the filter circuit is greater than the preset voltage threshold, the power consumption of the GPU can be represented to exceed the preset power consumption threshold. Wherein, because the RC filter circuit is included before the comparator, and the comparator has a hysteresis error (e.g., 2mV hysteresis error), it will probably cause the pull-down of the designated pin to have a delay.

In one example, 3rc = t may be set, where R denotes resistance, C denotes capacitance, and t denotes a control period.

In this example, by using a filter circuit including a resistor and a capacitor (i.e., RC filtering), the stability of the output voltage can be improved, and thus the interrupt can be triggered more stably, and the stability of power consumption control can be improved. The size of the resistor and the size of the capacitor are determined according to the control period of the GPU, so that the stability and delay of power consumption control can be balanced, and the GPU can obtain better performance.

In another possible implementation manner, the method further includes: and under the condition that the GPU is not in the power consumption control state, responding to the detection that a designated pin is pulled down, and controlling the GPU to enter the power consumption control state.

In the embodiments of the present disclosure, the control period may represent a minimum period for performing power consumption control on the GPU. The length of the control period may be determined empirically. Each of the at least two frequency adjustment sub-phases may include a plurality of control cycles, respectively.

In a possible implementation manner, the adjusting the operating frequency of the GPU through at least the first frequency adjustment stage includes: and in a first frequency adjusting sub-stage in the first frequency adjusting stage, reducing the working frequency of the GPU at a first preset frequency reduction speed corresponding to the first frequency adjusting sub-stage until no interruption is detected in the latest control period. In this implementation, the first preset frequency reduction speed corresponding to the first frequency adjustment sub-stage is greater than the preset frequency reduction speeds corresponding to the other frequency adjustment sub-stages.

In this implementation manner, through a first frequency adjustment sub-phase in the first frequency adjustment phase, the operating frequency of the GPU is reduced at a first preset frequency reduction speed corresponding to the first frequency adjustment sub-phase until no interruption is detected in a latest control cycle, so that the power consumption of the GPU can be quickly reduced through the first frequency adjustment sub-phase, thereby reducing damage of excessive power consumption to a chip and improving the security of the GPU.

As an example of this implementation, the adjusting the operating frequency of the GPU through at least the first frequency adjustment stage further includes: and in response to the continuous number of the control cycles without detecting the interruption reaching a first preset value corresponding to the first frequency adjustment sub-phase, ending the first frequency adjustment sub-phase, wherein the first preset value is greater than 1.

The first preset value may be 10, 8, 12, etc., and is not limited herein.

In this example, the operating frequency of the GPU may be reduced at a preset downconversion speed corresponding to the frequency adjustment sub-phase at a first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until the consecutive number of control cycles for which no interruption is detected reaches a first preset value corresponding to the frequency adjustment sub-phase. For example, the first preset value is M, and the working frequency of the GPU may be reduced at a preset frequency reduction speed corresponding to the frequency adjustment sub-phase in a first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until no interruption is detected for M consecutive control cycles, where M is an integer greater than 1.

In this example, the operating frequency of the GPU is reduced at the preset down-conversion speed corresponding to the frequency adjustment sub-phase by a first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until the consecutive number of control cycles for which no interruption is detected reaches the first preset value corresponding to the frequency adjustment sub-phase, so that by delaying the end of the frequency adjustment sub-phase, the stability of power consumption control can be improved, thereby facilitating adaptation to different application scenarios.

As another example of this implementation, the preset ending condition corresponding to the first frequency adjustment sub-stage is: no interruption is detected in the latest control cycle. In this example, the operating frequency of the GPU may be reduced at a preset downconversion speed corresponding to the frequency adjustment sub-phase at a first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until no interruption is detected in the latest control period.

In a possible implementation manner, the adjusting the operating frequency of the GPU through at least the first frequency adjustment stage includes: for a non-first frequency adjustment sub-phase in the first frequency adjustment phase, adjusting the working frequency of the GPU to be the working frequency when the interruption is detected for the last time before the frequency adjustment sub-phase; in response to no interruption being detected, increasing the working frequency of the GPU at a first preset frequency increasing speed corresponding to the frequency adjusting sub-phase until interruption is detected; and reducing the working frequency of the GPU at a second preset frequency reduction speed corresponding to the frequency adjustment sub-phase until a preset ending condition corresponding to the frequency adjustment sub-phase is met.

In this implementation, for a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases, the operating frequency when the interruption was last detected before the frequency adjustment sub-phase is the operating frequency when the interruption was last detected in the last frequency adjustment sub-phase of the frequency adjustment sub-phases. For example, during the first control cycle in the second frequency adjustment sub-phase, the operating frequency of the GPU is adjusted to the operating frequency at which the interrupt was last detected in the first frequency adjustment sub-phase.

In this implementation, for a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases, after adjusting the operating frequency of the GPU to the operating frequency when the interruption was last detected before the frequency adjustment sub-phase in the first control cycle of the frequency adjustment sub-phase, if the interruption is not detected, the operating frequency of the GPU is increased at a first preset increasing speed corresponding to the frequency adjustment sub-phase until the interruption is detected, and the operating frequency of the GPU is decreased at a preset decreasing speed corresponding to the frequency adjustment sub-phase until a preset end condition corresponding to the frequency adjustment sub-phase is satisfied. And for the non-first frequency adjusting sub-phase in the at least two frequency adjusting sub-phases, after the working frequency of the GPU is adjusted to the working frequency when the interruption is detected for the last time before the frequency adjusting sub-phase in the first control period of the frequency adjusting sub-phase, if the interruption is detected, the working frequency of the GPU is reduced at a preset frequency reduction speed corresponding to the frequency adjusting sub-phase until a preset ending condition corresponding to the frequency adjusting sub-phase is met.

In this implementation, the first preset frequency increasing speed corresponding to the frequency adjusting sub-stage may represent a preset frequency increasing speed corresponding to the frequency adjusting sub-stage.

As an example of this implementation, for a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases, the first preset frequency increasing speed corresponding to the frequency adjustment sub-phase may be a second preset proportion of the frequency decreasing speed of a last frequency adjustment sub-phase of the frequency adjustment sub-phases. For example, the second predetermined ratio may be 30%, 20%, 40%, 50%, etc., and is not limited herein.

As another example of this implementation, for a non-first frequency adjustment sub-stage of the at least two frequency adjustment sub-stages, the first preset up-conversion speed corresponding to the frequency adjustment sub-stage may be a third preset proportion of the preset down-conversion speed corresponding to the frequency adjustment sub-stage. For example, the third predetermined ratio may be 50%, 60%, etc., and is not limited herein.

In this implementation, for a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases, adjusting the operating frequency of the GPU to the operating frequency when the last interruption was detected before the frequency adjustment sub-phase, in response to no interruption being detected, increasing the operating frequency of the GPU at a first preset increasing speed corresponding to the frequency adjustment sub-phase until the interruption is detected, and decreasing the operating frequency of the GPU at a second preset decreasing speed corresponding to the frequency adjustment sub-phase until a preset end condition corresponding to the frequency adjustment sub-phase is met, thereby not only improving the accuracy of power consumption control over the GPU, but also improving the speed of power consumption control over the GPU.

As an example of this implementation manner, the preset ending condition corresponding to the frequency adjustment sub-stage includes: the continuous number of control cycles for which no interruption is detected reaches a first preset value corresponding to the frequency adjustment sub-phase.

In this example, the operating frequency of the GPU may be reduced at a preset downconversion speed corresponding to the frequency adjustment sub-phase at a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until the consecutive number of control cycles for which no interruption is detected reaches a first preset value corresponding to the frequency adjustment sub-phase. For example, the first preset value is M, and the operating frequency of the GPU may be reduced at a preset down-conversion speed corresponding to the frequency adjustment sub-phase in a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until no interruption is detected for M consecutive control cycles, where M is an integer greater than 1.

In this example, by reducing the operating frequency of the GPU at the preset down-conversion speed corresponding to the frequency adjustment sub-phase by a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until the continuous number of control cycles for which no interruption is detected reaches the first preset value corresponding to the frequency adjustment sub-phase, the stability of power consumption control can be improved by delaying the end of the frequency adjustment sub-phase, thereby facilitating adaptation to different application scenarios.

As another example of this implementation, the preset ending condition corresponding to the frequency adjustment sub-stage is: no interruption is detected in the latest control cycle. In this example, the operating frequency of the GPU may be reduced at a preset downconversion speed corresponding to the frequency adjustment sub-phase at a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases until no interruption is detected in the latest control cycle.

The first preset values corresponding to different frequency adjustment sub-stages in the at least two frequency adjustment sub-stages may be the same or different, which is not limited herein.

In this example, by ending any of the first frequency adjustment phases, which is not the first frequency adjustment sub-phase, in response to no interruption being detected in the most recent control cycle, the efficiency of frequency adjustment can be improved.

In another possible implementation manner, the adjusting the operating frequency of the GPU through at least two frequency adjustment sub-stages includes: for a non-first frequency adjustment sub-phase of the at least two frequency adjustment sub-phases, increasing the working frequency of the GPU at a first preset frequency increasing speed corresponding to the frequency adjustment sub-phase until an interruption is detected; and reducing the working frequency of the GPU at a preset frequency reduction speed corresponding to the frequency adjustment sub-phase until a preset ending condition corresponding to the frequency adjustment sub-phase is met.

In one possible implementation, the method includes: and after the first frequency adjusting phase is finished, in response to the fact that the continuous number of the control cycles without interruption is detected to reach a second preset value, adjusting the working frequency of the GPU through a second frequency adjusting phase, wherein the second frequency adjusting phase raises the working frequency of the GPU at a second preset raising speed in the control cycles with the preset number, and the second preset value is larger than 1.

In an example, the second preset value may be 100, 80, 120, and the like, which is not limited herein.

In one example, the second frequency adjustment phase may also be referred to as a heartbeat detection phase.

In this implementation, the second preset ramp-up speed may represent the speed of the ramp-up frequency of the second frequency adjustment phase. For example, the second predetermined ramp-up speed is 100 MHz/control period, 80 MHz/control period, 120 MHz/control period, etc., and is not limited herein.

In one example, the predetermined number may be 3, 4, 5, etc., and is not limited herein.

In this implementation, after the end of the last of the at least two frequency adjustment sub-phases, the second frequency adjustment phase may be entered in response to the continuous number of control cycles for which no interruption is detected reaching the second preset value.

In this implementation, by setting the second preset value to be greater than 1, the stability of power consumption control can be improved, thereby facilitating application to different application scenarios.

As an example of this implementation, the method further comprises: and in response to no interrupt being detected in the preset number of control cycles, controlling the GPU to exit the power consumption control state, and adjusting the working frequency of the GPU to be a preset maximum working frequency.

For example, the preset maximum operating frequency is 1.3G, which is not limited herein.

In this implementation, the performance of the GPU can be improved by adjusting the operating frequency of the GPU to a preset maximum operating frequency in response to the GPU exiting the power consumption control state.

As an example of this implementation, the method further comprises: in response to detecting an interrupt in the second frequency adjustment phase, ending the second frequency adjustment phase and adjusting the operating frequency of the GPU through a third frequency adjustment phase, wherein in the third frequency adjustment phase, the operating frequency of the GPU is decreased by a preset frequency, and in response to detecting an interrupt in a control cycle after decreasing the operating frequency of the GPU by the preset frequency, the operating frequency of the GPU is decreased at a third preset down-conversion speed until no interrupt is detected in a latest control cycle.

In this example, if an interrupt is detected while increasing the operating frequency of the GPU at the second preset ramp-up speed, the operating frequency of the GPU may be decreased by the preset frequency. And if the interruption is still detected in the control period after the working frequency of the GPU is reduced by the preset frequency, reducing the working frequency of the GPU at a third preset frequency reduction speed until the interruption is not detected in the latest control period. For example, the predetermined frequency is 100MHz, and the first predetermined down-conversion speed is 5 MHz/control period, which is not limited herein.

In this example, performance and stability of the GPU can be traded off by ending the second frequency scaling phase in response to detecting an interrupt in the second frequency scaling phase, and scaling the operating frequency of the GPU through a third frequency scaling phase in which the operating frequency of the GPU is reduced by a preset frequency, and reducing the operating frequency of the GPU at a third preset down speed in response to detecting an interrupt in a control period after reducing the operating frequency of the GPU by the preset frequency until no interrupt is detected in the most recent control period.

In another possible implementation, the method includes: and after the last frequency adjusting sub-phase of the at least two frequency adjusting sub-phases is finished, responding to the fact that the continuous number of the control cycles without interruption is detected to reach a second preset value, and increasing the working frequency of the GPU at a second preset increasing speed until the working frequency of the GPU reaches a preset maximum working frequency.

And if no interruption is detected in the process of increasing the working frequency of the GPU to the preset maximum working frequency at the second preset frequency increasing speed, controlling the GPU to exit the power consumption control state.

If an interruption is detected during the process of increasing the operating frequency of the GPU at the second preset up-conversion speed, the operating frequency of the GPU may be decreased by the preset frequency. And if the interruption is still detected in the control period after the working frequency of the GPU is reduced by the preset frequency, reducing the working frequency of the GPU at a third preset frequency reduction speed until the interruption is not detected in the latest control period. For example, the predetermined frequency is 100MHz, and the first predetermined down conversion speed is 5 MHz/control period, which is not limited herein.

The following describes a power consumption control method for a GPU according to a specific application scenario. In the application scenario, the designated pin may be controlled by a preset device. The preset device can adopt GS5105. The preset device comprises a filter circuit formed by a resistor and a capacitor, and 3RC = t, wherein R represents the resistor, C represents the capacitor, and t represents the control period. The preset device may compare the voltage output by the filter circuit with a preset voltage threshold through a comparator. The preset device may control the designated pin to pull down in response to the voltage output by the filter circuit being greater than a preset voltage threshold. The interrupt may be triggered in response to detecting that the specified pin is pulled low and that the interrupt has not been triggered in the current control cycle.

In a case where the GPU is not in the power consumption control state, the GPU may be controlled to enter a power consumption control state in response to detecting an interrupt.

And responding to the GPU entering a power consumption control state, entering a first frequency adjusting phase, and adjusting the working frequency of the GPU through 17 frequency adjusting sub-phases in the first frequency adjusting phase. Wherein the first frequency adjustment sub-stage has a down-conversion speed of 200 MHz/control cycle, the second frequency adjustment sub-stage has a down-conversion speed of 160 MHz/control cycle, the third frequency adjustment sub-stage has a down-conversion speed of 128 MHz/control cycle, the fourth frequency adjustment sub-stage has a down-conversion speed of 102 MHz/control cycle, the fifth frequency adjustment sub-stage has a down-conversion speed of 81 MHz/control cycle, the sixth frequency adjustment sub-stage has a down-conversion speed of 64 MHz/control cycle, the seventh frequency adjustment sub-stage has a down-conversion speed of 51 MHz/control cycle, the eighth frequency adjustment sub-stage has a down-conversion speed of 40 MHz/control cycle, the ninth frequency adjustment sub-stage has a down-conversion speed of 32 MHz/control cycle, the tenth frequency adjustment sub-stage has a down-conversion speed of 25 MHz/control cycle, the eleventh frequency adjustment sub-stage has a down-conversion speed of 20 MHz/control cycle, the twelfth frequency adjustment sub-stage has a down-conversion speed of 16 MHz/control cycle, the thirteenth frequency adjustment sub-stage has a speed of 12 MHz/control cycle, the fourteenth frequency adjustment sub-stage has a down-control cycle of 10 MHz/control cycle, the fifteenth frequency adjustment sub-stage has a down-conversion speed of 8 MHz/control cycle, the up-conversion speed of 8MHz control cycle, and the fifteenth frequency adjustment sub-control sub-stage has a down-control cycle of 8 MHz/control cycle.

In the first frequency adjustment sub-phase, the working frequency of the GPU is reduced by 200 MHz/control period until no interruption is detected for 10 continuous control periods. In a non-first frequency adjusting sub-phase, adjusting the working frequency of the GPU to the working frequency when the interruption is detected for the last time before the frequency adjusting sub-phase, in response to no interruption being detected, increasing the working frequency of the GPU at a first preset increasing speed corresponding to the frequency adjusting sub-phase until the interruption is detected, and decreasing the working frequency of the GPU at a preset decreasing speed corresponding to the frequency adjusting sub-phase until the interruption is not detected in a latest control period. For a non-first frequency adjustment sub-stage, the first preset frequency increasing speed corresponding to the frequency adjustment sub-stage may be 30% of the frequency decreasing speed of a previous frequency adjustment sub-stage of the frequency adjustment sub-stage.

After the seventeenth frequency adjustment sub-phase is finished, in response to no interruption being detected for 100 consecutive control cycles, the operating frequency of the GPU may be adjusted by a second frequency adjustment phase, wherein in the second frequency adjustment phase, the operating frequency of the GPU is increased by 100MHz per control cycle. If no interruption is detected in 3 consecutive control cycles, the GPU can be controlled to exit the power consumption control state, and the working frequency of the GPU is adjusted to be the preset maximum working frequency. If an interrupt is detected in 3 control cycles, a third frequency adjustment phase may be entered, in which the operating frequency of the GPU is reduced by 100MHz. If an interrupt is still detected after the operating frequency of the GPU is reduced by 100MHz, the operating frequency of the GPU may be reduced by 5 MHz/control period until no interrupt is detected in the latest control period and the power consumption control state is exited. If no interrupt is detected after reducing the operating frequency of the GPU by 100MHz, the power consumption control state may be exited.

It is understood that the above-mentioned method embodiments of the present disclosure can be combined with each other to form a combined embodiment without departing from the logic of the principle, which is limited by the space, and the detailed description of the present disclosure is omitted. Those skilled in the art will appreciate that in the above methods of the specific embodiments, the specific order of execution of the steps should be determined by their function and possibly their inherent logic.

In addition, the present disclosure also provides a power consumption control device for a GPU, an electronic device, a computer-readable storage medium, and a computer program product, which can all be used to implement any one of the power consumption control methods for a GPU provided by the present disclosure, and corresponding technical solutions and technical effects can be referred to in corresponding descriptions of the method sections and are not described again.

Fig. 2 shows a block diagram of a power consumption control apparatus for a GPU provided by an embodiment of the present disclosure. As shown in fig. 2, the power consumption control apparatus for a GPU includes:

a first adjusting module 21, configured to adjust an operating frequency of the GPU at least through a first frequency adjustment stage in response to the GPU entering a power consumption control state, where the first frequency adjustment stage includes at least two frequency adjustment sub-stages, a frequency reduction speed of a previous frequency adjustment sub-stage of the at least two frequency adjustment sub-stages is greater than a frequency reduction speed of a subsequent frequency adjustment sub-stage, and the frequency reduction speed represents a speed of reducing the operating frequency of the GPU.

In one possible implementation, the first adjusting module 21 is configured to:

In a possible implementation manner, the first adjusting module 21 is configured to:

no interruption is detected in the latest control cycle.

In one possible implementation, the apparatus further includes:

In one possible implementation manner, the triggering module is configured to:

In one possible implementation, the apparatus includes:

In one possible implementation, the apparatus further includes:

In some embodiments, functions or modules included in the apparatus provided in the embodiments of the present disclosure may be used to execute the method described in the above method embodiments, and specific implementations and technical effects thereof may refer to the description of the above method embodiments, which are not described herein again for brevity.

Embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the above-described method. The computer-readable storage medium may be a non-volatile computer-readable storage medium, or may be a volatile computer-readable storage medium.

Embodiments of the present disclosure also provide a computer program, which includes computer readable code, when the computer readable code runs in an electronic device, a processor in the electronic device executes the above method.

The disclosed embodiments also provide a computer program product comprising computer readable code or a non-volatile computer readable storage medium carrying computer readable code, which when run in an electronic device, a processor in the electronic device performs the above method.

An embodiment of the present disclosure further provides an electronic device, including: one or more processors; a memory for storing executable instructions; wherein the one or more processors are configured to invoke the memory-stored executable instructions to perform the above-described method.

The electronic device may be provided as a terminal, server, or other form of device.

Fig. 3 shows a block diagram of an electronic device 1900 provided by an embodiment of the disclosure. For example, the electronic device 1900 may be provided as a terminal or server. Referring to fig. 3, electronic device 1900 includes a processing component 1922 further including one or more processors and memory resources, represented by memory 1932, for storing instructions, e.g., applications, executable by processing component 1922. The application programs stored in memory 1932 may include one or more modules that each correspond to a set of instructions. Further, the processing component 1922 is configured to execute instructions to perform the above-described method.

The electronic device 1900 may further include a power component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input/output interface 1958 (I/O interface). The electronic device 1900 may operate based on an operating system, such as a Microsoft Server operating system (Windows Server), stored in the memory 1932 ^TM ) Apple, appleFruit company promoted graphical user interface based operating system (Mac OS X) ^TM ) Multi-user, multi-process computer operating system (Unix) ^TM ) Free and open native code Unix-like operating System (Linux) ^TM ) Open native code Unix-like operating System (FreeBSD) ^TM ) Or the like.

In an exemplary embodiment, a non-transitory computer readable storage medium, such as a memory 1932, is also provided that includes computer program instructions executable by a processing component 1922 of an electronic device 1900 to perform the above-described methods.

The present disclosure may be systems, methods, and/or computer program products. The computer program product may include a computer-readable storage medium having computer-readable program instructions embodied thereon for causing a processor to implement various aspects of the present disclosure.

The computer readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media as used herein is not to be construed as transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., optical pulses through a fiber optic cable), or electrical signals transmitted through electrical wires.

The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing/processing device.

The computer program instructions for carrying out operations of the present disclosure may be assembler instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, the electronic circuitry that can execute the computer-readable program instructions implements aspects of the present disclosure by utilizing the state information of the computer-readable program instructions to personalize the electronic circuitry, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA).

Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The computer program product may be embodied in hardware, software or a combination thereof. In an alternative embodiment, the computer program product is embodied in a computer storage medium, and in another alternative embodiment, the computer program product is embodied in a Software product, such as a Software Development Kit (SDK) or the like.

The foregoing description of the various embodiments is intended to highlight different aspects of the various embodiments that are the same or similar, which can be referenced with one another and therefore are not repeated herein for brevity.

If the technical scheme of the embodiment of the disclosure relates to personal information, a product applying the technical scheme of the embodiment of the disclosure clearly informs personal information processing rules before processing the personal information, and obtains personal independent consent. If the technical scheme of the embodiment of the disclosure relates to sensitive personal information, a product applying the technical scheme of the embodiment of the disclosure obtains individual consent before processing the sensitive personal information, and simultaneously meets the requirement of 'express consent'. For example, at a personal information collection device such as a camera, a clear and significant identifier is set to inform that the personal information collection range is entered, the personal information is collected, and if the person voluntarily enters the collection range, the person is regarded as agreeing to collect the personal information; or on the device for processing the personal information, under the condition of informing the personal information processing rule by using obvious identification/information, obtaining personal authorization by modes of popping window information or asking a person to upload personal information of the person by himself, and the like; the personal information processing rule may include information such as a personal information processor, a personal information processing purpose, a processing method, and a type of personal information to be processed.

The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A power consumption control method for a GPU, comprising:

2. The method according to claim 1, wherein said adjusting the operating frequency of the GPU by at least a first frequency adjustment phase comprises:

3. The method of claim 2, wherein the adjusting the operating frequency of the GPU via at least a first frequency adjustment stage further comprises:

4. The method according to claim 1, wherein said adjusting the operating frequency of the GPU by at least a first frequency adjustment phase comprises:

5. The method of claim 4, wherein the predetermined end condition for the non-first frequency adjustment sub-stage is:

no interruption is detected in the latest control cycle.

6. The method of claim 1, further comprising:

in response to detecting an interrupt, controlling the GPU to enter the power consumption control state if the GPU is not in the power consumption control state.

7. The method of claim 6, further comprising:

8. The method of claim 7, wherein triggering the interrupt in response to detecting at least a specified pin pull-down comprises:

9. The method according to claim 7, wherein the designated pin is controlled by a preset device, the preset device comprises a filter circuit formed by a resistor and a capacitor, and the size of the resistor and the size of the capacitor are determined according to the control period of the GPU.

10. The method according to any one of claims 1 to 9, characterized in that it comprises:

11. The method of claim 10, further comprising:

and in response to no interrupt being detected in the preset number of control cycles, controlling the GPU to exit the power consumption control state and adjusting the working frequency of the GPU to be a preset maximum working frequency.

12. The method of claim 10, further comprising:

13. A power consumption control apparatus for a GPU, comprising:

a first adjustment module to adjust an operating frequency of the GPU through at least a first frequency adjustment phase in response to the GPU entering a power consumption control state, wherein the first frequency adjustment phase includes at least two frequency adjustment sub-phases, a down-conversion speed of a preceding frequency adjustment sub-phase of the at least two frequency adjustment sub-phases being greater than a down-conversion speed of a following frequency adjustment sub-phase, the down-conversion speed representing a speed of reducing the operating frequency of the GPU.

14. An electronic device, comprising:

one or more processors;

a memory for storing executable instructions;

wherein the one or more processors are configured to invoke the memory-stored executable instructions to perform the method of any one of claims 1 to 12.

15. A computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the method of any one of claims 1 to 12.