CN115963886A

CN115963886A - Voltage control circuit, method and terminal

Info

Publication number: CN115963886A
Application number: CN202310041995.5A
Authority: CN
Inventors: 任航天
Original assignee: Zeku Technology Beijing Corp Ltd
Current assignee: Zeku Technology Beijing Corp Ltd
Priority date: 2023-01-11
Filing date: 2023-01-11
Publication date: 2023-04-14

Abstract

The embodiment of the application discloses a voltage control circuit, a voltage control method and a terminal, which can reduce the power consumption of the terminal. The voltage control circuit includes: the power supply module, the voltage regulation control module, the power interface master module and the power interface slave module are connected, and the voltage regulation control module is connected with the power interface master module; the power supply module is connected with the power interface slave module, and the power interface master module is connected with the power interface slave module; the voltage regulation control module is used for sending a target voltage corresponding to at least one load to the power supply module through the power interface master module and the power interface slave module; the power supply module is used for adjusting the current voltage provided by at least one load according to the target voltage and sending a first register writing instruction to the voltage regulation control module through the power interface slave module and the power interface master module under the condition that the current voltage reaches the target voltage; and the voltage regulation control module is also used for sending a voltage regulation completion signal to at least one load according to the first write register instruction.

Description

Voltage control circuit, method and terminal

Technical Field

The present application relates to the field of terminal technologies, and in particular, to a voltage control circuit, a voltage control method, and a terminal.

Background

At present, dynamic Voltage Frequency Scaling (DVFS) is a common low-power-consumption strategy, that is, the supply Voltage is dynamically adjusted according to the actual needs of the digital circuit. For example, the voltage is increased when the chip operates at high frequency; when the chip works at low frequency, the voltage is reduced, so that the purpose of reducing the power consumption of the chip as far as possible is achieved. However, in the current DVFS adjustment strategy, the load needs to wait for a long time to ensure that the voltage adjustment is completed, and then operates on the adjusted voltage, thereby increasing the high-voltage time, increasing the power consumption of the terminal, and reducing the response speed of the terminal.

Disclosure of Invention

Embodiments of the present application are expected to provide a voltage control circuit, a voltage control method, and a terminal, which can reduce power consumption of the terminal and improve response speed of the terminal.

The technical scheme of the application is realized as follows:

the embodiment of the application provides a voltage control circuit, includes:

the power supply system comprises a power supply module, a voltage regulation control module, a power interface main module and a power interface slave module, wherein the voltage regulation control module is connected with the power interface main module; the power supply module is connected with the power interface slave module, and the power interface master module is connected with the power interface slave module; wherein, the first and the second end of the pipe are connected with each other,

the voltage regulation control module is used for sending a target voltage corresponding to at least one load to the power supply module through the power interface master module and the power interface slave module;

the power supply module is used for adjusting the current voltage provided by the at least one load according to the target voltage and sending a first register writing instruction to the voltage regulation control module through the power interface slave module and the power interface master module under the condition that the current voltage reaches the target voltage;

and the voltage regulation control module is also used for sending a voltage regulation completion signal to the at least one load according to the first write register instruction.

The embodiment of the application provides a voltage control method, which is applied to a power management chip, wherein the power management chip comprises: the power supply module is connected with the power supply interface slave module; the power supply module is used for supplying power to at least one load; the power interface slave module is connected with the power interface master module on the system-on-chip; the power interface main module is connected with the voltage regulation control module on the system-on-chip; the voltage regulation control module is connected with the at least one load; the method comprises the following steps:

receiving, by the power interface slave module, a target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module;

and adjusting the current voltage provided on the at least one load through a power supply module according to the target voltage, and sending a first register writing instruction to the power interface main module through the power interface slave module under the condition that the current voltage reaches the target voltage, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first register writing instruction received from the power interface main module.

The embodiment of the application provides a voltage control method, which is applied to a system-on-chip, wherein the system-on-chip comprises the following steps: the voltage regulation control module is connected with the power interface main module; the voltage regulation control module is connected with at least one load, and the power supply interface master module is connected with the power supply interface slave module on the power supply management chip; the power interface slave module is connected with a power supply module of the power management chip; the power supply module is used for supplying power to the at least one load; the method comprises the following steps:

sending, by the power interface master module, a target voltage corresponding to the at least one load to the power interface slave module, so as to send the target voltage to the power supply module through the power interface slave module;

receiving a first write register instruction sent by the power supply module through the power interface main module, and sending the first write register instruction to the voltage regulation control module; the first write register instruction is sent by the power supply module to the power interface master module through the power interface slave module when the current voltage provided by the at least one load is adjusted to the target voltage;

and sending a voltage regulation completion signal to the at least one load through the voltage regulation control module according to the first write register instruction.

The embodiment of the application provides a power management chip, including: the power supply system comprises a power supply module and a power interface slave module connected with the power supply module; the power supply module is used for supplying power to at least one load; the power interface slave module is connected with the power interface master module on the system-on-chip; the power interface main module is connected with the voltage regulation control module on the system-on-chip; the voltage regulation control module is connected with the at least one load; wherein the content of the first and second substances,

the power interface slave module is used for receiving a target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module and sending the target voltage to the power supply module;

the power supply module is used for adjusting the current voltage provided by the at least one load according to the target voltage, and sending a first register writing instruction to the voltage regulation control module through the power interface slave module and the power interface master module under the condition that the current voltage reaches the target voltage, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first register writing instruction.

The embodiment of the present application provides a system-level chip, including: the voltage regulation control module and the power interface main module are connected with the voltage regulation control module; the voltage regulation control module is connected with at least one load; the power interface master module is connected with the power interface slave module on the power management chip; the power interface slave module is connected with a power supply module of the power management chip; the power supply module is used for supplying power to the at least one load; wherein the content of the first and second substances,

the voltage regulation control module is configured to send a target voltage corresponding to the at least one load to the power supply module through the power interface master module and the power interface slave module, so that the power supply module adjusts a current voltage provided at the at least one load according to the target voltage, and sends a first register writing instruction to the power interface master module through the power interface slave module when the current voltage reaches the target voltage;

the power interface main module is used for sending the first write register instruction to the voltage regulation control module;

An embodiment of the present application provides a terminal, including: a power management chip and a system-on-chip; wherein, the power management chip includes: the power supply module is connected with the power supply interface slave module; the power supply module is used for supplying power to at least one load; the system-on-chip includes: the voltage regulation control module is connected with the power interface main module; the voltage regulation control module is connected with the at least one load; the power interface slave module is connected with the power interface master module;

the system-on-chip is used for determining a target voltage corresponding to at least one load through the voltage regulation control module; sending, by the power interface master module, the target voltage to the power interface slave module;

the power management chip is used for adjusting the current voltage provided by the at least one load according to the target voltage through the power supply module; under the condition that the current voltage reaches the target voltage, sending a first register writing instruction to the power interface main module through the power interface slave module;

the system-on-chip is further configured to send the first write register instruction to the voltage regulation control module through the power interface main module; and sending a voltage regulation completion signal to at least one load according to the first write register instruction through the voltage regulation control module.

The embodiment of the application provides a voltage control circuit, a voltage control method and a terminal, wherein a power supply module sends a first register writing instruction to a voltage regulation control module through a power interface slave module and a power interface master module under the condition that a current voltage provided by at least one load is regulated to a target voltage according to the target voltage sent by the voltage regulation control module. Therefore, the voltage regulation control module determines that voltage regulation is finished under the condition that the first write register instruction is received, and sends a voltage regulation finishing signal to at least one load to inform the load that the working frequency can be adjusted to the target voltage operation service in time. Therefore, the blind waiting time and the high-voltage duration of the load after the voltage regulation application is initiated are shortened, the response speed of the terminal is improved, and the power consumption of the terminal is reduced.

Drawings

Fig. 1 is a schematic diagram of an alternative structure of a DVFS control system;

FIG. 2 is a schematic timing diagram illustrating an alternative embodiment of a DVFS control system;

fig. 3 is an alternative structural schematic diagram of a voltage control circuit according to an embodiment of the present disclosure;

fig. 4 is an alternative structural schematic diagram of a voltage control circuit according to an embodiment of the present application;

fig. 5 is an alternative structural schematic diagram of a voltage control circuit according to an embodiment of the present disclosure;

fig. 6 is an alternative structural schematic diagram of a voltage control circuit according to an embodiment of the present application;

fig. 7 is an alternative flow chart of a voltage control method according to an embodiment of the present disclosure;

fig. 8 is an alternative flow chart of a voltage control method according to an embodiment of the present disclosure;

fig. 9 is an alternative schematic structural diagram of a voltage control circuit applied to an actual scene according to an embodiment of the present disclosure;

fig. 10 is an optional schematic flow chart of a voltage control method applied to an actual scenario according to an embodiment of the present application;

fig. 11 is a schematic timing flow diagram of a voltage control circuit and a voltage control method according to an embodiment of the present disclosure;

fig. 12 is an alternative structural schematic diagram of a power management chip according to an embodiment of the present application;

fig. 13 is an alternative structural schematic diagram of a system-on-chip according to an embodiment of the present disclosure.

Detailed Description

In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be described in further detail with reference to the attached drawings, the described embodiments should not be considered as limiting the present application, and all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.

In the following description, references to the terms "first \ second \ third" are only to distinguish similar objects and do not denote a particular order, but rather the terms "first \ second \ third" are used to interchange specific orders or sequences, where appropriate, so as to enable the embodiments of the application described herein to be practiced in other than the order shown or described herein.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the application.

At present, the operating frequency of a digital circuit and the required voltage are positively correlated, and the higher the operating frequency is, the higher the required voltage is. Higher voltage, in turn, means higher power consumption. In low Power design of digital circuits, a conventional DVFS control circuit is shown in fig. 1, and includes a Power Management IC (PMIC) and a System On Chip (SOC). The PMIC comprises a Direct Current-Direct Current (DCDC) converter, and performs data interaction with the SOC through a PMIC interface; the DCDC is used for providing a power supply VDD for the SOC; n subsystems (subsystem 1, subsystem 2, 8230; subsystem N) are hung under a power supply VDD. Here, the N subsystems are N digital circuit modules mounted in the same power domain VDD, and each subsystem is powered by the power domain VDD. At the same time, the working states of the subsystems are different, so that the N voltage values (namely, the voltage value 1, the voltage value 2 \8230, and the voltage value N) corresponding to the N subsystems are also different. To meet the voltage requirements of all subsystems, VDD needs to be greater than or equal to the highest of the N voltage values. Here, the voting manager in fig. 1 is configured to select a highest voltage value of the N voltage values, and send the highest voltage value to the PMIC through the PMIC interface, so that the PMIC supplies power to the N subsystems according to the highest voltage value.

Based on the DVFS control circuit of fig. 1, the timing diagram of the DVFS may include T1-T7 moments, as shown in fig. 2, where:

at the time of T1, when a certain service is about to start and a higher frequency needs to be operated, the subsystem initiates a boost application and sends a voltage value required by itself to the voting manager. The voting manager receives the voltage values sent by the subsystems, and selects the highest voltage value V2 from the voltage values. The voting manager sends the voltage value V2 to the PMIC through the PMIC interface, and after the PMIC receives the voltage value V2, the PMIC sends the voltage value V2 to the DCDC.

At time T2, the DCDC receives the voltage value V2 and starts boosting according to the voltage value V2.

At time T3, after the voltage adjustment in the period from T2 to T3, the voltage on VDD is adjusted from V1 to V2, and the boosting is completed.

However, since the subsystem does not know when the voltage on VDD reaches V2, after the subsystem initiates the voltage regulation application at time T1, it will wait for a fixed period of time Tw to ensure that the voltage regulation is complete. Therefore, the subsystem will not increase the operation frequency until T4, and start to perform the corresponding service.

Here, since the time period from the initiation of the boost request to the completion of the boost, i.e. the time period from T1 to T3, fluctuates or varies with the PMIC load condition, the fixed waiting time Tw generally considers a certain time margin (e.g. the time period from T3 to T4) to ensure that Tw is greater than the time period from T1 to T3. Therefore, the subsystem can start to increase the frequency after the VDD1 is boosted, so as to ensure the normal operation of the subsystem.

And at the moment T5, the subsystem service is ended, the frequency is reduced, meanwhile, a voltage reduction application is initiated, and the voltage value required by the subsystem service is sent to the voting manager. The voting manager will also select the maximum value of each subsystem voltage at time T5. Illustratively, the maximum voltage value chosen by the voting manager at time T5 may be V1. The voting manager sends the voltage value V1 to DCDC1 in the PMIC for voltage regulation.

At time T6, DCDC1 starts voltage regulation based on voltage value V1.

At time T7, VDD1 regulation is finished. The entire DVFS process is completed.

To sum up, the whole control process of the present DVFS scheme is open-loop, and after a subsystem initiates a voltage regulation application and sends a voltage value required by the subsystem to a voting manager, a blind waiting stage is entered, the subsystem does not know when the voltage can be regulated to a target voltage value actually, and needs to wait for a fixed period of time before starting to perform a service, so that the time of working under high voltage is increased, the power consumption is increased, and the response speed of a terminal is reduced. In addition, when the subsystem initiates a boost application, but the PMIC does not perform boost correctly due to some faults, the subsystem in the SOC does not know the voltage abnormality and continues to boost the frequency, so that the subsystem works abnormally, thereby reducing the stability of the terminal service.

In the present application, by analyzing the above sequence flow, it can be seen that the subsystem actual service time Tr is a time period between time T4 and time T5, and the high voltage actual duration time Th is a time period between time T3 and time T6. In order to ensure the normal operation of the subsystem service, th is greater than or equal to Tr. And in the case where Th is greater than or equal to Tr, the shorter the high voltage time Th, the lower the power consumption of the terminal. For Th, that is, in a time period from the time T3 to the time T6, the time T4 to the time T5 is the actual service time, and if the time is shortened, service abnormality is caused; the time from time T5 to time T6, which is a relatively fixed period of time, is the time for the voting manager to vote and send a command to the PMIC. Therefore, the high voltage time Th can be shortened by shortening the time margin from the time T3 to the time T4, thereby reducing power consumption and improving the response speed of the terminal.

Based on the foregoing technical idea, embodiments of the present application provide a voltage control method, a terminal, and a computer-readable storage medium, which can reduce power consumption of the terminal and improve response speed of the terminal.

Referring to fig. 3, fig. 3 is an alternative structural schematic diagram of a voltage control circuit provided in an embodiment of the present application, which will be described with reference to fig. 3.

The voltage control circuit 100 provided in the embodiment of the present application includes: the power supply module 10, the voltage regulation control module 30, the power interface master module 210 and the power interface slave module 220, the power supply module 10 is connected with the power interface slave module 220, and the power interface master module 210 is connected with the power interface slave module 220; wherein the content of the first and second substances,

the voltage regulation control module 30 is configured to send a target voltage corresponding to at least one load 40 to the power supply module 10 through the power interface master module 210 and the power interface slave module 220;

the power supply module 10 is configured to adjust a current voltage provided at the at least one load 40 according to a target voltage, and send a first register writing instruction to the voltage regulation control module 30 through the power interface slave module 220 and the power interface master module 210 when the current voltage reaches the target voltage;

and the voltage regulation control module 30 is configured to send a voltage regulation completion signal to at least one load 40 according to the first write register instruction.

In the embodiment of the application, at least one load is in the same power domain, and the power supply module is used for supplying power to the at least one load. In some embodiments, the at least one load may be at least one subsystem on a system-on-chip of the terminal. Illustratively, the at least one subsystem may be at least one core in a Central Processing Unit (CPU) chip. Or, the at least one load may also be a subsystem of another chip on the terminal, and is connected to the voltage control circuit in the embodiment of the present application, so that the voltage control circuit can supply power to the at least one load through the power supply module, determine a target voltage corresponding to the at least one load through the voltage regulation control module, and send a voltage regulation completion signal to the at least one load when the power supply module regulates the current voltage to the target voltage.

In this embodiment, the power interface master module and the power interface slave module may include a power management protocol interface for connecting the power supply module and the voltage regulation control module, and signal transmission between the power supply module and the voltage regulation control module is realized through a preset register operation instruction.

In some embodiments, the Power Interface master module may include an SPMI (System Power Management Interface) protocol master Interface; the power interface slave module may comprise an SPMI protocol slave interface. Illustratively, a hardware implementation of the SPMI protocol may include a two-wire serial port of the SPMI clock line and the SPMI data line. The SPMI clock line is used for clock synchronization between the master device and the slave device of the SPMI protocol, and the SPMI clock line is used for transmitting data, including transmission of signals or instructions, between the master device and the slave device of the SPMI protocol. In some embodiments of the present application, the master device of the SPMI protocol may be a system-on-chip including a voltage regulation control module, and the slave device of the SPMI protocol may be a PMIC chip including a power supply module. Here, in some embodiments of practical applications, the power interface slave module may further include an interface circuit for interfacing the SPMI protocol master interface with the power supply module, and the power interface master module may further include an interface circuit for interfacing the SPMI protocol slave interface with the voltage regulation control module.

In some embodiments, the power module may include a voltage converter; the voltage regulator includes, for example, a dc converter or other power supply circuit or device with a voltage regulation function, which is specifically selected according to actual situations, and the embodiments of the present application are not limited. Under the condition that the target voltage is greater than the current voltage, the power supply module can boost the current voltage through the voltage converter until the target voltage is reached; and when the target voltage is lower than the current voltage, the power supply module can reduce the current voltage through the voltage converter until the target voltage is reached.

In some embodiments, the power supply module may directly adjust the current voltage to the target voltage through a voltage adjustment process using the target voltage as a target value of the voltage adjustment. Alternatively, the power supply module may add a certain margin to the target voltage as a target value for the actual voltage adjustment to prevent the influence of voltage fluctuation on the load service. The specific selection is performed according to actual conditions, and the embodiments of the present application are not limited.

In the embodiment of the application, the power supply module needs a certain duration for voltage adjustment according to the target voltage, for example, a time period from T2 to T3 corresponding to the voltage boosting process in fig. 2, or a time period from T2 to T3 corresponding to the voltage reducing process. And the power supply module sends a first register writing instruction to the voltage regulation control module through the power interface slave module and the power interface master module under the condition that the current voltage is regulated to the target voltage through the voltage regulation process.

In this embodiment of the present application, the first write register instruction may include: presetting a first register address and presetting a first preset value corresponding to the first register address. Here, the preset first register address and the first preset value may be register addresses and register values agreed in advance by the voltage regulation control module and the power supply module, and are used for representing that the power supply module completes voltage regulation. In this way, the voltage regulation control module may determine that the voltage regulation of the power supply module is completed and transmit a voltage regulation completion signal to the at least one load, upon receiving the first write register command including the pre-agreed register address and the register value. Therefore, the power supply module transmits the voltage regulation completion signal to the voltage regulation control module by utilizing the connected power interface slave module, the power interface master module and the pre-agreed register operation instruction.

It can be understood that, in this embodiment of the present application, the power supply module sends the first write register command to the voltage regulation control module through the power interface slave module and the power interface master module when the current voltage provided on the at least one load is adjusted to the target voltage according to the target voltage sent by the voltage regulation control module. Therefore, the voltage regulation control module determines that voltage regulation is finished under the condition that the first write register instruction is received, and sends a voltage regulation finishing signal to at least one load to inform the load that the working frequency can be adjusted to the target voltage operation service in time. Therefore, the blind waiting time and the high-voltage duration of the load after the voltage regulation application is initiated are shortened, the response speed of the terminal is improved, and the power consumption of the terminal is reduced.

In some embodiments, the voltage regulation control module may send a voltage regulation completion signal to at least one load upon receiving the first write register instruction to notify each load that the voltage currently provided by the power supply module has been adjusted to the target voltage; alternatively, the voltage regulation completion signal may be sent to the first load from which the voltage regulation application originated. Here, the voltage regulation completion signal may include a value of the target voltage. Therefore, under the condition that the first load receives the voltage regulation completion signal, the working frequency of the first load can be adjusted to the target frequency corresponding to the target voltage according to the target voltage, so that the service operation is performed by utilizing the target voltage.

It can be understood that the first load starts to adjust the working frequency only when receiving the voltage regulation completion signal, thereby avoiding the situation that the power supply module fails to adjust the working frequency after blindly waiting for a period of time without knowing the voltage regulation failure due to the failure, which leads to the service failure or abnormal working, and improving the stability of the terminal service.

In some embodiments, as shown in fig. 4, the power supply module 10 includes: a voltage comparison module 110; the voltage comparison module 110 is configured to compare the current voltage with a target voltage, and send an initial voltage regulation completion signal to the power interface slave module 220 when the current voltage reaches the target voltage; and the power interface slave module 220 is configured to send a first write register instruction to the voltage regulation control module 30 when receiving the initial voltage regulation completion signal.

In some embodiments, the voltage comparison module may include a first input terminal, a second input terminal, and an output terminal. The first input end is connected with the output end of the power supply module and used for obtaining the current voltage of the output end of the power supply module so as to detect the current output voltage value in real time in the voltage adjusting process of the power supply module. The second input end is used for inputting a target voltage; and the output end of the voltage comparison module is connected with the power interface slave module. In this way, the voltage comparison module can compare the input current voltage with the target voltage, and send an initial voltage regulation completion signal to the power interface slave module when the current voltage reaches the target voltage. Illustratively, the initial voltage regulation completion signal may be a high level signal.

In some embodiments, under the condition that the signal forms of the current voltage and the target voltage are inconsistent, the current voltage or the target voltage can be subjected to digital-to-analog conversion through a digital-to-analog conversion module to obtain the converted current voltage or the converted target voltage; and performing voltage comparison based on the converted current voltage or the target voltage through a voltage comparison module. Illustratively, the target voltage may be a digital signal value output by the voting manager, and the present voltage may be an analog signal value detected by analog circuitry in the voltage comparison module. Before the target voltage is transmitted to the voltage comparator, the target voltage may be Digital-to-Analog converted by a Digital-to-Analog Converter (DAC), the obtained Analog signal value of the target voltage is transmitted to the voltage comparator, and the Analog signal value of the target voltage and the current voltage are compared by the voltage comparator. Otherwise, the same description is omitted here.

For example, in the case that the power supply module is DCDC, since the inside of the DCDC is closed-loop feedback controlled, the voltage feedback circuit of the analog part thereof has a voltage comparator, through which the current voltage of the DCDC output can be compared with the target voltage in real time, and in the case that the current voltage reaches the target voltage, the voltage comparator will output a level signal. That is to say, a voltage comparator in the DCDC may be used as the voltage comparison module in this embodiment, and a signal output by the voltage comparator in the DCDC when the current voltage reaches the target voltage is used as an initial voltage regulation completion signal and sent to the power interface slave module, so that the power interface slave module sends the first register writing instruction to the voltage regulation control module when receiving the initial voltage regulation completion signal.

It can be understood that, in the embodiment of the present application, the voltage comparison module in the power supply module is utilized to implement real-time detection on the voltage output of the power supply module, and the voltage comparison module can send a notification of voltage regulation completion to the voltage regulation control module in time through the power interface slave module and the power interface master module under the condition that the current voltage reaches the target voltage, so that the power consumption of the terminal is reduced, and the service response speed is increased.

In some embodiments, based on fig. 3 or fig. 4, the voltage regulation control module is further configured to determine a target voltage according to a voltage regulation application initiated by a first load of the at least one load; and sending the target voltage to the power interface main module.

And the power interface master module is used for generating a second write register instruction according to the target voltage and sending the second write register instruction to the power interface slave module.

And the power interface slave module is used for sending the target voltage to the power supply module through a second write register instruction.

In some embodiments, the voltage regulation control module records at least one current load voltage corresponding to at least one load. And a first load in the at least one load initiates a voltage regulation application to the voltage regulation control module under the condition that the service operation needs to change the working voltage, wherein the voltage regulation application comprises a first voltage required by the first load to operate the service. Under the condition that the voltage regulation control module receives a voltage regulation application sent by a first load, whether a target voltage is sent to the power supply module or not can be determined by comparing a first voltage in the voltage regulation application with a maximum value in at least one current load voltage.

In some embodiments, the voltage regulation control module is further configured to, in a case where a voltage regulation application sent by the first load is received, determine whether a first voltage in the voltage regulation application is a maximum value of at least one current load voltage; and under the condition that the first voltage is the maximum value of at least one current load voltage, determining a target voltage according to the first voltage, and sending the target voltage to the power supply module through the power interface master module and the power interface slave module.

Illustratively, the voltage regulation control module may be a voting manager, which is connected to at least one load and records a current load voltage corresponding to each load. Under the condition that a voltage regulation application initiated by a first load is received, the voting manager can compare a first voltage in the voltage regulation application with at least one current load voltage, determine the first voltage as a target voltage under the condition that the first voltage is the maximum value of the at least one current load voltage, send the target voltage to the power supply interface slave module through the power supply interface master module, and send the target voltage to the power supply module through the power supply interface slave module.

It should be noted that, in the case that the voting manager receives the voltage regulation completion signal, it indicates that the power supply module has completed the voltage regulation on the at least one load. The voting manager sends a voltage regulation complete signal to at least one load. And the voting manager takes the target voltage as the current load voltage corresponding to the first load, updates the current load voltage corresponding to the first load in at least one current load voltage recorded by the voting manager, and updates the current load voltage to the target voltage.

In some embodiments, since the power interface main module implements data or signal interaction through the register operation instruction, the power interface main module may generate a second write register instruction according to a target voltage according to a protocol requirement of data transmission when receiving the target voltage sent by the voltage regulation control module, include the target voltage in the second write register instruction, and send the target voltage to the power supply module by sending the second write register instruction to the power supply module.

In some embodiments, the power interface master module may send a second write register command containing the target voltage to the power interface slave module, and the power interface slave module directly sends the second write register command containing the target voltage to the power supply module, where the power supply module obtains the target voltage from the second write register command. Or, the power interface slave module may also write the target voltage into a second register corresponding to the power supply module according to a second register address in the second write register instruction, and the power supply module reads the target voltage from the second register address. Here, the second register is a register connected inside or outside the power supply module. The specific choice is made according to actual conditions, and the embodiment of the application is not limited.

It can be understood that the transmission of the voltage regulation completion signal between the power supply module and the voltage regulation control module can be realized by sending the first register writing instruction from the module through the power interface; and moreover, a second register writing instruction can be sent by the main power interface module, and the target voltage is transmitted between the power supply module and the voltage regulation control module, so that the closed-loop regulation process of voltage control is realized, the uniformity of signal and data transmission in a voltage control circuit is ensured, the circuit complexity is reduced, and the system maintainability is improved.

In some embodiments, the voltage regulation control module is further configured to send a voltage regulation completion signal to the first load when it is determined that the first voltage in the voltage regulation application is not the maximum value of the at least one current load voltage according to the voltage regulation application sent by the first load.

Illustratively, the voltage regulation application may include a voltage boost application, the voltage regulation control module receives the voltage boost application sent by the first load, and when the first voltage in the voltage boost application is not the maximum value of the at least one current load voltage, because the current voltage on the power domain where the first load is located is determined by the maximum value of the at least one current load voltage, it is described that the current voltage on the power domain where the first load is located is higher than the first voltage required by the first load, the requirement of the first load may be directly satisfied, it is not necessary for the power supply module to boost the current voltage provided on the power domain, and the voltage regulation control module directly sends a voltage regulation completion signal to the first load.

Exemplarily, after the load 1 sends the voltage value 1 to the voting manager, if other loads connected to the voting manager in the same power domain as the load 1 operate at a higher voltage, that is, the current load voltages of the other loads are higher than the voltage value 1 required by the subsystem 1, the power supply module does not need to be boosted, at this time, the voting manager may directly send a voltage regulation completion signal to the load 1, and the load 1 may immediately start to increase the frequency to start a service without waiting.

It can be understood that, in the embodiment of the present application, the voltage regulation control module may directly send the voltage regulation completion signal to the first load under the condition that it is determined that voltage regulation is not required according to the first voltage and the recorded at least one current load voltage, so as to improve voltage control efficiency, further reduce power consumption of the terminal, and improve response speed of the terminal.

In some embodiments, as shown in fig. 5, the power interface main module 210 may include: a system power management interface main module 211, i.e., SPMI main module 211; the power interface slave module 220 may include: a system power management interface slave module 221, i.e., SPMI slave module 221; the first write register instruction includes: write master command.

In some embodiments, the master device writing the master device instructions may refer to the master device defined in the SPMI protocol. The system power management interface main module and the voltage regulation control module connected with the system power management interface main module are deployed on a system-on-chip, and the system-on-chip can be used as a main device of an SPMI protocol. The system power management interface slave module and the power supply module connected with the system power management interface slave module are deployed on a power management chip, and the power management chip can be used as slave equipment of an SPMI protocol. Register operation instructions supported by the SPMI standard protocol may be as shown in Table 1, as follows:

TABLE 1

Command:	direction:
		write register instruction	Sending by a master device to a slave device
Write Master Write command	Sending by a slave device to a master device

The Write register instruction in table 1 corresponds to the second Write register instruction in the embodiment of the present application, and the Write Master (Master Write) instruction in table 1 corresponds to the first Write register instruction in the embodiment of the present application. The Master Write instruction is used for writing a certain value to a certain register of the Master device by the slave device in the SPMI protocol, and in the embodiment of the present application, the Master Write instruction may be used as a first register writing instruction, and according to a preset first register address and a first preset value that are pre-agreed by the Master device and the slave device, a corresponding Master Write instruction is generated as a signal for completing voltage regulation of a power supply module in the slave device, and the signal is sent to an SPMI Master module in the Master device through the SPMI slave module; the SPMI main module sends the Master Write instruction to the connected voltage regulation control module; and the voltage regulation control module sends a voltage regulation completion signal to at least one load under the condition of receiving the Master Write instruction.

It can be understood that the master device writing instruction is transmitted between the master module and the slave module of the system power management interface, so that the signals can be timely sent to the master device when the voltage regulation of the slave device is completed, the master device can timely inform the load of the voltage regulation completion signals, the blind waiting time of the load is reduced, the power consumption of the terminal is reduced, and the service response speed is increased.

In some embodiments, based on fig. 5, as shown in fig. 6, the system power management interface slave module 221 is configured to send a write master command to the system power management interface master module 211 upon receiving the initial voltage regulation completion signal sent by the voltage comparison module 110;

the system power management interface main module 211 is further configured to send a write master device instruction to the voltage regulation control module 30;

the voltage regulation control module 30 is further configured to send a voltage regulation completion signal to the at least one load 40 according to the write master command.

In some embodiments, the system power management interface slave module generates a write master instruction according to a preset first register address and a first preset value when receiving an initial voltage regulation signal sent by the voltage comparison module, for example, a high level signal output by a voltage comparator in the DCDC. The first register is a register corresponding to the voltage regulation control module, that is, a register on the system-on-chip of the main device, and the first preset value is a register value corresponding to the first register. The first register may be connected internally or externally to the voltage regulation control module.

In some embodiments, the system power management interface slave module sends the write master instruction to the system power management interface master module, the system power management interface master module may directly send the write master instruction to the voltage regulation control module through a connection line such as a data bus, and the voltage regulation control module may determine that voltage regulation of the power supply module is completed and send a voltage regulation completion signal to the at least one load when receiving the write master instruction including the preset first register address and the first preset value.

In some embodiments, the system power management interface main module is further configured to write a first preset value in a first register corresponding to the voltage regulation control module according to the write master device instruction; and the voltage regulation control module is also used for sending a voltage regulation completion signal to at least one load under the condition that the value of the first register is the first preset value. Here, the first register may be a register internally or externally connected to the voltage regulation control module.

In some embodiments, the system power management interface master module, upon receiving a write master instruction sent by the system power management interface slave module, may execute a write master operation according to a preset first register address and a first preset value in the write master instruction, and write the first preset value in the first register. Therefore, the voltage regulation control module can determine that the voltage regulation of the power supply module is finished under the condition that the voltage regulation control module detects that the value of the first register is the first preset value, and sends a voltage regulation finished signal to at least one load.

It can be understood that a first write register instruction with a preset first register address and a first preset value is used as a signal for completing voltage regulation, and the first write register instruction is sent from the system power management interface slave module to the system power management interface master module according to an interface protocol between the system power management interface master module and the system power management interface slave module, so that the transmission of the voltage regulation completion signal is realized, the time for a load to blindly wait for the completion of voltage regulation is reduced, the power consumption of a terminal is reduced, and the response speed of the terminal is improved.

In some embodiments, the system power management interface master module is further configured to generate a second write register command according to the target voltage and send the second write register command to the system power management interface slave module; and the system power management interface slave module is used for sending the target voltage to the power supply module through a second write register instruction.

In some embodiments, the system power management interface master module may encapsulate the target voltage, generate a second write register instruction, and send the second write register instruction to the system power management interface slave module, when receiving the target voltage sent by the voltage regulation control module. Here, the second write register command may include a target voltage and a preset second register address. And presetting a second register address as an address of a second register corresponding to the power supply module, wherein the target voltage is used as a register value corresponding to the preset second register address in the second write register instruction.

In some embodiments, the system power management interface slave module may directly send the second write register instruction to the power supply module through a link such as a data bus, and the power supply module may directly read a target voltage from the second write register instruction and perform voltage adjustment according to the target voltage when receiving the second write register instruction.

In some embodiments, the system power management interface slave module is further configured to write the target voltage into a second register corresponding to the power supply module according to the second write register instruction.

In some embodiments, when receiving a second write register command sent by the system power management interface master module, the system power management interface slave module may perform a write slave operation according to a preset second register address and a target voltage in the second write register command, and write the target voltage in the second register. In this way, the power supply module can read out the target voltage from the second register to perform voltage adjustment according to the target voltage.

It can be understood that the system power management interface master module generates a second write register command according to the target voltage, and sends the target voltage to the system power management interface slave module by using the second write register command, and then sends the target voltage to the power supply module by using the system power management interface slave module. Therefore, the target voltage required by the load is sent to the power supply end through the register writing instruction between the master module and the slave module of the system power management interface similar to the transmission of the voltage regulation completion signal, so that the uniformity of signal and data transmission in the voltage control circuit is ensured, the circuit complexity is reduced, and the system maintainability is improved.

The embodiment of the application provides a voltage control method, which is applied to a power management chip on a terminal, wherein the power management chip comprises: the power supply module is connected with the power supply interface slave module; the power supply module is used for supplying power to at least one load; the power interface slave module is connected with the power interface master module on the system-on-chip; the power interface main module is connected with a voltage regulation control module on the system level chip; the voltage regulation control module is connected with at least one load. As shown in fig. 7, the voltage control method provided by the embodiment of the present application may be implemented by performing the processes of S101-S102 as follows:

and S101, receiving a target voltage corresponding to at least one load sent by the voltage regulation control module through the power interface master module through the power interface slave module.

And S102, adjusting the current voltage provided on at least one load according to the target voltage through the power supply module, and sending a first write register instruction to the power interface master module through the power interface slave module under the condition that the current voltage reaches the target voltage, so that the voltage regulation control module sends a voltage regulation completion signal to at least one load according to the first write register instruction received from the power interface master module.

Here, the processes of S101 to S102 are consistent with the corresponding descriptions of the working processes in the voltage control circuit, and are not described again here.

In some embodiments, the power module comprises: a voltage comparison module; the process of sending the first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module when the current voltage reaches the target voltage in S102 may include:

comparing the current voltage with a target voltage through a voltage comparison module, and sending an initial voltage regulation completion signal to a power interface slave module under the condition that the current voltage reaches the target voltage;

and sending a first write register instruction to the power interface main module through the power interface slave module under the condition of receiving an initial voltage regulation completion signal, so as to send the first write register instruction to the voltage regulation control module through the power interface main module.

In some embodiments, before "adjusting, by the power supply module, the current voltage provided on the at least one load according to the target voltage" in S102, the method may further include: and transmitting the target voltage to the power supply module from the module through the power interface.

In some embodiments, the process of S101 above may be implemented by a process including:

receiving a second register writing instruction sent by the voltage regulation control module through the power interface main module through the power interface slave module; the second write register instruction includes a target voltage.

In some embodiments, the "sending the target voltage from the module to the power supply module through the power interface" includes: and sending the target voltage to the power supply module through the power interface slave module according to the second write register instruction.

In some embodiments, the power interface master module comprises: a system power management interface main module; the power interface slave module includes: a system power management interface slave module; the first write register instruction includes: writing a master device instruction; the process of sending the first write register instruction to the power interface master module through the power interface slave module when the current voltage reaches the target voltage in S102 may include:

and sending a main equipment writing instruction to a main module of the system power management interface under the condition that the slave module of the system power management interface receives an initial voltage regulation completion signal sent by the voltage comparison module.

In some embodiments, the process of "sending the target voltage to the power supply module from the module through the power interface according to the second write register instruction" may include: and writing the target voltage into a second register corresponding to the power supply module through the system power management interface slave module according to the second register writing instruction.

The voltage control process is consistent with the corresponding working process description in the voltage control circuit, and is not described herein again.

It can be understood that, when the power supply module adjusts the current voltage provided at the at least one load to the target voltage according to the target voltage sent by the voltage regulation control module, the power supply module sends the first write register command to the voltage regulation control module through the power interface slave module and the power interface master module. Therefore, the voltage regulation control module determines that voltage regulation is finished under the condition of receiving the first register writing instruction, and sends a voltage regulation finished signal to at least one load to inform the load that the working frequency can be timely regulated to a target voltage operation service. Therefore, the blind waiting time and the high-voltage duration of the load after the voltage regulation application is initiated are shortened, the response speed of the terminal is improved, and the power consumption of the terminal is reduced. And the load starts to adjust the working frequency under the condition of receiving the voltage regulation completion signal, so that the problem that the service fails or works abnormally due to the fact that the load does not know the voltage regulation failure and adjusts the working frequency after blindly waiting for a period of time because some fault voltage regulation fails in the power supply module in the current related technical scheme is solved, and the stability of the terminal service is improved.

The embodiment of the application provides a voltage control method, which is applied to a system-on-chip on a terminal, wherein the system-on-chip comprises: the voltage regulation control module is connected with the power interface main module; the voltage regulation control module is connected with at least one load, and the power interface main module is connected with the power interface slave module on the power management chip; the power interface slave module is connected with a power supply module of the power management chip; the power supply module is used for supplying power to at least one load. As shown in fig. 8, the voltage control method provided by the embodiment of the present application may be implemented by performing the processes of S201 to S203 as follows:

s201, sending a target voltage corresponding to at least one load to a power interface slave module through a power interface master module, and sending the target voltage to a power supply module through the power interface slave module.

S202, receiving a first write register instruction sent by a power supply module through a power interface main module, and sending the first write register instruction to a voltage regulation control module; the first write register command is sent by the power module from the power interface slave module to the power interface master module via the power interface while adjusting a current voltage provided on the at least one load to a target voltage.

And S203, sending a voltage regulation completion signal to at least one load through the voltage regulation control module according to the first write register instruction.

In some embodiments, before S201, the method may further include:

determining a target voltage according to a voltage regulation application initiated by a first load in at least one load through a voltage regulation control module; and sends the target voltage to the power interface main module.

The above S201 includes: and generating a second write register instruction according to the target voltage through the power interface master module, and sending the second write register instruction to the power interface slave module, so that the power interface slave module sends the target voltage to the power supply module through the second write register instruction.

In some embodiments, the power interface main module comprises: a system power management interface main module; the power interface slave module includes: a system power management interface slave module; the first write register instruction includes: writing a master device instruction; the S202 may include:

sending a writing master device instruction to a voltage regulation control module through a system power management interface main module; writing a main device instruction to be sent to the system power management interface main module by the system power management interface slave module under the condition that the system power management interface slave module receives an initial voltage regulation completion signal sent by the voltage comparison module;

the S203 may include: and sending a voltage regulation completion signal to at least one load through the voltage regulation control module according to the instruction of the writing main equipment.

In some embodiments, the "sending, by the voltage regulation control module, the voltage regulation completion signal to the at least one load according to the write master instruction" includes: writing a first preset value into a first register corresponding to the voltage regulation control module through a system power management interface main module according to a main device writing instruction; and sending a voltage regulation completion signal to at least one load through the voltage regulation control module under the condition that the value of the first register is a first preset value.

In some embodiments, at least one current load voltage corresponding to at least one load is recorded in the voltage regulation control module; the "determining the target voltage according to the voltage regulation application initiated by the first load in the at least one load through the voltage regulation control module" includes:

under the condition of receiving a voltage regulation application sent by a first load, determining whether a first voltage in the voltage regulation application is the maximum value of at least one current load voltage; in the case where the first voltage is the maximum value of the at least one present load voltage, the target voltage is determined from the first voltage.

In some embodiments, the above method further comprises: and sending a voltage regulation completion signal to the first load through the voltage regulation control module under the condition that the first voltage is not the maximum value in at least one current load voltage.

It can be understood that the power supply module sends the first write register command to the voltage regulation control module through the power interface slave module and the power interface master module when the current voltage provided on the at least one load is adjusted to the target voltage according to the target voltage sent by the voltage regulation control module. Therefore, the voltage regulation control module determines that voltage regulation is finished under the condition of receiving the first register writing instruction, and sends a voltage regulation finished signal to at least one load to inform the load that the working frequency can be timely regulated to a target voltage operation service. Therefore, the blind waiting time and the high-voltage duration of the load after the voltage regulation application is initiated are shortened, the response speed of the terminal is improved, and the power consumption of the terminal is reduced. And the load starts to adjust the working frequency under the condition of receiving the voltage regulation completion signal, so that the problem that the service fails or works abnormally due to the fact that the load does not know the voltage regulation failure and adjusts the working frequency after blindly waiting for a period of time because some fault voltage regulation fails in the power supply module in the current related technical scheme is solved, and the stability of the terminal service is improved.

Next, an exemplary application of the voltage control circuit and the voltage control method in the embodiment of the present application in a practical application scenario will be described with reference to fig. 9 and fig. 10.

An embodiment of the present application provides a DVFS control circuit, as shown in fig. 9, including a PMIC and an SOC chip. Here, the PMIC chip corresponds to a power management chip, and the DCDC1 in the PMIC chip corresponds to a power supply module; the SOC chip is equivalent to a system-on-chip, and the voting manager in the SOC chip is equivalent to a voltage regulation control module. The SOC chip also includes at least one subsystem (subsystem 1, subsystem 2, 8230; subsystem N), corresponding to at least one load. At least one subsystem is in the same power domain VDD1, and DCDC1 is used for supplying power to the power domain VDD 1. In some embodiments, as shown in fig. 9, the analog voltage signal output by the DCDC1 may also be filtered through the first inductor L1 and the first capacitor C1. Based on fig. 9, the voltage control method provided in the embodiment of the present application may be as shown in fig. 10, as follows:

and S401, the first subsystem initiates boosting and sends a voltage value 1 to the voting manager.

In S401, the first subsystem may be any one of the subsystems 1 to N, and corresponds to the first load. The boost application corresponds to the above-mentioned voltage regulation application. The voltage value 1 corresponds to a first voltage.

S402, the voting manager judges whether voltage regulation is needed. If yes, executing S403; if not, go to S407.

In S402, the voting manager determines whether voltage regulation is required according to the voltage value 1 and the current load voltage on at least one subsystem when receiving the boost application. When the first voltage is larger than the maximum value of at least one current load voltage, the voting manager determines that voltage regulation is needed, determines a target voltage and executes S403; in the case where the first voltage is less than or equal to the maximum value of the at least one current load voltage, the voting manager determines that voltage regulation is not required, and S407 is performed.

S403, the voting manager sends the target voltage to the PMIC through the SPMI.

In S403, the voting manager generates a second write register command according to the target voltage through the SPMI master module, and sends the second write register command to the SPMI slave module, the SPMI slave module sends the target voltage to DCDC1 in the PMIC, and the DCDC1 starts voltage regulation according to the target voltage.

And S404, after the voltage of the DCDC1 module is adjusted, sending an initial voltage adjusting completion signal to the SPMI slave module.

S405, the SPMI slave sends a master instruction to the SPMI master.

S406, the SPMI master module sends a master instruction to the vote manager.

In S406, the SPMI master module may directly send the write master instruction to the vote manager to notify the vote manager that the voltage regulation is completed, or may write a first preset value in a preset first register address according to the write master instruction to notify the vote manager that the voltage regulation is completed.

And S407, the voting manager sends a voltage regulation completion signal to the first subsystem.

In S407, the vote manager transmits a voltage regulation completion signal to the first subsystem when receiving the write master command transmitted from the SPMI master module. Alternatively, in S402, in the case where the voting manager determines that voltage regulation is not required, a voltage regulation completion signal is sent to the first subsystem.

And S408, the first subsystem improves the working frequency and starts the service.

As can be seen, with the voltage control circuit provided in the embodiment of the present application, once the power supply module adjusts the current voltage to the target voltage, the voltage comparator in the power supply module can send the initial voltage regulation completion signal to the SPMI slave module, and the SPMI slave module generates the write master instruction according to the initial voltage regulation completion signal and sends the write master instruction to the SPMI master module; the SPMI main module sends the writing main equipment instruction to the voting manager, the voting manager sends a voltage regulation completion signal to the subsystem under the condition that the writing main equipment instruction is received, the subsystem can immediately know that voltage regulation is completed, the frequency is increased, and service is started without waiting for a period of time.

In some embodiments, a timing flowchart of the DVFS control circuit according to an embodiment of the present application may be as shown in fig. 11. The moment T1' is the moment when the first subsystem initiates a boosting application and sends the first voltage to the voting manager; the time T2' is the time when the DCDC1 receives the target voltage sent by the voting manager and starts to boost according to the target voltage; the time T3' is the time when the voltage regulation is finished and the first subsystem starts to operate the service under the target voltage after receiving the voltage regulation completion signal; the time T4' is the time when the first subsystem finishes the service and sends a voltage reduction application to the voting manager; the time T5' is the time when the DCDC1 starts voltage reduction according to the target voltage of the voltage reduction application; time T6' is the time when depressurization is completed.

It can be seen that, in the case that the DVFS control circuit according to the embodiment of the present application boosts the voltage to the target voltage at time T3', the first subsystem may immediately receive the voltage regulation completion signal to start the service. Thus, compared to fig. 2, the time period of constant wait at high level of T3-T4 in fig. 2 is saved, and the high level duration Th' in the embodiment of the present application is smaller than the high level duration Th in the related art currently under the condition of ensuring the subsystem service running time Tr. Therefore, the response speed of the terminal is improved, and the power consumption of the terminal is reduced.

It can be understood that, in the embodiment of the present application, a voltage comparator in the DCDC module is used to detect that voltage regulation is completed, and a Master Write instruction of the SPMI is used to enable the PMIC to transmit an indication signal indicating that voltage regulation is completed to the SOC, so as to notify that voltage regulation is completed by the SOC, and thus, a DVFS process is optimized as an open-loop control process in which a voltage regulation application is issued from a subsystem in the related art, the subsystem blindly waits for a fixed time until frequency boosting of the subsystem, and a closed-loop control process in which the subsystem issues a voltage regulation application, the subsystem waits for feedback of a voltage regulation completion signal, and the subsystem boosts the frequency, thereby improving a response speed of a terminal and reducing power consumption of the terminal.

An embodiment of the present application provides a power management chip, as shown in fig. 12, a power management chip 2 includes: a power supply module 21 and a power interface slave module 22 connected with the power supply module 21; the power supply module 21 is configured to supply power to at least one load; the power interface slave module 22 is connected to the power interface master module 32 on the system-on-chip 3; the power interface main module 32 is connected to the voltage regulation control module 31 on the system-on-chip 3; the voltage regulation control module 31 is connected with the at least one load; wherein the content of the first and second substances,

the power interface slave module 22 is configured to receive a target voltage corresponding to the at least one load sent by the voltage regulation control module 31 through the power interface master module 32, and send the target voltage to the power supply module 21;

the power supply module 21 is configured to adjust a current voltage provided at the at least one load according to the target voltage, and send a first write register instruction to the voltage regulation control module 31 through the power interface slave module 22 and the power interface master module 32 when the current voltage reaches the target voltage, so that the voltage regulation control module 31 sends a voltage regulation completion signal to the at least one load according to the first write register instruction.

An embodiment of the present application provides a system-on-chip, as shown in fig. 12, including: a voltage regulation control module 31 and a power interface main module 32 connected with the voltage regulation control module 31; the voltage regulation control module 31 is connected with at least one load; the power interface master module 32 is connected with the power interface slave module 22 on the power management chip 2; the power interface slave module 22 is connected with the power supply module 21 of the power management chip 2; the power supply module 21 is configured to supply power to the at least one load; wherein the content of the first and second substances,

the voltage regulation control module 31 is configured to send a target voltage corresponding to the at least one load to the power supply module 21 through the power interface master module 32 and the power interface slave module 22, so that the power supply module 21 adjusts a current voltage provided on the at least one load according to the target voltage, and sends a first register writing instruction to the power interface master module 32 through the power interface slave module 22 when the current voltage reaches the target voltage;

the power interface main module 32 is configured to send the first write register instruction to the voltage regulation control module 31;

the voltage regulation control module 31 is further configured to send a voltage regulation completion signal to the at least one load according to the first write register instruction.

The embodiment of the present application further provides a terminal, and the power management chip 2 and the system on chip 3 provided in the foregoing embodiment may be integrated in the terminal. Referring to fig. 12, as shown in fig. 13, the terminal 4 may include: a power management chip 2 and a system-on-chip 3; wherein, the power management chip 2 includes: a power interface slave module 22 connected with the power supply module 21 and the power supply module 21; the power supply module 21 is configured to supply power to at least one load; the system-on-chip 3 comprises: a power interface main module 32 connected with the voltage regulation control module 31 by the voltage regulation control module 31; the voltage regulation control module 31 is connected with the at least one load; the power interface slave module 22 is connected with the power interface master module 32;

the system-on-chip 3 is configured to determine, through the voltage regulation control module 31, a target voltage corresponding to at least one load; sending, by the power interface master module 32, the target voltage to the power interface slave module 22;

the power management chip 2 is configured to adjust, according to the target voltage, a current voltage provided at the at least one load through the power supply module 21; sending a first write register command to the power interface master module 32 through the power interface slave module 22 when the current voltage reaches the target voltage;

the soc is further configured to send the first write register instruction to the voltage regulation control module 31 through the power interface main module 32; and sends a voltage regulation completion signal to at least one load according to the first write register instruction through the voltage regulation control module 31.

In some embodiments, the terminal provided in the embodiments of the present application may be implemented as various types of user terminals such as a notebook computer, a tablet computer, a desktop computer, a set-top box, a mobile device (e.g., a mobile phone, a portable music player, a personal digital assistant, a dedicated messaging device, and a portable game device). The specific choice is made according to actual conditions, and the embodiment of the application is not limited.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, and improvement made within the spirit and scope of the present application are included in the protection scope of the present application.

Claims

1. A voltage control circuit, comprising:

the power supply system comprises a power supply module, a voltage regulation control module, a power interface main module and a power interface slave module, wherein the voltage regulation control module is connected with the power interface main module; the power supply module is connected with the power interface slave module, and the power interface master module is connected with the power interface slave module; wherein the content of the first and second substances,

2. The circuit of claim 1, wherein the power supply module comprises: a voltage comparison module;

the voltage comparison module is used for comparing the current voltage with the target voltage and sending an initial voltage regulation completion signal to the power interface slave module when the current voltage reaches the target voltage;

and the power interface slave module is used for sending the first register writing instruction to the voltage regulation control module through the power interface master module under the condition of receiving the initial voltage regulation completion signal.

3. The circuit of claim 1, wherein the voltage regulation control module is connected to the at least one load;

the voltage regulation control module is further used for determining a target voltage according to a voltage regulation application initiated by a first load in the at least one load; sending the target voltage to the power interface main module;

the power interface master module is used for generating a second write register instruction according to the target voltage and sending the second write register instruction to the power interface slave module;

and the power interface slave module is used for sending the target voltage to the power supply module through the second write register instruction.

4. The circuit of any one of claims 1-3, wherein the power interface master module comprises: a system power management interface main module; the power interface slave module includes: a system power management interface slave module; the first write register instruction comprises: write master command.

5. The circuit of claim 4,

the system power management interface slave module is used for sending the write master device instruction to the system power management interface master module under the condition of receiving an initial voltage regulation completion signal sent by the voltage comparison module;

the system power management interface main module is used for sending the writing main equipment instruction to the voltage regulation control module;

and the voltage regulation control module is also used for sending a voltage regulation completion signal to the at least one load according to the writing main equipment instruction.

6. The circuit of claim 5,

the system power management interface main module is further configured to write a first preset value in a first register corresponding to the voltage regulation control module according to the master writing instruction;

the voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load when the value of the first register is the first preset value.

7. The circuit of claim 4,

and the system power management interface slave module is used for writing the target voltage into a second register corresponding to the power supply module according to a second register writing instruction.

8. The circuit according to any one of claims 1-3 or 5-7, wherein at least one current load voltage corresponding to the at least one load is recorded in the voltage regulation control module;

the voltage regulation control module is further configured to determine whether a first voltage in a voltage regulation application is a maximum value of the at least one current load voltage under the condition that the voltage regulation application sent by a first load is received; under the condition that the first voltage is the maximum value of the at least one current load voltage, determining the target voltage according to the first voltage, and sending the target voltage to the power supply module through the power interface master module and the power interface slave module;

and the first load is used for operating the service at a target working frequency corresponding to the target voltage under the condition of receiving the voltage regulation completion signal.

9. The circuit of claim 8, wherein the voltage regulation control module is further configured to send the voltage regulation complete signal to the first load if the first voltage is not a maximum of the at least one current load voltage.

10. A voltage control method is applied to a power management chip, and is characterized in that the power management chip comprises: the power supply module is connected with a power supply interface slave module; the power supply module is used for supplying power to at least one load; the power interface slave module is connected with the power interface master module on the system-on-chip; the power interface main module is connected with the voltage regulation control module on the system-on-chip; the voltage regulation control module is connected with the at least one load; the method comprises the following steps:

11. A voltage control method is applied to a system-on-chip (SOC), and the SOC comprises the following steps: the voltage regulation control module is connected with the power interface main module; the voltage regulation control module is connected with at least one load, and the power interface main module is connected with the power interface slave module on the power management chip; the power interface slave module is connected with a power supply module of the power management chip; the power supply module is used for supplying power to the at least one load; the method comprises the following steps:

receiving a first write register instruction sent by the power supply module through the power interface main module, and sending the first write register instruction to the voltage regulation control module; the first register writing instruction is sent by the power supply module to the power interface main module through the power interface slave module under the condition that the current voltage provided by the at least one load is adjusted to the target voltage;

12. A power management chip, comprising: the power supply device comprises a power supply module and a power interface slave module connected with the power supply module; the power supply module is used for supplying power to at least one load; the power interface slave module is connected with the power interface master module on the system-on-chip; the power interface main module is connected with the voltage regulation control module on the system-on-chip; the voltage regulation control module is connected with the at least one load; wherein the content of the first and second substances,

13. A system-on-chip, comprising: the voltage regulation control module and the power interface main module are connected with the voltage regulation control module; the voltage regulation control module is connected with at least one load; the power interface master module is connected with the power interface slave module on the power management chip; the power interface slave module is connected with a power supply module of the power management chip; the power supply module is used for supplying power to the at least one load; wherein the content of the first and second substances,

14. A terminal, comprising: a power management chip and a system-on-chip; wherein, the power management chip includes: the power supply module is connected with the power supply interface slave module; the power supply module is used for supplying power to at least one load; the system-on-chip includes: the voltage regulation control module is connected with the power interface main module; the voltage regulation control module is connected with the at least one load; the power interface slave module is connected with the power interface master module;