CN115951748A - Low-power-consumption reference source circuit for fast switching of power supply - Google Patents

Abstract

The invention discloses a low-power consumption reference source circuit for fast switching of a power supply, which comprises: the external power supply monitoring module monitors the power supply voltage and compares the power supply voltage with a threshold value; the internal power supply selection switching module is used for selecting an external power supply to generate an internal power supply and a switching isolation signal; a reference voltage generating circuit generating one or more internal reference voltages; the high driving circuit enhances the driving capability of the output voltage; and the isolation control circuit isolates or conducts the internal reference voltage, enables and gates the high driving circuit and generates a starting identification signal. The invention is suitable for a multi-power supply system, and a plurality of power domains share one reference, thereby reducing the area and reducing the power consumption; when the power supply is switched rapidly and repeatedly, the output reference voltage is isolated, and the abnormal function of the system caused by unstable reference is avoided; and when the high-speed drive circuit is started, debugged and specially applied, the high-speed drive circuit is enabled to respond quickly, and when the high-speed drive circuit works normally, the high-speed drive circuit is closed to reduce power consumption.

Description

Low-power-consumption reference source circuit for fast switching of power supply

Technical Field

The invention relates to a low-power-consumption reference source circuit for quickly switching a power supply, and belongs to the field of design of analog integrated circuits.

Background

Along with the vigorous development of the internet of things, smart homes and wearable equipment, the types and the quantity of electronic equipment are continuously increased, and a plurality of electronic products use double-power supplies or multi-power supply cooperative power supply, so that the condition of double-power supply or multi-power supply switching exists.

The chips of these products are widely applied to low-power consumption reference sources, and in the existing dual-power supply or multi-power supply system, a stable power supply needs to be provided to generate reference voltage, or one reference source is used in each power supply domain, if the power supply changes instantly, the output reference voltage fluctuates greatly, and the system function is abnormal. At present, no low-power-consumption reference source capable of keeping stable output when multiple power supplies are switched instantly exists, so that the low-power-consumption reference source designed aiming at the problem has great significance.

Disclosure of Invention

The invention provides a low-power-consumption reference source circuit for quickly switching power supplies, which is used for solving the problems in the background technology.

The invention provides a low-power-consumption reference source circuit for quickly switching a power supply, which is characterized in that:

the low-power-consumption reference source for quickly switching the power supply mainly comprises an external power supply monitoring module, an internal power supply selection switching module, a reference voltage generating circuit, a high driving circuit and an isolation control circuit;

the external power supply monitoring module monitors external power supply voltages and compares the external power supply voltages with threshold values to monitor external 1 st, 2 nd, \ 8230, n voltage of external power supply signals, compares the external power supply voltages with the threshold values to output comparison results 1 st, 2 nd, \ 8230, n reset signals;

the internal power selection switching module is connected with the external power monitoring module and used for receiving comparison results 1, 2, \8230ofthe external power monitoring module, selecting the external power signals 1, 2, \8230nthrough preset logic operation, and generating an internal power VIN and a control signal 1 for isolation control;

the reference voltage generating circuit is connected with the internal power selection switching module and is used for generating internal reference voltage under an internal power domain and outputting 1 st, 2 nd, 8230nd and n th internal reference signals;

the high driving circuit is connected with the internal power supply selection switching module, the reference voltage generating circuit and the isolation control circuit and is used for enhancing the driving capability of a No. 1 internal reference signal and outputting a high driving internal reference signal;

the isolation control circuit is connected with the internal power supply selection switching module, the reference voltage generating circuit and the high driving circuit, and is used for receiving a 1 st control signal of the internal power supply selection switching module, and controlling 1 st, 2 nd, 8230, n output reference signals to isolate or conduct 1 st, 2 nd, 8230, n internal reference signals through an internal logic operation and isolation switch network circuit; for generating the 2 nd control signal, enabling and gating the high driving circuit; for generating a 3 rd control signal as the start identification signal.

The low-power-consumption reference source for quickly switching the power supply has the following advantages that:

the power supply system is suitable for a multi-power supply system, and a plurality of power domains share one reference, so that the circuit area is reduced, and the power consumption is reduced;

when the power supplies are switched rapidly and repeatedly, the output reference voltage can be isolated, the stability of the reference voltage is ensured, and the abnormal system function caused by the voltage jump among the power supplies is avoided;

the high-speed driving circuit has a high driving function, can output reference voltage quickly when a reference source is started, and can be applied to various debugging and special application scenes needing the high driving function; meanwhile, in a normal working scene, the high-driving circuit can be closed, and the whole reference source is ensured to meet the requirement of low power consumption.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of an overall circuit according to an embodiment of the present invention

Fig. 2 is a schematic diagram of a working state of the isolator network in the start mode according to the embodiment of the present invention

FIG. 3 is a timing diagram of the isolation switch network in the startup mode according to an embodiment of the present invention

Fig. 4 is a schematic diagram of a working state of the isolation switch network in the normal working mode according to the embodiment of the present invention

FIG. 5 is a timing diagram of the isolation switch network in the normal operation mode according to an embodiment of the present invention

FIG. 6 is a schematic diagram of the working status of the isolator network in the special application and debug mode according to the embodiment of the present invention

FIG. 7 is a timing diagram of a network of switches under special application and debug modes according to an embodiment of the present invention

FIG. 8 is a schematic diagram of a conventional reference voltage generating circuit

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and the scope of the present invention is not limited to the following descriptions. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The invention provides a low-power-consumption reference source circuit for quickly switching a power supply, and referring to fig. 1, the low-power-consumption reference source for quickly switching the power supply mainly comprises an external power supply monitoring module, an internal power supply selection switching module, a reference voltage generating circuit, a high driving circuit and an isolation control circuit;

specifically, the external power supply monitoring module monitors and compares external power supply voltages with a threshold, respectively monitors voltages of external 1 st, 2 nd, 8230, n external power supply signals VDD1, VDD2, 8230, VDDN, respectively outputs comparison results of 1 st, 2 nd, 8230, n reset signals POR1, POR2, 8230, PORn by comparing with the threshold;

the internal power selection switching module is connected with the external power monitoring module and is used for receiving comparison results 1, 2, 8230, n reset signals POR1, POR2, 8230, and PORn of the external power monitoring module, and selecting the signals 1, 2, 8230, n external power signals VDD1, VDD2, 8230, VDDdn and VDDdn to generate an internal power VIN and a 1 st control signal ISO for isolation control through preset logic operation;

the reference voltage generating circuit is connected with the internal power supply selection switching module, is used for generating internal reference voltage under an internal power supply domain, and can output 1 st, 2 nd, 8230n internal reference signals VBG1, VBG2, 8230n and VBGn;

the high driving circuit is connected with the internal power supply selection switching module, the reference voltage generating circuit and the isolation control circuit, and is used for enhancing the driving capability of a No. 1 internal reference signal VBG1 and outputting a high driving internal reference signal VBG1_ HDRV;

the isolation control circuit is connected with the internal power supply selection switching module, the reference voltage generating circuit and the high driving circuit, is used for receiving a 1 st control signal ISO of the internal power supply selection switching module, and controls 1 st, 2 nd, 8230, n output reference signals VREF1, VREF2, 8230, VREFn isolation or conduction 1 st, 2 nd, 8230, n internal reference signals VBG1, VBG2, 8230, VBGn; for generating a 2 nd control signal DRV _ EN, enabling and gating the high driving circuit; for generating the 3 rd control signal BGOK as the start identification signal.

In an embodiment, the external power monitoring module may employ, but is not limited to, a power-on reset circuit such as a comparator structure, an RC circuit structure, and the like. If a common comparator type power-on reset circuit is adopted, a reset signal is output according to a comparison result of a reference end of the comparator and a power supply end voltage, and the voltage switching of the reference end of the comparator can be controlled through a 3 rd control signal BGOK. When the 3 rd control signal BGOK is at a low level, the reference terminal of the comparator is an internal reference of the external power supply monitoring module, and may be, but is not limited to, a diode-based reference source, a MOS device threshold voltage-based reference source, other bandgap reference sources, and the like; when the 3 rd control signal BGOK changes to a high level, the reference end of the comparator is switched to the 1 st output reference signal VREF1, and meanwhile, the internal reference of the external power supply monitoring module can be closed, so that the power consumption is reduced;

as described aboveThe internal power selection switching module can adopt 1, 2, 8230, n PMOS switches as selection switches to control the 1 st, 2 nd, 8230, n external power signals VDD1, VDD2 nd, 8230, VDDn to gate the internal power VIN; the 1 st control signal ISO may be generated using, but not limited to, RC charging, clock counting, system direct control, etc. The 1 st control signal ISO is used for isolation control, and can adopt a low-level pulse signal, wherein the high level is in a non-isolation state, and the low level is in an isolation state; each time of power supply switching, a low level pulse is triggered, and the time of the low level is T _ISO ，T _ISO The stable time of the power supply switching is required to be longer than C1 × Δ VREF1/Ileak, wherein C1 is the output capacitance of the 1 st output reference signal VREF1, Δ VREF1 is the maximum deviation voltage limited by the reference voltage precision, and Ileak is the leakage current on the 1 st output reference signal VREF1 in an isolation state;

the reference voltage generating circuit can adopt, but is not limited to, a common low-power consumption bandgap reference circuit, which can be seen in fig. 8;

the high-driving circuit can be used, but is not limited to a common unity gain buffer circuit;

the isolation control circuit may generate the 3 rd control signal BGOK using, but not limited to, RC charging, clock counting, threshold comparison, etc. The 3 rd control signal BGOK is a reference start identification signal, and it is possible to adopt a high level as a voltage of the 1 st output reference signal VREF1 reaching an expected value, a low level as a reference incomplete start, and a start time of Tset. The 2 nd control signal DRV _ EN is a control signal of the above high driving circuit, and may be a high level for enabling and gating the high driving circuit, and a low level for turning off and non-gating the high driving circuit; internal logic operation can be adopted, and the No. 3 control signal BGOK is used for controlling the No. 2 control signal DRV _ EN during reference starting, so that reference quick starting is realized; and after the reference is started, the system can directly control the 2 nd control signal DRV _ EN, so that the high driving requirements of debugging and special applications are met.

In this embodiment, referring to fig. 1, the input terminal of the external power monitoring module is connected to 1 st, 2 nd, \8230, n external power signals VDD1, VDD2, \8230, VDDn, and the output terminal is connected to 1 st, 2 nd, \8230, n reset signals POR1, POR2, \8230, PORn.

In this embodiment, referring to fig. 1, the internal power selection switch module has inputs connected to 1 st, 2 nd, \8230, n external power signals VDD1, VDD2, \8230, VDDn and 1 st, 2 th, \8230, n reset signals POR1, POR2, \8230, and output connected to 1 st control signal ISO and internal power signal VIN.

In this embodiment, referring to fig. 1, the reference voltage generating circuit has an input terminal connected to the internal power signal VIN and an output terminal connected to 1 st, 2 nd, 8230, n internal reference signals VBG1, VBG2, \8230, and VBGn.

In an embodiment, referring to fig. 8, the reference voltage generating circuit includes 3MOS transistors, 2 triodes, n +5 resistors, and 1 operational amplifier;

specifically, the internal power source VIN is connected to the source of the 1 st MOS transistor M1, the source of the 2 nd MOS transistor M2, and the source of the 3 rd MOS transistor M3, the output terminal of the operational amplifier is connected to the gate of the 2 nd MOS transistor M2 and the gate of the 3 rd MOS transistor M3, one terminal of the 1 st resistor R1 is connected to the drain of the 1 st MOS transistor M1 and the emitter of the 1 st triode Q1, the drain of the 2 nd MOS transistor M2 is connected to one terminal of the 5 th resistor R5 and one terminal of the 2 nd resistor R2, the positive input terminal of the operational amplifier is connected to the other terminal of the 1 st resistor R1 and one terminal of the 3 rd resistor R3, the negative input terminal of the operational amplifier is connected to the other terminal of the 2 nd resistor R2 and one terminal of the 4 th resistor R4, the other end of the 5 th resistor R5 is connected with the emitting electrode of the 2 nd triode Q2, the base electrode and the collector electrode of the 1 st triode Q1 are grounded, the base electrode and the collector electrode of the 2 nd transistor Q2 are grounded, the drain electrode of the 3 rd MOS transistor M3 is connected with one end of the 6 th resistor R6 and the 1 st internal reference signal VBG1, the other end of the 6 th resistor R6 is connected with one end of the 7 th resistor R7 and the 2 nd internal reference signals VBG2, 823030Rn +4, the other end of the n +4 th resistor Rn +4 is connected with one end of the n +5 th resistor Rn +5 and the n th internal reference signal VBGn, the other end of the 3 rd resistor R3 and the other end of the 4 th resistor R4, 8230and the other end of the Rn +5 are grounded.

In this embodiment, referring to fig. 1, the input terminal of the high-driving circuit is connected to the internal power signal VIN and the 1 st internal reference voltage

In this embodiment, referring to fig. 1, the input terminal of the isolation control circuit is connected to an internal power signal VIN, a high-driving internal reference signal VBG1_ HDRV, a 1 st control signal ISO, 1 st, 2 nd, 8230, an n internal reference signal VBG1, VBG2, 8230, VBGn, and the output terminal thereof is connected to a 2 nd control signal DRV _ EN, a 3 rd control signal BGOK, 1 st, 2 nd, 8230, an n output reference signal VREF1, VREF2, 8230, VREFn.

In the present embodiment, referring to fig. 2, 4 and 6, the isolation switch network inside the isolation control circuit includes 13 switches 1, 2, 8230, 13 switches S1, S2, 8230, S13,3 capacitors 1, 2 and 3 capacitors C1, C2 and C3;

specifically, one end of the 3 rd switch S3 is connected to the 1 st internal reference signal VBG1, the other end of the 3 rd switch S3 is grounded, one end of the 13 th switch S13 is connected to the high-driving internal reference signal VBG1_ HDRV, the other end of the 13 th switch S13 is connected to one ends of the 1 st switch S1 and the 2 nd switch S2, the other end of the 1 st switch S1 is connected to the 1 st internal reference signal VBG1, the other end of the 2 nd switch S2 is connected to the 1 st capacitor C1 upper board, and the 1 st output reference signal VREF1;

one end of the 4 th switch S4 is connected to the 2 nd (or 3, \ 8230;, or n) internal reference signal VBG2 (or VBG3, \ 8230;, or VBGn), the other end of the 4 th switch S4 is connected to one end of the 5 th switch S5, the 6 th switch S6, the 2 nd (or 3, \ 8230;, or n) output reference signal VREF2 (or VREF3, \8230;, or VREFn), the other end of the 5 th switch S5 is grounded, the other end of the 6 th switch S6 is connected to one end of the 7 th switch S7, one end of the 8 th switch S8, the upper plate of the 2 nd capacitor C2, and the other end of the 7 th switch S7 is grounded, the lower plate of the 2 nd capacitor C2 is grounded, the other end of the 8 th switch S8 is connected with one end of the 9 th switch S9 and the 10 th switch S10, the upper plate of the 3 rd capacitor C3, the lower plate of the 3 rd capacitor C3 is grounded, the other end of the 9 th switch S9 is connected with the 2 nd (or 3, \8230;, or n) output reference signal VREF2 (or VREF3, \8230;, or VREFn), the other end of the 10 th switch S10 is connected with one end of the 11 th switch S11 and one end of the 12 th switch S12, the other end of the 12 th switch S12 is grounded, and the other end of the 11 th switch S11 is connected with the 1 st output reference signal VREF1;

the method comprises the steps of 4, 5, \8230, 12, switching S4, S5, \8230, S12, 2 nd capacitor C2 and 3 rd capacitor C3, wherein the switching networks are used as a group of switching networks and correspond to a group of signals 2 nd internal reference signal VBG2 and 2 nd output reference signal VREF2. The corresponding n-2 groups of signals 3, 4, \8230, the n internal reference signals VBG3, VBG4, \8230, VBGn and 3, 4, \8230, the n output reference signals VREF3, VREF4, \8230, VREFn, corresponding to the n-2 groups of switch networks connected in the same way.

In a specific embodiment, the isolation switch network can work in two modes, including a start-up or high-driving mode and a normal operation mode. In the two modes, when the power supply is switched, the isolating switch network has different control logics;

specifically, referring to fig. 2 and 3, when the 3 rd control signal BGOK is low, the 2 nd control signal DRV _ EN is controlled to be high, the high driving circuit is enabled and gated, the 13 th switch S13, the 2 nd switch S2, the 5 th switch S5, the 7 th switch S7, the 10 th switch S10, and the 11 th switch S11 are controlled to be closed, the 1 st switch S1, the 3 rd switch S3, the 4 th switch S4, the 6 th switch S6, the 8 th switch S8, the 9 th switch S9, and the 12 th switch S12 are controlled to be opened, and at this time, the isolation switch network is in a startup or high driving mode, at this time, the 1 st output reference signal VREF1 and the high driving internal reference signal VBG1_ HDRV are connected through the 13 th switch S13 and the 2 nd switch S2, the 2 nd (or 3; 8230or 82n) output reference signal VREF2 (or 823; or 8230n) output reference signal VREF2 (or VREF3, or vrv, or vrn) is changed to the corresponding high-speed switch ground voltage stabilizing level when the corresponding high-voltage signal tsn in the corresponding switch group reaches the corresponding to the corresponding switch C1-3, tsn stabilizing circuit, and the corresponding to the corresponding ground switch network, and the corresponding to the control signal tsn 1-3, tsn, and the corresponding to be stabilized voltage stabilizing circuit; then, controlling the 2 nd control signal DRV _ EN to become low level, turning off and non-gating the high driving circuit, controlling the switches S1, S2, S4, S6, S8, S12 to be closed, controlling the switches S13, S3, S5, S7, S9, S10, S11 to be opened, wherein the switch S4 is closed after a time delay Td, and the isolating switch network is in normal operation mode, and when the 1 st output reference VREF signal VBG1 and the 1 st internal reference signal VBG1 are connected through the switches S1 and S2, the 2 nd (or 3, 8230; or n) output reference signals VREF2 (or VREF 3; 8230; or VREFn) and the 2 nd (or 3; 8230, or n) output reference signals VBG2 (or 3; or VBG 2; or N) are connected through the corresponding switches S4, G4, or GnG 4, and the corresponding switches S4-82304 in the group;

in the starting process, at the moment that the 8 th switch S8 is turned on, the 3 rd capacitor C3 positive plate voltage is VREF1, the 2 nd capacitor C2 positive plate voltage is 0, and the 2 nd capacitor C2 and the 3 rd capacitor C3 have a proportional relationship, and VREF1> VREF2> \8230 > VREFn, if a reference signal VREF1/VREF2= k is output, the capacitance value is C2/C3= k-1, and since the total number is unchanged, the stable values of the 2 nd capacitor C2 and the 3 rd capacitor C3 positive plate voltage after the 8 th switch S8 is turned on are the desired voltage value of VREF 2; the Td time can be realized by adopting RC time delay, and the Td is more than the stabilizing time of the positive plate voltage of a No. 2 capacitor C2 and a No. 3 capacitor C3; in the 3 rd, 4 th, \ 8230n output reference signals VREF3, VREF4, \8230n, and in the n-2 groups of switch networks corresponding to VREFn, the corresponding capacitance value coefficient k and the delay time Td can be calculated by referring to the same formula;

specifically, when power switching occurs in a normal operation mode, referring to fig. 4 and 5, the internal power selection switching module controls the 1 st control signal ISO to generate a low level pulse, controls the switches 1 st, 3 rd, 6 th, 8 th, and 12 th switches S1, S3, S6, S8, and S12 to be closed, controls the switches 13 th, S4 th, S5 th, S7 th, S9 th, S10 th, and S11 th switches S11 to be opened when ISO signals are changed from high to low, and controls the switches 1 st, 2 th, and 82309 to be open when the switches are opened, wherein the switches 1 st, 2 th, and n output reference signals VREF2, 8230, efvrn and 1, 2, 823030, n internal reference signals VBG1, VBG2, gng 8230829, vbn isolation is opened, the switches 1 st, 2, and n output reference signals VREF1, VREF2, n output signals, and n output signals VREF1, VREF2, 8230, vbn output signals, and n pass through the corresponding internal reference switches of the corresponding ground capacitors of the switches of the VBG1, vbc 3, vbc 2, and the corresponding ground connection capacitors 8230c 1, vbc 2; wait for T _ISO After the time, the power supply switching is completed, the ISO signal is changed from low to high, the 1 st switch S1, the 2 nd switch S2, the 4 th switch S4, the 6 th switch S6, the 8 th switch S8 and the 12 th switch S12 of the control switches are closed, the 13 th switch S13, the 3 rd switch S3, the 5 th switch S5, the 7 th switch S7, the 9 th switch S9, the 10 th switch S10 and the 11 th switch S11 of the control switches are opened, at the moment, the 1 st, 2 nd, 8230, the n internal reference signals VBG1, VBG2, 8230, the VBGn and the ground are opened, the 1 st, 2 nd, 8230, and the n output reference signalsVREF1, VREF2, \8230, VREFn and 1, 2, \8230, n internal reference signals VBG1, VBG2, \8230, and VBGn are conducted again, because the output branch current of the low-power consumption reference voltage generating circuit is very small, 1, 2, \8230, n internal reference signals VBG1, VBG2, \8230, and VBGn can be quickly recovered to a stable value under the influence of capacitance, and the output reference voltage in the whole switching process is ensured to be within an acceptable precision range;

specifically, when power switching occurs in the startup or high driving mode, referring to fig. 6 and 7, the internal power selection switching module controls the 1 st control signal ISO to generate a low level pulse, and when the ISO signal changes from high to low, controls the switches 13 th, 3 rd, 4 th, 7 th, 9 th, and 11 th switches S13, S3, S4, S7, S9, and S11 to be closed, and controls the switches 1 st, 2 nd, 5 th, 6 th, 8 th, 10 th, and 12 th switches S1, S2, S5, S6, S8 th, S10, and S12 to be opened, and at this time, the 1 st output reference signal VREF1 and the 1 st internal reference signal VBG1 are isolated and disconnected, 2, 3, \ 8230, n output reference signals VREF2, VREF3, \8230, VREFn and 2, 3, \8230, n internal reference signals VBG2, VBG3, \8230, and VBGn are still conducted, the 1 st output reference signal VREF1 maintains voltage stability through a 1 st capacitor C1, the 1 st internal reference signal VBG1 maintains voltage not to be 0 through switch grounding, the 2 nd, \8230, n output reference signals VREF2, \8230, and VREFn through a 3 rd capacitor C3 and corresponding capacitors in corresponding n-2 groups of switch networks, and systematic errors caused by the reference voltage being 0 in debugging are prevented; wait for T _ISO After a time, the power source switching is completed, the ISO signal changes from low to high, the control switches 13 th switch S13, 2 nd switch S2, 4 th switch S4, 7 th switch S7, 10 th switch S10 and 11 th switch S11 are closed, the control switches 1 st switch S1, 3 rd switch S3, 5 th switch S5, 6 th switch S6, 8 th switch S8, 9 th switch S9 and 12 th switch S12 are opened, at this time, the 1 st internal reference signal VBG1 and the ground are opened, 2 nd, \ 8230, n internal reference signals VBG2, \ 8230, VBGn and 3 rd capacitors C3 and corresponding capacitors in the corresponding n-2 groups of switch networks are turned off, 1 st output reference signal VREF1 and 1 st internal reference signal VBG1 are turned back on, 2 nd, 3 th, \8230, n output reference signals VREF2, VREF3, \8230, VREFn and 2 nd, 3 th, \8230, n internal reference signals VBG2, VBG3, \8230, VBGn stillHowever, the output branch current of the low-power-consumption reference voltage generating circuit is very small, the 1 st internal reference signal VBG1 can be quickly restored to a stable value under the influence of capacitance, and the 2 nd, 8230, the n internal reference signals VBG2, 8230and VBGn can also be quickly restored to stable values, so that the output reference voltage in the whole switching process is ensured to be within an acceptable precision range.

While the technical principles, aspects, advantages, and the like of the present invention have been described in detail by way of the above embodiments, it will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present specification describes embodiments, not every embodiment includes only a single embodiment, and such description is for clarity purposes only, and it is to be understood that all embodiments may be combined as appropriate by one of ordinary skill in the art to form other embodiments as will be apparent to those of skill in the art from the description herein.

Claims (7)

1. A low-power reference source circuit for fast switching of power supplies, characterized in that:

the low-power-consumption reference source for quickly switching the power supply comprises an external power supply monitoring module, an internal power supply selection switching module, a reference voltage generating circuit, a high driving circuit and an isolation control circuit;

the external power supply monitoring module monitors each external power supply voltage and compares the external power supply voltage with a threshold value to respectively monitor external 1 st, 2 nd, 8230, n external power supply signal voltage and respectively outputs comparison results of 1 st, 2 nd, 8230, n reset signals by comparing the external power supply voltage with the threshold value;

the internal power selection switching module is connected with the external power monitoring module and used for receiving comparison results 1, 2, \8230ofthe external power monitoring module, selecting the external power signals 1, 2, \8230nthrough preset logic operation, and generating an internal power VIN and a control signal 1 for isolation control;

the reference voltage generating circuit is connected with the internal power selection switching module and is used for generating internal reference voltage under an internal power domain and outputting 1 st, 2 nd, 8230nd and n th internal reference signals;

the high driving circuit is connected with the internal power supply selection switching module, the reference voltage generating circuit and the isolation control circuit and is used for enhancing the driving capability of the No. 1 internal reference signal and outputting a high-driving internal reference signal;

the isolation control circuit is connected with the internal power selection switching module, the reference voltage generating circuit and the high driving circuit, and is used for receiving a 1 st control signal of the internal power selection switching module, controlling 1 st, 2 nd, 8230through an internal logic operation and isolation switch network circuit, and outputting a reference signal to isolate or conduct a 1 st, 2 nd, 8230, and n internal reference signals; for generating the 2 nd control signal, enabling and gating the high driving circuit; for generating a 3 rd control signal as the start identification signal.

2. The low power consumption reference source circuit of claim 1, wherein: the input end of the external power supply monitoring module is connected with No. 1, no. 2, \8230, the output end is connected with No. 1, no. 2, \8230, and the n reset signal.

3. The low power consumption reference source circuit of claim 1, wherein: the input end of the internal power selection switching module is connected with No. 1, no. 2, \8230, the n external power signals and No. 1, no. 2, \8230, the n reset signals, and the output end is connected with the No. 1 control signal and the internal power signals.

4. The low power consumption reference source circuit of claim 1, wherein: the reference voltage generating circuit has an input end connected with an internal power supply signal and an output end connected with 1 st, 2 nd, \8230andn th internal reference signals.

5. The low power consumption reference source circuit of claim 1, wherein: the input end of the high driving circuit is connected with an internal power signal, a 1 st internal reference voltage signal and a 2 nd control signal, and the output end of the high driving circuit is connected with a high driving internal reference signal.

6. The low power consumption reference source circuit of claim 1, wherein: the input end of the isolation control circuit is connected with an internal power supply signal, a high-driving internal reference signal, a 1 st control signal, a 1 st, a 2 nd, a 8230, the output end of the isolation control circuit is connected with a 2 nd control signal, a 3 rd control signal, a 1 st, a 2 nd, a 8230, and the output end of the isolation control circuit is connected with a n output reference signal.

7. The low power consumption reference source circuit of claim 6, wherein: the isolating switch network in the isolating control circuit comprises 13 switches 1, 2, 8230, 13 switches and 3 capacitors 1, 2 and 3;

one end of the 3 rd switch is connected with the 1 st internal reference signal, the other end of the 3 rd switch is grounded, one end of the 13 th switch is connected with the high-driving internal reference signal, the other end of the 13 th switch is connected with one ends of the 1 st switch and the 2 nd switch, the other end of the 1 st switch is connected with the 1 st internal reference signal, and the other end of the 2 nd switch is connected with the 1 st capacitor upper-level board and the 1 st output reference signal;

one end of the 4 th switch is connected with the 2 nd (or 3, \ 8230;, or n) internal reference signal, the other end of the 4 th switch is connected with the 5 th switch, the 6 th switch, the 2 nd (or 3, \\ 8230;, or n) output reference signal, the other end of the 5 th switch is grounded, the other end of the 6 th switch is connected with one end of the 7 th switch, one end of the 8 th switch, and the upper plate of the 2 nd capacitor, the other end of the 7 th switch is grounded, the lower plate of the 2 nd capacitor is grounded, the other end of the 8 th switch is connected with the 9 th switch, one end of the 10 th switch, and the upper plate of the 3 rd capacitor, the lower plate of the 3 rd capacitor is grounded, the other end of the 9 th switch is connected with the 2 th (or 3, \ 8230;, or n) output reference signal, the other end of the 10 th switch is connected with one end of the 11 th switch, one end of the 12 th switch, the other end of the 12 th switch is grounded, and the other end of the 11 th switch is connected with the 1 output reference signal;

the 4 th, 5 th, 8230, 12 th switch, the 2 nd capacitor and the 3 rd capacitor are used as a group of switch networks and correspond to a group of signals, the 2 nd internal reference signal and the 2 nd output reference signal; the corresponding n-2 groups of signals 3, 4, \8230, the n internal reference signals and 3, 4, \8230, the n output reference signals, corresponding to the n-2 groups of switch networks with the same connection mode.

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