CN115917963A

CN115917963A - Radio frequency amplifier for realizing input baseband enhancement circuit and process method for realizing same

Info

Publication number: CN115917963A
Application number: CN202180046385.3A
Authority: CN
Inventors: 理查德·威尔逊; 马尔温·马贝尔; 迈克尔·勒费夫尔
Original assignee: Wofu Semiconductor Co ltd
Current assignee: Wofu Semiconductor Co ltd
Priority date: 2020-06-05
Filing date: 2021-05-27
Publication date: 2023-04-04
Also published as: WO2021247365A1; EP4147352A1; US20210384866A1; KR20230019493A; EP4147352A4; US11552597B2; JP2023529163A

Abstract

An amplifier comprising an input matching network; at least one transistor; an input lead coupled to at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and the at least one transistor; and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network. The baseband impedance boosting circuit is configured to reduce resonance of the baseband termination.

Description

Radio frequency amplifier for realizing input baseband enhancement circuit and process method for realizing radio frequency amplifier

Cross Reference to Related Applications

This application claims priority to U.S. patent application Ser. No. 16/893,913, entitled "Radio Frequency Amplifier Implementing an Input base and Enhancement Circuit and a Process of implanting the Same" filed on 5.6.2020, which is incorporated herein by reference in its entirety.

Technical Field

The present disclosure relates to a radio frequency amplifier implementing an input baseband enhancement circuit and a method for implementing the same. More particularly, the present disclosure relates to a radio frequency amplifier implementing an input baseband enhancement circuit to improve baseband impedance and a method of implementing the same. Furthermore, the invention relates to a radio frequency amplifier implementing an input baseband enhancement circuit to improve baseband impedance and digital predistortion and a method of implementing the same.

Background

Radio Frequency (RF) power circuits are used in various applications, such as base stations for wireless communication systems and the like. The signals amplified by the RF power circuitry typically include signals having high frequency modulated carriers with frequencies in the range of 400 megahertz (MHz) to 6 gigahertz (GHz). The signal amplified by the RF power circuit typically comprises a baseband signal that modulates a carrier wave, typically at a relatively low frequency, which may be up to 300 mhz or higher, depending on the application.

The RF power supply circuit may typically include a transistor die for amplifying the RF signal. Examples of transistor dies for RF applications include Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), laterally Diffused Metal Oxide Semiconductor (LDMOS) devices, and High Electron Mobility Transistor (HEMT) devices. These devices typically have a relatively low characteristic impedance (e.g., 2 ohms or less).

Input and output impedance matching circuits are commonly used to match the RF power circuit to an external transmission line that provides RF signals to and from the RF power transistor. The characteristic impedance of these external transmission lines is typically around 50 ohms. However, the characteristic impedance may be any value determined by a designer, required by a given application and/or system, and/or the like.

The input and output matching circuits typically include inductive and capacitive elements for providing impedance matching between the input and output of the RF power transistor. The input and output matching circuits provide impedance matching for the signal frequencies amplified by the RF power transistors, such as those in the 400MHz to 6GHz range.

RF power circuit operation may be improved by terminating the RF signal as much as possible at baseband frequencies below the fundamental frequency, and by terminating higher order harmonics of the fundamental frequency signal above the fundamental frequency range as much as possible. Nevertheless, the baseband terminals of the amplifiers may still be resonant, which may hinder the ability of Digital Predistortion (DPD) operation to achieve linearity in a given frequency band.

Accordingly, there is a need to implement an RF power amplifier (RFPA) with baseband impedance enhancement circuitry configured to improve baseband impedance, improve Digital Predistortion (DPD) operation, correct and/or improve linearity across a given frequency band, and/or other baseband impedance enhancements.

Disclosure of Invention

One aspect includes an amplifier comprising an input matching network; at least one transistor; an input lead coupled to the at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and the at least one transistor; and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network, wherein the baseband impedance enhancement circuit is configured to reduce resonance of the baseband termination.

One aspect includes a method of implementing an amplifier, the method comprising: setting an input matching network; providing at least one transistor; coupling an input lead to at least one transistor; coupling a ground terminal to the transistor; coupling an output lead to at least one transistor; coupling an output matching circuit to the output lead and the at least one transistor; and coupling a baseband impedance enhancement circuit having at least one reactive element to the input matching network, wherein the baseband impedance enhancement circuit is configured to reduce resonance of the baseband termination.

One aspect includes an amplifier comprising: inputting a matching network; at least one transistor; an input lead coupled to the at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and the at least one transistor; and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network, wherein the input matching network includes at least one reactive element coupled to the at least one reactive element of the baseband impedance enhancement circuit; and wherein the baseband impedance enhancement circuit is configured to reduce resonance of the baseband termination.

In this regard, the present disclosure adds a circuit, such as an Integrated Passive Device (IPD), to the input side of a device, such as a GaN device, to help improve the baseband impedance of the amplifier, and thus improve Digital Predistortion (DPD) operation. The baseband terminals of the amplifier may have resonances that interfere with the DPD's ability to correct linearity over a given frequency band. The disclosed IPD is added to the matching topology, reducing resonance and pushing it to higher frequencies, allowing the DPD to operate more efficiently over a wider bandwidth. Aspects of the present invention may be used for all frequency bands covered by the cellular infrastructure, including allowing coverage of multiple frequency bands in the 2GHz range, as well as covering all frequency bands in which the LDMOS device does not operate (such as from 3GHz to 5 GHz). In a given aspect, the circuit of the present disclosure is configured to operate at an input of a device (e.g., gaN device, HEMT device, etc.) to improve the baseband impedance of the amplifier over at least a substantial portion of the broadband signal.

Typical devices that attempt to achieve wider linearity performance using GaN attempt to improve the output performance of the device by adding, for example, larger capacitors to improve the DPD linearity of the device. On the other hand, the present disclosure focuses on the input of the device and makes further improvements on the existing topology. In addition, typical devices may implement circuitry to improve baseband impedance in narrowband applications. However, any such implementation is distinguishable from the present disclosure, which includes aspects of improving baseband impedance over at least a substantial portion of a wideband signal.

The implementation of the present disclosure is a significant improvement over standard topologies, for example, when the instantaneous bandwidth exceeds 160 MHz. Furthermore, the invention also contemplates implementation in broadband technologies, such as GaN-based devices.

Other features, advantages, and aspects of the disclosure may be set forth or apparent from consideration of the following detailed description, drawings, and claims. Further, it is to be understood that both the foregoing summary of the disclosure and the following detailed description are exemplary and intended to provide further explanation without limiting the scope of the disclosure as claimed.

Drawings

The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate various aspects of the disclosure and together with the description serve to explain the principles of the disclosure. No attempt is made to show structural details of the disclosure in more detail than may be necessary for a fundamental understanding of the disclosure and its various embodiments. In the drawings:

fig. 1 shows a functional block diagram of an RF power amplifier (RFPA) circuit according to the present disclosure.

Fig. 2 shows further exemplary details of a functional block diagram of an RF power amplifier (RFPA) circuit according to fig. 1.

Fig. 3 shows further exemplary details of a functional block diagram of an RF power amplifier (RFPA) circuit according to fig. 1.

Fig. 4 shows further exemplary details of a functional block diagram of an RF power amplifier (RFPA) circuit according to fig. 1.

Fig. 5 shows a graph of input impedance versus frequency for an RF power amplifier (RFPA) circuit implementation.

Fig. 6 illustrates a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.

FIG. 7 includes FIG. 7A, which illustrates a cross-sectional view of a package according to an aspect of the present disclosure; and fig. 7 also includes fig. 7B, which illustrates a cross-sectional view of a package according to another aspect of the present disclosure.

Fig. 8 illustrates a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.

Fig. 9 is a partial schematic diagram of amplification implemented by a transistor amplifier according to the present disclosure.

Fig. 10 is a schematic sectional view taken along line XI-XI of fig. 9.

Detailed Description

The various aspects of the disclosure and the various features and advantageous details thereof are explained more fully with reference to the non-limiting aspects and examples that are described and/or illustrated in the accompanying drawings and detailed in the following description. It should be noted that the features illustrated in the drawings are not necessarily drawn to scale, and those skilled in the art will recognize that features of one aspect may be used with other aspects, even if not explicitly described herein. Descriptions of well-known components and processing techniques may be omitted so as to not unnecessarily obscure aspects of the present disclosure. The examples used herein are intended merely to facilitate an understanding of ways in which the disclosure may be practiced and to further enable those of skill in the art to practice the various aspects of the disclosure. Accordingly, the examples and aspects herein should not be construed as limiting the scope of the disclosure, which is defined solely by the appended claims and applicable law. Moreover, it should be noted that like reference numerals represent similar parts throughout the several views of the drawings.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

When an element such as a layer, region or substrate is referred to as being "on" or extending "to another element, it can be directly on or extend directly to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or extending "directly into" another element, there are no intervening elements present. Also, when an element such as a layer, region or substrate is referred to as being "on" or extending "over" another element, it can be directly on or extend directly over the other element or intervening elements may also be present, but there are no intervening elements present when an element is referred to as being "directly on" or extending "directly over" the other element. That is, when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no other elements in between.

Relative terms such as "below … …" or "above … …" or "above" or "below" or "horizontal" or "vertical" may be used herein to describe the relationship of one element, layer or region to another element, layer or region, as shown in the figures. It will be understood that these terms, and those discussed above, are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

The terminology used herein is for the purpose of describing particular aspects only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes" and/or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

In particular, fig. 1 shows an RF power amplifier (RFPA) circuit 100. The RF power amplifier (RFPA) circuit 100 includes: an input port 102, an rf output port 104, and a reference potential port 106.RF power amplifier (RFPA) circuit 100 also includes an RF amplifier device 108, the RF amplifier device 108 having an input terminal 110 electrically coupled to input port 102, an output terminal 112 electrically coupled to RF output port 104, and a reference potential terminal 114 electrically coupled to reference potential port 106.

In various aspects, the RF amplifier device 108 and the RF power amplifier (RFPA) circuit 100 may be a multi-carrier amplifier, a multi-band amplifier, an LTE (long term evolution) compliant amplifier, a WCDMA (wideband code division multiple access) compliant amplifier, an 802.11 (x) compliant amplifier, and so on. The RF power amplifier (RFPA) circuit 100 may be used for or with: a base station, a wireless device, a cellular base station communication transmitter, a cellular base station communication amplifier, RF power amplifiers for various cellular bands, wireless fidelity (Wi-Fi) devices, multiple-input multiple-output (MIMO) devices, devices utilizing ieee802.11n (Wi-Fi), devices utilizing ieee802.11ac (Wi-Fi), devices implementing an evolved high speed packet access (HSPA +) protocol, devices implementing a 3G protocol, devices implementing a Worldwide Interoperability for Microwave Access (WiMAX) protocol, devices implementing a 4G protocol, devices implementing a Long Term Evolution (LTE) protocol, devices implementing a 5G protocol, class a amplifier devices, class B amplifier devices, class C amplifier devices, class AB amplifier devices, doherty amplifiers, and/or the like, and combinations thereof.

In general, the RF amplifier device 108 may be any device capable of performing RF signal amplification. In the depicted aspect, the RF amplifier device 108 is a transistor device, wherein the input terminal 110 corresponds to a control terminal or gate terminal of the transistor device, the output terminal 112 corresponds to a first load terminal (e.g., drain terminal) of the transistor device, and the reference potential terminal 114 corresponds to a second load terminal (e.g., source terminal) of the transistor device.

The RF amplifier device 108 may be configured to amplify RF signals across a range of RF frequencies, including a fundamental RF frequency, between the input terminal 110 and the output terminal 112. According to one aspect, this frequency range may be a "wideband" frequency range. By "wideband" frequency range is meant a range of frequency values of the RF signal that exceeds the coherence bandwidth of a single channel.

The RF power amplifier (RFPA) circuit 100 may additionally include an input impedance matching network 146 connected between the input port 102 of the RF power amplifier (RFPA) circuit 100 and the input terminal 110 of the RF amplifier device 108. A detailed exemplary embodiment of the input impedance matching network 146 is described herein with reference to fig. 2. In addition, the RF power amplifier (RFPA) circuit 100 may further include an output impedance matching network 116 electrically coupled between the output terminal 112 and the RF output port 104. A detailed exemplary implementation of the output impedance matching network 116 is described herein with reference to fig. 4.

The RF power amplifier (RFPA) circuit 100 may additionally include a baseband impedance boosting circuit 190. A baseband impedance boosting circuit 190 may be connected to the input port 102, the baseband impedance boosting circuit 190 may be connected to the input impedance matching network 146, the baseband impedance boosting circuit 190 may be connected to the RF amplifier device 108, and/or the baseband impedance boosting circuit 190 may be connected to the input terminal 110.

In one or more aspects, the baseband impedance enhancement circuit 190 may be connected to the input port 102 upstream from the input impedance matching network 146, the baseband impedance enhancement circuit 190 may be connected to the input port 102 downstream from the input impedance matching network 146, or the baseband impedance enhancement circuit 190 may be connected to the input port 102 through the input impedance matching network 146 as shown in fig. 1. In one or more aspects, the baseband impedance boosting circuit 190 may be connected to and/or operate at an input side of the RF power amplifier (RFPA) circuit 100. The input side of RF power amplifier (RFPA) circuit 100 is upstream of RF amplifier device 108, between input port 102 and RF amplifier device 108 and including input port 102 and RF amplifier device 108, and/or the like.

The baseband impedance boosting circuit 190 may be implemented as an Integrated Passive Device (IPD). The baseband impedance boosting circuit 190 may be configured to improve the baseband impedance of the RF power amplifier (RFPA) circuit 100. Alternatively or additionally, the baseband impedance boosting circuit 190 may be configured to provide improved Digital Predistortion (DPD) operation of the RF power amplifier (RFPA) circuit 100 and/or the RF amplifier device 108. In one aspect, the baseband impedance boosting circuit 190 may be configured to reduce resonance of the baseband terminal. In one aspect, the baseband impedance boosting circuit 190 may be configured to push and/or move the resonance of the baseband terminal to higher frequencies.

In one aspect, the baseband impedance boosting circuit 190 may be configured to push and/or move the resonance of the baseband terminal to higher frequencies, allowing the DPD to operate more efficiently over a wider bandwidth.

In this regard, the baseband terminals of the RF power amplifier (RFPA) circuit 100 may have resonances that hinder the ability of DPD operation to correct for linearity across a given frequency band. To achieve this correction, the baseband impedance enhancement circuit 190 is implemented into a matching topology of the RF power amplifier (RFPA) circuit 100, such as the input impedance matching network 146, which reduces resonance and pushes resonance towards higher frequencies, allowing the DPD to operate more efficiently over a wider bandwidth.

The baseband impedance boosting circuit 190 may be implemented by a network of reactive elements. The parameters of the reactive element network may be specifically tailored to provide a desired frequency response within a given frequency range. More specifically, the parameters of the reactive element network may be specifically tailored to provide a desired frequency response within a given frequency range in a broadband implementation. These reactive elements may include one or more inductors and capacitors. The parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to provide a desired frequency response within a given frequency range. More specifically, the parameters of the inductors and capacitors may be specifically tailored to provide a desired frequency response in a wideband implementation.

The implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 can be used over all frequency bands covered by the cellular infrastructure. Further, implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 may include provisions to cover multiple frequency bands, for example, in the 2GHz range, and also cover the entire frequency band (e.g., from 3GHz to 5 GHz) in which the LDMOS may not operate. Furthermore, the implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provides a more dramatic improvement over standard topologies. For example, implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provides a more surprising improvement in linearity than the standard topology. Furthermore, the implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provides an unexpected improvement over the standard topology in linearity. In this regard, the implementation of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provides an unexpected improvement in linearity over standard topologies. For example, the implementation of the baseband impedance boosting circuit 190 in the RF power amplifier (RFPA) circuit 100 shows an improvement over standard topologies, for example, when the instantaneous bandwidth exceeds 160 MHz. Moreover, implementing the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provides a surprising and unexpected improvement for wideband applications.

In particular, fig. 2 shows an exemplary embodiment of the input impedance matching network 146. The input impedance matching network 146 may include an inductor 148 and an inductor 150 connected in series between the input port 102 and the input terminal 110 of the RF amplifier device 108. Further, the input impedance matching network 146 may include a capacitor 152 connected in parallel with the input terminal 110 of the RF amplifier device 108 and the reference potential terminal 114.

Further, fig. 2 shows that a baseband impedance boosting circuit 190 may be connected between the input port 102 and the input terminal 110. In one aspect, the baseband impedance boosting circuit 190 may be connected between the inductor 148, the capacitor 152, and/or the inductor 150 of the input impedance matching network 146. In one aspect, the baseband impedance boosting circuit 190 may be connected downstream of the inductor 148; the baseband impedance boosting circuit 190 may be connected upstream of the capacitor 152 and/or the inductor 150 of the input impedance matching network 146. However, as previously described, the baseband impedance boosting circuit 190 may be disposed and connected anywhere between the input port 102 and the RF amplifier device 108.

According to one aspect, the parameters of the inductor 150 and the capacitor 152 may be tailored for impedance matching between the input capacitance of the RF amplifier device 108 and a fixed impedance value (e.g., 50 ohms) of the board level over a range of fundamental frequencies in a similar manner as previously discussed. In addition, the input impedance matching network 146 may be configured in some other circuit configuration.

In particular, fig. 3 shows further details of the baseband impedance boosting circuit 190. In one aspect, the baseband impedance boosting circuit 190 may include an inductor 196 connected between the inductor 148, the capacitor 152, and/or the inductor 150. The inductor 196 may be further connected to a capacitor 198. In one aspect, the inductor 196 and the capacitor 198 may be connected in series to the reference potential port 106.

In an aspect, the inductor 196 may be connected with the inductor 148, with the capacitor 152, and/or with the inductor 150. In one aspect, the inductor 196 may be connected with the inductor 148, with the capacitor 152, and with the inductor 150. In one aspect, inductor 196 may be connected to capacitor 198.

In one aspect, the inductor 196 may be directly connected with the inductor 148, directly connected with the capacitor 152, and/or directly connected with the inductor 150. In one aspect, the inductor 196 may be directly connected to the inductor 148, directly connected to the capacitor 152, and directly connected to the inductor 150. In one aspect, the inductor 196 may be directly connected to the capacitor 198. However, the baseband impedance boosting circuit 190 may be implemented with similar elements that provide equivalent circuitry and/or functionality.

The baseband impedance boosting circuit 190 may be implemented by a network of reactive elements. In the described aspects, the reactive elements include one or more inductors and capacitors. The parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to provide a desired frequency response within a given frequency range. In particular, the parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to improve baseband impedance of RF power amplifier (RFPA) circuit 100, provide improved Digital Predistortion (DPD) operation of RF power amplifier (RFPA) circuit 100 and/or RF amplifier device 108, reduce resonance of baseband terminals, push and/or move resonance of baseband terminals to higher frequencies, and/or the like.

In particular, fig. 4 shows an exemplary embodiment of the output impedance matching network 116. The output impedance matching network 116 may include a series branch 118 and a parallel branch 120, the series branch 118 may be connected in series between the output terminal 112 of the RF power amplifier (RF pa) circuit 100 and the RF output port 104 of the RF power amplifier (RF pa) circuit 100, and the parallel branch 120 is connected in parallel with the RF output port 104 of the RF power amplifier (RF pa) circuit 100 and the reference potential terminal 114.

The output impedance matching network 116 may include a baseband termination circuit 122, a fundamental frequency matching circuit 124, and a second order harmonic termination circuit 126. The baseband termination circuit 122, the fundamental frequency matching circuit 124, and the second order harmonic termination circuit 126 may each be provided by a network of reactive elements. In the described aspects, the reactive elements include inductors and capacitors. As will be discussed in further detail below, the parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to provide a desired frequency response within a given frequency range. More generally, the reactive elements of the output impedance matching network 116 may be provided by any of a variety of components (e.g., radial suspension wires, transmission lines, etc.), wherein parameters (e.g., radius, length, etc.) of these components are tailored to provide a desired frequency response.

Fig. 5 shows a graph of the actual input impedance versus frequency for an RF power amplifier (RFPA) circuit implementation.

In particular, fig. 5 shows a graph 500 of actual input impedance versus frequency for an implementation of an RF power amplifier (RFPA) circuit 502, a first exemplary RF power amplifier 504, and a second exemplary RF power amplifier 506 according to the present disclosure. More specifically, FIG. 5 shows a graph 500 of actual input impedance versus frequency, where the input impedance is in ohms along the y-axis and the frequency is in megahertz along the x-axis.

As indicated in fig. 5, an RF power amplifier (RFPA) circuit 502 in accordance with the present disclosure operates with an impedance below 2 ohms over a frequency range of at least from about 1MHz to at least about 150 MHz. Furthermore, the impedance of an RF power amplifier (RFPA) circuit 502 according to the present disclosure exhibits a high degree of linearity over at least a frequency range from about 25MHz to about at least 150 MHz. In addition, the impedance of an RF power amplifier (RFPA) circuit 502 in accordance with the disclosure is shown to have a slope (ay/ax-first derivative-dy/dx) that remains stable, generally constant, and/or constant over a substantial portion of the frequency range, such as 25MHz to about at least 150 MHz. Specifically, the slope remains within 0% to 20%,0% to 5%,5% to 10%,10% to 15%, or 15% to 20% over a frequency range such as 25MHz to about at least 150 MHz. Furthermore, it is contemplated that RF power amplifier (RFPA) circuits according to the present disclosure may also operate with impedances below 2 at other frequencies above 150 MHz. Furthermore, at other frequencies above 150MHz, the impedance is assumed to be highly linear.

The first exemplary RF power amplifier 504, on the other hand, operates with an impedance greater than 2 over a frequency range of about 25MHz to at least about 110 MHz. Furthermore, the impedance appears non-linear over the entire frequency range in the graph.

Likewise, the second exemplary RF power amplifier 506 operates with an impedance greater than 2 over a frequency range of about 25MHz to about at least 80 MHz. Furthermore, the impedance appears non-linear over the entire frequency range in the graph.

Returning to fig. 4, the elements of the fundamental frequency matching circuit 124 may be tailored such that the output impedance matching network 116 presents a complex conjugate of the inherent impedance of the RF amplifier device 108 in the RF frequency range at the output terminal 112 of the RF amplifier device 108. As is generally known in the art, optimal power transfer occurs when the input and output impedances are matched to the complex conjugate of each other. Typically, transistor devices (such as GaN-based HEMTs) have relatively low characteristic input and output impedances (e.g., 2 ohms or less). The fundamental frequency matching circuit 124 matches the output impedance of the RF amplifier device 108 to a fixed value (e.g., 50 ohms), which corresponds to a standardized value at the system level. In this manner, optimal power transfer at the system level between the RF power amplifier (RFPA) circuit 100 and other components may be achieved.

According to one aspect, the fundamental frequency matching circuit 124 includes a first capacitor 128 and a first inductor 130. The first capacitor 128 and the first inductor 130 may be connected in series with each other along the parallel branch 120. The inductance of the first inductor 130 may be tailored to provide impedance matching to the characteristic impedance of the RF amplifier device 108. In the depicted circuit, the first inductor 130 may be connected in parallel with the output of the RF amplifier device 108. Thus, the output capacitance of the RF amplifier device 108 and the first inductor 130 form a first parallel LC resonator. As is generally known in the art, a parallel LC circuit provides the maximum impedance (from an RF perspective) at the resonant frequency, i.e., the point where the reactive branch currents are equal and opposite. According to one aspect, the inductance of the first inductor 130 may be tailored so that the first parallel LC resonator resonates at a center frequency of 2.0 GHz. The first capacitor 128 may be configured as a DC blocking capacitor that may block very low frequencies (e.g., frequencies below 10 MHz) and DC signals. Therefore, the capacitance value of the DC blocking capacitor is very large. Thus, at much higher frequency values, including the range of fundamental frequencies, the first capacitor 128 appears as an RF short circuit at the fundamental frequency. In this way, the influence of the first capacitor 128 on the first parallel LC resonator may be disregarded when customizing the parameters of the first parallel LC resonator.

The elements of the second harmonic termination circuit 126 may be tailored such that the second harmonic termination circuit 126 presents a low impedance at the output terminal 112 of the RF amplifier device 108 in the second harmonic frequency range. Filtering out higher order harmonic components of the RF signal can greatly improve the efficiency of the device. By mitigating harmonic oscillations at the device output, in the switching stateThe shape of the voltage and current waveforms is advantageously controlled to achieve minimal overlap, thereby improving efficiency. This is done by taking the fundamental frequency F of the amplified RF signal ₀ Higher order harmonics (e.g. 2F) ₀ 、4F ₀ 、6F ₀ Etc.) include a short circuit path. To this end, the second order harmonic termination circuit 126 may be tailored to provide a short circuit path (from an RF perspective) at the second order harmonic of the fundamental frequency, e.g., 4.0GHz in an exemplary range of fundamental frequencies. That is, second order harmonic termination may be designed to terminate RF signals in this frequency range so that they do not appear at the RF output port 104.

According to one aspect, the second order harmonic termination circuit 126 may include a second inductor 132 and a second capacitor 134. The second inductor 132 and the second capacitor 134 may be connected in parallel with each other along the parallel branch 120 of the impedance matching circuit. Thus, the second inductor 132 and the second capacitor 134 may form a second parallel LC resonator. The parameters of the second LC resonator (i.e., the capacitance of the second capacitor 134 and the inductance of the second inductor 132) may be tailored to provide a low impedance path for the second order harmonic between the output terminal 112 and the reference potential terminal 114 of the RF amplifier device 108. This customization of the second LC resonator parameters takes into account the collective effect of other reactance values in the output impedance matching network 116, including the inherent capacitance of the first parallel LC resonator and the RF amplifier device 108, including the first inductor 130. It is well known that parallel resonant circuits become more capacitive as the frequency value increases above the resonant frequency and more inductive as the frequency value decreases below the resonant frequency. According to this principle, the resonance frequency of the second parallel LC resonator may be tailored such that the second parallel LC resonator is a relative inductance or capacitance at the second order harmonic in order to compensate for other reactive elements (e.g. the first parallel resonator) in the transmission path between the output terminal 112 of the RF amplifier and the reference potential terminal 114. That is, the parameters of the second parallel LC resonator may be selected such that the output impedance matching network 116 presents an RF short at the output terminal 112 of the radio frequency amplifier at a second order harmonic of the fundamental frequency (e.g., 4.0 GHz).

The baseband termination circuit 122 may be customized to present a low impedance in the baseband frequency region below the RF frequency range. By suppressing these lower frequency values, the effects of intermodulation distortion (IMD) in the baseband frequency range may be mitigated, thereby improving the linear efficiency of the RF power amplifier (RFPA) circuit 100. The parameters (e.g., capacitance and inductance) of the baseband termination circuit 122 are selected so that the impedance matching circuit suppresses these low frequency values. That is, the baseband termination circuit 122 provides a low impedance path (from an RF perspective) from the output terminal 112 of the RF amplifier device 108 to the reference potential terminal 114 for frequencies within this range.

In accordance with one aspect, the baseband termination circuit 122 may include a first resistor 136, a third inductor 138, and a third capacitor 140. Each of these elements is connected to the second branch 142 of the output impedance matching network 116. The second branch 142 of the output impedance matching network 116 may be connected between a first node 143 that directly connects the first capacitor 128 to the second parallel LC resonator and the reference potential port. The parameter values (i.e., resistance, inductance, and capacitance) of the elements in baseband termination circuit 122 are selected to exhibit a low impedance response in the wideband baseband frequency region. Taking the baseband frequency range of 400MHz as an example, the parameters of the third inductor 138 and the third capacitor 140 may be selected such that these elements, together with other elements of the impedance matching circuit, form a low impedance path from the output terminal 112 of the RF amplifier device 108 to the reference potential terminal 114. By tailoring the resistance of the first resistor 136, the impedance response of the baseband termination circuit 122 is flattened to achieve better performance over a wideband frequency range. That is, the first resistor 136 is used to make the impedance response of the baseband termination circuit 122 less frequency dependent.

Optionally, the output impedance matching network 116 may include a fourth inductor 144, which may be connected between the series branch 118 and a DC terminal 145 of the RF power amplifier (RFPA) circuit 100. The fourth inductor 144 may be configured as an RF choke, i.e., a device that blocks higher frequency values while transmitting lower frequency values. The RF choke may be used with a first resistor 136, a third inductor 138, and a third capacitor 140 to present a low impedance in the baseband frequency region.

Fig. 6 shows a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.

FIG. 7 includes FIG. 7A, which illustrates a cross-sectional view of a package according to an aspect of the present disclosure; and fig. 7 further includes fig. 7B, showing a cross-sectional view of a package according to another aspect of the present disclosure.

Referring to fig. 6 and 7, according to one aspect, a packaged RF amplifier 200 is depicted. In one aspect as shown in fig. 6, packaged RF amplifier 200 may contain and/or implement two RF power amplifier (RFPA) circuits 100 arranged adjacent to each other as described herein. In another aspect as shown in fig. 8, a packaged RF amplifier 200 may contain and/or implement an RF power amplifier (RFPA) circuit 100.

Packaged RF amplifier 200 may include a metal flange 202 that may be configured to interface with another device, such as a Printed Circuit Board (PCB) that may utilize a Printed Circuit Board (PCB) manufacturing process. The PCB may be a single layer PCB configuration, a multi-layer PCB configuration, or the like.

Packaged RF amplifier 200 may include a pair of conductive input leads 204 that may extend from a first side of metal flange 202, and a pair of conductive output leads 206 that may extend from a second side of metal flange 202 opposite conductive input leads 204. The conductive input lead 204 may provide and/or implement the input port 102 of the amplifier circuit 100 described herein; the conductive output lead 206 may provide and/or implement the RF output port 104 of the amplifier circuit 100 described herein. Optionally, the packaged RF amplifier 200 may be implemented to include a separately implemented DC bias lead 208, the DC bias lead 208 extending from a side of the packaged RF amplifier 200 adjacent the conductive output lead 206.

The packaged RF amplifier 200 may be provided with an electrically insulating window frame 210. An electrically insulating window frame 210 may be formed around the perimeter of the metal flange 202. An electrically insulating window frame 210 may insulate the conductive input lead 204 and the conductive output lead 206 from the metal flange 202. A central portion of the metal flange 202 may be exposed from the insulating window frame 210. The exposed portion of metal flange 202 may provide a conductive chip pad 212 for mounting an integrated circuit device thereon. Since metal flange 202 may include a thermally and electrically conductive material (e.g., copper, aluminum, etc.), electrically conductive chip pad 212 may provide a reference potential connection (e.g., GND terminal) as well as a heat sink that may be configured to carry heat away from an integrated circuit device mounted thereon.

Packaged RF amplifier 200 may include RF transistor 214 mounted on metal flange 202. These RF transistors 214 provide and/or implement the RF amplifier device 108 previously described in the RF power amplifier (RFPA) circuit 100 of fig. 1. RF transistor 214 may be configured as a power transistor such as a MOSFET (metal oxide semiconductor field effect transistor), a DMOS (double diffused metal oxide semiconductor) transistor, a GaN HEMT (gallium nitride high electron mobility transistor), a GaN MESFET (gallium nitride metal semiconductor field effect transistor), an LDMOS transistor, etc., and more generally any type of RF transistor device.

The RF transistor 214 may include conductive input, output, and reference potential terminals. In the described aspect, the reference potential terminal is provided at the bottom surface of the RF transistor 214. The reference potential terminal may directly face the chip pad 212, and may be electrically connected with the chip pad 212, for example, by a conductive adhesive. The input and output terminals of the RF transistor 214 may be arranged on the top surface of the RF transistor 214 opposite to the reference potential terminal.

Packaged RF amplifier 200 may include output impedance matching network 116, described above with reference to fig. 1, connected between the output terminal of the RF transistor and conductive output lead 206. In one aspect, most of the passive components of the output impedance matching network 116 may be provided by IPDs (integrated passive devices). The lower side of the IPD may include a reference potential terminal 114, which may be mounted on chip pad 212 in a manner similar to that previously described with reference to RF transistor 214.

In general, the term IPD refers to an integrated circuit, which may be semiconductor-based, and includes passive devices integrally formed within the IC and connected to terminals of the IC. A customized circuit topology may be provided by the IPD. In order to provide the frequency response required for a given passive component (e.g., capacitor, inductor, etc.), a number of different structures are fabricated in the device. Examples of such structures include parallel plate capacitors, radial suspension lines, transmission lines, and the like.

In the depicted aspect, the first set of conductive connection lines 218 may be directly electrically connected between the output terminal of the RF transistor 214 and the conductive output lead 206. The second set of conductive connection lines 220 may be directly electrically connected between the output terminal of the RF transistor 214 and the output impedance matching network 116. The third set of electrically conductive connection lines 222 may be connected directly between the electrically conductive output lead 206 and the DC bias lead 208.

A fourth set of connection lines 226 is electrically connected between the conductive input lead 204 and the input impedance matching network 146. The fifth set of connection lines 228 is electrically connected between the input impedance matching network 146 and the input terminals of the baseband impedance boosting circuit 190. A sixth set of connection lines 224 may electrically connect the input impedance matching network 146 with the RF transistor 214.

Packaged RF amplifier 200 may be implemented to include an open cavity configuration suitable for use with output impedance matching network 116, RF transistor 214, input impedance matching network 146, and/or baseband impedance boosting circuit 190 of the present disclosure. In particular, open cavity configurations may utilize open cavity package designs. In certain aspects, the open cavity configuration may include a lid 308 or other housing for protecting the interconnects, circuit elements, output impedance matching network 116, RF transistor 214, input impedance matching network 146, baseband impedance enhancement circuit 190, and/or the like. The packaged RF amplifier 200 may include a ceramic body and/or the lid 308 may be made of a ceramic material. In one aspect, the ceramic material can include alumina (Al) ₂ O ₃ ). In one aspect, the cover 308 can be attached to the electrically insulating window frame 210 with an adhesive. In one aspect, the adhesive may be epoxy based.

Inside the packaged RF amplifier 200, the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and/or the baseband impedance enhancement circuit 190 may be attached to the metal flange 202 by a patch material. The electrically insulating window frame 210 may be configured to isolate the source, gate, and drain of the RF transistor 214. The electrically insulative window frame 210 may be configured to be more cost effective, provide a better Coefficient of Thermal Expansion (CTE) match with the metal flange 202, and enable a high degree of flexibility in lead configurations for both in-line and surface mount configurations. The electrically insulative window frame 210 may also be configured to be rigid and thus more stable and less flexible.

The metal flange 202 may be made of a conductive material, such as copper (Cu), copper-molybdenum, copper laminate structures, copper-tungsten (CuW), and/or the like, and may have a CTE that closely matches the electrically insulating window frame 210. The source terminal of RF transistor 214 may be attached to the inner patch attachment region of metal flange 202 by adhesives, welding, sintering, eutectic bonding, hot-press bonding, ultrasonic bonding/welding, and/or the like as described herein. Specifically, the source terminal of the RF transistor 214 may be electrically connected to the metal flange 202.

The electrically insulative window frame 210 may include conductive vias, traces, or signal traces laminated, embedded, and/or otherwise attached from a copper sheet. An electrically insulating window frame 210 may be attached to the peripheral region of the metal flange 202. Electrically insulative window frame 210 may have an opening 306 for receiving output impedance matching network 116, RF transistor 214, input impedance matching network 146, baseband impedance enhancement circuit 190, and/or the like, which may be connected to the inner patch attachment area of metal flange 202.

The electrically insulating window frame 210 may have a bottom surface that may be attached to a peripheral region of the metal flange 202. In one aspect, the electrically insulating window frame 210 may have a bottom surface that may be attached to the peripheral region with a conductive adhesive. In one aspect, the electrically insulating window frame 210 may have a bottom surface that may be attached to the peripheral region with an intermediate ceramic structure 578, as shown in fig. 7B. In one aspect, the intermediate ceramic structure 578 can include a ceramic material, such as alumina (Al) ₂ O ₃ ). In one aspect, the intermediate ceramic structure 578 can be plated with one or more metals, including copper, gold, and the like, and combinations thereof.

The metal flange 202 may dissipate heat generated by the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and/or the baseband impedance boosting circuit 190. Metal flange 202 may be implemented as a metal sub-mount and may be implemented as a support, a surface, a package support, a package surface, a package support surface, a flange, a metal flange, a heat spreader, a common source support, a common source surface, a common source package support, a common source package surface, a common source package support surface, a common source flange, a common source heat spreader, a lead frame, a metal lead frame, and/or the like. The metal flange 202 may include an insulating material, a dielectric material, and/or the like.

Other embodiments of the packaged RF amplifier 200 may include overmolded configurations. The overmold configuration may substantially surround the RF transistor 214 mounted on the metal flange 202. The overmold configuration may be formed from a plastic or plastic polymer compound and may be injection molded around the metal flange 202, the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and/or the baseband impedance enhancement circuit 190 to provide protection of the external environment.

In one aspect, the overmold configuration may substantially surround the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and/or the baseband impedance boosting circuit 190. The outer mold arrangement may be formed from a plastic, a mold compound, a plastic compound, a polymer compound, a plastic polymer compound, and/or the like. The overmolded configuration may be injected or compression molded from the external environment around the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, the baseband impedance enhancement circuit 190, and/or other components of the packaged RF amplifier 200.

In particular, the packaged RF amplifier 200 may be at least partially implemented as a Doherty circuit having one of the RF power amplifier (RFPA) circuit 100 as a carrier amplifier and the other RF power amplifier (RFPA) circuit 100 as a peaking amplifier. In particular, packaged RF amplifier 200 may include a carrier amplifier and a peaking amplifier configured such that packaged RF amplifier 200 power combines the outputs of the carrier amplifier and peaking amplifier. In one aspect, the two amplifiers may be biased differently. In one aspect, the carrier amplifier may operate in normal class AB or class B. In one aspect, the peak amplifier may operate in class C. Other types of operation are also contemplated.

The packaged RF amplifier 200 may be implemented to include a housing, an open cavity configuration, an overmolded configuration, and/or the like. In this regard, the packaged RF amplifier 200 may be implemented to include a housing. In particular, the housing may include a cover or other enclosure for protecting the interconnects, circuit elements, and/or the like.

Alternatively, the packaged RF amplifier 200 may be implemented to include an open cavity configuration. In particular, open cavity configurations may utilize open cavity package designs. In certain aspects, the open cavity configuration may include a cover or other enclosure for protecting interconnects, circuit elements, and/or the like.

Alternatively, the packaged RF amplifier 200 may be implemented to include an overmolded configuration. In one aspect, the overmold configuration may substantially enclose the assembly. The overmold configuration may be formed from a plastic, a mold compound, a plastic compound, a polymer compound, a plastic polymer compound, and/or the like. The overmold configuration may be injection or compression molded around the components to provide protection for the components of the packaged RF amplifier 200 from the external environment.

Fig. 8 shows a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.

In particular, fig. 8 shows a single implementation of the RF power amplifier (RFPA) circuit 100 and/or the RF transistor 214 in the packaged RF amplifier 200. In addition, fig. 8 shows packaged RF amplifier 200 implementing baseband impedance boosting circuit 190 offset from the axis (the y-axis as referred to in the figure) of output impedance matching network 116, RF transistor 214, input impedance matching network 146, conductive output lead 206, and/or conductive input lead 204. Fig. 6, on the other hand, illustrates packaged RF amplifier 200 implementing baseband impedance enhancement circuit 190 along the same axis (the y-axis referred to in the figure) as output impedance matching network 116, RF transistor 214, input impedance matching network 146, conductive output lead 206, and/or conductive input lead 204.

In one or more aspects, the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and/or the baseband impedance boosting circuit 190 may be implemented as an integrated circuit. In particular, each of the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and/or the baseband impedance boosting circuit 190 may be implemented as an active area within the integrated circuit. In one aspect, the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and/or the baseband impedance boosting circuit 190 may be implemented as a Monolithic Microwave Integrated Circuit (MMIC).

Fig. 9 is an enlarged partial schematic diagram of a transistor amplifier embodiment according to the present disclosure.

Fig. 10 is a schematic cross-sectional view taken along line X-X of fig. 9.

As shown in fig. 9, the RF amplifier device 108 and/or the RF transistor 214 may include a gate bus 402 that may be connected to a plurality of gate finger structures 406 that may extend in parallel in a first direction (e.g., the X-direction shown in fig. 9). The source bus 410 may be connected to a plurality of parallel source contacts 416. Source bus 410 may be connected to a ground voltage node at the bottom of RF amplifier device 108 and/or RF transistor 214. The drain bus 420 may be connected to a plurality of drain contacts 426.

As shown in fig. 9, each gate finger 406 may extend in the X-direction between a pair of adjacent source and

drain contacts

416, 426. The RF amplifier device 108 or the RF transistor 214 may include a plurality of unit cells 430, wherein each of the plurality of unit cells 430 may include a separate transistor. The dashed box in fig. 9 illustrates one of the plurality of unit cells 430 and includes a gate finger 406, which gate finger 406 may extend between adjacent source and

drain contacts

416, 426. "gate width" may refer to the distance that the gate finger 406 overlaps its associated one of the source contact 416 and the drain contact 426 in the X-direction. That is, the "width" of the gate finger 406 is the dimension (distance in the Z-direction) that the gate finger 406 extends parallel to the adjacent source contact 416/drain contact 426. Each of the plurality of unit cells 430 may share one of the source contact 416 and/or the drain contact 426 with one or more adjacent unit cells of the plurality of unit cells 430. Although a given number of the plurality of unit cells 430 is shown in fig. 9, it is understood that the RF amplifier device 108 and/or the RF transistor 214 may include more or fewer of the plurality of unit cells 430.

Referring to FIG. 10, the RF amplifier device 108 and/or the RF transistor 214 may include a semiconductor structure 440 that includes a substrate 422, which may include, for example, 4H-SiC or 6H-SiC. The channel layer 490 may be disposed on the substrate 422, and the barrier layer 470 may be disposed on the channel layer 490, such that the channel layer 490 is between the substrate 422 and the barrier layer 470. The channel layer 490 and the barrier layer 470 may include a group III-nitride based material, wherein the material of the barrier layer 470 has a higher bandgap than the material of the channel layer 490. For example, the channel layer 490 may include GaN, and the barrier layer 470 may include AlGaN.

Due to the band gap difference between the barrier layer 470 and the channel layer 490 and the piezoelectric effect at the interface between the barrier layer 470 and the channel layer 490, a two-dimensional electron gas (2 DEG) is induced in the channel layer 490 at the junction between the channel layer 490 and the barrier layer 470. The 2DEG acts as a highly conductive layer allowing conduction between the source and drain of the device, which may be below source contact 416 and drain contact 426, respectively. Source contact 416 and drain contact 426 may be on barrier layer 470. The gate finger 406 may be on the spacer layer 470 between the source contact 416 and the drain contact 426. Although in fig. 9, the gate finger 406 and the source and

drain contacts

416, 426 are shown as having the same "length," it is to be understood that in practice the length of the gate finger 406 may be significantly less than the length of the source and

drain contacts

416, 426, and it is also to be understood that the source and drain contacts 426 need not have the same length.

The material of the gate finger 406 may be selected based on the composition of the barrier layer 470. However, in some embodiments, materials capable of forming schottky contacts with nitride-based semiconductor materials may be used, such as Ni, pt, niSi _X Cu, pd, cr, W and/or WSiN. Source contact 416 and drain contact 426 may comprise a metal, such as TiAlN, which may beOhmic contacts are formed to the GaN.

The RF amplifier device 108 and/or the RF transistor 214 may include metallization layers on the lower surface of the substrate 422. The metallization layer may lie in a plane substantially parallel to the Z-axis and/or the X-axis. In one aspect, the metallization layer may be implemented as a full-surface metal layer on the lower surface of the substrate 422. The RF amplifier device 108 and/or the RF transistor 214 may include individual conductive lines, traces, circuit traces, pads for connections, vias for passing connections between aluminum, copper, silver, gold, and/or similar layers, and features such as solid conductive regions for electromagnetic shielding or other purposes.

The RF amplifier device 108 may be implemented as a Field Effect Transistor (FET), a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a Lateral Diffusion MOSFET (LDMOS), a gallium nitride (GaN) MOSFET, a GaN Lateral Diffusion MOSFET (LDMOS), a transistor implemented as an amplifier, a GaN High Electron Mobility Transistor (HEMT), a GaN metal semiconductor field effect transistor (MESFET) transistor, a bipolar transistor, a discrete device, a Doherty arrangement, any device utilizing bias feeding, and the like. Further, more than one RF amplifier device 108 may be installed in the RF power amplifier (RFPA) circuit 100 and connected in parallel. In this regard, the plurality of RF amplifier devices 108 may utilize the same type of transistor; and/or the plurality of RF amplifier devices 108 may utilize different types of transistors.

In one aspect, the RF amplifier device 108 may be implemented as a high power transistor. In one aspect, RF amplifier device 108 may be implemented as a high power Lateral Diffusion MOSFET (LDMOS), a high power gallium nitride (GaN) MOSFET, a high power GaN Lateral Diffusion MOSFET (LDMOS), a high power GaN High Electron Mobility Transistor (HEMT), and/or a high power GaN metal semiconductor field effect transistor (MESFET) transistor.

In one aspect, the RF amplifier device 108 may be implemented as a high frequency transistor. In one aspect, RF amplifier device 108 may be implemented as a high frequency Lateral Diffusion MOSFET (LDMOS), a high frequency gallium nitride (GaN) MOSFET, a high frequency GaN Lateral Diffusion MOSFET (LDMOS), a high frequency GaN High Electron Mobility Transistor (HEMT), and/or a high frequency GaN metal semiconductor field effect transistor (MESFET) transistor.

In one aspect, the RF amplifier device 108 may be implemented as a high power, high frequency transistor. In one aspect, the RF amplifier device 108 may be implemented as a high power high frequency Lateral Diffusion MOSFET (LDMOS), a high power high frequency gallium nitride (GaN) MOSFET, a high power high frequency GaN Lateral Diffusion MOSFET (LDMOS), a high power high frequency GaN High Electron Mobility Transistor (HEMT), and/or a high power high frequency GaN metal semiconductor field effect transistor (MESFET).

Wherein the high power is defined as peak power of 10W to 2KW, peak power of 100W to 500W, peak power of 500W to 1KW, peak power of 1KW to 1.5KW, or peak power of 1.5KW to 2KW; and/or wherein high power is defined as peak power greater than 10W, peak power greater than 500W, peak power greater than 1KW, peak power greater than 1.5KW, or peak power greater than 2KW.

Wherein high frequency is defined as a frequency of 0.4GHz to 6GHz, a frequency of 1.4GHz to 1.6GHz, a frequency of 1.8GHz to 2.7GHz, a frequency of 1GHz to 2GHz, a frequency of 2GHz to 3GHz, a frequency of 3GHz to 4GHz, a frequency of 4GHz to 5GHz, or a frequency of 5GHz to 6GHz; and/or wherein high frequency is defined as a frequency greater than 1.4GHz, a frequency greater than 1.8GHz, a frequency greater than 2GHz, a frequency greater than 3GHz, a frequency greater than 4GHz, a frequency greater than 5GHz, or a frequency less than 6GHz.

As described herein, the present disclosure proposes the implementation of an RF power amplifier (RFPA) circuit 100 and/or a packaged RF amplifier 200 that includes a baseband impedance boosting circuit 190. As disclosed herein, the baseband impedance boosting circuit 190 may be configured to improve the baseband impedance of the RF power amplifier (RFPA) circuit 100. Alternatively or additionally, the baseband impedance boosting circuit 190 may be configured to provide improved Digital Predistortion (DPD) operation of the RF power amplifier (RFPA) circuit 100 and/or the RF amplifier device 108. In one aspect, the baseband impedance boosting circuit 190 may be configured to reduce resonance of the baseband terminal. In one aspect, the baseband impedance boosting circuit 190 may be configured to push and/or move the resonance of the baseband terminal to higher frequencies.

In particular, the connections described herein may include couplings or connections that may include leads, wire bonds, adhesives, welds, sintering, eutectic bonds, thermal compression bonds, ultrasonic bonds/welds, clip assemblies, and/or the like as described herein. Connections may be through intervening structures or components, or connections may be direct.

The adhesives of the invention may be used in adhesive bonding processes that may include the application of an intermediate layer to join the surfaces to be joined. The binder may be organic or inorganic; and the adhesive may be deposited on one or both of the surfaces to be joined. The adhesive may be used in an adhesive process that may include applying an adhesive material having a given coating thickness in an environment that may include applying a given tool pressure for a given processing time at a given adhesive temperature. In one aspect, the adhesive may be a conductive adhesive, an epoxy-based adhesive, a conductive epoxy-based adhesive, and/or the like.

The solder of the present disclosure may be used to form a solder interface, which may include and/or be formed from solder. The solder may be any fusible metal alloy that may be used to form an adhesive bond between the surfaces to be joined. The solder may be a lead-free solder, a lead solder, a eutectic solder, or the like. The lead-free solder may contain traces of tin, copper, silver, bismuth, indium, zinc, antimony, other metals, and/or the like. The lead solder may comprise lead, other metals such as tin, silver, and/or the like. The solder may further include flux as desired.

The sintering of the present invention may utilize methods of compacting and forming solid materials by means of heat and/or pressure. The sintering process may be performed without melting the material to liquify. The sintering process may include sintering of metal powders. The sintering process may include sintering in a vacuum. The sintering process may include sintering using a protective gas.

The eutectic bonding of the present invention may utilize a bonding process with an intermediate metal layer that may form a eutectic system. The eutectic system may be used between surfaces to be joined. Eutectic bonding may utilize a eutectic metal, which may be an alloy that transitions from a solid to a liquid, or from a liquid to a solid, at a given composition and temperature, without the need to go through a two-phase equilibrium. The eutectic alloy may be deposited by sputtering, dual source evaporation, electroplating, and/or the like.

The ultrasonic welding of the present invention may utilize a process of locally applying high frequency ultrasonic vibrations under pressure to the components being secured together. Ultrasonic welding can form a solid weld between the surfaces to be joined. In one aspect, ultrasonic welding may include applying an ultrasonic force.

Any one or more components of the packaged RF amplifier 200 may be disposed on one or more metallization layers on an electrically insulating window frame 210 or the like. The one or more metallization layers may include a printing screen using one or more fabrication techniques including solder paste, an epoxy printing screen, a screen printing process, a photolithography process, a process of printing onto a transparent film, a photomask process combined with an etching process, a photo plate process, a laser resist process, a milling process, a laser etching process, a direct metal printing process, and/or the like.

In a given aspect, the RF power amplifier (RFPA) circuit 100 and/or the packaged RF amplifier 200 of the present disclosure may be used in a wireless base station connected to a wireless device. In a further aspect, the RF power amplifier (RFPA) circuit 100 and/or the packaged RF amplifier 200 of the present disclosure may be used in amplifiers implemented by a wireless base station connected to a wireless device. In a further aspect, the RF power amplifier (RFPA) circuit 100 and/or the packaged RF amplifier 200 of the present disclosure may be used in a wireless device. In a further aspect, the RF power amplifier (RFPA) circuit 100 and/or the packaged RF amplifier 200 of the present disclosure may be used in an amplifier implemented in a wireless device.

In this disclosure, it should be understood that references to wireless devices are intended to include electronic devices such as mobile phones, tablets, gaming systems, MP3 players, personal computers, PDAs, user Equipment (UE), etc. "wireless device" is intended to include any compatible mobile technology computing device that can connect to a wireless communication network, such as a mobile phone, mobile device, mobile station, user device, cellular phone, smartphone, cell phone, wireless dongle, remote alarm device, internet of things (IoT) -based wireless device, or other mobile computing device that can be supported by a wireless network. The wireless device may utilize wireless communication technologies such as GSM, CDMA, wireless local loop, wi-Fi, wiMAX, other Wide Area Network (WAN) technologies, 3G technologies, 4G technologies, 5G technologies, LTE technologies, and/or the like.

In the present disclosure, it should be understood that reference to a wireless base station is intended to encompass Base Transceiver Stations (BTSs), node B devices, base Station (BS) devices, modified node B devices, and the like, which facilitate wireless communications between the wireless device and a network. The wireless base stations and/or networks may utilize wireless communication technologies such as GSM, CDMA, wireless local loop, wi-Fi, wiMAX, other Wide Area Network (WAN) technologies, 3G technologies, 4G technologies, 5G technologies, LTE technologies, and so forth.

While the disclosure has been described in terms of exemplary aspects, those skilled in the art will recognize that the disclosure can be practiced with modification within the spirit and scope of the appended claims. The examples given above are merely illustrative and are not meant to be an exhaustive list of all possible designs, aspects, applications or modifications.

Claims

1. An amplifier comprising

Inputting a matching network;

at least one transistor;

an input lead coupled to the at least one transistor;

a ground terminal coupled to the transistor;

an output lead coupled to the at least one transistor;

an output matching circuit coupled to the output lead and coupled to the at least one transistor; and

a baseband impedance boosting circuit having at least one reactive element coupled to the input matching network,

wherein the baseband impedance boosting circuit is configured to reduce resonance of a baseband termination.

2. The amplifier of claim 1, wherein:

the at least one reactive element of the baseband impedance enhancement circuit comprises at least one of: an inductor, a capacitor, a reference potential port; and

the baseband impedance boosting circuit is configured to provide improved Digital Predistortion (DPD) operation.

3. The amplifier of claim 1, wherein:

the at least one reactive element of the baseband impedance enhancement circuit comprises an inductor, a capacitor, and a reference potential port; and

the baseband impedance boosting circuit is configured to improve baseband impedance.

4. The amplifier of claim 1, wherein:

the baseband impedance boosting circuit is configured to push and/or move a resonance of a baseband terminal to a higher frequency.

5. The amplifier of claim 1, wherein:

the input matching network includes at least one reactive element coupled to the at least one reactive element of the baseband impedance enhancement circuit.

6. The amplifier recited in claim 1 wherein the at least one transistor includes a GaN-based transistor.

7. The amplifier recited in claim 1 wherein the at least one transistor includes an LDMOS based transistor.

8. The amplifier of claim 1, wherein:

the at least one transistor includes a transistor implemented as a carrier amplifier; and

the at least one transistor includes a transistor implemented as a peak amplifier.

9. The amplifier of claim 1, further comprising:

the chip comprises a metal flange, a first conductive lead, a second conductive lead and a conductive chip welding pad.

10. A process for implementing an amplifier comprising

Setting an input matching network;

providing at least one transistor;

coupling an input lead to the at least one transistor;

coupling a ground terminal to the transistor;

coupling an output lead to the at least one transistor;

coupling an output matching circuit to the output lead and coupling the output matching circuit to the at least one transistor; and

coupling a baseband impedance boosting circuit having at least one reactive element to the input matching network;

11. The process of implementing an amplifier of claim 10 wherein:

12. The process of implementing an amplifier of claim 10, wherein:

the at least one reactive element of the baseband impedance boosting circuit comprises an inductor, a capacitor, and a reference potential port; and

13. The process of implementing an amplifier of claim 10, wherein:

14. The process of implementing an amplifier of claim 10, wherein:

15. The process of implementing an amplifier of claim 10, wherein:

the at least one transistor comprises a GaN-based transistor; and

16. The process of claim 10 wherein said at least one transistor comprises an LDMOS based transistor.

17. The process of implementing an amplifier of claim 10, further comprising;

implementing the at least one transistor includes implementing the transistor as a carrier amplifier; and

implementing the at least one transistor includes implementing the transistor as a peak amplifier.

18. An amplifier comprising

Inputting a matching network;

at least one transistor;

an input lead coupled to the at least one transistor;

a ground terminal coupled to the transistor;

an output lead coupled to the at least one transistor;

a baseband impedance boosting circuit having at least one reactive element coupled to the input matching network;

wherein the input matching network comprises at least one reactive element coupled to the at least one reactive element of the baseband impedance boosting circuit; and

19. The amplifier recited in claim 18 wherein:

20. The amplifier recited in claim 18 wherein:

21. The amplifier recited in claim 18 wherein:

22. The amplifier recited in claim 18 wherein the at least one transistor comprises a GaN-based transistor.

23. The amplifier recited in claim 18 wherein the at least one transistor includes an LDMOS based transistor.

24. The amplifier recited in claim 18 wherein:

the at least one transistor comprises a transistor implemented as a carrier amplifier; and

25. The amplifier recited in claim 18 further comprising: