CN115914327B - Control method, device, equipment and storage medium - Google Patents

Control method, device, equipment and storage medium Download PDF

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Publication number
CN115914327B
CN115914327B CN202211385383.XA CN202211385383A CN115914327B CN 115914327 B CN115914327 B CN 115914327B CN 202211385383 A CN202211385383 A CN 202211385383A CN 115914327 B CN115914327 B CN 115914327B
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Prior art keywords
communication
module
communication module
data
error rate
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CN115914327A (en
Inventor
王德平
王强
于长虹
田辉
吴茜
廖波
焦育成
宋金海
王泽尉
赵晓雪
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FAW Group Corp
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FAW Group Corp
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Priority to CN202211385383.XA priority Critical patent/CN115914327B/en
Publication of CN115914327A publication Critical patent/CN115914327A/en
Priority to PCT/CN2023/109993 priority patent/WO2024098841A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/08Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0823Errors, e.g. transmission errors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/16Threshold monitoring
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/14Session management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer And Data Communications (AREA)

Abstract

The invention discloses a control method, a control device, control equipment and a storage medium. The method comprises the following steps: acquiring an error rate; if the error rate is smaller than a first threshold value, communicating through the PHY function module; if the error rate is greater than or equal to the first threshold, the communication is performed through the outward expansion PHY chip, and through the technical scheme of the invention, the communication timeliness can be ensured.

Description

Control method, device, equipment and storage medium
Technical Field
The embodiment of the invention relates to the technical field of vehicles, in particular to a control method, a control device, control equipment and a storage medium.
Background
In recent years, the demand of communication chips has increased greatly, and new vitality is injected into the global semiconductor industry, so that the communication chips are widely applied to the mobile communication industry, the wireless internet industry and the wireless data transmission industry, and are about to become the largest application market of the global semiconductor chip industry in the beginning of the 21 st century.
As the vehicle-mounted communication chip enters the market, the communication chip may fail in PHY function due to errors of the analog circuit, and there is a problem that communication timeliness cannot be guaranteed.
Disclosure of Invention
The embodiment of the invention provides a control method, a control device, control equipment and a storage medium, which are used for solving the problem that a communication chip cannot guarantee communication failure, and can be used for communication through an internal PHY function module of the communication chip when the error rate is smaller than a first threshold value and communication through an external PHY chip when the error rate is larger than or equal to the first threshold value, so that communication timeliness is guaranteed.
According to an aspect of the present invention, there is provided a control method applied to a communication apparatus including: the communication chip comprises a PHY function module, and the control method comprises the following steps:
acquiring an error rate;
if the error rate is smaller than a first threshold value, communicating through the PHY function module;
and if the error rate is greater than or equal to a first threshold value, communicating through the outward expansion PHY chip.
Further, the method further comprises the following steps:
receiving communication information sent by the TBOX through a vehicle-mounted Ethernet interface;
checking according to the communication information;
and if the verification fails, discarding the communication information.
Further, the method further comprises the following steps:
acquiring temperature data of a communication chip;
and if the temperature data of the communication chip is greater than or equal to the temperature threshold value, reducing the main frequency and/or the workload of the communication chip.
Further, the method further comprises the following steps:
and sending the communication chip data to the data recorder through the Ethernet diagnosis interface so that the data recorder records the communication chip data.
Further, the communication chip further includes: at least one first communication module and at least one second communication module;
the control method further includes:
when the total load rate of the first communication module and the second communication module is larger than a load rate threshold, receiving target information sent by a CPU (central processing unit) through the first communication module, and sending the target information to the second communication module;
and sending the target information to the CPU through the second communication module so that the CPU can determine the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
Further, the method further comprises the following steps:
transmitting data to the flow meter through the first communication module so that the flow meter transmits the received data to the second communication module;
and determining the full-load error rate of the communication chip according to the data sent to the flow meter by the first communication module and the data received by the second communication module.
Further, the method further comprises the following steps:
receiving data sent by a streaming instrument through the second communication module, and sending the received data to the first communication module;
and sending the received data to the streaming instrument through the first communication module, so that the streaming instrument determines the full-load bit error rate of the communication chip according to the data sent to the second communication module and the received data sent by the first communication module.
According to another aspect of the present invention, there is provided a control apparatus configured in a communication device including: the communication chip and the outward expansion PHY chip, wherein, the communication chip includes PHY function module, the control module includes:
the acquisition module is used for acquiring the error rate;
the first control module is used for communicating through the PHY function module if the error rate is smaller than a first threshold value;
and the second control module is used for communicating through the outward expansion PHY chip if the error rate is greater than or equal to the first threshold value.
Further, the method further comprises the following steps:
the receiving module is used for receiving the communication information sent by the TBOX through the vehicle-mounted Ethernet interface;
the verification module is used for verifying according to the communication information;
and the information screening module is used for discarding the communication information if the verification fails.
Further, the method further comprises the following steps:
the temperature data acquisition module is used for acquiring temperature data of the communication chip;
and the third control module is used for reducing the main frequency and/or the workload of the communication chip if the temperature data of the communication chip is greater than or equal to the temperature threshold value.
Further, the method further comprises the following steps:
and the recording module is used for sending the communication chip data to the data recorder through the Ethernet diagnosis interface so that the data recorder records the communication chip data.
Further, the communication chip further includes: at least one first communication module and at least one second communication module;
the control device further includes:
the information sending module is used for receiving target information sent by the CPU through the first communication module and sending the target information to the second communication module when the total load rate of the first communication module and the second communication module is larger than a load rate threshold;
and the first determining module is used for sending the target information to the CPU through the second communication module so that the CPU determines the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
Further, the method further comprises the following steps:
the first data transmission module is used for transmitting data to the streaming instrument through the first communication module so that the streaming instrument transmits the received data to the second communication module;
and the second determining module is used for determining the full-load bit error rate of the communication chip according to the data sent to the flow meter by the first communication module and the data received by the second communication module.
Further, the method further comprises the following steps:
the second data transmitting module is used for receiving the data transmitted by the streaming instrument through the second communication module and transmitting the received data to the first communication module;
and the third determining module is used for transmitting the received data to the streaming instrument through the first communication module so that the streaming instrument determines the full-load error rate of the communication chip according to the data transmitted to the second communication module and the received data transmitted by the first communication module.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the control method according to any one of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to execute a control method according to any one of the embodiments of the present invention.
When the error rate is smaller than a first threshold, the embodiment of the invention communicates through the PHY function module; when the error rate is greater than or equal to a first threshold, communication is performed through the outward expansion PHY chip, so that communication timeliness can be ensured.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a communication device in an embodiment of the present invention;
FIG. 2 is a flow chart of a control method in an embodiment of the invention;
FIG. 3 is a PCB calibration schematic of a clock edge;
FIG. 4 is a schematic diagram of clock and data traces on a PCB in an embodiment of the invention;
FIG. 5 is a schematic diagram of a communication verification process in an embodiment of the invention;
FIG. 6 is a schematic diagram of a heat dissipation structure in an embodiment of the invention;
FIG. 7 is a schematic diagram of a communication chip data self-collection diagnostic in a whole vehicle test in an embodiment of the invention;
FIG. 8 is a schematic diagram of a method for testing full-load delay of a communication chip according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a full-load bit error rate test method of a communication chip in an embodiment of the invention;
FIG. 10 is a schematic diagram of another method for testing the full-load bit error rate of a communication chip according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a control device according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of an electronic device in an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a schematic structural diagram of a communication device, including: the communication chip comprises a PHY function module and a kernel. The kernel is used for acquiring the error rate, and switching to the outward expansion PHY chip for communication when the error rate is greater than or equal to a first threshold value.
It should be noted that, the domestic switching chip selected by the gateway controller has PHY function, normal communication can be performed through the PHY function module, once the data volume is increased, the system kernel statistics hundred megagigabit bit error rate is increased to more than 30% at the same time, and the communication requirement of the whole vehicle is not satisfied, and then the system kernel statistics is switched to the external PHY chip, so as to ensure the communication timeliness.
Fig. 2 is a flowchart of a control method provided in an embodiment of the present invention, where the embodiment is applicable to a case of controlling a communication chip, the method may be performed by a control device in the embodiment of the present invention, and the device may be implemented in a software and/or hardware manner, as shown in fig. 2, and the method specifically includes the following steps:
s110, obtaining the error rate.
Wherein, the bit error rate is hundred megagigabit bit error rate.
Specifically, the mode of obtaining the error rate may be: hundred megagigabit bit error rates are counted by the kernel of the communication device.
And S120, if the error rate is smaller than a first threshold value, communicating through the PHY function module.
The first threshold may be 30% or other values, which is not limited in the embodiment of the present invention.
Specifically, in normal communication, communication is performed through a PHY function module inside the communication chip. It should be noted that, the manner of determining whether the communication is in normal communication may be: and when the error rate is smaller than the first threshold value, determining that the communication chip is in a normal communication state.
And S130, if the error rate is greater than or equal to a first threshold value, communicating through the outward expansion PHY chip.
Specifically, if the error rate is detected to be greater than or equal to the first threshold, the communication mode is switched to communication through the expansion PHY chip.
As shown in fig. 3, fig. 3 is a schematic diagram of PCB calibration with clock edges, using a design scheme of delay matching of the PCB to the high-speed signal delay. When reaching the giga, the car rule level communication chip faces the influence of high-voltage signals and electromagnetic radiation on the car, and the situation that clock signals and data signals are not matched can occur, so that signal faults are prevented, and signal lines are delayed on the PCB to be matched with the clock signals. The original clock signal is 1G signal as shown in FIG. 3, because the signal interference on the vehicle is changed from 1G to 900M, the clock signal and the data signal cannot be matched in rising edge, the data fails, and the signal needs to be delayed on the PCB. As shown in fig. 4, fig. 4 is a schematic diagram of clock lines and data lines on a PCB, when a PCB board card to which a communication chip belongs uses a data line to perform wiring around the clock lines, the data line can be longer than the clock line, the delay is consumed, and signal symmetry is required to prevent interference.
Optionally, the method further comprises:
receiving communication information sent by the TBOX through a vehicle-mounted Ethernet interface;
checking according to the communication information;
and if the verification fails, discarding the communication information.
Specifically, the verification method according to the communication information may be: and determining a check code according to the last 5 bits of the communication information, and checking according to the check code.
As shown in fig. 5, fig. 5 is a schematic diagram of a communication information checking flow, a component TBOX on the vehicle, which communicates with the gateway controller, transmits communication information to the communication chip through the vehicle-mounted ethernet interface, the last 5 bits of the communication information are check codes obtained by a cyclic redundancy algorithm, the kernel checks after receiving data, and if the check is correct, the data is used, and if the check is incorrect, the data is discarded. The scheme solves the problem of high error rate of communication signals of domestic vehicle-mounted chips, especially gigabit Ethernet signals. The data can not be checked and wrongly identified by the automobile controller according to the importance of the data, so that the scheme is the Ethernet communication of the vehicle-mounted entertainment system, a certain error rate is allowed, and the data can be checked.
Optionally, the method further comprises:
acquiring temperature data of a communication chip;
and if the temperature data of the communication chip is greater than or equal to the temperature threshold value, reducing the main frequency and/or the workload of the communication chip.
It should be noted that, in order to prevent the vehicle-level communication chip from overheating, two special treatments are required to be added, namely, active heat dissipation is firstly performed, and the heat dissipation area and heat dissipation fluidity are increased. And secondly, monitoring the temperature of the communication chip, and reducing the main frequency workload of the communication chip when the temperature is too high.
In a specific example, as shown in fig. 6, fig. 6 includes: gateway controller, ventilation valve and air conditioning system, the gateway controller includes: communication chip, soC, ventilation valve drive and board temperature sensor, wherein, soC is the flaring chip, and communication chip includes: temperature IP and internal CPU.
It should be noted that, in order to ensure the radiation emission, conduction emission and anti-interference performance of the chip, EMC scanning is performed on the chip to identify EMC risk, because the communication chip is internally IP integrated, there is a phenomenon that radiation emission exceeds standard at the interface, and the shielding circuit can be arranged in advance to reduce the emission exceeding standard and the anti-interference capability.
Optionally, the method further comprises:
and sending the communication chip data to the data recorder through the Ethernet diagnosis interface so that the data recorder records the communication chip data.
In a specific example, as shown in fig. 7, fig. 7 is a schematic diagram of self-collecting and diagnosing chip data in a whole vehicle test, in order to verify the capability of an exchange chip, strengthen the workload of the chip, and simultaneously, in order to provide data required by chip state analysis, chip diagnosis and information transfer are realized through the exchange chip and a self-contained core, and the data are transferred to a data recorder through an automobile ethernet diagnosis port TX to record data, and summary statistics is performed on core temperature, core voltage, core power, data frames sent and received by ethernet, data delay and the like. The diagnosis information of the existing automobile controller scheme comes from an interface state, and the technical scheme provided by the embodiment of the invention mainly is that the chip is diagnosed by faults, and the automobile controller can normally operate even if the chip is faulty.
Optionally, the communication chip further includes: at least one first communication module and at least one second communication module;
when the total load rate of the first communication module and the second communication module is larger than a load rate threshold, receiving target information sent by a CPU (central processing unit) through the first communication module, and sending the target information to the second communication module;
and sending the target information to the CPU through the second communication module so that the CPU can determine the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
Wherein, the communication chip includes: at least two communication modules, it should be noted that, if the communication chip includes 3 communication modules: communication module 1, communication module 2, and communication module 3, communication module 1 is determined as a first communication module, and communication module 2 is determined as a second communication module. Alternatively, the communication module 1 is determined as a first communication module, and the communication module 3 is determined as a second communication module. Alternatively, the communication module 2 is determined as a first communication module, and the communication module 3 is determined as a second communication module. The embodiment of the present invention is not limited thereto.
In a specific example, as shown in fig. 8, fig. 8 is a schematic diagram of a full-load delay test method of a communication chip, firstly, an ETH0 and an ETH1 module are selected to communicate in the communication chip, on a communication bus of the communication chip, the communication rate is enabled to reach gigabit, and the bus load rate is enabled to reach 95%, namely, 95% of data buses are busy, part of information in the communication content of the two data buses contains time stamps, namely, a CPU transmits one data to the ETH0, the CPU contains time information with the power-on time as a reference zero point, the ETH0 and the ETH1 carry out vehicle-mounted gigabit ethernet communication with the bus load of 95%, the ETH0 transmits the received data to the ETH1, the ETH1 transmits the information containing the time stamps to the CPU after the transmitted data reaches the ETH1, and the CPU makes a difference between the time of the received information and the time in the information, so as to obtain the full-load delay of the communication chip.
Optionally, the method further comprises:
transmitting data to the flow meter through the first communication module so that the flow meter transmits the received data to the second communication module;
and determining the full-load error rate of the communication chip according to the data sent to the flow meter by the first communication module and the data received by the second communication module.
In a specific example, as shown in fig. 9, fig. 9 is a schematic diagram of a method for testing a full-load bit error rate of a communication chip; the kernel controls the ETH0 to send data to the flow meter, the flow meter completely delivers the data to the ETH1, the ETH1 transmits the data to the kernel for verification, the kernel compares the sent data with the received data, and the error rate of the transmitted data is calculated.
Optionally, the method further comprises:
receiving data sent by a streaming instrument through the second communication module, and sending the received data to the first communication module;
and sending the received data to the streaming instrument through the first communication module, so that the streaming instrument determines the full-load bit error rate of the communication chip according to the data sent to the second communication module and the received data sent by the first communication module.
In a specific example, as shown in fig. 10, fig. 10 is a schematic diagram of another method for testing the full-load bit error rate of a communication chip; the data is sent to the ETH1 by the streaming device, the two Ethernet communication modules are directly communicated through the routing table, the ETH1 sends the received data to the ETH0, the ETH0 transmits the data back to the streaming device, and the streaming device obtains the error rate of the transmitted data by comparing the sent data with the received data.
According to the technical scheme, when the error rate is smaller than a first threshold value, communication is carried out through the PHY function module; when the error rate is greater than or equal to a first threshold, communication is performed through the outward expansion PHY chip, so that communication timeliness can be ensured.
Example two
Fig. 11 is a schematic structural diagram of a control device according to an embodiment of the present invention. The embodiment may be applied to a case of controlling a communication chip, where the device may be implemented in software and/or hardware, and the device may be integrated in any device that provides a control function, as shown in fig. 11, where the control device specifically includes: an acquisition module 210, a first control module 220, and a second control module 230.
The acquisition module is used for acquiring the error rate;
the first control module is used for communicating through the PHY function module if the error rate is smaller than a first threshold value;
and the second control module is used for communicating through the outward expansion PHY chip if the error rate is greater than or equal to the first threshold value.
Optionally, the method further comprises:
the receiving module is used for receiving the communication information sent by the TBOX through the vehicle-mounted Ethernet interface;
the verification module is used for verifying according to the communication information;
and the information screening module is used for discarding the communication information if the verification fails.
Optionally, the method further comprises:
the temperature data acquisition module is used for acquiring temperature data of the communication chip;
and the third control module is used for reducing the main frequency and/or the workload of the communication chip if the temperature data of the communication chip is greater than or equal to the temperature threshold value.
Optionally, the method further comprises:
and the recording module is used for sending the communication chip data to the data recorder through the Ethernet diagnosis interface so that the data recorder records the communication chip data.
Optionally, the communication chip further includes: at least one first communication module and at least one second communication module;
the control device further includes:
the information sending module is used for receiving target information sent by the CPU through the first communication module and sending the target information to the second communication module when the total load rate of the first communication module and the second communication module is larger than a load rate threshold;
and the first determining module is used for sending the target information to the CPU through the second communication module so that the CPU determines the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
Optionally, the method further comprises:
the first data transmission module is used for transmitting data to the streaming instrument through the first communication module so that the streaming instrument transmits the received data to the second communication module;
and the second determining module is used for determining the full-load bit error rate of the communication chip according to the data sent to the flow meter by the first communication module and the data received by the second communication module.
Optionally, the method further comprises:
the second data transmitting module is used for receiving the data transmitted by the streaming instrument through the second communication module and transmitting the received data to the first communication module;
and the third determining module is used for transmitting the received data to the streaming instrument through the first communication module so that the streaming instrument determines the full-load error rate of the communication chip according to the data transmitted to the second communication module and the received data transmitted by the first communication module.
The product can execute the method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
According to the technical scheme, when the error rate is smaller than a first threshold value, communication is carried out through the PHY function module; when the error rate is greater than or equal to a first threshold, communication is performed through the outward expansion PHY chip, so that communication timeliness can be ensured.
Example III
Fig. 12 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 12, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the respective methods and processes described above, for example, control methods.
In some embodiments, the control method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the control method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the control method in any other suitable way (e.g. by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (9)

1. A control method, characterized by being applied to a communication apparatus, the communication apparatus comprising: the communication chip comprises a PHY function module, and the control method comprises the following steps:
acquiring an error rate, wherein the error rate is hundred megagigabit error rate;
if the error rate is smaller than a first threshold value, communicating through the PHY function module;
if the error rate is greater than or equal to a first threshold, communicating through the outward expansion PHY chip;
the communication chip further includes: at least one first communication module and at least one second communication module;
the control method further includes:
when the total load rate of the first communication module and the second communication module is larger than a load rate threshold, receiving target information sent by a CPU (central processing unit) through the first communication module, and sending the target information to the second communication module;
and sending the target information to the CPU through the second communication module so that the CPU can determine the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
2. The method as recited in claim 1, further comprising:
receiving communication information sent by the TBOX through a vehicle-mounted Ethernet interface;
checking according to the communication information;
and if the verification fails, discarding the communication information.
3. The method as recited in claim 1, further comprising:
acquiring temperature data of a communication chip;
and if the temperature data of the communication chip is greater than or equal to the temperature threshold value, reducing the main frequency and/or the workload of the communication chip.
4. The method as recited in claim 1, further comprising:
and sending the communication chip data to the data recorder through the Ethernet diagnosis interface so that the data recorder records the communication chip data.
5. The method as recited in claim 1, further comprising:
transmitting data to the flow meter through the first communication module so that the flow meter transmits the received data to the second communication module;
and determining the full-load error rate of the communication chip according to the data sent to the flow meter by the first communication module and the data received by the second communication module.
6. The method as recited in claim 1, further comprising:
receiving data sent by a streaming instrument through the second communication module, and sending the received data to the first communication module;
and sending the received data to the streaming instrument through the first communication module, so that the streaming instrument determines the full-load bit error rate of the communication chip according to the data sent to the second communication module and the received data sent by the first communication module.
7. A control apparatus, characterized by being configured in a communication device comprising: the communication chip and the outward expansion PHY chip, wherein, the communication chip includes PHY function module, the control module includes:
the acquisition module is used for acquiring the error rate, wherein the error rate is hundred megagigabit error rate;
the first control module is used for communicating through the PHY function module if the error rate is smaller than a first threshold value;
the second control module is used for communicating through the outward expansion PHY chip if the error rate is greater than or equal to a first threshold value;
the communication chip further includes: at least one first communication module and at least one second communication module;
the control device further includes:
the information sending module is used for receiving target information sent by the CPU through the first communication module and sending the target information to the second communication module when the total load rate of the first communication module and the second communication module is larger than a load rate threshold;
and the first determining module is used for sending the target information to the CPU through the second communication module so that the CPU determines the full-load time delay of the communication chip according to the time of receiving the target information and the time stamp carried by the target information.
8. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the control method of any one of claims 1-6.
9. A computer readable storage medium, characterized in that the computer readable storage medium stores computer instructions for causing a processor to implement the control method of any one of claims 1-6 when executed.
CN202211385383.XA 2022-11-07 2022-11-07 Control method, device, equipment and storage medium Active CN115914327B (en)

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Families Citing this family (1)

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Publication number Priority date Publication date Assignee Title
CN115914327B (en) * 2022-11-07 2024-03-26 中国第一汽车股份有限公司 Control method, device, equipment and storage medium

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102984030A (en) * 2012-12-06 2013-03-20 盛科网络(苏州)有限公司 Chip-level method and device for realizing Ethernet OAM frame delay measurement
CN105406998A (en) * 2015-11-06 2016-03-16 天津津航计算技术研究所 Dual-redundancy gigabit ethernet media access controller IP core based on FPGA
CN110995533A (en) * 2019-11-22 2020-04-10 配天机器人技术有限公司 Ethernet streaming test system
CN112788651A (en) * 2019-11-07 2021-05-11 Oppo(重庆)智能科技有限公司 Control method, terminal and storage medium
CN213585817U (en) * 2020-12-21 2021-06-29 沈阳东信创智科技有限公司 RTL9047 AA-based automobile gateway hardware platform
CN214202082U (en) * 2020-12-15 2021-09-14 中国第一汽车股份有限公司 Vehicle-mounted network system and automobile
CN115168253A (en) * 2021-04-06 2022-10-11 合肥杰发科技有限公司 USB working mode switching method and electronic equipment
CN115185364A (en) * 2022-09-09 2022-10-14 北京智芯微电子科技有限公司 Intelligent device and power consumption management method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107204783B (en) * 2017-05-25 2019-09-17 迈锐数据(北京)有限公司 A kind of wireless communication system, method and apparatus
WO2020102928A1 (en) * 2018-11-19 2020-05-28 深圳市欢太科技有限公司 Wireless signal transmission method, wireless signal transmission device and terminal device
CN114374470B (en) * 2020-10-15 2024-10-18 华为技术有限公司 Data transmission method, system and computer readable storage medium
CN115022851A (en) * 2021-03-03 2022-09-06 瑞昱半导体股份有限公司 Bluetooth mesh network system with communication range extension mechanism and online method thereof
CN115914327B (en) * 2022-11-07 2024-03-26 中国第一汽车股份有限公司 Control method, device, equipment and storage medium

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102984030A (en) * 2012-12-06 2013-03-20 盛科网络(苏州)有限公司 Chip-level method and device for realizing Ethernet OAM frame delay measurement
CN105406998A (en) * 2015-11-06 2016-03-16 天津津航计算技术研究所 Dual-redundancy gigabit ethernet media access controller IP core based on FPGA
CN112788651A (en) * 2019-11-07 2021-05-11 Oppo(重庆)智能科技有限公司 Control method, terminal and storage medium
CN110995533A (en) * 2019-11-22 2020-04-10 配天机器人技术有限公司 Ethernet streaming test system
CN214202082U (en) * 2020-12-15 2021-09-14 中国第一汽车股份有限公司 Vehicle-mounted network system and automobile
CN213585817U (en) * 2020-12-21 2021-06-29 沈阳东信创智科技有限公司 RTL9047 AA-based automobile gateway hardware platform
CN115168253A (en) * 2021-04-06 2022-10-11 合肥杰发科技有限公司 USB working mode switching method and electronic equipment
CN115185364A (en) * 2022-09-09 2022-10-14 北京智芯微电子科技有限公司 Intelligent device and power consumption management method thereof

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