CN115914142A - Message processing method, message forwarding method, device and equipment - Google Patents
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Abstract
The application relates to a message processing method, a message forwarding device and equipment, wherein the message processing method is applied to an inlet chip, and by receiving a first message and according to a destination MAC address of the first message, a port number of an outlet end for forwarding the first message and editing information for editing the first message are determined; acquiring attribute information of an outlet end according to the port number of the outlet end; editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end. According to the method and the device, all editing actions of the message can be completed on the inlet chip of the message without editing the message on the outlet chip of the message, so that the message editing information obtained from the inlet chip is not required to be carried on the outlet chip, the complexity of editing resource management is reduced, and meanwhile, the bandwidth of the chip interconnection port can be greatly saved.
Description
Technical Field
The present application relates to the field of network communication technologies, and in particular, to a packet processing method, a packet forwarding method, an apparatus, and a device.
Background
The ethernet has different protocol messages, and the ethernet switching chip needs to edit the original message in the message processing flow to generate a new message.
In the message processing flow, the switch chip first searches a forwarding table through an Internet Protocol (IPE) module to obtain a forwarding destination and message editing information, then stores and forwards the message through a Buffer Store Repeat (BSR) module, and edits an original message according to editing information obtained by the IPE module through an EPE module, and edits the message or performs other actions according to attributes configured on an exit end in the message editing flow.
In single-chip application, the switching chip can very easily acquire the attribute message configured on the outlet end, and message editing is easy to realize.
In an application of a multi-chip scenario, for example, in a stacking system, a plurality of stacking member devices are virtualized to form a network device, a message needs to enter from an ingress chip (i.e., a chip where an ingress end of the message is located), the message is sent to an egress chip of the message (i.e., a chip where an egress end of the message is located) through an interconnection port between the chips, meanwhile, message editing information obtained from the ingress chip is carried to the egress chip, and attributes configured on the egress end and the carried editing information are obtained from the egress chip to edit the message. In the scenario application, editing resources must be allocated and managed globally on an export chip, but this will make editing resource management more complex; in addition, when the message is edited on the egress chip, the edited message needs to be carried to the egress chip, which may also result in a waste of bandwidth of the chip interconnection port, and even a risk of network congestion.
Disclosure of Invention
The embodiment of the application provides a message processing method, a message forwarding method, a device and equipment.
The technical scheme of the application is realized as follows:
in a first aspect, a method for processing a packet is provided, where the method is applied to an ingress chip, and the method includes:
receiving a first message;
determining a port number of an outlet end for forwarding the first message and editing information for editing the first message according to a destination MAC address of the first message;
acquiring attribute information of the outlet end according to the port number of the outlet end;
editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
In the above technical solution, the method further includes:
marking the second message;
and sending the marked second message to an outlet chip contained in the equipment where the inlet chip is located, wherein the marked second message is used for the outlet chip to forward from the outlet end under the condition of not editing the message.
In the above technical solution, the obtaining the attribute information of the egress port according to the port number of the egress port includes:
and inquiring a port attribute table according to the port number of the outlet end to obtain attribute information of the outlet end.
In the above technical solution, the obtaining the attribute information of the egress port according to the port number of the egress port includes:
acquiring index interval information corresponding to the chip identifier of the outlet chip where the outlet end is located according to a mapping relation between the chip identifier and the index interval information in a preset index mapping table;
acquiring an index value of a port attribute table corresponding to the outlet end according to the index interval information;
and reading the attribute information of the outlet end from a port attribute table corresponding to the index value.
In the above technical solution, the index interval information corresponding to the chip identifier of the egress chip includes: and the chip identifier of the outlet chip corresponds to the base address of the port attribute table, the minimum port number and the maximum port number of the outlet chip.
In the above technical solution, the obtaining an index value of the port attribute table corresponding to the exit end according to the index interval information includes:
determining a difference between the port number of the egress port and the minimum port number as an offset;
and determining an index value of the port attribute table corresponding to the outlet end according to the offset and the base address of the port attribute table.
In the above technical solution, the editing the packet header of the first packet according to the attribute information and the editing information to obtain a second packet includes:
editing the three-layer packet header of the first message according to the editing information;
and editing the two-layer packet header and/or the three-layer packet header of the first message according to the attribute information.
In the above technical solution, the method further includes:
when the attribute information and the editing information conflict with each other in editing operation of the three-layer packet header of the first message, determining the priority of the attribute information;
and when the priority of the attribute information is higher than that of the editing information, editing the three-layer packet header of the first message according to the attribute information, otherwise, editing the three-layer packet header according to the editing information.
In a second aspect, a packet forwarding method is provided, which is applied to an egress chip, and the method includes:
receiving a message from an ingress chip;
determining whether a message received from the ingress chip is a second message, wherein the second message is: the inlet chip edits a packet head of the first packet to obtain a packet;
and when the message received from the inlet chip is the second message, forwarding the second message outwards through the outlet end under the condition of not editing the second message.
In the above technical solution, the determining whether the packet is a second packet obtained by editing a first packet includes:
determining whether a message received from the ingress chip carries an edited mark;
and when the message received from the inlet chip carries the edited mark, determining that the message received from the inlet chip is the second message.
In the above technical solution, the method further includes:
when the message received from the ingress chip is not the second message, receiving edit information of the message and attribute information of an egress port of the message received from the ingress chip;
editing a packet header of a message received from the inlet chip according to the editing information and the attribute information;
and forwarding the message with the edited packet header to the outside of the equipment where the outlet chip is located through the outlet end.
In a third aspect, a packet processing apparatus is provided, which is applied to an ingress chip, and includes:
the receiving module is used for receiving the first message;
a determining module, configured to determine, according to a destination MAC address of the first packet, a port number of an egress port for forwarding the first packet and edit information for editing the first packet;
the obtaining module is used for obtaining the attribute information of the outlet end according to the port number of the outlet end;
the editing module is used for editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
In a fourth aspect, a packet forwarding apparatus is provided, which is applied to an egress chip, and the apparatus includes:
the receiving module is used for receiving messages from the entrance chip;
a determining module, configured to determine whether a packet received from the ingress chip is a second packet, where the second packet is: the inlet chip edits a packet header of the first message to obtain a message;
and the sending module is used for forwarding the second message outwards through the outlet end under the condition of not editing the second message when the message received from the inlet chip is the second message.
In a fifth aspect, an electronic device is provided, which includes a memory and a processor, and is characterized in that the memory stores a computer program, and the processor is configured to execute the computer program to execute the message processing method according to the first aspect; alternatively, the processor is configured to run the computer program to execute the message forwarding method according to the second aspect.
A sixth aspect provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is configured to execute the message processing method of the first aspect when running; alternatively, the processor is configured to run the computer program to execute the message forwarding method according to the second aspect.
The message processing method, the message forwarding device and the message processing equipment are applied to an ingress chip, and by receiving a first message, according to a destination MAC address of the first message, a port number of an egress port for forwarding the first message and editing information for editing the first message are determined; acquiring attribute information of an outlet end according to the port number of the outlet end; editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is positioned by the inlet chip through the outlet end. Therefore, all editing actions of the message can be completed on the inlet chip of the message without editing the message on the outlet chip of the message, so that the message editing information obtained from the inlet chip is not required to be carried to the outlet chip, the problems that the management of editing resources is complex and the bandwidth of a chip interconnection port is wasted due to the fact that the message editing is realized on the outlet chip in the related technology are solved, the complexity of editing resource management is reduced, and meanwhile, the bandwidth of the chip interconnection port can be greatly saved.
Drawings
Fig. 1 is a flowchart of a message processing method according to an embodiment of the present application;
fig. 2 is another flowchart of a message processing method according to an embodiment of the present application;
fig. 3 is a flowchart of acquiring attribute information of an egress port according to an embodiment of the present application;
fig. 4 is a flowchart of a message forwarding method according to an embodiment of the present application;
fig. 5 is another flowchart of a message forwarding method according to an embodiment of the present application;
fig. 6 is a flowchart of a message processing and message forwarding method provided in an embodiment of the present application;
FIG. 7 is a diagram illustrating a global port index mapping table and an egress attribute table according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a message processing apparatus according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of a message forwarding apparatus according to an embodiment of the present application;
fig. 10 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. In the present application, the embodiments and features of the embodiments may be arbitrarily combined with each other without conflict. The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
It is to be understood that, unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
Furthermore, in the description of the present application, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present application, "a plurality" means two or more unless otherwise specified.
The embodiment of the present Application provides a message processing method, which may be applied to an entry chip of a message, where the chip may be an Application Specific Integrated Circuit (ASIC) chip, a Field Programmable Gate Array (FPGA) chip, or an NP chip, and may be adjusted accordingly according to actual conditions. Wherein, the entry chip includes: an ingress direction processing engine IPE, a store-and-forward module BSR, and an egress direction processing engine EPE.
As shown in fig. 1, an embodiment of the present application provides a message processing method, which is applied to an ingress chip, and the method may include the steps of:
s11, receiving a first message.
Here, the first packet refers to any received packet in general.
Specifically, after entering the ingress chip through the ingress port, the first message is received by the ingress processing engine module of the ingress chip.
S12, according to the destination MAC address of the first message, determining a port number of an outlet end for forwarding the first message and editing information for editing the first message.
The egress port is configured to forward the packet to the outside of the device where the ingress chip is located, where the editing information of the packet includes an editing operation on the packet, where the editing operation includes but is not limited to: delete, add, modify, and/or replace, etc.
Specifically, the port number of the output port corresponding to the destination MAC address may be searched in the forwarding table according to the destination MAC address in the first packet by the IPE of the ingress chip, the port number of the output port forwarding the first packet, the chip identifier of the egress chip, and the edit information index value of the first packet are obtained, a search result is obtained, and the search result and the first packet are forwarded to the EPE of the ingress chip through the BSR of the ingress chip.
The forwarding table includes two important pieces of information: the message editing method includes the steps that an editing information index value and export information are obtained, the editing information index value is used for indexing to a corresponding forwarding next hop to obtain editing information of a first message, the editing information index value can be represented by nexthoptr (namely, a next hop index value), and the nexthoptr is used for indexing DsNextHop to obtain message editing information. The egress information includes a port number of an egress port corresponding to the destination MAC address and a chip identifier of an egress chip where the egress port is located, where the chip identifier of the chip is a global identifier and can uniquely identify one chip.
Wherein the editing information may include two-layer header editing information and/or three-layer header editing information.
The two-layer header editing information includes: and editing information of at least one of a destination MAC address, a source MAC address, a Virtual Local Area Network (VLAN) header and an outer VLAN header.
The three-layer header editing information includes, but is not limited to: IPv4 (Internet Protocol Version 4, fourth Version of the Internet Protocol), IPv6 (Internet Protocol Version 6, sixth Version of the Internet Protocol), and ARP (address resolution Protocol) messages.
The editing information of the IPv4 message includes, but is not limited to: the protocol field of the IPv4 packet, TTL (Time To Live), ECN (Explicit Congestion Notification protocol), DSCP (Differentiated Services Code Point), destination IP address, and edit information of the source IP address.
The editing information of the IPv6 message includes, but is not limited to: and editing information of a flow label, a protocol field, TTL, ECN, DSCP, a destination IP address and a source IP address of the IPv6 message.
The edit information of the ARP message includes, but is not limited to: and the destination end protocol address, the destination end hardware address, the sending end protocol address, the sending end hardware address, the protocol type and the hardware type of the ARP message.
And S13, acquiring attribute information of the outlet end according to the port number of the outlet end.
The attribute information of the egress port includes two-layer header editing information and/or three-layer header editing information, where the two-layer header editing information is, for example: the processing rules of the VLAN tags in the inner-layer VLAN header and the outer-layer VLAN header are used for correspondingly editing the VLAN tag carried by the first message, wherein the processing rules of the VLAN tag comprise insertion, deletion, change or replacement; for example, whether to strip off a vlan tag of a virtual local area network carried by a message, a default vlan value on a port, and the like; the three layers of header editing information are, for example: DSCP, edit information of destination IP address and source IP address, and the like.
Specifically, the EPE of the entry chip receives a search result of the first packet forwarded by the BSR, and indexes a corresponding forwarding next hop according to an edit information index value in the search result to obtain edit information of the first packet.
S14, editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
Specifically, the packet header of the first packet is edited by the EPE of the ingress chip according to the attribute information and the editing information to obtain the second packet.
The message processing method is applied to an inlet chip, and the port number of an outlet end for forwarding the first message and the editing information for editing the first message are determined according to the destination MAC address of the first message by receiving the first message; acquiring attribute information of an outlet end according to the port number of the outlet end; editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end. Therefore, all editing actions of the message can be completed on the inlet chip of the message without editing the message on the outlet chip of the message, so that the message editing information obtained from the inlet chip is not required to be carried to the outlet chip, the problems that the management of editing resources is complex and the bandwidth of a chip interconnection port is wasted due to the fact that the message editing is realized on the outlet chip in the related technology are solved, the complexity of editing resource management is reduced, and meanwhile, the bandwidth of the chip interconnection port can be greatly saved.
In one embodiment, as shown in fig. 2, based on fig. 1, the method may further include:
and S15, marking the second message.
Specifically, the EPE of the ingress chip marks an edited flag for the second packet, where the edited flag may be nexthhopPtr (next hop index value with skip flag) of bypass to indicate that the egress chip of the second packet skips performing indexing on the second packet to a corresponding forwarding next hop, that is, skips reading the packet editing information.
And S16, sending the marked second message to an outlet chip contained in the equipment where the inlet chip is located, wherein the marked second message is used for the outlet chip to transmit from the outlet end to the outside under the condition that the message is not edited.
Here, the interconnection between the ingress chip of the message and the egress chip of the message may be virtualized as a network device, and an interconnection port is provided between the egress chip and the ingress chip.
Specifically, the EPE of the ingress chip sends the second message carrying the edited flag to the egress chip on which the egress port is located through the chip interconnect port.
In this embodiment, the marked second message is sent to the egress chip, and the marked second message is used for the egress chip to forward from the egress port to the outside without editing the message, so that the egress chip does not need to edit the second message and directly forward the second message from the egress port to the outside, and the message editing information obtained from the ingress chip does not need to be carried to the egress chip, thereby reducing the complexity of the egress chip in managing editing resources, and greatly saving the bandwidth of the chip interconnection port.
In one embodiment, in step S13, the attribute information of the egress port is obtained according to the port number of the egress port, and the process may include:
and inquiring the port attribute table according to the port number of the outlet end to obtain the attribute information of the outlet end.
The port attribute table is pre-stored on the inlet chip and records attribute information of different ports.
In one example, the port number of the egress port may be a global identifier, and the global identifier can uniquely identify one port, for example, for chip a and chip B having 10 ports respectively, the ports of chip a may be identified as port 1 to port 10, and the ports of chip B may be identified as port 11 to port 20.
In specific implementation, the port attribute table may be queried according to the global identifier of the egress port to obtain the attribute information of the egress port.
In another example, the port number of the egress port is used to uniquely identify a port on one chip.
In specific implementation, the port attribute table of the egress chip may be queried according to the port number of the egress port and the chip identifier of the egress chip where the egress port is located, so as to obtain the attribute information of the egress port.
In an embodiment, as shown in fig. 3, in step S13, the obtaining attribute information of the egress port according to the port number of the egress port may include:
s131, according to the mapping relation between the chip identification and the index interval information in the preset index mapping table, obtaining the index interval information corresponding to the chip identification of the outlet chip where the outlet end is located.
The preset index mapping table may be a global port index mapping table pre-stored in the first chip, and index interval information corresponding to different chip identifiers in the preset index mapping table is different.
Specifically, the preset index mapping table may be indexed based on a chip identifier of the export chip, so as to obtain index interval information corresponding to the chip identifier of the export chip.
S132, according to the index interval information, obtaining an index value of the port attribute table corresponding to the outlet end.
The index interval information corresponding to the chip identifier of the egress chip may include: and the chip identifier of the outlet chip corresponds to the base address of the port attribute table, the minimum port number and the maximum port number of the outlet chip. Here, the port attribute table may be a global port attribute table stored in advance in the ingress chip, and the port attribute table stores port information related to message editing, such as whether to strip off a vlan tag, a default vlan tag value, and the like.
It can be understood that the index interval information corresponding to the chip identifier of the egress chip may further include index values corresponding to different ports of the egress chip, and the index values of the ports may be used to obtain the attribute information of the ports.
In one example, the process may include:
and determining the difference between the port number of the outlet end and the minimum port number as an offset, and determining the index value of the port attribute table corresponding to the outlet end according to the offset and the base address of the port attribute table.
Specifically, the index value of the global port attribute table corresponding to the egress port may be obtained by calculation according to a formula, where the formula is: index value = base address of global port attribute table + egress port number-minimum port number.
After the index value is obtained through calculation, the attribute information of the port can be obtained based on the index value.
Optionally, before step S132, the method may further include:
and judging whether the port number of the outlet end is valid according to the maximum port number and the minimum port number in the index interval information, if the port number is valid, executing the step S132, and if the port number is invalid, discarding the first message, wherein the valid port number is between the minimum port number and the maximum port number.
And S133, reading the attribute information of the outlet end from the port attribute table corresponding to the index value.
In this embodiment, the index interval information corresponding to the chip identifier of the egress chip is obtained through the preset index mapping table, the index value of the port attribute table corresponding to the egress port is obtained according to the index interval information, and the attribute information of the egress port is read from the port attribute table corresponding to the index value, so that the purpose that the attribute information of the egress port is obtained at the ingress chip is achieved, and the attribute information of the egress port can be quickly obtained; in addition, the export attribute table is not fixedly allocated, but the range of the export attribute table is obtained by taking the global chip ID as an index, so that dynamic and flexible allocation of each chip can be realized.
In an embodiment, in the step S14, editing the header of the first packet according to the attribute information and the editing information to obtain the second packet, which may include:
editing the three-layer packet header of the first message according to the editing information, and editing the two-layer packet header and/or the three-layer packet header of the first message according to the attribute information.
Specifically, the two-layer packet header of the first packet is edited according to the two-layer header editing information in the editing information, the three-layer packet header of the first packet is edited according to the three-layer header editing information in the editing information, the two-layer packet header of the first packet is edited according to the attribute information, and the edited first packet is determined as the second packet.
In specific implementation, the two-layer packet header of the first message can be edited according to the editing information of at least one of the destination MAC address, the source MAC address, the inner-layer VLAN header and the outer-layer VLAN header; editing a three-layer packet header of the first message according to the editing information of one of the IPv4, IPv6 and ARP messages; and editing a two-layer packet header of the first message according to a virtual local area network vlan tag processing rule included in the attribute information, so that the edited first message has a virtual local area network tag of the output port.
In one embodiment, the method may further comprise:
when the attribute information and the editing information conflict with each other in editing operation of the three-layer packet header of the first message, determining the priority of the attribute information, editing the three-layer packet header of the first message according to the attribute information when the priority of the attribute information is higher than that of the editing information, and otherwise, editing the three-layer packet header according to the editing information.
The corresponding priorities may be set for the editing operations of the attribute information and the message by the editing information according to the actual application requirements, for example, the priority of the attribute information is set to be higher than the priority of the editing information, and at this time, the two-layer packet header of the first message is edited according to the attribute information, but the embodiment of the present application is not limited thereto.
In this embodiment, there may be a situation that both the attribute information and the edit information perform an edit operation on the three-layer packet header of the first packet, and when it is determined that the priority of the attribute information is higher than the priority of the edit information, the two-layer packet header of the first packet is edited according to the priority of the attribute information, so that it can be ensured that the first packet can be edited normally.
Based on the message processing method provided in the foregoing embodiment, an embodiment of the present Application further provides a message forwarding method, where the method is applied to an egress chip of a message, and the chip may be an Application Specific Integrated Circuit (ASIC) chip, a Field Programmable Gate Array (FPGA) chip, or an NP, and may be adjusted accordingly according to actual conditions. Wherein, export the chip and include: an ingress direction processing engine IPE, a store-and-forward module BSR, and an egress direction processing engine EPE.
As shown in fig. 4, an embodiment of the present application provides a packet forwarding method, which is applied to an egress chip, and the method may include the steps of:
and S21, receiving a message from the entrance chip.
Specifically, the packet is sent from the ingress chip to the egress chip through a chip interconnection port between the ingress chip and the egress chip, and after the ingress packet reaches the egress chip, the packet is received by an ingress direction processing engine IPE of the egress chip, and the packet is forwarded to an EPE of the egress chip through a BSR of the egress chip.
S22, determining whether the message received from the inlet chip is a second message, wherein the second message is: and the inlet chip edits the packet head of the first message to obtain a message.
Specifically, it is determined by the EPE of the egress chip whether the message received from the ingress chip is the second message.
In one example, the process may include:
whether the message received from the ingress chip carries the edited flag or not may be determined, and when the message received from the ingress chip carries the edited flag, the message received from the ingress chip is determined to be the second message.
And S23, when the message received from the inlet chip is the second message, the second message is forwarded outwards through the outlet end under the condition that the second message is not edited.
Specifically, when the message is determined to be the second message through the EPE of the egress chip, the message is directly forwarded to the outside through the egress port.
The message forwarding method is applied to an exit chip, and determines whether a message received from an entrance chip is a second message by receiving the message from the entrance chip, wherein the second message is: the inlet chip edits a packet header of the first message to obtain a message; and when the message received from the inlet chip is a second message, forwarding the second message outwards through the outlet end under the condition of not editing the second message. Because all editing actions of the message can be completed on the inlet chip of the message, after the outlet chip determines that the message received from the inlet chip is the second message obtained by editing the packet header of the first message by the inlet chip, the outlet chip does not need to obtain editing information from the inlet chip to edit the message, and the message is forwarded to the outside of the equipment where the outlet chip is located through the outlet end, so that the problems that the management of editing resources is complex and the bandwidth of the chip interconnection port is wasted due to the fact that the message editing is realized on the outlet chip in the related art are solved, the complexity of editing resource management is reduced, and meanwhile, the bandwidth of the chip interconnection port can be greatly saved.
In one embodiment, as shown in fig. 5, based on fig. 4, the method may further include:
and S24, when the message received from the inlet chip is not the second message, receiving the editing information of the message from the inlet chip and the attribute information of the outlet end of the message received from the inlet chip.
Specifically, the edit information of the packet and the attribute information of the egress port are received by the ingress direction processing engine IPE of the egress chip, and the edit information and the attribute information are forwarded to the EPE of the egress chip through the BSR of the egress chip.
And S25, editing the packet header of the message received from the entrance chip according to the editing information and the attribute information.
Specifically, the EPE of the egress chip edits the packet header of the packet received from the ingress chip according to the edit information and the attribute information.
The implementation process of this step may refer to step S14 in the above embodiment, and is not described herein again.
And S26, forwarding the message with the edited packet header to the outside of the equipment where the outlet chip is located through the outlet end.
In this embodiment, when the message received from the ingress chip is not an edited message, the message may be edited on the egress chip according to the edit information of the message received from the ingress chip and the attribute information of the egress end of the message.
The following describes, by taking a stacking system as an example, a message processing flow of an ingress chip and a message forwarding flow of an egress chip with reference to fig. 6. The stacking system comprises an inlet chip and an outlet chip which are stacked, wherein one of the two stacked chips is defined as the inlet chip, and the chip connected with the inlet chip and positioned at the downstream of the inlet chip is correspondingly defined as the outlet chip.
As shown in fig. 6, the message processing flow of the ingress chip is as follows:
1. after a message enters an inlet CHIP from a network port, an IPE module of the inlet CHIP obtains a destPort and a nexthopPtr by searching a forwarding table, wherein the destPort represents destination outlet information, the destination outlet information comprises a CHIP ID and an outlet port number of the outlet CHIP, and the nexthopPtr is used for indexing DsNextHop to obtain message editing information;
2. the message is stored through a BSR module, and the message, destPort and nexthopPtr are sent to an EPE module for message editing;
3. in an EPE module, reading a DsNexthop table through nexthoPtr to obtain the editing information of a message, when detecting that a CHIP where an outlet end is positioned is not a local CHIP (namely the CHIP ID of the outlet is not equal to the local CHIP ID), indexing according to the CHIP ID in destPort to obtain a global port index mapping table, wherein the global port index mapping table stores the base address, the maximum port number and the minimum port number of a global outlet attribute table; the global port index mapping table and the egress attribute table may be as shown in fig. 7.
4. Judging whether the port number is valid according to the maximum port number and the minimum port number stored in the exit port number and global port index mapping table, if the port number is valid, executing the step 5, and if the port number is invalid, discarding the message; wherein the valid port number should be between the minimum port number and the maximum port number;
5. according to the base address, the exit port number and the minimum port number of the global exit attribute table in the global port index mapping table, calculating the index value of the global port attribute table according to the following formula:
index value = base address + egress port number-minimum port number of global port attribute table;
6. indexing according to the index value to obtain a global port attribute table;
7. and correspondingly editing the message according to the editing information of the message and the port attribute in the global port attribute table to finish all editing behaviors of the message.
8. Marking a bypass nexthopPtr of the bypass for the edited message, and sending the bypass nexthopPtr and destPort carried by the edited message to the egress chip.
As shown in fig. 6, the message forwarding flow of the egress chip is as follows:
1. after the edited message enters the outlet chip, skipping the forwarding table for searching in an IPE module of the outlet chip;
2. the message is forwarded to the EPE module through the BSR module;
3. and the EPE module reads the DsNexthop table, if the message is found to be the Nexthop of bypass, the reading of DsDestPort is skipped, no editing is performed on the message, and the message is only forwarded to the corresponding port.
As can be seen from the above, the method provided in the embodiment of the present application can reduce the message editing mode in the stacking system to a single chip, that is, an entry chip of the message, with a centralized CPU, so that the management is very simple, and the bandwidth of the interconnection port can be greatly saved.
As shown in fig. 8, an embodiment of the present application provides a message processing apparatus, which is applied to an ingress chip, and the apparatus may include:
a receiving module 801, configured to receive a first packet;
a determining module 802, configured to determine, according to a destination MAC address of the first packet, a port number of an egress port for forwarding the first packet and edit information for editing the first packet;
an obtaining module 803, configured to obtain attribute information of an egress port according to a port number of the egress port;
the editing module 804 is configured to edit the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
In one embodiment, the apparatus further comprises:
the marking module is used for marking the second message;
and the sending module is used for sending the marked second message to an outlet chip contained in the equipment where the inlet chip is located, wherein the marked second message is used for the outlet chip to forward outwards from an outlet end under the condition that the message is not edited.
In one embodiment, the obtaining module is specifically configured to:
and inquiring the port attribute table according to the port number of the outlet end to obtain the attribute information of the outlet end.
In one embodiment, the obtaining module is specifically configured to:
acquiring index interval information corresponding to the chip identifier of the outlet chip at which the outlet end is positioned according to the mapping relation between the chip identifier and the index interval information in the preset index mapping table;
acquiring an index value of a port attribute table corresponding to the outlet end according to the index interval information;
and reading the attribute information of the outlet end from the port attribute table corresponding to the index value.
In one embodiment, the index interval information corresponding to the chip identifier of the egress chip includes: and the chip identifier of the outlet chip corresponds to the base address of the port attribute table, the minimum port number and the maximum port number of the outlet chip.
In one embodiment, the obtaining module is configured to obtain, according to the index interval information, an index value of a port attribute table corresponding to the egress end, and includes:
determining a difference value between the port number of the outlet end and the minimum port number as an offset;
and determining the index value of the port attribute table corresponding to the port end according to the offset and the base address of the port attribute table.
In one embodiment, the editing module is specifically configured to:
editing a three-layer packet header of the first message according to the editing information;
and editing the two-layer packet header and/or the three-layer packet header of the first message according to the attribute information.
In one embodiment, the editing module is further specifically configured to:
when the attribute information and the editing information conflict with the editing operation of the three-layer packet header of the first message, determining the priority of the attribute information;
and when the priority of the attribute information is higher than that of the editing information, editing the three-layer packet header of the first message according to the attribute information, otherwise, editing the three-layer packet header according to the editing information.
It should be noted that: in the message processing apparatus provided in the foregoing embodiment, when executing the message processing method, only the division of each program module is illustrated, and in practical applications, the processing allocation may be completed by different program modules according to needs, that is, the internal structure of the apparatus is divided into different program modules, so as to complete all or part of the above-described processing. In addition, the message processing apparatus and the message processing method provided in the foregoing embodiments belong to the same concept, and specific implementation processes thereof are described in detail in the method embodiments and are not described herein again.
As shown in fig. 9, an embodiment of the present application provides a packet forwarding apparatus, which is applied to an egress chip, and the apparatus may include:
a receiving module 901, configured to receive a message from an ingress chip;
a determining module 902, configured to determine whether a packet received from the ingress chip is a second packet, where the second packet is: the inlet chip edits a packet header of the first message to obtain a message;
a sending module 903, configured to forward the second packet outwards through the egress port without editing the second packet when the packet received from the ingress chip is the second packet.
In one embodiment, the determining module is specifically configured to:
determining whether a message received from an ingress chip carries an edited mark;
and when the message received from the inlet chip carries the edited mark, determining that the message received from the inlet chip is a second message.
In one embodiment, the apparatus further comprises an editing module:
the receiving module is further used for receiving the editing information of the message and the attribute information of the outlet end of the message received from the inlet chip when the message received from the inlet chip is not the second message;
the editing module is used for editing the packet header of the message received from the inlet chip according to the editing information and the attribute information;
and the sending module is also used for forwarding the message with the edited packet header to the outside of the equipment where the outlet chip is located through the outlet end.
It should be noted that: in the message forwarding apparatus provided in the foregoing embodiment, when executing the message forwarding method, only the division of each program module is taken as an example, and in practical applications, the processing distribution may be completed by different program modules according to needs, that is, the internal structure of the apparatus is divided into different program modules, so as to complete all or part of the processing described above. In addition, the message forwarding apparatus and the message forwarding method provided in the foregoing embodiments belong to the same concept, and specific implementation processes thereof are described in detail in the method embodiments, and are not described herein again.
An embodiment of the present application further provides an electronic device, including: a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein:
when the electronic device is applied to the message processing method, the processor executes the computer program to realize the steps of the message processing method in any embodiment of the application;
when the electronic device is applied to the message forwarding method, the processor executes the computer program to implement the steps of any message forwarding method in the embodiments of the present application.
Fig. 10 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application, where the electronic device 1000 shown in fig. 10 includes: at least one processor 1001, memory 1002, at least one network interface 1003. The various components in the electronic device 1000 are coupled together by a bus system 1004. It is understood that the bus system 1004 is used to enable communications among the components. The bus system 1004 includes a power bus, a control bus, and a status signal bus in addition to a data bus. But for the sake of clarity the various busses are labeled in fig. 10 as the bus system 1004.
It will be appreciated that the memory 1002 can be either volatile memory or nonvolatile memory, and can include both volatile and nonvolatile memory.
The memory 1002 in the present embodiment is used to store various types of data to support the operation of the electronic device 900. Examples of such data include: any computer program for operating on the electronic device 1000, such as the executable program 10021, can be included in the executable program 10021, and the program implementing the method of the embodiment of the present application can be included in the executable program 10021.
The embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored in the storage medium, and when the computer-readable storage medium is applied to a message processing method, when the computer program is executed by a processor, the steps in any message processing method in the embodiment of the present application are implemented;
when the computer-readable storage medium is applied to the message forwarding method, when the computer program is executed by the processor, the steps of the message forwarding method in any of the above embodiments are implemented.
It should be noted that the storage medium of the embodiments of the present application may be implemented by any type of volatile or non-volatile storage device, or a combination thereof. The nonvolatile Memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a magnetic Random Access Memory (FRAM), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical Disc, or a Compact Disc Read-Only Memory (CD-ROM); the magnetic surface storage may be disk storage or tape storage. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration, and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), synchronous Static Random Access Memory (SSRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), double Data Rate Synchronous Random Access Memory (ESDRAM), enhanced Synchronous Dynamic Random Access Memory (ESDRAM), enhanced Synchronous Random Access Memory (DRAM), synchronous Random Access Memory (DRAM), direct Random Access Memory (DRmb Access Memory). The storage media described in embodiments herein are intended to comprise, without being limited to, these and any other suitable types of memory.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of a unit is only one logical function division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or in other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be separately regarded as one unit, or two or more units may be integrated into one unit; the integrated unit may be implemented in the form of hardware, or in the form of hardware plus a software functional unit.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: a mobile storage device, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Alternatively, the integrated unit described above may be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially implemented or portions thereof that contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling an electronic device (which may be a personal computer, a server, or a network device) to execute all or part of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a removable storage device, a ROM, a RAM, a magnetic or optical disk, or various other media that can store program code.
The methods disclosed in the several method embodiments provided in the present application may be combined arbitrarily without conflict to obtain new method embodiments.
The features disclosed in the several product embodiments presented in this application can be combined arbitrarily, without conflict, to arrive at new product embodiments.
The features disclosed in the several method or apparatus embodiments provided in the present application may be combined arbitrarily, without conflict, to arrive at new method embodiments or apparatus embodiments.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (15)
1. A message processing method is applied to an ingress chip, and the method comprises the following steps:
receiving a first message;
determining a port number of an outlet end for forwarding the first message and editing information for editing the first message according to a destination MAC address of the first message;
acquiring attribute information of the outlet end according to the port number of the outlet end;
editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
2. The method of claim 1, further comprising:
marking the second message;
and sending the marked second message to an outlet chip contained in the equipment where the inlet chip is located, wherein the marked second message is used for the outlet chip to transmit from the outlet end to the outside under the condition that the outlet chip does not edit the message.
3. The method according to claim 1 or 2, wherein the obtaining attribute information of the egress port according to the port number of the egress port comprises:
and inquiring a port attribute table according to the port number of the outlet end to obtain attribute information of the outlet end.
4. The method according to claim 1 or 2, wherein the obtaining attribute information of the egress port according to the port number of the egress port comprises:
acquiring index interval information corresponding to the chip identifier of the outlet chip where the outlet end is located according to a mapping relation between the chip identifier and the index interval information in a preset index mapping table;
acquiring an index value of a port attribute table corresponding to the outlet end according to the index interval information;
and reading the attribute information of the outlet end from a port attribute table corresponding to the index value.
5. The method of claim 4, wherein the index interval information corresponding to the chip identifier of the egress chip comprises: and the chip identifier of the outlet chip corresponds to the base address of the port attribute table, the minimum port number and the maximum port number of the outlet chip.
6. The method according to claim 5, wherein the obtaining an index value of a port attribute table corresponding to the egress end according to the index interval information comprises:
determining a difference between the port number of the egress port and the minimum port number as an offset;
and determining an index value of the port attribute table corresponding to the outlet end according to the offset and the base address of the port attribute table.
7. The method according to claim 1, wherein the editing the header of the first packet according to the attribute information and the editing information to obtain a second packet comprises:
editing the three-layer packet header of the first message according to the editing information;
and editing the two-layer packet header and/or the three-layer packet header of the first message according to the attribute information.
8. The method of claim 7, further comprising:
when the attribute information and the editing information conflict with each other in editing operation of the three-layer packet header of the first message, determining the priority of the attribute information;
and when the priority of the attribute information is higher than that of the editing information, editing the three-layer packet header of the first message according to the attribute information, otherwise, editing the three-layer packet header according to the editing information.
9. A message forwarding method is applied to an egress chip, and the method comprises the following steps:
receiving a message from an ingress chip;
determining whether a message received from the ingress chip is a second message, wherein the second message is: the inlet chip edits a packet header of the first message to obtain a message;
and when the message received from the inlet chip is the second message, forwarding the second message outwards through the outlet end under the condition of not editing the second message.
10. The method of claim 9, wherein determining whether the message is a second message obtained by editing a first message comprises:
determining whether a message received from the ingress chip carries an edited tag;
and when the message received from the inlet chip carries the edited mark, determining that the message received from the inlet chip is the second message.
11. The method of claim 9, further comprising:
when the message received from the ingress chip is not the second message, receiving edit information of the message and attribute information of an egress port of the message received from the ingress chip;
editing a packet header of a message received from the inlet chip according to the editing information and the attribute information;
and forwarding the message with the edited packet header to the outside of the equipment where the outlet chip is located through the outlet end.
12. A message processing apparatus, applied to an ingress chip, the apparatus comprising:
the receiving module is used for receiving a first message;
a determining module, configured to determine, according to a destination MAC address of the first packet, a port number of an egress port for forwarding the first packet and edit information for editing the first packet;
the acquisition module is used for acquiring the attribute information of the outlet end according to the port number of the outlet end;
the editing module is used for editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and the second message is forwarded to the outside of the equipment where the inlet chip is located by the inlet chip through the outlet end.
13. A message forwarding apparatus applied to an egress chip, the apparatus comprising:
the receiving module is used for receiving messages from the entrance chip;
a determining module, configured to determine whether a packet received from the ingress chip is a second packet, where the second packet is: the inlet chip edits a packet header of the first message to obtain a message;
and the sending module is used for forwarding the second message outwards through the outlet end under the condition of not editing the second message when the message received from the inlet chip is the second message.
14. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and the processor is configured to execute the computer program to perform the message processing method according to any one of claims 1 to 8; alternatively, the processor is arranged to run the computer program to perform the message forwarding method of any of the claims 9 to 11.
15. A computer-readable storage medium, in which a computer program is stored, wherein the computer program is arranged to execute the message processing method according to any one of claims 1 to 8 when executed; alternatively, the processor is arranged to run the computer program to perform the message forwarding method of any of claims 9 to 11.
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