CN115913857B - Data processing method, device, radio frequency unit, base station and storage medium - Google Patents

Data processing method, device, radio frequency unit, base station and storage medium Download PDF

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CN115913857B
CN115913857B CN202211109209.2A CN202211109209A CN115913857B CN 115913857 B CN115913857 B CN 115913857B CN 202211109209 A CN202211109209 A CN 202211109209A CN 115913857 B CN115913857 B CN 115913857B
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processed
dft
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dft module
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CN115913857A (en
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盛磊
魏斌
张兵
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Chengdu Nts Software Co ltd
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Chengdu Nts Software Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The invention provides a data processing method, a data processing device, a radio frequency unit, a base station and a storage medium, and relates to the field of communication. Under the condition that a radio frequency unit of a base station receives a sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode, acquiring a sequence link direction and a sequence length of the sequence to be processed; determining whether complex conjugate operation is carried out on a sequence to be processed according to the sequence link direction to obtain a target sequence; and determining to call the first DFT module for a single time according to the sequence length, or call the first DFT module and the second DFT module for a plurality of times to process the target sequence, so as to obtain a processing result sequence. Because the radio frequency unit is in a time division duplex mode, time slots are arranged at intervals when the uplink and downlink states are switched to ensure that FFT/IFFT processing of a sequence to be processed can be completed; meanwhile, the time division multiplexing scheduling of the first DFT module and the second DFT module greatly reduces the consumption of storage space and computing resources and improves the utilization rate of the computing resources.

Description

Data processing method, device, radio frequency unit, base station and storage medium
Technical Field
The present invention relates to the field of communications, and in particular, to a data processing method, apparatus, radio frequency unit, base station, and storage medium.
Background
Discrete fourier transform (Discrete Fourier Transform, DFT) is widely used in the fields of communication, signal analysis, etc., for converting discrete time domain data and discrete frequency domain data. In general, when performing DFT, a fast fourier transform (Fast Fourier Transform, FFT) technique is used to improve the processing efficiency.
With the development of wireless communication technology, ORAN (Open Radio Access Network ) alliance divides a base station system into O-CU (control unit), O-DU (distribution unit), O-RU (radio frequency unit). Due to the requirements of large bandwidth, low delay and high accuracy of the NR (New Radio) system, the conventional DU carries a physical layer function including fast fourier transform (inverse fourier transform), and transmits time domain information of a Radio frequency in final transmission to the RU through a forward optical link, which brings great data flux and transmission pressure to the forward link between the DU and the RU, thereby causing drawbacks and disadvantages in various aspects such as cost, stability, energy consumption and the like. The Option7-2 slicing scheme integrates a fast fourier transform (inverse fourier transform) function in physical layer processing of a conventional DU bearer in an RU, and the packetized transmission of frequency domain information significantly reduces the bandwidth requirement and transmission pressure of a forward link between the DU and the RU. However, this slicing scheme places higher demands on the processor capabilities of the RU.
If the acceleration method for Fourier transformation in the traditional communication base station is adopted, a large amount of storage resources are occupied, and great energy consumption performance and equipment cost pressure are brought to the large-scale deployment of the RU of ORAN Option-2.
Disclosure of Invention
Accordingly, an object of the present invention is to provide a data processing method, apparatus, radio frequency unit, base station and storage medium, which can improve the utilization rate of RU computing resources and reduce the consumption of memory space and computing resources.
In order to achieve the above object, the technical scheme adopted by the embodiment of the invention is as follows:
in a first aspect, the present invention provides a data processing method, the method comprising:
Under the condition that a radio frequency unit of a base station receives a sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode, acquiring a sequence link direction and a sequence length of the sequence to be processed;
Determining whether complex conjugate operation is carried out on the sequence to be processed according to the sequence link direction to obtain a target sequence;
Determining to call a first DFT module for a single time according to the sequence length, or call the first DFT module and a second DFT module for a plurality of times to process the target sequence, so as to obtain a processing result sequence; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer and P is the power of 2.
In an optional embodiment, the determining, according to the sequence link direction, whether to perform complex conjugate operation on the sequence to be processed to obtain a target sequence includes:
if the sequence link direction is the uplink direction, complex conjugate operation is not carried out on the sequence to be processed, and the sequence to be processed is determined to be a target sequence;
And if the sequence link direction is the downlink direction, performing complex conjugate operation on the sequence to be processed, and determining the data subjected to the complex conjugate operation as a target sequence.
In an optional implementation manner, the determining, according to the sequence length, to call a first DFT module once, or call the first DFT module and a second DFT module multiple times to process the target sequence, so as to obtain a processing result sequence, includes:
If the sequence length is Q and Q is the power of 2, the first DFT module is called for carrying out Q-point DFT operation on the target sequence for a single time to obtain a processing result sequence;
If the sequence length is KxM and M is the power of 2, calling the first DFT module for K times to perform M-point DFT operation on the target sequence to obtain an operation result sequence, and calling the second DFT module for M times to perform K-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
In an alternative embodiment, the method further comprises:
determining an index sequence corresponding to the processing result sequence according to the sequence length; the numerical values in the index sequence are used for representing the arrangement sequence of the result data in the processing result sequence;
and synchronously outputting the processing result sequence and the index sequence according to the sequence link direction.
In an optional implementation manner, the step of synchronously outputting the processing result sequence and the data index of each result data according to the sequence link direction includes:
if the sequence link direction is the uplink direction, synchronously outputting the processing result sequence and the index sequence;
And if the sequence link direction is the downlink direction, performing complex conjugate operation and power scaling processing on the result data in the processing result sequence, and synchronously outputting the processed processing result sequence and the index sequence.
In a second aspect, the present invention provides a data processing apparatus, the apparatus comprising:
The acquisition module is used for acquiring the sequence link direction and the sequence length of the sequence to be processed under the condition that the radio frequency unit of the base station receives the sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode;
the input arbitration module is used for determining whether complex conjugate operation is carried out on the sequence to be processed according to the sequence link direction to obtain a target sequence;
the processing module is used for determining that the first DFT module is called for one time according to the sequence length, or the first DFT module and the second DFT module are called for multiple times to process the target sequence, so that a processing result sequence is obtained; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer and P is the power of 2.
In an alternative embodiment, the processing module is configured to:
If the sequence length is Q and Q is the power of 2, the first DFT module is called for carrying out Q-point DFT operation on the target sequence for a single time to obtain a processing result sequence;
If the sequence length is KxM and M is the power of 2, calling the first DFT module for K times to perform M-point DFT operation on the target sequence to obtain an operation result sequence, and calling the second DFT module for M times to perform K-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
In a third aspect, the invention provides a radio frequency unit comprising a processor and a memory storing a computer program executable by the processor, the computer program implementing a method according to any of the preceding embodiments when executed by the processor.
In a fourth aspect, the present invention provides a base station, including a radio frequency unit according to the foregoing embodiment.
In a fifth aspect, the present invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method according to any of the preceding embodiments.
The data processing method, the device, the radio frequency unit, the base station and the storage medium provided by the embodiment of the invention acquire the sequence link direction and the sequence length of the sequence to be processed under the condition that the radio frequency unit of the base station receives the sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode; determining whether complex conjugate operation is carried out on a sequence to be processed according to the sequence link direction to obtain a target sequence; determining whether to call the first DFT module once or call the first DFT module and the second DFT module for multiple times according to the sequence length to process the target sequence to obtain a processing result sequence; the first DFT module is used for executing P-point DFT operation, and the second DFT module is used for executing K-point DFT operation; p, K is a positive integer and P is the power of 2. Because the radio frequency unit is in a time division duplex mode, an interval time slot (slot) exists when the uplink and downlink states are switched, so that FFT/IFFT processing of a sequence to be processed can be completed; meanwhile, the time division multiplexing scheduling of the first DFT module and the second DFT module is performed in the uplink and downlink states, so that the consumption of storage space and computing resources is greatly reduced, and the utilization rate of the computing resources is improved.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of another method for processing data according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
FIG. 4 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
FIG. 5 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
FIG. 6 is a functional block diagram of a data processing apparatus according to an embodiment of the present invention;
FIG. 7 is a functional block diagram of a data processing apparatus according to an embodiment of the present invention;
Fig. 8 shows a block diagram of a radio frequency unit according to an embodiment of the present invention.
Icon: 600-a data processing device; 610-an acquisition module; 620-an input arbitration module; 630-a processing module; 640-an output arbitration module; 700-radio frequency unit; 710—memory; 720-a processor; 730-communication module.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
It is noted that relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Since the Option7-2 slicing scheme integrates the FFT/IFFT function in the physical layer processing carried by the conventional DU into RU, a part of the baseband processing physical layer originally located in the DU is added to RU product based on ORAN Option-2, and the processing algorithm of the part requires data conversion of the time domain and the frequency domain of the uplink and downlink signals, so that the used FFT/IFFT processing occupies a large amount of memory resources (BRAM) and internal digital processing units (DSP). Especially for multi-antenna application, the chip cost is greatly increased, the instantiation area of a logic program is increased, and the difficulty of timing sequence convergence is increased.
Based on this, the embodiment of the invention provides a data processing method, a device, a radio frequency unit, a base station and a storage medium, which complete the FFT/IFFT processing of uplink and downlink time division multiplexing by time division multiplexing scheduling of a first DFT module and a second DFT module in an uplink and downlink state, improve the utilization rate of RU computing resources and reduce the consumption of storage space and computing resources.
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Referring to fig. 1, a flow chart of a data processing method according to an embodiment of the invention is shown. It should be noted that, the data processing method according to the embodiment of the present invention is not limited by fig. 1 and the following specific sequence, and it should be understood that, in other embodiments, the sequence of part of the steps in the data processing method according to the embodiment of the present invention may be interchanged according to actual needs, or part of the steps may be omitted or deleted. The data processing method may be applied to a radio frequency unit of a base station, and a detailed description will be given below of a specific flow shown in fig. 1.
Step S101, when the radio frequency unit of the base station receives the sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode, the sequence link direction and the sequence length of the sequence to be processed are obtained.
In this embodiment, for a radio frequency unit (RU/RRU) applied to a time division duplex (Time Division Duplexing, TDD) mode, after receiving a sequence to be processed, the sequence link direction and the sequence length of the sequence to be processed need to be obtained.
The sequence link direction can be determined according to the uplink and downlink air interface states of the operation of the radio frequency unit, and if the radio frequency unit is in the uplink state, the sequence link direction of the sequence to be processed can be determined to be the uplink direction; if the radio frequency unit works in the downlink state, the sequence link direction of the sequence to be processed can be determined to be the downlink direction.
Step S102, determining whether to perform complex conjugate operation on the sequence to be processed according to the sequence link direction to obtain a target sequence.
In this embodiment, the radio frequency unit may determine whether to perform FFT processing or IFFT processing on the sequence to be processed according to whether the sequence link direction is an uplink direction or a downlink direction, so as to determine whether complex conjugate operation is required to be performed on the sequence to be processed, thereby obtaining the target sequence.
Step S103, determining to call the first DFT module for a single time or call the first DFT module and the second DFT module for a plurality of times according to the sequence length to process the target sequence, so as to obtain a processing result sequence; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer and P is the power of 2.
In this embodiment, the first DFT module is 1 DFT module with variable length being the power of 2, for example, DFT operation may be performed on the to-be-processed sequence with length satisfying 32 points, 64 points, 128 points, 256 points, 512 points, 1024 points, 2048 points, 4096 points; the second DFT module is a K-point DFT module, and the value of K can be set according to actual needs. Therefore, the radio frequency unit can call the corresponding DFT module to finish Fourier transform processing of the sequence to be processed based on the sequence length of the sequence to be processed.
It can be understood that, because the working mode of the radio frequency unit is a time division duplex mode, there will be an interval time slot between uplink and downlink switching to ensure that the first DFT module or the second DFT module completes data processing in the uplink direction or the downlink direction, and perform conversion of the working mode to meet the processing request of the next set of signals in the opposite direction, so as to implement time division multiplexing scheduling on the first DFT module and the second DFT module in the uplink and downlink states, complete FFT/IFFT processing of uplink and downlink time division multiplexing, improve the utilization rate of RU computing resources, and reduce the consumption of storage space and computing resources.
It can be seen that, in the data processing method provided by the embodiment of the present invention, when the radio frequency unit of the base station receives the sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode, the sequence link direction and the sequence length of the sequence to be processed are obtained; determining whether complex conjugate operation is carried out on a sequence to be processed according to the sequence link direction to obtain a target sequence; determining whether to call the first DFT module once or call the first DFT module and the second DFT module for multiple times according to the sequence length to process the target sequence to obtain a processing result sequence; the first DFT module is used for executing P-point DFT operation, and the second DFT module is used for executing K-point DFT operation; p, K is a positive integer and P is the power of 2. Because the radio frequency unit is in a time division duplex mode, an interval time slot exists when the uplink and downlink states are switched to ensure that FFT/IFFT processing of a sequence to be processed can be completed; meanwhile, the time division multiplexing scheduling of the first DFT module and the second DFT module is performed in the uplink and downlink states, so that the consumption of storage space and computing resources is greatly reduced, and the utilization rate of the computing resources is improved.
Optionally, referring to fig. 2, the step S102 specifically includes:
And S1021, if the sequence link direction is the uplink direction, complex conjugate operation is not carried out on the sequence to be processed, and the sequence to be processed is determined to be the target sequence.
In sub-step S1022, if the sequence link direction is the downlink direction, complex conjugate operation is performed on the sequence to be processed, and the data subjected to the complex conjugate operation is determined as the target sequence.
In this embodiment, when the sequence link direction of the sequence to be processed is the uplink direction, which indicates that the sequence to be processed is uplink data sent by a User Equipment (UE) to a base station, FFT processing is required for the sequence to be processed, in this case, complex conjugate operation is not performed on the sequence to be processed, and subsequent processing is directly performed with the sequence to be processed as a target sequence.
When the sequence link direction of the sequence to be processed is the downlink direction, which indicates that the sequence to be processed is downlink data sent by the base station to the user equipment, IFFT processing is needed to be performed on the sequence to be processed, in this case, complex conjugate operation is performed on the sequence to be processed, and the data after the complex conjugate operation is determined as a target sequence to perform subsequent processing.
It can be seen that in the data processing method provided by the embodiment of the present invention, the radio frequency unit determines whether to perform complex conjugate operation on the to-be-processed roughness according to the obtained sequence link direction of the to-be-processed sequence, so as to obtain the target sequence, and perform subsequent processing, thereby implementing switching of the processing mode (FFT mode or IFFT mode) of the to-be-processed sequence according to the sequence link direction of the to-be-processed sequence, and completing FFT/IFFT processing of the to-be-processed sequence.
Optionally, referring to fig. 3, the step S103 specifically includes:
And step S1031, if the sequence length is Q and Q is the power of 2, the first DFT module is called for single time to perform Q-point DFT operation on the target sequence, and a processing result sequence is obtained.
In this embodiment, since the first DFT module may perform a P (variable length is the power of 2) point DFT operation, in the case where the sequence length of the sequence to be processed is Q and Q is the power of 2, the first DFT module may be called once to perform the Q point DFT operation on the target sequence, so as to obtain the processing result sequence.
For example, if the sequence length of the to-be-processed sequence is q=4096=2 12 points, the target sequence may be directly sent to the first DFT module, and the first DFT module performs DFT operation of 4096 points, so as to finally obtain the processing result sequence.
S1032, if the sequence length is KxM and M is the power of 2, then calling K first DFT modules to perform M-point DFT operation on the target sequence to obtain an operation result sequence, and calling M second DFT modules to perform K-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
In this embodiment, since the first DFT module may perform a P (variable length is the power of 2) point DFT operation, and the second DFT module may perform a K point DFT operation, when the sequence length of the sequence to be processed may be represented as kxm by using a mutual quality factor method and satisfy that M is the power of 2, the first DFT module may be used to perform K M point DFT operations on the target sequence to obtain an operation result sequence; and then performing K-point DFT operation on the operation result sequence for M times by using a second DFT module to obtain a processing result sequence.
For example, in the RU product based on Option7-2, the sequence length of the received sequence to be processed is either N-th power of 2 or 1536 points, and k=3 may be set, that is, the second DFT module is used to perform the 3-point DFT operation. For a sequence to be processed with a length of not 1536 points, directly and singly calling a first DFT module for processing; for the sequence to be processed with the length of 1536 points, as 1536=3×512, the first DFT module may be used to perform 512-point DFT operation on the target sequence for 3 times to obtain an operation result sequence; and then, performing 512 3-point DFT operations on the operation result sequence by using a second DFT module to obtain a processing result sequence.
In practical application, since the processing result sequence obtained through FFT/IFFT processing is not in natural order, in order to facilitate the lower module to restore the output processing result sequence to a data sequence in natural order, referring to fig. 4, the data processing method provided in the embodiment of the present invention may further include:
Step S401, determining an index sequence corresponding to the processing result sequence according to the sequence length; the values in the index sequence are used to characterize the order in which the result data in the processing result sequence are arranged in the processing result sequence.
In this embodiment, the index sequence may be calculated according to the sequence length acquired during the FFT processing, or may be generated by reading an internal memory. The length of the index sequence is consistent with the sequence length of the sequence to be processed, and the numerical value at each position in the index sequence represents the arrangement sequence of the result data at the position in the processing result sequence.
That is, the first value of the index sequence represents the specific position (natural sequential coordinates) of the first result data in the processing result sequence, the second value of the index sequence represents the specific position (natural sequential coordinates) of the second result data in the processing result sequence, and so on, the processing result sequence can be restored to the data sequence increasing in natural order.
For example, the first value in the index sequence is 3, indicating that the first result data in the sequence of processing results should be at the 3 rd position in the sequence of processing results; the second value in the index sequence is 4, indicating that the second result data in the sequence of processing results should be at the 4 th position in the sequence of processing results, and so on.
Step S402, the processing result sequence and the index sequence are synchronously output according to the sequence link direction.
In this embodiment, a set of index sequences for converting the processing result sequence into data sequences arranged in a natural order is determined according to the sequence length of the sequence to be processed, and the processing result sequence is output in synchronization with the index sequences. When outputting the processing result sequence, it is necessary to determine whether to perform the output processing of the IFFT according to the sequence link direction of the sequence to be processed.
Optionally, referring to fig. 5, the step S402 may specifically include:
in sub-step S4021, if the sequence link direction is the uplink direction, the processing result sequence and the index sequence are synchronously output.
In sub-step S4022, if the sequence link direction is the downlink direction, complex conjugate operation and power scaling are performed on the result data in the processing result sequence, and the processed processing result sequence and the index sequence are synchronously output.
In this embodiment, when the sequence link direction is the uplink direction, the processing result sequence is directly output without performing the output processing of the IFFT, and the corresponding index sequence is output concomitantly. When the sequence link direction is the downlink direction, the output processing of the IFFT is needed, complex conjugate operation is carried out on the result data in the processing result sequence, meanwhile, calculation processing of power scaling is carried out, and then the processed processing result sequence and the corresponding index sequence are synchronously output.
For example, when the sequence to be processed is 4096 point data in the uplink direction, directly outputting a corresponding processing result sequence and an index sequence determined according to the sequence length (i.e. 4096); and when the sequence to be processed is 4096-point data in the downlink direction, performing complex conjugate operation and power scaling processing on the result data in the processing result sequence to obtain a processed processing result sequence, and synchronously outputting the processed processing result sequence and the index sequence. For the data (processing result sequence/processed processing result sequence, etc.) to be output, the method can determine whether the data buffering is needed by matching the data time sequence in the communication link, and finally, the synchronous output of the processing result sequence and the index sequence is completed.
For the subordinate modules of the radio frequency unit, the received processing result sequence (FFT/IFFT result sequence) can be converted into a data sequence with a natural sequence increasing arrangement through an index sequence, so that the data can be conveniently used.
It can be seen that, according to the data processing method provided by the embodiment of the invention, a group of index sequences for converting the processing result sequence into the data sequence arranged according to the natural sequence are determined according to the sequence length of the sequence to be processed, and the processing result sequence and the index sequences are synchronously output, so that the lower module can restore the output processing result sequence into the data sequence arranged in the natural sequence increasing manner.
In order to perform the respective steps of the above-described embodiments and of the various possible ways, an implementation of a data processing device is given below. Referring to fig. 6, a functional block diagram of a data processing apparatus 600 according to an embodiment of the present invention is shown. It should be noted that, the basic principle and the technical effects of the data processing apparatus 600 provided in this embodiment are the same as those of the foregoing embodiments, and for brevity, reference may be made to the corresponding contents of the foregoing embodiments. The data processing apparatus 600 includes an acquisition module 610, an input arbitration module 620, and a processing module 630.
The acquiring module 610 is configured to acquire a sequence link direction and a sequence length of the to-be-processed sequence when the radio frequency unit of the base station receives the to-be-processed sequence and the working mode of the radio frequency unit is a time division duplex mode.
It is understood that the acquisition module 610 may perform the step S101 described above.
The input arbitration module 620 is configured to determine whether to perform complex conjugate operation on the sequence to be processed according to the sequence link direction, so as to obtain a target sequence.
It is understood that the input arbitration module 620 may perform step S102 described above.
The processing module 630 is configured to determine, according to the sequence length, to call the first DFT module once, or call the first DFT module and the second DFT module multiple times to process the target sequence, so as to obtain a processing result sequence; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer and P is the power of 2.
It is understood that the processing module 630 may perform the step S103 described above.
Optionally, the input arbitration module 620 is specifically configured to: if the sequence link direction is the uplink direction, complex conjugate operation is not carried out on the sequence to be processed, and the sequence to be processed is determined to be a target sequence; if the sequence link direction is the downlink direction, complex conjugate operation is carried out on the sequence to be processed, and the data subjected to the complex conjugate operation is determined as a target sequence.
It will be appreciated that the input arbitration module 620 may specifically perform sub-steps S1021-S1022 described above.
Optionally, the processing module 630 is specifically configured to: if the sequence length is Q and Q is the power of 2, the first DFT module is called for carrying out Q point DFT operation on the target sequence for a single time to obtain a processing result sequence; if the sequence length is KxM and M is the power of 2, calling a first DFT module for M-point DFT operation on the target sequence to obtain an operation result sequence, and calling a second DFT module for M-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
It will be appreciated that the processing module 630 may specifically perform the above-described sub-steps S1031-S1032.
Optionally, referring to fig. 7, the data processing apparatus 600 provided in the embodiment of the present invention may further include an output arbitration module 640, where the output arbitration module 640 is configured to determine an index sequence corresponding to the processing result sequence according to the sequence length; the numerical values in the index sequence are used for representing the arrangement sequence of the result data in the processing result sequence; and synchronously outputting the processing result sequence and the index sequence according to the sequence link direction.
It is understood that the output arbitration module 640 may perform steps S401 and S402 described above.
Optionally, the output arbitration module 640 is specifically configured to: if the sequence link direction is the uplink direction, synchronously outputting a processing result sequence and an index sequence; if the sequence link direction is the downlink direction, complex conjugate operation and power scaling processing are carried out on the result data in the processing result sequence, and the processed processing result sequence and the index sequence are synchronously output.
It will be appreciated that the output arbitration module 640 may specifically perform the above-described sub-steps S4021, S4022.
It can be seen that the data processing apparatus provided in the embodiment of the present invention includes an acquisition module, an input arbitration module, and a processing module, where the acquisition module acquires a sequence link direction and a sequence length of a sequence to be processed when a radio frequency unit of a base station receives the sequence to be processed and a working mode of the radio frequency unit is a time division duplex mode; the input arbitration module determines whether complex conjugate operation is carried out on the sequence to be processed according to the sequence link direction to obtain a target sequence; the processing module determines to call the first DFT module for a single time according to the sequence length, or call the first DFT module and the second DFT module for a plurality of times to process the target sequence, so as to obtain a processing result sequence; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer and P is the power of 2. Because the radio frequency unit is in a time division duplex mode, an interval time slot exists when the uplink and downlink states are switched to ensure that FFT/IFFT processing of a sequence to be processed can be completed; meanwhile, the time division multiplexing scheduling of the first DFT module and the second DFT module is performed in the uplink and downlink states, so that the consumption of storage space and computing resources is greatly reduced, and the utilization rate of the computing resources is improved.
Referring to fig. 8, a block diagram of a radio frequency unit 700 according to an embodiment of the invention is shown. The radio frequency unit 700 includes a memory 710, a processor 720, and a communication module 730. The memory 710, the processor 720, and the communication module 730 are electrically connected to each other directly or indirectly to achieve data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines.
Wherein the memory 710 is used for storing programs or data. The Memory 710 may be, but is not limited to, random access Memory (Random Access Memory, RAM), read Only Memory (ROM), programmable Read Only Memory (Programmable Read-Only Memory, PROM), erasable Read Only Memory (Erasable Programmable Read-Only Memory, EPROM), electrically erasable Read Only Memory (Electric Erasable Programmable Read-Only Memory, EEPROM), etc.
The processor 720 is used to read/write data or programs stored in the memory 710 and perform corresponding functions. For example, the data processing methods disclosed in the above embodiments may be implemented when a computer program stored in the memory 710 is executed by the processor 720.
The communication module 730 is used for establishing a communication connection between the radio frequency unit 700 and other communication terminals through a network, and for transceiving data through the network.
It should be understood that the configuration shown in fig. 8 is merely a schematic diagram of the configuration of the radio frequency unit 700, and that the radio frequency unit 700 may also include more or fewer components than those shown in fig. 8, or have a different configuration than that shown in fig. 8. The components shown in fig. 8 may be implemented in hardware, software, or a combination thereof.
The embodiments of the present invention also provide a computer readable storage medium having stored thereon a computer program which, when executed by the processor 720, implements the data processing method disclosed in the above embodiments.
The embodiment of the invention also provides a base station, which comprises the radio frequency unit 700 disclosed in the above embodiment.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The apparatus embodiments described above are merely illustrative, for example, of the flowcharts and block diagrams in the figures that illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules in the embodiments of the present invention may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (7)

1. A method of data processing, the method comprising:
Under the condition that a radio frequency unit of a base station receives a sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode, acquiring a sequence link direction and a sequence length of the sequence to be processed;
Determining whether complex conjugate operation is carried out on the sequence to be processed according to the sequence link direction to obtain a target sequence; determining whether to perform complex conjugate operation on the sequence to be processed according to the sequence link direction to obtain a target sequence, including: if the sequence link direction is the uplink direction, complex conjugate operation is not carried out on the sequence to be processed, and the sequence to be processed is determined to be a target sequence; if the sequence link direction is the downlink direction, performing complex conjugate operation on the sequence to be processed, and determining the data subjected to the complex conjugate operation as a target sequence;
Determining to call a first DFT module for a single time according to the sequence length, or call the first DFT module and a second DFT module for a plurality of times to process the target sequence, so as to obtain a processing result sequence; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer, and P is the power of 2;
The determining, according to the sequence length, that the target sequence is processed by calling the first DFT module once or calling the first DFT module and the second DFT module multiple times, to obtain a processing result sequence, includes:
If the sequence length is Q and Q is the power of 2, the first DFT module is called for carrying out Q-point DFT operation on the target sequence for a single time to obtain a processing result sequence;
If the sequence length is KxM and M is the power of 2, calling the first DFT module for K times to perform M-point DFT operation on the target sequence to obtain an operation result sequence, and calling the second DFT module for M times to perform K-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
2. The method according to claim 1, wherein the method further comprises:
determining an index sequence corresponding to the processing result sequence according to the sequence length; the numerical values in the index sequence are used for representing the arrangement sequence of the result data in the processing result sequence;
and synchronously outputting the processing result sequence and the index sequence according to the sequence link direction.
3. The method according to claim 2, wherein said synchronizing output of said sequence of processing results and a data index for each of said result data according to said sequence link direction comprises:
if the sequence link direction is the uplink direction, synchronously outputting the processing result sequence and the index sequence;
And if the sequence link direction is the downlink direction, performing complex conjugate operation and power scaling processing on the result data in the processing result sequence, and synchronously outputting the processed processing result sequence and the index sequence.
4.A data processing apparatus, the apparatus comprising:
The acquisition module is used for acquiring the sequence link direction and the sequence length of the sequence to be processed under the condition that the radio frequency unit of the base station receives the sequence to be processed and the working mode of the radio frequency unit is a time division duplex mode;
the input arbitration module is used for determining whether complex conjugate operation is carried out on the sequence to be processed according to the sequence link direction to obtain a target sequence; the input arbitration module is used for not performing complex conjugate operation on the sequence to be processed if the sequence link direction is the uplink direction, and determining the sequence to be processed as a target sequence; if the sequence link direction is the downlink direction, performing complex conjugate operation on the sequence to be processed, and determining the data subjected to the complex conjugate operation as a target sequence;
The processing module is used for determining that the first DFT module is called for one time according to the sequence length, or the first DFT module and the second DFT module are called for multiple times to process the target sequence, so that a processing result sequence is obtained; the first DFT module is used for executing P point DFT operation, and the second DFT module is used for executing K point DFT operation; p, K is a positive integer, and P is the power of 2;
The processing module is used for calling the first DFT module for performing Q-point DFT operation on the target sequence once if the sequence length is Q and Q is the power of 2, so as to obtain a processing result sequence; if the sequence length is KxM and M is the power of 2, calling the first DFT module for K times to perform M-point DFT operation on the target sequence to obtain an operation result sequence, and calling the second DFT module for M times to perform K-point DFT operation on the operation result sequence to obtain a processing result sequence; wherein Q, M is a positive integer.
5. A radio frequency unit comprising a processor and a memory, the memory storing a computer program executable by the processor, the computer program implementing the method of any of claims 1-3 when executed by the processor.
6. A base station comprising the radio frequency unit of claim 5.
7. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method according to any of claims 1-3.
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