CN115912593A - Computing device and power supply method - Google Patents
Computing device and power supply method Download PDFInfo
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Abstract
The application relates to a computing device and a power supply method, and relates to the technical field of data storage. In the application, the computing device comprises a mainboard, a first device, a second device and a power supply unit, wherein the first device is arranged on the mainboard, the first device and the second device are electrically connected with the power supply unit, the minimum working voltage of the first device is a first voltage, the minimum working voltage of the second device is a second voltage, and the first device comprises a Baseboard Management Controller (BMC) and a programmable logic device; according to the method, when the computing equipment is abnormally powered down, the electrolytic capacitor arranged in the power supply unit only supplies power for the first device for storing the fault log data, the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the storage of the fault log data of the computing equipment can be further ensured.
Description
Technical Field
The present application relates to the field of data storage technologies, and in particular, to a computing device and a power supply method.
Background
During normal operation of a computing device, an abnormal power down failure may occur. The abnormal power failure means that the power supply unit of the computing equipment is powered off, loses power or the quality of the power cannot meet the requirement.
When the computing device has an abnormal power failure, the computing device may be down in a very short time, which may cause the computing device to fail to store the fault log data corresponding to the fault, and further cause a difficulty for a technician to determine a cause of the fault, which is not beneficial for the technician to subsequently update and maintain the computing device.
Disclosure of Invention
The embodiment of the application provides a computing device and a power supply method, which are used for finishing storage of fault log data when the computing device has a fault of abnormal power failure.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:
in a first aspect, a computing device is provided, which includes a motherboard, a first type device, a second type device, and a power supply unit, wherein the first type device and the second type device are electrically connected to the power supply unit respectively; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device, the BMC is connected with the programmable logic device, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage; the power supply unit is used for outputting a first working voltage to supply power to the first type of devices and the second type of devices when the computing equipment is normally supplied with power, wherein the first working voltage is greater than or equal to a first voltage, and the first working voltage is greater than or equal to a second voltage; the power supply unit is also used for outputting a second working voltage to supply power to the first type of devices when the computing equipment is powered off, wherein the second working voltage is less than the second voltage and is greater than or equal to the first voltage; the programmable logic device is used for triggering the BMC to store fault log data of the computing device when the computing device is powered off. According to the method, when the computing equipment is abnormally powered down, the electrolytic capacitor arranged in the power supply unit only supplies power to the first functional circuit for storing the relevant devices of the fault log data, so that the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the storage of the fault log data of the computing equipment can be further ensured.
In a possible implementation manner of the first aspect, the power supply unit includes a rectifying power supply circuit and an electrolytic capacitor, the rectifying power supply circuit is connected to an external power supply of the computing device, and the rectifying power supply circuit is configured to supply power to the first type device and the second type device when the computing device is normally powered; the electrolytic capacitor is used for supplying power to the first type of device when the computing equipment is powered off. According to the method, when the computing equipment is abnormally powered down, the electrolytic capacitor arranged in the power supply unit only supplies power for the related devices for storing the fault log data, so that the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the storage of the fault log data of the computing equipment can be further ensured. In a possible implementation manner of the first aspect, the power supply unit further includes a control circuit, the control circuit is configured to control the power supply unit to output the first working voltage when the computing device is normally powered, and the control circuit is further configured to control the power supply unit to output the second working voltage when the computing device is powered down. According to the method, when abnormal power failure occurs to the computing equipment, the output voltage of the power supply unit is switched from the first working voltage to the second working voltage through the control circuit. On the one hand, since the second operating voltage is smaller than the first operating voltage, the discharge time of the electrolytic capacitor can be extended. On the other hand, the output voltage is switched to the second working voltage, so that the second type of devices can be powered off, the power consumption of the second type of devices is reduced, the discharging time of the electrolytic capacitor is further prolonged, and the storage of fault log data is completed.
In a possible implementation manner of the first aspect, the motherboard includes a first line and a second line, the first line includes a plurality of first lines, the power supply unit is electrically connected to the BMC and the programmable logic device through the different first lines, and the power supply unit is electrically connected to the second device through the second line. According to the method, the first type of circuit and the second type of circuit are arranged on the mainboard, then the power supply unit supplies power to the first type of device through the first type of circuit, and supplies power to the second type of device through the second type of circuit. When the computing equipment sends abnormal power failure, the power supply of the first type of device and the power failure of the second type of device are realized based on the electrolytic capacitor arranged in the power supply unit, so that the discharge time of the electrolytic capacitor is prolonged, and the first type of device can be guaranteed to finish the storage of fault log data.
In a possible implementation manner of the first aspect, the programmable logic device is further connected to the control circuit, and the programmable logic device is further configured to trigger the control circuit to switch the output voltage of the power supply unit from the first operating voltage to the second operating voltage when the computing device is powered down. According to the method, when the programmable logic device detects abnormal power failure of the computing equipment, the control circuit is triggered to switch the output voltage of the power supply unit from the first working voltage to the second working voltage, so that the first-class device completes storage of fault log data.
In a possible implementation manner of the first aspect, the power supply unit further includes a detection circuit, the detection circuit is connected to the control circuit, and the detection circuit is configured to trigger the control circuit to switch the output voltage of the power supply unit from the first working voltage to the second working voltage when the computing device is powered down. According to the method, when the detection circuit arranged in the power supply unit detects abnormal power failure of the computing equipment, the control circuit is triggered to switch the output voltage of the power supply unit from the first working voltage to the second working voltage, so that the first device finishes storage of fault log data.
In a possible implementation manner of the first aspect, the first type device further includes a memory, and the memory is connected to the BMC and is used for storing fault log data of the computing device. According to the method, the fault log data are stored in the memory of the mainboard, and then the storage of the fault log data is achieved.
In one possible implementation manner of the first aspect, a memory is provided in the BMC, and the memory is used for storing fault log data of the computing device. According to the method, the fault log data are stored in the memory of the baseboard management controller BMC, and then the storage of the fault log data is achieved.
In a possible implementation manner of the first aspect, the second type device includes one or more of a central processing unit, a graphics processor, a network card, a fan, a memory card, a hard disk backplane, and a tag card. The method provided by the application is realized by powering down a plurality of devices of the second type, i.e. devices other than the devices of the first type. The consumption of the second device on the electric quantity of the electrolytic capacitor can be reduced, and further the storage of fault log data is realized.
In a second aspect, a power supply method is provided, which is applied to a computing device, the computing device includes a motherboard, a first device, a second device, and a power supply unit, and the first device and the second device are respectively electrically connected to the power supply unit; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device, the BMC is connected with the programmable logic device, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage; the power supply unit outputs a first working voltage to supply power to the first type of devices and the second type of devices when the computing equipment is normally powered, wherein the first working voltage is greater than or equal to a first voltage, and the first working voltage is greater than or equal to a second voltage; the power supply unit outputs a second working voltage to supply power to the first type of device when the computing equipment is powered off, wherein the second working voltage is smaller than the second voltage and is greater than or equal to the first voltage; the programmable logic device triggers the BMC to store fault log data of the computing device when the computing device is powered down.
In a third aspect, a power supply unit is provided, which is applied to a computing device, the computing device further includes a motherboard, a first device, a second device, and a power supply unit, the first device and the second device are respectively electrically connected to the power supply unit; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device, the BMC is connected with the programmable logic device, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage; outputting a first working voltage to supply power to the first type of devices and the second type of devices when the computing equipment is normally powered, wherein the first working voltage is greater than or equal to a first voltage, and the first working voltage is greater than or equal to a second voltage; outputting a second working voltage to supply power to the first type of device when the computing equipment is powered off, wherein the second working voltage is less than the second voltage and is greater than or equal to the first voltage; such that the programmable logic device triggers the BMC to store fault log data for the computing device when the computing device is powered down.
In a fourth aspect, there is provided a chip comprising: a processor and interface circuitry; the interface circuit is used for receiving the code instruction and transmitting the code instruction to the processor; a processor for executing the code instructions by the computing device provided by the first aspect to perform any one of the methods provided by the second aspect.
In a fifth aspect, a computer-readable storage medium is provided, which stores computer-executable instructions, and when the computer-executable instructions are executed on the computing device provided in the first aspect, the computer-readable storage medium causes the computing device to perform any one of the methods provided in the second aspect.
In a sixth aspect, there is provided a computer program product comprising computer executable instructions for causing a computing device to perform any one of the methods provided in the second aspect when the computer executable instructions are run on the computing device provided in the first aspect.
For technical effects brought by any one of the design manners in the second aspect to the sixth aspect, reference may be made to technical effects brought by different implementation manners in the first aspect, and details are not described here.
Drawings
Fig. 1 illustrates a schematic structural diagram of a server provided in an embodiment of the present application;
fig. 2 shows a connection diagram of another motherboard provided in an embodiment of the present application;
fig. 3 is a schematic structural diagram illustrating a power supply unit provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram illustrating another power supply unit provided in an embodiment of the present application;
fig. 5 is a schematic diagram illustrating a connection of a power supply unit according to an embodiment of the present application;
fig. 6 shows a schematic flow chart of a power supply method provided in an embodiment of the present application.
Reference numerals are as follows:
100-a server; 110 — devices of the first type; 120-devices of the second type; 130-a power supply unit; 140-a main board; 111-a detector; 112-a controller; 113-a memory; 121-a central processing unit; 122-a graphics processor; 123-network card; 124-a fan; 125-memory card; 126-hard disk; 127-hard disk backplane; 128-mark card; 131-a rectified power supply circuit; 132-an electrolytic capacitor; 133-a control circuit; 134-detection circuit.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the present application, the term "plurality" means two or more than two unless otherwise specified. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
In addition, in order to facilitate clear description of technical solutions of the embodiments of the present application, in the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same items or similar items having substantially the same functions and actions. Those skilled in the art will appreciate that the terms "first," "second," and the like do not denote any order or importance, but rather the terms "first," "second," and the like do not denote any order or importance. Also, in the embodiments of the present application, the words "exemplary" or "such as" are used herein to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present relevant concepts in a concrete fashion for ease of understanding.
During normal operation of a computing device, an abnormal power down failure may occur. The abnormal power failure means that the power supply unit of the computing equipment is powered off, loses power or the quality of the power cannot meet the requirement.
When the computing device has an abnormal power failure, the computing device may be down in a very short time, which results in that the computing device cannot store the fault log data corresponding to the fault, and further causes a difficulty for a technician to determine the reason for the fault, which is not favorable for the technician to subsequently update and maintain the computing device.
In view of this, the present application provides a computing device, including a motherboard, a first type device, a second type device, and a power supply unit, where the first type device is disposed on the motherboard, the first type device and the second type device are electrically connected to the power supply unit, a minimum operating voltage of the first type device is a first voltage, a minimum operating voltage of the second type device is a second voltage, the first type device includes a baseboard management controller BMC and a programmable logic device, and the baseboard management controller BMC is connected to the programmable logic device; the power supply unit is used for outputting a first working voltage to supply power for the first class device and the second class device when the computing equipment is normally powered on, wherein the first working voltage is larger than or equal to the first voltage, the first working voltage is larger than or equal to the second voltage, the power supply unit is also used for outputting a second working voltage to supply power for the first class device when the computing equipment is powered off, the second working voltage is smaller than the second voltage and larger than or equal to the first voltage, and the complex programmable logic device CPLD is used for triggering the baseboard management controller BMC to store fault log data of the computing equipment when the power supply unit is in an abnormal state. According to the method, when the computing equipment is abnormally powered down, the electrolytic capacitor arranged in the power supply unit only supplies power to the first functional circuit for storing the relevant devices of the fault log data, so that the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the storage of the fault log data of the computing equipment can be further ensured.
The computing device may include a device that is powered by a power supply unit and is capable of storing data, such as a server, a general-purpose computer, or a notebook computer. The embodiment of the present application does not specifically limit the specific form of the above-mentioned computing device.
For convenience of description, the following embodiments take the computing device as an example and describe the computing device as an example.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a server 100 provided in the present application. The present application provides a server 100 including: a first type device 110 and a second type device 120, a power supply unit 130, and a main board 140. The first type device 110 is disposed on the main board 140, and the power supply unit 130 is electrically connected to the main board 140 to supply power to the first type device 110 and the second type device 120. The minimum operating voltage of the first type device 110 is a first voltage, and the minimum operating voltage of the second type device 120 is a second voltage, wherein the first voltage is less than the second voltage.
Specifically, referring to fig. 2, the first type device 110 includes a detector 111, a controller 112, and a memory 113. The controller 112 is connected to the detector 111 and the memory 113, respectively. The second type device 120 includes a central processing unit 121, a graphics processing unit 122, a network card 123, a fan 124, a memory card 125, a hard disk 126, a hard disk backplane 127, and a standard card 128.
It should be noted that the second type device 120 may also include one or more of the above devices, or more devices, and the number and type of the second type device 120 are not particularly limited.
In a possible implementation manner, the main board 140 includes a first line and a second line, the first line includes a plurality of first lines, the power supply unit 130 is connected to different first devices 110 through different first lines, the second line includes a plurality of second lines, and the power supply unit 130 is electrically connected to the second devices 120 disposed on the main board 140 through the second lines.
Specifically, the detector 111 is configured to send an instruction to store fault log data to the controller 112 when the server 100 is abnormally powered down, and the controller 112 is configured to store the fault log data of the server 100 in the memory 113 in response to the instruction.
Illustratively, the detector 111 is a Complex Programmable Logic Device (CPLD). The CPLD is a digital integrated circuit in which a user constructs logic functions according to their own needs. The basic design method is to generate corresponding target files by means of an integrated development software platform and methods such as schematic diagrams, hardware description languages and the like, and to transmit codes to a target chip through a download cable (programming in the system) so as to realize the designed digital system. The CPLD is suitable for implementing various algorithms and combinational logic. In one example, the CPLD can detect a power status signal of the power supply unit 130 and determine whether an abnormal power failure occurs in the server 100 according to the power status signal. In another example, the CPLD may also determine whether an abnormal power failure occurs according to a change in the level of the power supply unit 130, for example, the level may be compared with a preset threshold, or may be implemented by using a level comparison circuit. And when the level signal sent by the power supply unit is different from the preset threshold value, determining whether the server is abnormally powered down.
Illustratively, the Controller 112 may be a Baseboard Management Controller (BMC). It should be noted that the controller 112 may be any other type of control chip. The embodiment of the present application does not particularly limit the specific implementation manner of the controller 112.
The memory 113 may be a nonvolatile storage medium, and may be a storage device capable of storing data, such as a hard disk. The hard disk can be a solid state hard disk or a mechanical hard disk. The memory 113 is used to store fault log data.
It should be noted that the arrangement and the number of the memories 113 are not limited to those shown in fig. 1. For example, in one example, the memory 113 may be an external memory provided outside the server 100, and is connected to the server 100 through a slot interface or the like. In another example, the memory 113 may be an internal memory provided in the controller 112.
The power supply unit 130 includes an input terminal electrically connected to an external power source of the server 100 to obtain power from the external power source, and an output terminal electrically connected to the motherboard 140 to supply power to various devices disposed on the motherboard 140, such as the first-type device 110 and the second-type device 120 shown in fig. 1, when the server 100 normally operates.
Specifically, referring to fig. 3, the power supply unit 130 includes a rectifying power supply circuit 131, an electrolytic capacitor 132, and a control circuit 133. The output ends of the electrolytic capacitor 132 and the rectification power supply circuit 131 are connected to a control circuit. The rectifying power supply circuit 131 is used to convert an alternating current input from an external power supply into a direct current. Since electrolytic capacitor 132 has charge/discharge characteristics, electrolytic capacitor 132 can also serve as a backup power source. In this way, the server 100 can charge the electrolytic capacitor 132 when the external power supply supplies power to the power supply unit 130, and when the server is abnormally powered down (i.e. loses the power supply of the external power supply), the electrolytic capacitor 132 supplies power to the electrical devices of the server through discharging, so that the electrical devices in the server can continue to operate.
It should be noted that, in an example, the power supply unit 130 may further include another capacitor having charge and discharge characteristics, for example, a filter capacitor. The filter capacitor is used for supplying power to the electrical appliances of the server when the server is abnormally powered down, so that the electrical appliances in the server can continuously operate. The electrolytic capacitor and the filter capacitor in the above embodiments are only exemplary, and the embodiments of the present application do not particularly limit the type of the capacitor that supplies power to the electrical devices of the server through discharging when the server is powered off.
The control circuit 133 is disposed at an output end of the power supply unit 130, and is configured to adjust an output voltage of the power supply unit 130 from a first operating voltage to a second operating voltage when the server 100 fails due to an abnormal power failure, where the first operating voltage is a rated output voltage of the power supply unit 130 of the server 100 when the server 100 is powered by an external power source. In practice, the rated voltage is greater than the operating voltage of each of the electric devices in the server, i.e., greater than the first voltage and the second voltage, so that the server can be normally operated. The second operating voltage is less than the second voltage and greater than the first voltage, so that when the server 100 is abnormally powered down, the first type device 110 can be powered on according to the second operating voltage, and the second type device is powered off.
In one example, the control circuit 133 may be a direct current/direct current (DC/DC) conversion circuit for adjusting the output voltage of the power supply unit 130 from the first operating voltage to the second operating voltage when the server 100 has a fault of abnormal power down.
Illustratively, the first operating voltage of the power supply unit 130 is 12V. The second operating voltage of the power supply unit 130 is 6V. When the server 100 has a fault of abnormal power down, the DC/DC circuit switches the output voltage of the power supply unit 130 from 12V to 6V.
In another example, the control circuit 133 may be a voltage limiter, which includes a first gear and a second gear, wherein when the current gear of the voltage limiter is in the first gear, the output voltage of the power supply unit 130 is a first operating voltage, and when the current gear of the voltage limiter is in the second gear, the output voltage of the power supply unit 130 is a second operating voltage. Specifically, the control circuit 133 may be configured to, when the server 100 is powered down, switch the current gear from the first gear to the second gear by the voltage limiter, so that the output voltage of the power supply unit 130 is the second operating voltage.
It should be understood that, during normal operation of the server, the power supply unit 130 converts the ac power from the external power source into dc power through its built-in rectifying power circuit, and supplies the dc power to the respective devices on the motherboard 140. When the server is abnormally powered down, the power supply unit 130 adjusts the output voltage to a second working voltage smaller than the first working voltage through the control circuit 133, and then outputs direct current through an electrolytic capacitor built in the power supply unit to supply power to the first type device 110 on the main board 140, or supplies power to an electrical device for storing fault log data to realize storage of the fault log data.
The Power supply unit 130 is, for example, a Power Supply Unit (PSU) for converting a standard ac Power into a low-voltage stable dc Power to supply the dc Power to the electronic devices in the server. The PSU has an input voltage ranging from 100V to 250V, an input ac frequency of 50Hz or 60Hz, and may output one or more stable dc voltages, which may be 12V, 6V, 5V or 3.3V, for example. It should be noted that the output voltage of the power supply unit 130 can be set according to the requirement, and the rated output voltage of the power supply unit 130 during normal operation is not particularly limited herein.
According to the method, when the computing equipment is abnormally powered down, the electrolytic capacitor arranged in the power supply unit only supplies power for the related devices for storing the fault log data, the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the first-class devices 110 can be further ensured to store the fault log data of the computing equipment.
It should be noted that the number of the power supply unit 130 may be plural. The plurality of power supply units 130 may be electrically connected to the main board 140, respectively, to supply power to electrical devices disposed on the main board 140. The power supply units 130 may also be connected to other circuit boards in the server 100 to supply power to the electrical devices disposed on the other circuit boards. The number of power supply units is not particularly limited herein. Specifically, when the server 100 is abnormally powered down, the power supply units 130 output direct current at the second working voltage through the built-in electrolytic capacitors 132 to maintain the operation of the first type devices 110, thereby ensuring the storage of the fault log data of the computing device.
In a possible implementation manner, referring to fig. 4, the power supply unit further includes a detection circuit 134, the detection circuit 134 is connected to the control circuit 133, and when an abnormal power failure occurs in the server 100, the detection circuit 134 detects the abnormal power failure and sends an instruction to the control circuit 133, so that the control circuit 133 adjusts the output voltage of the power supply unit 130 from the first working voltage to the second working voltage.
According to the method provided by the application, when the detection circuit 134 built in the power supply unit 130 detects that the server 100 is abnormally powered down, the trigger control circuit 133 switches the output voltage of the power supply unit 130 from the first working voltage to the second working voltage, so that the first-type device 110 completes storage of fault log data.
It should be noted that, in an example, the rectified Power circuit 131 and the detection circuit 134 may be integrated into a Power Factor Correction (PFC) circuit. The specific implementation manner of the rectification power circuit 131 and the detection circuit 134 is not particularly limited in the embodiments of the present application.
In another possible implementation manner, referring to fig. 5, the detector 111 disposed on the motherboard 140 is connected to the control circuit 133, and when an abnormal power failure occurs in the server 100, the detector 111 detects the abnormal power failure and sends an instruction to the control circuit 133, so that the control circuit 133 adjusts the output voltage of the power supply unit 130 from the first operating voltage to the second operating voltage.
In the method provided by the application, when the detector 111 arranged on the main board 140 detects that the server is abnormally powered down, the trigger control circuit 133 switches the output voltage of the power supply unit 130 from the first working voltage to the second working voltage, so that the first-type device 110 completes storage of fault log data.
In one possible implementation, the second operating voltage is greater than the first voltage, and the second operating voltage is less than the second voltage. It is also understood that the second operating voltage is greater than the minimum operating voltage of the first device type 110 and less than the minimum operating voltage of the second device type 120.
Specifically, when the server 100 is abnormally powered down, the power supply unit 130 outputs direct current at the second working voltage, because the minimum working voltage of the first device 110 is less than the second working voltage, the first device 110 can operate based on the direct current provided by the power supply unit 130 at this time, and meanwhile, when the detector 111 detects that the power supply unit is powered down, an instruction is sent to the controller 112, so that the controller 112 stores the fault log data in the memory 113. Meanwhile, since the minimum operating voltage of the second type device 120 is greater than the second operating voltage, the second type device 120 cannot operate based on the direct current provided by the power supply unit 130, that is, is in a power-down state.
For example, the first operating voltage of the power supply unit 130 may be 12V, the second operating voltage may be 6V, the minimum operating voltage of the first device 110 may be 5.5V, and the minimum operating voltage of the second device 120 may be 9V. Therefore, when the power supply unit 130 operates normally, the dc power is output at the first operating voltage of 12V, and at this time, 12V is greater than the minimum operating voltage of the first device 110 and the second device 120, and the first device 110 and the second device 120 operate normally. When the server 100 is abnormally powered down, the power supply unit 130 outputs direct current at a second working voltage of 6V, at this time, 6V is greater than the minimum working voltage of 5.5V of the first device 110 and is less than the minimum working voltage of 9V of the second device 120, and at this time, the first device 110 normally works. The second type device 120 is in a power-down state and cannot work normally.
It should be noted that the minimum operating voltage of the first-type device 110 may be smaller than the second operating voltage, for example, the minimum operating voltage of the first-type device 110 may be 5V. The specific value of the minimum operating voltage of the first type device 110 is not particularly limited herein. The minimum operating voltage of the second device 120 may be greater than the second operating voltage, for example, the minimum operating voltage of the second device 120 may be 9.2V. The specific value of the minimum operating voltage of the second type device 120 is not particularly limited.
Therefore, the method provided by the present application can avoid the second type device 120 from consuming the electric quantity stored in the electrolytic capacitor 132, that is, can prolong the discharging time of the electrolytic capacitor 132 in the power supply unit 130 under the condition of abnormal power failure of the server, thereby ensuring that the first type device 110 writes the fault log data of the server 100 into the memory 113.
In addition, those skilled in the art will understand that the illustrated structure of the present embodiment does not constitute a specific limitation to the server 100. In other embodiments of the present application, the server 100 may include more or fewer components than shown, or combine certain components, or split certain components, or a different arrangement of components.
The following describes a power supply method provided in an embodiment of the present application with reference to the drawings of the specification.
Fig. 6 is a flowchart of a power supply method according to an embodiment of the present application. Alternatively, the method may be performed by the server 100 having the hardware structure shown in fig. 1, where the method includes:
s601, when the server is in an abnormal power failure state, the power supply unit outputs a second working voltage.
Specifically, when the server is in a normal working state, the power supply unit outputs a first working voltage.
S602, the detector sends an instruction to the controller when the power supply unit is in an abnormal state.
Specifically, the minimum operating voltage of the detector and the controller is less than the first operating voltage.
And S603, the controller responds to the instruction and stores the fault log data of the server.
From S601 to S603, it can be known that, when the computing device is abnormally powered down, the power supply unit supplies power to only the first functional circuit for supplying power to the related device storing the fault log data through the electrolytic capacitor built in the power supply unit, so that the discharging time of the electrolytic capacitor can be effectively prolonged under the condition that the electric quantity of the electrolytic capacitor is limited, and the storage of the fault log data of the computing device can be further ensured.
The above description has been directed primarily to the embodiments of the present application from a methodological perspective. It is to be understood that the power supply unit includes at least one of a hardware structure and a software module corresponding to perform the respective functions in order to implement the above-described functions. Those of skill in the art will readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The embodiment of the application also provides a power supply unit, which is applied to computing equipment, wherein the computing equipment further comprises a mainboard, a first device, a second device and a power supply unit, and the first device and the second device are respectively electrically connected with the power supply unit; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device, the BMC is connected with the programmable logic device, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage; outputting a first working voltage to supply power to the first type of devices and the second type of devices when the computing equipment is normally powered, wherein the first working voltage is greater than or equal to a first voltage, and the first working voltage is greater than or equal to a second voltage; outputting a second working voltage to supply power to the first type of device when the computing equipment is powered off, wherein the second working voltage is less than the second voltage and is greater than or equal to the first voltage; such that the programmable logic device triggers the BMC to store fault log data for the computing device when the computing device is powered down.
For the detailed description of the above alternative modes, reference may be made to the foregoing method embodiments, which are not described herein again. In addition, for the explanation and the description of the beneficial effects of any one of the power supply units provided above, reference may be made to the corresponding method embodiments described above, and details are not repeated.
The embodiments of the present application also provide a computer-readable storage medium, in which at least one computer instruction is stored, and the at least one computer instruction is loaded and executed by a processor to implement the method according to the above embodiments. For the explanation and the description of the beneficial effects of any of the computer-readable storage media provided above, reference may be made to the corresponding embodiments described above, and details are not repeated here.
The embodiment of the application also provides a chip. The chip integrates a control circuit and one or more ports for realizing the functions of the fault injection power supply unit. Optionally, the functions supported by the chip may refer to the above, and are not described herein again. Those skilled in the art will appreciate that all or part of the steps for implementing the above embodiments may be performed by a program instructing the relevant hardware. The program of (a) may be stored in a computer-readable storage medium. The storage medium mentioned above may be a read-only memory, a random access memory, or the like. The processing unit or processor may be a central processing unit, a general purpose processor, an Application Specific Integrated Circuit (ASIC), a microprocessor (DSP), a Field Programmable Gate Array (FPGA) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof.
The embodiments of the present application also provide a computer program product containing instructions, which when executed on a computer, cause the computer to execute any one of the methods in the above embodiments. The computer program product includes one or more computer instructions. The procedures or functions according to the embodiments of the present application are all or partially generated when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). Computer-readable storage media can be any available media that can be accessed by a computer or can comprise one or more data storage devices, such as servers, data centers, and the like, that can be integrated with the media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., SSD), among others.
It should be noted that the above devices for storing computer instructions or computer programs provided in the embodiments of the present application, such as, but not limited to, the above memories, computer readable storage media, communication chips, and the like, are all nonvolatile (non-volatile). Those skilled in the art will recognize that the functionality described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof, in one or more of the examples described above. When implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable storage medium. Computer-readable storage media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. The above description is only exemplary of the present application and should not be taken as limiting, and any modifications, equivalents, improvements and the like that are made within the spirit and principle of the present application should be included in the scope of the present application.
Claims (10)
1. A computing device is characterized by comprising a mainboard, a first class device, a second class device and a power supply unit, wherein the first class device and the second class device are respectively and electrically connected with the power supply unit; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device (PLC), the BMC is connected with the PLC, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage;
the power supply unit is used for outputting a first working voltage to supply power to the first class device and the second class device when the computing equipment is normally supplied with power, wherein the first working voltage is greater than or equal to the first voltage, and the first working voltage is greater than or equal to the second voltage;
the power supply unit is further used for outputting a second working voltage to supply power to the first type of device when the computing equipment is powered off, wherein the second working voltage is smaller than the second voltage and is greater than or equal to the first voltage;
the programmable logic device is used for triggering the BMC to store fault log data of the computing device when the computing device is powered off.
2. The computing device of claim 1, wherein the power supply unit comprises a rectifying power circuit and an electrolytic capacitor, the rectifying power circuit is connected with an external power supply of the computing device, and the rectifying power circuit is used for supplying power to the first type device and the second type device when the computing device is normally powered; the electrolytic capacitor is used for supplying power to the first type of device when the computing equipment is powered off.
3. The computing device of claim 1 or 2, wherein the power supply unit further comprises a control circuit, the control circuit is configured to control the power supply unit to output the first operating voltage when the computing device is normally powered, and the control circuit is further configured to control the power supply unit to output the second operating voltage when the computing device is powered down.
4. The computing device of any of claims 1-3, wherein the motherboard includes a first type of line and a second type of line, wherein the first type of line includes a plurality of first lines, wherein the power unit is electrically connected to the BMC and the programmable logic device via different ones of the first lines, and wherein the power unit is electrically connected to the second type of device via the second type of line.
5. The computing device of any of claims 1-4, wherein the programmable logic device is further coupled to the control circuit, and wherein the programmable logic device is further configured to trigger the control circuit to switch the output voltage of the power supply unit from the first operating voltage to the second operating voltage when the computing device is powered down.
6. The computing device of any one of claims 1-4, wherein the power supply unit further comprises a detection circuit, the detection circuit being coupled to the control circuit, the detection circuit configured to trigger the control circuit to switch the output voltage of the power supply unit from the first operating voltage to the second operating voltage when the computing device is powered down.
7. The computing device of any of claims 1-6, wherein the first class of device further comprises a memory coupled to the BMC, the memory configured to store fault log data for the computing device.
8. The computing device of any of claims 1-6, wherein the BMC is configured with a memory configured to store fault log data for the computing device.
9. The computing device of any of claims 1-8, wherein the second type of device comprises one or more of a central processing unit, a graphics processor, a network card, a fan, a memory card, a hard disk backplane, and a badge.
10. The power supply method is applied to computing equipment, wherein the computing equipment comprises a mainboard, a first device, a second device and a power supply unit, and the first device and the second device are respectively electrically connected with the power supply unit; the first type of device is arranged on the mainboard and comprises a Baseboard Management Controller (BMC) and a programmable logic device, the BMC is connected with the programmable logic device, the minimum working voltage of the first type of device is a first voltage, and the minimum working voltage of the second type of device is a second voltage; the power supply unit outputs a first working voltage to supply power to the first class device and the second class device when the computing equipment is normally powered, wherein the first working voltage is greater than or equal to the first voltage, and the first working voltage is greater than or equal to the second voltage;
the power supply unit outputs a second working voltage to supply power to the first type of device when the computing equipment is powered off, wherein the second working voltage is smaller than the second voltage and is greater than or equal to the first voltage;
and the programmable logic device triggers the BMC to store fault log data of the computing device when the computing device is powered down.
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| CN202211398230.9A CN115912593A (en) | 2022-11-09 | 2022-11-09 | Computing device and power supply method |
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| CN202211398230.9A CN115912593A (en) | 2022-11-09 | 2022-11-09 | Computing device and power supply method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116520957A (en) * | 2023-06-28 | 2023-08-01 | 新华三信息技术有限公司 | Mainboard, mainboard power supply control method and electronic equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116520957A (en) * | 2023-06-28 | 2023-08-01 | 新华三信息技术有限公司 | Mainboard, mainboard power supply control method and electronic equipment |
| CN116520957B (en) * | 2023-06-28 | 2023-10-03 | 新华三信息技术有限公司 | Mainboard, mainboard power supply control method and electronic equipment |
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